diff options
| author | H Hartley Sweeten <hsweeten@visionengravers.com> | 2015-11-18 10:07:25 -0700 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2015-12-21 15:57:40 -0800 |
| commit | 774a8c57b14646c74c439097e1e6d06b50c21b85 (patch) | |
| tree | 302901c8196c1cdd807d80ad69ab538c684c6e35 /drivers/staging | |
| parent | db2c830d467db6e10e30729f16401ecd4b6480aa (diff) | |
staging: comedi: adv_pci_dio: cleanup PCI-1753 interrupt register defines
For aesthetics, replace these defines with some macros.
Refactor the switch in pci_dio_reset() to not require the fallthrough
comment.
Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com>
Reviewed-by: Ian Abbott <abbotti@mev.co.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/staging')
| -rw-r--r-- | drivers/staging/comedi/drivers/adv_pci_dio.c | 33 |
1 files changed, 14 insertions, 19 deletions
diff --git a/drivers/staging/comedi/drivers/adv_pci_dio.c b/drivers/staging/comedi/drivers/adv_pci_dio.c index c216f39af595..df60503d5154 100644 --- a/drivers/staging/comedi/drivers/adv_pci_dio.c +++ b/drivers/staging/comedi/drivers/adv_pci_dio.c @@ -60,15 +60,9 @@ enum hw_cards_id { /* PCI-1739U, PCI-1750, PCI1751 interrupt control registers */ #define PCI1750_INT_REG 0x20 /* R/W: status/control */ -/* Advantech PCI-1751/3/3E */ -#define PCI1753_ICR0 16 /* R/W: Interrupt control register group 0 */ -#define PCI1753_ICR1 17 /* R/W: Interrupt control register group 1 */ -#define PCI1753_ICR2 18 /* R/W: Interrupt control register group 2 */ -#define PCI1753_ICR3 19 /* R/W: Interrupt control register group 3 */ -#define PCI1753E_ICR0 48 /* R/W: Interrupt control register group 0 */ -#define PCI1753E_ICR1 49 /* R/W: Interrupt control register group 1 */ -#define PCI1753E_ICR2 50 /* R/W: Interrupt control register group 2 */ -#define PCI1753E_ICR3 51 /* R/W: Interrupt control register group 3 */ +/* PCI-1753, PCI-1753E interrupt control registers */ +#define PCI1753_INT_REG(x) (0x10 + (x)) /* R/W: control group 0 to 3 */ +#define PCI1753E_INT_REG(x) (0x30 + (x)) /* R/W: control group 0 to 3 */ /* Advantech PCI-1752/4/6 */ #define PCI1754_6_ICR0 0x08 /* R/W: Interrupt control register group 0 */ @@ -310,17 +304,18 @@ static int pci_dio_reset(struct comedi_device *dev) case TYPE_PCI1751: outb(0x88, dev->iobase + PCI1750_INT_REG); break; - case TYPE_PCI1753E: - outb(0x88, dev->iobase + PCI1753E_ICR0); - outb(0x80, dev->iobase + PCI1753E_ICR1); - outb(0x80, dev->iobase + PCI1753E_ICR2); - outb(0x80, dev->iobase + PCI1753E_ICR3); - /* fallthrough */ case TYPE_PCI1753: - outb(0x88, dev->iobase + PCI1753_ICR0); - outb(0x80, dev->iobase + PCI1753_ICR1); - outb(0x80, dev->iobase + PCI1753_ICR2); - outb(0x80, dev->iobase + PCI1753_ICR3); + case TYPE_PCI1753E: + outb(0x88, dev->iobase + PCI1753_INT_REG(0)); + outb(0x80, dev->iobase + PCI1753_INT_REG(1)); + outb(0x80, dev->iobase + PCI1753_INT_REG(2)); + outb(0x80, dev->iobase + PCI1753_INT_REG(3)); + if (board->cardtype == TYPE_PCI1753E) { + outb(0x88, dev->iobase + PCI1753E_INT_REG(0)); + outb(0x80, dev->iobase + PCI1753E_INT_REG(1)); + outb(0x80, dev->iobase + PCI1753E_INT_REG(2)); + outb(0x80, dev->iobase + PCI1753E_INT_REG(3)); + } break; case TYPE_PCI1754: outw(0x08, dev->iobase + PCI1754_6_ICR0); |