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authorLogan Gunthorpe <logang@deltatee.com>2019-10-22 16:01:20 -0600
committerJoerg Roedel <jroedel@suse.de>2019-10-30 10:36:19 +0100
commit3332364e4ebc0581d133a334645a20fd13b580f1 (patch)
tree3244dce6ffe3c652f0f64858db7a4effa980bcdb /drivers/iommu/amd_iommu_types.h
parenta5bbbf37c6f8522a1afd46c37b5a0d1ce63232b7 (diff)
iommu/amd: Support multiple PCI DMA aliases in device table
Non-Transparent Bridge (NTB) devices (among others) may have many DMA aliases seeing the hardware will send requests with different device ids depending on their origin across the bridged hardware. See commit ad281ecf1c7d ("PCI: Add DMA alias quirk for Microsemi Switchtec NTB") for more information on this. The AMD IOMMU ignores all the PCI aliases except the last one so DMA transfers from these aliases will be blocked on AMD hardware with the IOMMU enabled. To fix this, ensure the DTEs are cloned for every PCI alias. This is done by copying the DTE data for each alias as well as the IVRS alias every time it is changed. Signed-off-by: Logan Gunthorpe <logang@deltatee.com> Signed-off-by: Joerg Roedel <jroedel@suse.de>
Diffstat (limited to 'drivers/iommu/amd_iommu_types.h')
-rw-r--r--drivers/iommu/amd_iommu_types.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/iommu/amd_iommu_types.h b/drivers/iommu/amd_iommu_types.h
index becbd3bd9180..b611459f369a 100644
--- a/drivers/iommu/amd_iommu_types.h
+++ b/drivers/iommu/amd_iommu_types.h
@@ -638,8 +638,8 @@ struct iommu_dev_data {
struct list_head list; /* For domain->dev_list */
struct llist_node dev_data_list; /* For global dev_data_list */
struct protection_domain *domain; /* Domain the device is bound to */
+ struct pci_dev *pdev;
u16 devid; /* PCI Device ID */
- u16 alias; /* Alias Device ID */
bool iommu_v2; /* Device can make use of IOMMUv2 */
bool passthrough; /* Device is identity mapped */
struct {