diff options
| author | Evan Quan <evan.quan@amd.com> | 2020-07-10 12:21:53 +0800 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2020-07-15 12:43:25 -0400 |
| commit | 5a7092ae564ceb7eb13f169bac2f164e564e24e3 (patch) | |
| tree | a0c4b2799ec60345d92730cb96a1dd65639b4d1b /drivers/gpu | |
| parent | 10e96d897329644f5ce596d8d516890baae49320 (diff) | |
drm/amd/powerplay: apply gfxoff disablement/enablement for all SMU11 ASICs
Before and after setting gfx clock soft max/min frequency.
Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu')
| -rw-r--r-- | drivers/gpu/drm/amd/powerplay/smu_v11_0.c | 6 |
1 files changed, 2 insertions, 4 deletions
diff --git a/drivers/gpu/drm/amd/powerplay/smu_v11_0.c b/drivers/gpu/drm/amd/powerplay/smu_v11_0.c index 6c16fb1d96ad..234715a42b6c 100644 --- a/drivers/gpu/drm/amd/powerplay/smu_v11_0.c +++ b/drivers/gpu/drm/amd/powerplay/smu_v11_0.c @@ -1777,8 +1777,7 @@ int smu_v11_0_set_soft_freq_limited_range(struct smu_context *smu, if (clk_id < 0) return clk_id; - if (clk_type == SMU_GFXCLK && - adev->asic_type == CHIP_SIENNA_CICHLID) + if (clk_type == SMU_GFXCLK) amdgpu_gfx_off_ctrl(adev, false); if (max > 0) { @@ -1798,8 +1797,7 @@ int smu_v11_0_set_soft_freq_limited_range(struct smu_context *smu, } out: - if (clk_type == SMU_GFXCLK && - adev->asic_type == CHIP_SIENNA_CICHLID) + if (clk_type == SMU_GFXCLK) amdgpu_gfx_off_ctrl(adev, true); return ret; |