diff options
| author | Philipp Zabel <p.zabel@pengutronix.de> | 2017-02-24 18:31:05 +0100 |
|---|---|---|
| committer | Philipp Zabel <p.zabel@pengutronix.de> | 2017-03-15 15:42:29 +0100 |
| commit | eb8c88808c8307b05ce42e101753cb2518c6d14e (patch) | |
| tree | 611b38e501938c45ff62972b62f480838f057213 /drivers/gpu/ipu-v3 | |
| parent | cf92fefd040e6117fbcd4ce2baa9c54ae515e0c6 (diff) | |
drm/imx: add deferred plane disabling
The DP (display processor) channel disable code tried to busy wait for
the DP sync flow end interrupt status bit when disabling the partial
plane without a full modeset. That never worked reliably, and it was
disabled completely by the recent "gpu: ipu-v3: remove IRQ dance on DC
channel disable" patch, causing ipu_wait_interrupt to always time out
after 50 ms, which in turn would trigger a timeout in
drm_atomic_helper_wait_for_vblanks.
This patch changes ipu_plane_atomic_disable to only queue a DP channel
register update at the next frame boundary and set a flag, which can be
done without any waiting whatsoever. The imx_drm_atomic_commit_tail then
calls a new ipu_plane_disable_deferred function that does the actual
IDMAC teardown of the planes that are flagged for deferred disabling,
after waiting for the vblank.
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Diffstat (limited to 'drivers/gpu/ipu-v3')
| -rw-r--r-- | drivers/gpu/ipu-v3/ipu-dp.c | 3 |
1 files changed, 0 insertions, 3 deletions
diff --git a/drivers/gpu/ipu-v3/ipu-dp.c b/drivers/gpu/ipu-v3/ipu-dp.c index 0e09c98248a0..9b2b3fa479c4 100644 --- a/drivers/gpu/ipu-v3/ipu-dp.c +++ b/drivers/gpu/ipu-v3/ipu-dp.c @@ -277,9 +277,6 @@ void ipu_dp_disable_channel(struct ipu_dp *dp, bool sync) writel(0, flow->base + DP_FG_POS); ipu_srm_dp_update(priv->ipu, sync); - if (ipu_idmac_channel_busy(priv->ipu, IPUV3_CHANNEL_MEM_BG_SYNC)) - ipu_wait_interrupt(priv->ipu, IPU_IRQ_DP_SF_END, 50); - mutex_unlock(&priv->mutex); } EXPORT_SYMBOL_GPL(ipu_dp_disable_channel); |