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authorrex zhu <rex.zhu@amd.com>2018-06-27 17:34:37 +0800
committerAlex Deucher <alexander.deucher@amd.com>2018-07-05 16:38:47 -0500
commit66917e56dcfe8d2ba00f2d86c7dfbf953e0604ae (patch)
treebf98c1d1445cb556d6a5563659f5841e541ef353 /drivers/gpu/drm
parentf0626896bb2f09e8ce6438f380ac7f6511b72f84 (diff)
drm/amd/display: Fix dm-pp clks type convert error
fix a typo when convert displayphyclk type. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm')
-rw-r--r--drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c3
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c
index 2acbcc7a9412..cf92d7a24f33 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c
@@ -167,6 +167,9 @@ static enum amd_pp_clock_type dc_to_pp_clock_type(
amd_pp_clk_type = amd_pp_f_clock;
break;
case DM_PP_CLOCK_TYPE_DISPLAYPHYCLK:
+ amd_pp_clk_type = amd_pp_phy_clock;
+ break;
+ case DM_PP_CLOCK_TYPE_DPPCLK:
amd_pp_clk_type = amd_pp_dpp_clock;
break;
default: