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authorMiquel Raynal <miquel.raynal@bootlin.com>2019-12-24 15:38:52 +0100
committerHeiko Stuebner <heiko@sntech.de>2020-01-05 12:10:11 +0100
commiteb503ee2c9bfb0392a204d9705ca70d683a08cdd (patch)
tree36b25bee445b0817999545d33e73c68d0f3ba91f /drivers/gpu/drm/rockchip
parent1e0b0a0cf31a1c2d7770bed904c66c4e71e01311 (diff)
drm/rockchip: lvds: Fix indentation of a #define
Fix a #define indentation before adding more lines. Fixes: 34cc0aa25456 ("drm/rockchip: Add support for Rockchip Soc LVDS") Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de> Link: https://patchwork.freedesktop.org/patch/msgid/20191224143900.23567-4-miquel.raynal@bootlin.com
Diffstat (limited to 'drivers/gpu/drm/rockchip')
-rw-r--r--drivers/gpu/drm/rockchip/rockchip_lvds.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/rockchip/rockchip_lvds.h b/drivers/gpu/drm/rockchip/rockchip_lvds.h
index 029bad8e1a14..1387bcbc4bc0 100644
--- a/drivers/gpu/drm/rockchip/rockchip_lvds.h
+++ b/drivers/gpu/drm/rockchip/rockchip_lvds.h
@@ -70,7 +70,7 @@
#define RK3288_LVDS_CFG_REG21 0x84
#define RK3288_LVDS_CFG_REG21_TX_ENABLE 0x92
#define RK3288_LVDS_CFG_REG21_TX_DISABLE 0x00
-#define RK3288_LVDS_CH1_OFFSET 0x100
+#define RK3288_LVDS_CH1_OFFSET 0x100
/* fbdiv value is split over 2 registers, with bit8 in reg2 */
#define RK3288_LVDS_PLL_FBDIV_REG2(_fbd) \