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authorAlex Deucher <alexander.deucher@amd.com>2020-02-18 13:20:30 -0500
committerAlex Deucher <alexander.deucher@amd.com>2020-02-19 11:03:24 -0500
commit6c62ce8073daf27ae3fd03b6929d6cea3887eeb2 (patch)
tree2f8a5388197f848ec6f013321468d018f37dfbcd /drivers/gpu/drm/msm/dsi/pll/dsi_pll_10nm.c
parentdebcf83770073f90c9b075134650fdc758ff3033 (diff)
drm/amdgpu/display: clean up hdcp workqueue handling
Use the existence of the workqueue itself to determine when to enable HDCP features rather than sprinkling asic checks all over the code. Also add a check for the existence of the hdcp workqueue in the irq handling on the off chance we get and HPD RX interrupt with the CP bit set. This avoids a crash if the driver doesn't support HDCP for a particular asic. Fixes: 96a3b32e67236f ("drm/amd/display: only enable HDCP for DCN+") Bug: https://bugzilla.kernel.org/show_bug.cgi?id=206519 Reviewed-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/msm/dsi/pll/dsi_pll_10nm.c')
0 files changed, 0 insertions, 0 deletions