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authorChris Wilson <chris@chris-wilson.co.uk>2017-04-12 12:01:10 +0100
committerChris Wilson <chris@chris-wilson.co.uk>2017-04-12 12:35:16 +0100
commitef74921bc679232c6590afa881d3ea605ebdddd8 (patch)
tree486080f33b4d2e9d2bdebea6dcfeb3de6a4c13e9 /drivers/gpu/drm/i915/selftests/i915_gem_object.c
parentaab9094b032528da1b32cc5203964075cd04d5be (diff)
drm/i915: Combine write_domain flushes to a single function
In the next patch, we will introduce a new cache domain for differentiating between GTT access and direct WC access. This will require us to include WC in our write_domain flushes. Rather than duplicate a third function, combine the existing two into one and flushing WC writes will then be automatically handled as well. v2: Be smarter and clearer by passing in the write domains to flush (Joonas) v3: One missed ~ in v2 conversion Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/20170412110111.26626-1-chris@chris-wilson.co.uk
Diffstat (limited to 'drivers/gpu/drm/i915/selftests/i915_gem_object.c')
-rw-r--r--drivers/gpu/drm/i915/selftests/i915_gem_object.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/selftests/i915_gem_object.c b/drivers/gpu/drm/i915/selftests/i915_gem_object.c
index 67d82bf1407f..163424748ee0 100644
--- a/drivers/gpu/drm/i915/selftests/i915_gem_object.c
+++ b/drivers/gpu/drm/i915/selftests/i915_gem_object.c
@@ -266,7 +266,7 @@ static int check_partial_mapping(struct drm_i915_gem_object *obj,
if (offset >= obj->base.size)
continue;
- i915_gem_object_flush_gtt_write_domain(obj);
+ flush_write_domain(obj, ~I915_GEM_DOMAIN_CPU);
p = i915_gem_object_get_page(obj, offset >> PAGE_SHIFT);
cpu = kmap(p) + offset_in_page(offset);