path: root/drivers/gpu/drm/i915/intel_drv.h
diff options
authorDave Airlie <>2018-11-16 08:52:14 +1000
committerDave Airlie <>2018-11-16 08:52:14 +1000
commit20325e8a614377967644cf63050095c9f2ea8ab9 (patch)
tree978f172d1d3cf2cb3ed51f2a29ac16518be22a68 /drivers/gpu/drm/i915/intel_drv.h
parent9826b1138e497dfb48f5cc64a82c219b4d0932da (diff)
parent6e8adf6f4a4fa57dd3bef6b70de96e2b7b311204 (diff)
Merge tag 'drm-intel-fixes-2018-11-15' of git:// into drm-fixesdrm-fixes-2018-11-16
- Fix Bugzilla #108712: Fix incorrect EU count report from kernel - Fix to account for scale factor when calculating initial phase on scaled output - Avoid too trigger-happy HPD storm detection and fix a race and an OOPS for MST systems. - Relocation race fix for Gen4/5 - A couple ICL fixes and dependencies for above Fixes:. Signed-off-by: Dave Airlie <> From: Joonas Lahtinen <> Link:
Diffstat (limited to 'drivers/gpu/drm/i915/intel_drv.h')
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index f8dc84b2d2d3..8b298e5f012d 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -1646,7 +1646,7 @@ void intel_mode_from_pipe_config(struct drm_display_mode *mode,
void intel_crtc_arm_fifo_underrun(struct intel_crtc *crtc,
struct intel_crtc_state *crtc_state);
-u16 skl_scaler_calc_phase(int sub, bool chroma_center);
+u16 skl_scaler_calc_phase(int sub, int scale, bool chroma_center);
int skl_update_scaler_crtc(struct intel_crtc_state *crtc_state);
int skl_max_scale(const struct intel_crtc_state *crtc_state,
u32 pixel_format);