diff options
| author | Igor Kravchenko <Igor.Kravchenko@amd.com> | 2020-07-10 16:24:30 -0400 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2020-07-21 15:37:39 -0400 |
| commit | 3b26ca2db30d0c43bef67590251627c322830554 (patch) | |
| tree | b266001e3f26fa668358cdd8fa7edd54da53148a /drivers/gpu/drm/amd/display/dc | |
| parent | e10517b3cb93f90c8a790def6ae884d1e2b65ee7 (diff) | |
drm/amd/display: interface to obtain minimum plane size caps
[Why]
Implement an interface to obtain plane size caps
[How]
Add min_width, min_height fields to dc_plane_cap structure.
Set values to 16x16 for discrete ASICs, and 64x64 for others.
Signed-off-by: Igor Kravchenko <Igor.Kravchenko@amd.com>
Reviewed-by: Aric Cyr <Aric.Cyr@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc')
5 files changed, 18 insertions, 5 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dc.h b/drivers/gpu/drm/amd/display/dc/dc.h index e5a1a9eb6217..a5faedf66470 100644 --- a/drivers/gpu/drm/amd/display/dc/dc.h +++ b/drivers/gpu/drm/amd/display/dc/dc.h @@ -96,6 +96,9 @@ struct dc_plane_cap { uint32_t nv12; uint32_t fp16; } max_downscale_factor; + // minimal width/height + uint32_t min_width; + uint32_t min_height; }; // Color management caps (DPP and MPC) diff --git a/drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c b/drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c index 9597fc79d7fa..1d5385072a39 100644 --- a/drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c +++ b/drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c @@ -423,7 +423,9 @@ static const struct dc_plane_cap plane_cap = { .argb8888 = 250, .nv12 = 1, .fp16 = 1 - } + }, + 64, + 64 }; static const struct dc_plane_cap underlay_plane_cap = { @@ -447,7 +449,9 @@ static const struct dc_plane_cap underlay_plane_cap = { .argb8888 = 1, .nv12 = 250, .fp16 = 1 - } + }, + 64, + 64 }; #define CTX ctx diff --git a/drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.c b/drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.c index 51b3fe502670..5d83e8174005 100644 --- a/drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.c +++ b/drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.c @@ -424,7 +424,9 @@ static const struct dc_plane_cap plane_cap = { .argb8888 = 250, .nv12 = 1, .fp16 = 1 - } + }, + 64, + 64 }; #define CTX ctx diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c index c8c6225c7e9e..968a89bbcf24 100644 --- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c +++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c @@ -1043,7 +1043,9 @@ static const struct dc_plane_cap plane_cap = { .argb8888 = 250, .nv12 = 250, .fp16 = 1 - } + }, + 16, + 16 }; static const struct resource_caps res_cap_nv14 = { .num_timing_generator = 5, diff --git a/drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c b/drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c index 7d82648bec90..88d41a385add 100644 --- a/drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c +++ b/drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c @@ -857,7 +857,9 @@ static const struct dc_plane_cap plane_cap = { .argb8888 = 250, .nv12 = 250, .fp16 = 250 - } + }, + 64, + 64 }; static const struct dc_debug_options debug_defaults_drv = { |