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authorNicholas Kazlauskas <nicholas.kazlauskas@amd.com>2019-10-25 15:03:58 -0400
committerAlex Deucher <alexander.deucher@amd.com>2019-11-13 15:29:42 -0500
commit3a1627b07385a6bb497f7ca4e2ffe1e1dbc70b68 (patch)
tree03324fc68964444a70a7922a0ba03af277df1c13 /drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c
parent976e51a7c0827a870fa08df6ee0a74e937ebbbd9 (diff)
drm/amd/display: Add DMUB support to DC
DC will use DMUB for command submission and flow control during initialization. Register offloading as well as submitting some BIOS commands are part of the DC internal interface but are guarded behind debug options. It won't be functional in amdgpu_dm yet since we don't pass the DMUB service to DC for use. Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Reviewed-by: Hersen Wu <hersenxs.wu@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c')
-rw-r--r--drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c8
1 files changed, 8 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c
index dabccbd49ad4..8710f3ac2abf 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c
@@ -457,11 +457,19 @@ static bool optc1_enable_crtc(struct timing_generator *optc)
REG_UPDATE(CONTROL,
VTG0_ENABLE, 1);
+#ifdef CONFIG_DRM_AMD_DC_DMUB
+ REG_SEQ_START();
+#endif
/* Enable CRTC */
REG_UPDATE_2(OTG_CONTROL,
OTG_DISABLE_POINT_CNTL, 3,
OTG_MASTER_EN, 1);
+#ifdef CONFIG_DRM_AMD_DC_DMUB
+ REG_SEQ_SUBMIT();
+ REG_SEQ_WAIT_DONE();
+#endif
+
return true;
}