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authorNicholas Kazlauskas <nicholas.kazlauskas@amd.com>2021-05-19 11:01:50 -0400
committerAlex Deucher <alexander.deucher@amd.com>2021-06-04 16:39:18 -0400
commit110d3968fe9508142cb76b530d141209efa169a8 (patch)
treeabab4be5adb3cd4d44db3d9102829741d84c5d9c /drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c
parentcbaf919f3313af6a8415076f315d63d0cda1635e (diff)
drm/amd/display: Add DCN3.1 OPTC
Add support for programming the DCN3.1 OPTC (Output Timing Controller) HW Blocks: +--------+ | MPC | +--------+ | v +-------+ | OPP | +-------+ | v +--------+ | OPTC | +--------+ | v +--------+ +--------+ | DIO | | DCCG | +--------+ +--------+ There are no changes to OPP or MPC for DCN3.1, so the diagram will include them in this patch. Acked-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c')
-rw-r--r--drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c11
1 files changed, 11 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c
index 677663cc7bff..9bc97e9c48c2 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c
@@ -968,6 +968,17 @@ void optc1_set_drr(
}
}
+void optc1_set_vtotal_min_max(struct timing_generator *optc, int vtotal_min, int vtotal_max)
+{
+ struct optc *optc1 = DCN10TG_FROM_TG(optc);
+
+ REG_SET(OTG_V_TOTAL_MAX, 0,
+ OTG_V_TOTAL_MAX, vtotal_max);
+
+ REG_SET(OTG_V_TOTAL_MIN, 0,
+ OTG_V_TOTAL_MIN, vtotal_min);
+}
+
static void optc1_set_test_pattern(
struct timing_generator *optc,
/* TODO: replace 'controller_dp_test_pattern' by 'test_pattern_mode'