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authorDavid Francis <David.Francis@amd.com>2018-10-23 13:58:39 -0400
committerAlex Deucher <alexander.deucher@amd.com>2018-11-19 15:27:36 -0500
commit4b594b8d87cbc06602d03395c20fd1d7d216990f (patch)
treeb41b6eccac32df46c497eff6a1f1db710c39b56c /drivers/gpu/drm/amd/display/dc/dce/dce_clk_mgr.c
parent8ce504b9389be846bcdf512ed5be8f661b3bf097 (diff)
drm/amd/display: Check for dmcu initialization before calling dmcu
[Why] DMCU firmware is not required - the system is expected to run fine without it. Therefore, wherever dmcu functions could be called, dmcu initialization shoudl be checked [How] Use the helpful hook dmcu_funcs->is_dmcu_initialized Signed-off-by: David Francis <David.Francis@amd.com> Reviewed-by: Hersen Wu <hersenxs.wu@amd.com> Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/dce/dce_clk_mgr.c')
-rw-r--r--drivers/gpu/drm/amd/display/dc/dce/dce_clk_mgr.c11
1 files changed, 7 insertions, 4 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dce/dce_clk_mgr.c b/drivers/gpu/drm/amd/display/dc/dce/dce_clk_mgr.c
index 888d7129022e..56f598567f0b 100644
--- a/drivers/gpu/drm/amd/display/dc/dce/dce_clk_mgr.c
+++ b/drivers/gpu/drm/amd/display/dc/dce/dce_clk_mgr.c
@@ -277,7 +277,8 @@ static int dce_set_clock(
if (requested_clk_khz == 0)
clk_mgr_dce->cur_min_clks_state = DM_PP_CLOCKS_STATE_NOMINAL;
- dmcu->funcs->set_psr_wait_loop(dmcu, actual_clock / 1000 / 7);
+ if (dmcu && dmcu->funcs->is_dmcu_initialized(dmcu))
+ dmcu->funcs->set_psr_wait_loop(dmcu, actual_clock / 1000 / 7);
return actual_clock;
}
@@ -324,9 +325,11 @@ int dce112_set_clock(struct clk_mgr *clk_mgr, int requested_clk_khz)
bp->funcs->set_dce_clock(bp, &dce_clk_params);
if (!IS_FPGA_MAXIMUS_DC(core_dc->ctx->dce_environment)) {
- if (clk_mgr_dce->dfs_bypass_disp_clk != actual_clock)
- dmcu->funcs->set_psr_wait_loop(dmcu,
- actual_clock / 1000 / 7);
+ if (dmcu && dmcu->funcs->is_dmcu_initialized(dmcu)) {
+ if (clk_mgr_dce->dfs_bypass_disp_clk != actual_clock)
+ dmcu->funcs->set_psr_wait_loop(dmcu,
+ actual_clock / 1000 / 7);
+ }
}
clk_mgr_dce->dfs_bypass_disp_clk = actual_clock;