diff options
| author | tiancyin <tianci.yin@amd.com> | 2019-04-22 17:07:06 +0800 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2019-06-21 18:59:27 -0500 |
| commit | 278b6fba223005e87c8f491c9b7fa33dc6a6461e (patch) | |
| tree | 51566adb0dc73db61e8404afa4dd060b14aefdbf /drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c | |
| parent | 4135f10e26eaeb75a30ccfa6359d81004e1adc82 (diff) | |
drm/amdgpu/sdma5: fix a sdma potential hang in VK_Examples test
[why]
When page fault happens, it could lead to sdma hang is RESP_MODE =
0 for non-PRT case.
[how]
Setting SDMAx_UTCL1_CNTL.RESP_MODE to 0b011 to avoid SDMA halt.
Reviewed-by: Jack Xiao <Jack.Xiao@amd.com>
Signed-off-by: tiancyin <tianci.yin@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c')
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c b/drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c index 083f81611e24..32b48c9ca051 100644 --- a/drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c +++ b/drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c @@ -658,7 +658,8 @@ static int sdma_v5_0_gfx_resume(struct amdgpu_device *adev) /* Set up RESP_MODE to non-copy addresses */ temp = RREG32(sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_UTCL1_CNTL)); - temp = REG_SET_FIELD(temp, SDMA0_UTCL1_CNTL, RESP_MODE, 2); + temp = REG_SET_FIELD(temp, SDMA0_UTCL1_CNTL, RESP_MODE, 3); + temp = REG_SET_FIELD(temp, SDMA0_UTCL1_CNTL, REDO_DELAY, 9); WREG32(sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_UTCL1_CNTL), temp); /* program default cache read and write policy */ |