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authorJack Xiao <Jack.Xiao@amd.com>2019-06-06 17:46:24 +0800
committerAlex Deucher <alexander.deucher@amd.com>2020-07-01 01:59:08 -0400
commit6b8199fc1a332179d39d644e8fc2f6a15e528bb4 (patch)
tree1e87db6fa302692a455f53d0b97e826aa582acc7 /drivers/gpu/drm/amd/amdgpu/mes_v10_1.c
parentf85f1864b8041d94da91f82050b26bd95abd0a0e (diff)
drm/amdgpu/mes10.1: copy mes fw info into global fw array
Copy mes firmware info into into global fw array, preparing for fw front door loading. Signed-off-by: Jack Xiao <Jack.Xiao@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/mes_v10_1.c')
-rw-r--r--drivers/gpu/drm/amd/amdgpu/mes_v10_1.c17
1 files changed, 17 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/mes_v10_1.c b/drivers/gpu/drm/amd/amdgpu/mes_v10_1.c
index a6a96cf96b22..a0fd3c3c7397 100644
--- a/drivers/gpu/drm/amd/amdgpu/mes_v10_1.c
+++ b/drivers/gpu/drm/amd/amdgpu/mes_v10_1.c
@@ -271,6 +271,7 @@ static int mes_v10_1_init_microcode(struct amdgpu_device *adev)
char fw_name[30];
int err;
const struct mes_firmware_header_v1_0 *mes_hdr;
+ struct amdgpu_firmware_info *info;
switch (adev->asic_type) {
case CHIP_NAVI10:
@@ -306,6 +307,22 @@ static int mes_v10_1_init_microcode(struct amdgpu_device *adev)
le32_to_cpu(mes_hdr->mes_data_start_addr_lo) |
((uint64_t)(le32_to_cpu(mes_hdr->mes_data_start_addr_hi)) << 32);
+ if (adev->firmware.load_type == AMDGPU_FW_LOAD_PSP) {
+ info = &adev->firmware.ucode[AMDGPU_UCODE_ID_CP_MES];
+ info->ucode_id = AMDGPU_UCODE_ID_CP_MES;
+ info->fw = adev->mes.fw;
+ adev->firmware.fw_size +=
+ ALIGN(le32_to_cpu(mes_hdr->mes_ucode_size_bytes),
+ PAGE_SIZE);
+
+ info = &adev->firmware.ucode[AMDGPU_UCODE_ID_CP_MES_DATA];
+ info->ucode_id = AMDGPU_UCODE_ID_CP_MES_DATA;
+ info->fw = adev->mes.fw;
+ adev->firmware.fw_size +=
+ ALIGN(le32_to_cpu(mes_hdr->mes_ucode_data_size_bytes),
+ PAGE_SIZE);
+ }
+
return 0;
}