diff options
| author | Joel Stanley <joel@jms.id.au> | 2019-11-08 15:49:44 +1030 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2019-11-08 11:28:20 +0100 |
| commit | 913b73730e15eebbe7182834a3a923ca0c1255e8 (patch) | |
| tree | e5fc1ee544f088846c8e1726114041dc0707f158 /drivers/fsi | |
| parent | 606397d67f4184a40732537be72e7e8658c26717 (diff) | |
fsi: aspeed: Add trace points
These trace points help with debugging the FSI master. They show the low
level reads, writes and error states of the master.
Signed-off-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/20191108051945.7109-11-joel@jms.id.au
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/fsi')
| -rw-r--r-- | drivers/fsi/fsi-master-aspeed.c | 22 |
1 files changed, 22 insertions, 0 deletions
diff --git a/drivers/fsi/fsi-master-aspeed.c b/drivers/fsi/fsi-master-aspeed.c index d1b83f035483..95e226ac78b9 100644 --- a/drivers/fsi/fsi-master-aspeed.c +++ b/drivers/fsi/fsi-master-aspeed.c @@ -77,6 +77,9 @@ static const u32 fsi_base = 0xa0000000; #define XFER_HALFWORD (BIT(0)) #define XFER_BYTE (0) +#define CREATE_TRACE_POINTS +#include <trace/events/fsi_master_aspeed.h> + #define FSI_LINK_ENABLE_SETUP_TIME 10 /* in mS */ #define DEFAULT_DIVISOR 14 @@ -102,6 +105,8 @@ static int __opb_write(struct fsi_master_aspeed *aspeed, u32 addr, status = readl(base + OPB0_STATUS); + trace_fsi_master_aspeed_opb_write(addr, val, transfer_size, status, reg); + /* Return error when poll timed out */ if (ret) return ret; @@ -149,6 +154,10 @@ static int __opb_read(struct fsi_master_aspeed *aspeed, uint32_t addr, result = readl(base + OPB0_FSI_DATA_R); + trace_fsi_master_aspeed_opb_read(addr, transfer_size, result, + readl(base + OPB0_STATUS), + reg); + /* Return error when poll timed out */ if (ret) return ret; @@ -196,6 +205,19 @@ static int check_errors(struct fsi_master_aspeed *aspeed, int err) { int ret; + if (trace_fsi_master_aspeed_opb_error_enabled()) { + __be32 mresp0, mstap0, mesrb0; + + opb_readl(aspeed, ctrl_base + FSI_MRESP0, &mresp0); + opb_readl(aspeed, ctrl_base + FSI_MSTAP0, &mstap0); + opb_readl(aspeed, ctrl_base + FSI_MESRB0, &mesrb0); + + trace_fsi_master_aspeed_opb_error( + be32_to_cpu(mresp0), + be32_to_cpu(mstap0), + be32_to_cpu(mesrb0)); + } + if (err == -EIO) { /* Check MAEB (0x70) ? */ |