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authorBiju Das <biju.das@bp.renesas.com>2018-11-27 11:56:31 +0000
committerSimon Horman <horms+renesas@verge.net.au>2018-12-04 06:28:13 -0800
commit0faadd5a410533d3a75601b607ee5a4110b754f4 (patch)
tree965dc6c4ab33a54f6de984a33706b65f3d14640b /arch/arm/boot/dts/r8a7744.dtsi
parent7fbbfe07b588cd81c1046a1846345a5cf614589a (diff)
ARM: dts: r8a7744: Add QSPI support
Add the DT node for the QSPI interface to the SoC dtsi. Signed-off-by: Biju Das <biju.das@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Diffstat (limited to 'arch/arm/boot/dts/r8a7744.dtsi')
-rw-r--r--arch/arm/boot/dts/r8a7744.dtsi16
1 files changed, 16 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/r8a7744.dtsi b/arch/arm/boot/dts/r8a7744.dtsi
index bab78d43b5db..28fea2aaa0cf 100644
--- a/arch/arm/boot/dts/r8a7744.dtsi
+++ b/arch/arm/boot/dts/r8a7744.dtsi
@@ -703,6 +703,22 @@
status = "disabled";
};
+ qspi: spi@e6b10000 {
+ compatible = "renesas,qspi-r8a7744", "renesas,qspi";
+ reg = <0 0xe6b10000 0 0x2c>;
+ interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 917>;
+ dmas = <&dmac0 0x17>, <&dmac0 0x18>,
+ <&dmac1 0x17>, <&dmac1 0x18>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
+ num-cs = <1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ resets = <&cpg 917>;
+ status = "disabled";
+ };
+
scifa0: serial@e6c40000 {
compatible = "renesas,scifa-r8a7744",
"renesas,rcar-gen2-scifa", "renesas,scifa";