1 files changed, 73 insertions, 17 deletions

diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/ls_ucode_msgqueue.c b/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/ls_ucode_msgqueue.c
index ef0b298b70d7..ee989210725e 100644
--- a/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/ls_ucode_msgqueue.c
+++ b/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/ls_ucode_msgqueue.c
@@ -28,6 +28,8 @@
 #include <core/msgqueue.h>
 #include <subdev/pmu.h>
 #include <engine/sec2.h>
+#include <subdev/mc.h>
+#include <subdev/timer.h>
 
 /**
  * acr_ls_ucode_load_msgqueue - load and prepare a ucode img for a msgqueue fw
@@ -73,10 +75,11 @@ acr_ls_ucode_load_msgqueue(const struct nvkm_subdev *subdev, const char *name,
 	return 0;
 }
 
-static void
+static int
 acr_ls_msgqueue_post_run(struct nvkm_msgqueue *queue,
 			 struct nvkm_falcon *falcon, u32 addr_args)
 {
+	struct nvkm_device *device = falcon->owner->device;
 	u32 cmdline_size = NVKM_MSGQUEUE_CMDLINE_SIZE;
 	u8 buf[cmdline_size];
 
@@ -85,65 +88,118 @@ acr_ls_msgqueue_post_run(struct nvkm_msgqueue *queue,
 	nvkm_falcon_load_dmem(falcon, buf, addr_args, cmdline_size, 0);
 	/* rearm the queue so it will wait for the init message */
 	nvkm_msgqueue_reinit(queue);
+
+	/* Enable interrupts */
+	nvkm_falcon_wr32(falcon, 0x10, 0xff);
+	nvkm_mc_intr_mask(device, falcon->owner->index, true);
+
+	/* Start LS firmware on boot falcon */
+	nvkm_falcon_start(falcon);
+
+	return 0;
 }
 
 int
-acr_ls_ucode_load_pmu(const struct nvkm_subdev *subdev,
-		      struct ls_ucode_img *img)
+acr_ls_ucode_load_pmu(const struct nvkm_secboot *sb, struct ls_ucode_img *img)
 {
-	struct nvkm_pmu *pmu = subdev->device->pmu;
+	struct nvkm_pmu *pmu = sb->subdev.device->pmu;
 	int ret;
 
-	ret = acr_ls_ucode_load_msgqueue(subdev, "pmu", img);
+	ret = acr_ls_ucode_load_msgqueue(&sb->subdev, "pmu", img);
 	if (ret)
 		return ret;
 
 	/* Allocate the PMU queue corresponding to the FW version */
 	ret = nvkm_msgqueue_new(img->ucode_desc.app_version, pmu->falcon,
-				&pmu->queue);
+				sb, &pmu->queue);
 	if (ret)
 		return ret;
 
 	return 0;
 }
 
-void
+int
 acr_ls_pmu_post_run(const struct nvkm_acr *acr, const struct nvkm_secboot *sb)
 {
 	struct nvkm_device *device = sb->subdev.device;
 	struct nvkm_pmu *pmu = device->pmu;
 	u32 addr_args = pmu->falcon->data.limit - NVKM_MSGQUEUE_CMDLINE_SIZE;
+	int ret;
+
+	ret = acr_ls_msgqueue_post_run(pmu->queue, pmu->falcon, addr_args);
+	if (ret)
+		return ret;
 
-	acr_ls_msgqueue_post_run(pmu->queue, pmu->falcon, addr_args);
+	nvkm_debug(&sb->subdev, "%s started\n",
+		   nvkm_secboot_falcon_name[acr->boot_falcon]);
+
+	return 0;
 }
 
 int
-acr_ls_ucode_load_sec2(const struct nvkm_subdev *subdev,
-		       struct ls_ucode_img *img)
+acr_ls_ucode_load_sec2(const struct nvkm_secboot *sb, struct ls_ucode_img *img)
 {
-	struct nvkm_sec2 *sec = subdev->device->sec2;
+	struct nvkm_sec2 *sec = sb->subdev.device->sec2;
 	int ret;
 
-	ret = acr_ls_ucode_load_msgqueue(subdev, "sec2", img);
+	ret = acr_ls_ucode_load_msgqueue(&sb->subdev, "sec2", img);
 	if (ret)
 		return ret;
 
 	/* Allocate the PMU queue corresponding to the FW version */
 	ret = nvkm_msgqueue_new(img->ucode_desc.app_version, sec->falcon,
-				&sec->queue);
+				sb, &sec->queue);
 	if (ret)
 		return ret;
 
 	return 0;
 }
 
-void
+int
 acr_ls_sec2_post_run(const struct nvkm_acr *acr, const struct nvkm_secboot *sb)
 {
-	struct nvkm_device *device = sb->subdev.device;
+	const struct nvkm_subdev *subdev = &sb->subdev;
+	struct nvkm_device *device = subdev->device;
 	struct nvkm_sec2 *sec = device->sec2;
 	/* on SEC arguments are always at the beginning of EMEM */
-	u32 addr_args = 0x01000000;
+	const u32 addr_args = 0x01000000;
+	u32 reg;
+	int ret;
 
-	acr_ls_msgqueue_post_run(sec->queue, sec->falcon, addr_args);
+	ret = acr_ls_msgqueue_post_run(sec->queue, sec->falcon, addr_args);
+	if (ret)
+		return ret;
+
+	/*
+	 * There is a bug where the LS firmware sometimes require to be started
+	 * twice (this happens only on SEC). Detect and workaround that
+	 * condition.
+	 *
+	 * Once started, the falcon will end up in STOPPED condition (bit 5)
+	 * if successful, or in HALT condition (bit 4) if not.
+	 */
+	nvkm_msec(device, 1,
+		  if ((reg = nvkm_falcon_rd32(sb->boot_falcon, 0x100) & 0x30) != 0)
+			  break;
+	);
+	if (reg & BIT(4)) {
+		nvkm_debug(subdev, "applying workaround for start bug...");
+		nvkm_falcon_start(sb->boot_falcon);
+		nvkm_msec(subdev->device, 1,
+			if ((reg = nvkm_rd32(subdev->device,
+					     sb->boot_falcon->addr + 0x100)
+			     & 0x30) != 0)
+				break;
+		);
+		if (reg & BIT(4)) {
+			nvkm_error(subdev, "%s failed to start\n",
+			       nvkm_secboot_falcon_name[acr->boot_falcon]);
+			return -EINVAL;
+		}
+	}
+
+	nvkm_debug(&sb->subdev, "%s started\n",
+		   nvkm_secboot_falcon_name[acr->boot_falcon]);
+
+	return 0;
 }