drivers/gpu/drm/amd/include/asic_reg/thm/thm_10_0_offset.h


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/*
 * Copyright (C) 2017  Advanced Micro Devices, Inc.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included
 * in all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN
 * AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 */
#ifndef _thm_10_0_OFFSET_HEADER
#define _thm_10_0_OFFSET_HEADER


// addressBlock: thm_thm_SmuThmDec
// base address: 0x59800
#define mmTHM_TCON_CUR_TMP                                                                             0x0000
#define mmTHM_TCON_CUR_TMP_BASE_IDX                                                                    0
#define mmTHM_TCON_HTC                                                                                 0x0001
#define mmTHM_TCON_HTC_BASE_IDX                                                                        0
#define mmTHM_TCON_THERM_TRIP                                                                          0x0002
#define mmTHM_TCON_THERM_TRIP_BASE_IDX                                                                 0
#define mmTHM_CTF_DELAY                                                                                0x0003
#define mmTHM_CTF_DELAY_BASE_IDX                                                                       0
#define mmTHM_GPIO_PROCHOT_CTRL                                                                        0x0004
#define mmTHM_GPIO_PROCHOT_CTRL_BASE_IDX                                                               0
#define mmTHM_THERMAL_INT_ENA                                                                          0x000a
#define mmTHM_THERMAL_INT_ENA_BASE_IDX                                                                 0
#define mmTHM_THERMAL_INT_CTRL                                                                         0x000b
#define mmTHM_THERMAL_INT_CTRL_BASE_IDX                                                                0
#define mmTHM_THERMAL_INT_STATUS                                                                       0x000c
#define mmTHM_THERMAL_INT_STATUS_BASE_IDX                                                              0
#define mmTHM_TMON0_RDIL0_DATA                                                                         0x000d
#define mmTHM_TMON0_RDIL0_DATA_BASE_IDX                                                                0
#define mmTHM_TMON0_RDIL1_DATA                                                                         0x000e
#define mmTHM_TMON0_RDIL1_DATA_BASE_IDX                                                                0
#define mmTHM_TMON0_RDIL2_DATA                                                                         0x000f
#define mmTHM_TMON0_RDIL2_DATA_BASE_IDX                                                                0
#define mmTHM_TMON0_RDIL3_DATA                                                                         0x0010
#define mmTHM_TMON0_RDIL3_DATA_BASE_IDX                                                                0
#define mmTHM_TMON0_RDIL4_DATA                                                                         0x0011
#define mmTHM_TMON0_RDIL4_DATA_BASE_IDX                                                                0
#define mmTHM_TMON0_RDIL5_DATA                                                                         0x0012
#define mmTHM_TMON0_RDIL5_DATA_BASE_IDX                                                                0
#define mmTHM_TMON0_RDIL6_DATA                                                                         0x0013
#define mmTHM_TMON0_RDIL6_DATA_BASE_IDX                                                                0
#define mmTHM_TMON0_RDIL7_DATA                                                                         0x0014
#define mmTHM_TMON0_RDIL7_DATA_BASE_IDX                                                                0
#define mmTHM_TMON0_RDIL8_DATA                                                                         0x0015
#define mmTHM_TMON0_RDIL8_DATA_BASE_IDX                                                                0
#define mmTHM_TMON0_RDIL9_DATA                                                                         0x0016
#define mmTHM_TMON0_RDIL9_DATA_BASE_IDX                                                                0
#define mmTHM_TMON0_RDIL10_DATA                                                                        0x0017
#define mmTHM_TMON0_RDIL10_DATA_BASE_IDX                                                               0
#define mmTHM_TMON0_RDIL11_DATA                                                                        0x0018
#define mmTHM_TMON0_RDIL11_DATA_BASE_IDX                                                               0
#define mmTHM_TMON0_RDIL12_DATA                                                                        0x0019
#define mmTHM_TMON0_RDIL12_DATA_BASE_IDX                                                               0
#define mmTHM_TMON0_RDIL13_DATA                                                                        0x001a
#define mmTHM_TMON0_RDIL13_DATA_BASE_IDX                                                               0
#define mmTHM_TMON0_RDIL14_DATA                                                                        0x001b
#define mmTHM_TMON0_RDIL14_DATA_BASE_IDX                                                               0
#define mmTHM_TMON0_RDIL15_DATA                                                                        0x001c
#define mmTHM_TMON0_RDIL15_DATA_BASE_IDX                                                               0
#define mmTHM_TMON0_RDIR0_DATA                                                                         0x001d
#define mmTHM_TMON0_RDIR0_DATA_BASE_IDX                                                                0
#define mmTHM_TMON0_RDIR1_DATA                                                                         0x001e
#define mmTHM_TMON0_RDIR1_DATA_BASE_IDX                                                                0
#define mmTHM_TMON0_RDIR2_DATA                                                                         0x001f
#define mmTHM_TMON0_RDIR2_DATA_BASE_IDX                                                                0
#define mmTHM_TMON0_RDIR3_DATA                                                                         0x0020
#define mmTHM_TMON0_RDIR3_DATA_BASE_IDX                                                                0
#define mmTHM_TMON0_RDIR4_DATA                                                                         0x0021
#define mmTHM_TMON0_RDIR4_DATA_BASE_IDX                                                                0
#define mmTHM_TMON0_RDIR5_DATA                                                                         0x0022
#define mmTHM_TMON0_RDIR5_DATA_BASE_IDX                                                                0
#define mmTHM_TMON0_RDIR6_DATA                                                                         0x0023
#define mmTHM_TMON0_RDIR6_DATA_BASE_IDX                                                                0
#define mmTHM_TMON0_RDIR7_DATA                                                                         0x0024
#define mmTHM_TMON0_RDIR7_DATA_BASE_IDX                                                                0
#define mmTHM_TMON0_RDIR8_DATA                                                                         0x0025
#define mmTHM_TMON0_RDIR8_DATA_BASE_IDX                                                                0
#define mmTHM_TMON0_RDIR9_DATA                                                                         0x0026
#define mmTHM_TMON0_RDIR9_DATA_BASE_IDX                                                                0
#define mmTHM_TMON0_RDIR10_DATA                                                                        0x0027
#define mmTHM_TMON0_RDIR10_DATA_BASE_IDX                                                               0
#define mmTHM_TMON0_RDIR11_DATA                                                                        0x0028
#define mmTHM_TMON0_RDIR11_DATA_BASE_IDX                                                               0
#define mmTHM_TMON0_RDIR12_DATA                                                                        0x0029
#define mmTHM_TMON0_RDIR12_DATA_BASE_IDX                                                               0
#define mmTHM_TMON0_RDIR13_DATA                                                                        0x002a
#define mmTHM_TMON0_RDIR13_DATA_BASE_IDX                                                               0
#define mmTHM_TMON0_RDIR14_DATA                                                                        0x002b
#define mmTHM_TMON0_RDIR14_DATA_BASE_IDX                                                               0
#define mmTHM_TMON0_RDIR15_DATA                                                                        0x002c
#define mmTHM_TMON0_RDIR15_DATA_BASE_IDX                                                               0
#define mmTHM_TMON0_INT_DATA                                                                           0x002d
#define mmTHM_TMON0_INT_DATA_BASE_IDX                                                                  0
#define mmTHM_TMON0_CTRL                                                                               0x002e
#define mmTHM_TMON0_CTRL_BASE_IDX                                                                      0
#define mmTHM_TMON0_CTRL2                                                                              0x002f
#define mmTHM_TMON0_CTRL2_BASE_IDX                                                                     0
#define mmTHM_TMON0_DEBUG                                                                              0x0030
#define mmTHM_TMON0_DEBUG_BASE_IDX                                                                     0
#define mmTHM_DIE1_TEMP                                                                                0x0055
#define mmTHM_DIE1_TEMP_BASE_IDX                                                                       0
#define mmTHM_DIE2_TEMP                                                                                0x0056
#define mmTHM_DIE2_TEMP_BASE_IDX                                                                       0
#define mmTHM_DIE3_TEMP                                                                                0x0057
#define mmTHM_DIE3_TEMP_BASE_IDX                                                                       0
#define mmTHM_SW_TEMP                                                                                  0x0058
#define mmTHM_SW_TEMP_BASE_IDX                                                                         0
#define mmCG_MULT_THERMAL_CTRL                                                                         0x0059
#define mmCG_MULT_THERMAL_CTRL_BASE_IDX                                                                0
#define mmCG_MULT_THERMAL_STATUS                                                                       0x005a
#define mmCG_MULT_THERMAL_STATUS_BASE_IDX                                                              0
#define mmCG_THERMAL_RANGE                                                                             0x005b
#define mmCG_THERMAL_RANGE_BASE_IDX                                                                    0
#define mmTHM_TMON_CONFIG                                                                              0x005c
#define mmTHM_TMON_CONFIG_BASE_IDX                                                                     0
#define mmTHM_TMON_CONFIG2                                                                             0x005d
#define mmTHM_TMON_CONFIG2_BASE_IDX                                                                    0
#define mmTHM_TMON0_COEFF                                                                              0x005e
#define mmTHM_TMON0_COEFF_BASE_IDX                                                                     0
#define mmTHM_TCON_LOCAL0                                                                              0x006e
#define mmTHM_TCON_LOCAL0_BASE_IDX                                                                     0
#define mmTHM_TCON_LOCAL1                                                                              0x006f
#define mmTHM_TCON_LOCAL1_BASE_IDX                                                                     0
#define mmTHM_TCON_LOCAL2                                                                              0x0070
#define mmTHM_TCON_LOCAL2_BASE_IDX                                                                     0
#define mmTHM_TCON_LOCAL3                                                                              0x0071
#define mmTHM_TCON_LOCAL3_BASE_IDX                                                                     0
#define mmTHM_TCON_LOCAL4                                                                              0x0072
#define mmTHM_TCON_LOCAL4_BASE_IDX                                                                     0
#define mmTHM_TCON_LOCAL5                                                                              0x0073
#define mmTHM_TCON_LOCAL5_BASE_IDX                                                                     0
#define mmTHM_TCON_LOCAL6                                                                              0x0074
#define mmTHM_TCON_LOCAL6_BASE_IDX                                                                     0
#define mmTHM_TCON_LOCAL7                                                                              0x0075
#define mmTHM_TCON_LOCAL7_BASE_IDX                                                                     0
#define mmTHM_TCON_LOCAL8                                                                              0x0076
#define mmTHM_TCON_LOCAL8_BASE_IDX                                                                     0
#define mmTHM_TCON_LOCAL9                                                                              0x0077
#define mmTHM_TCON_LOCAL9_BASE_IDX                                                                     0
#define mmTHM_TCON_LOCAL10                                                                             0x0078
#define mmTHM_TCON_LOCAL10_BASE_IDX                                                                    0
#define mmTHM_TCON_LOCAL11                                                                             0x0079
#define mmTHM_TCON_LOCAL11_BASE_IDX                                                                    0
#define mmTHM_TCON_LOCAL12                                                                             0x007a
#define mmTHM_TCON_LOCAL12_BASE_IDX                                                                    0
#define mmTHM_TCON_LOCAL13                                                                             0x007b
#define mmTHM_TCON_LOCAL13_BASE_IDX                                                                    0
#define mmTHM_PWRMGT                                                                                   0x007d
#define mmTHM_PWRMGT_BASE_IDX                                                                          0
#define mmSMUSBI_SBIREGADDR                                                                            0x0080
#define mmSMUSBI_SBIREGADDR_BASE_IDX                                                                   0
#define mmSMUSBI_SBIREGDATA                                                                            0x0081
#define mmSMUSBI_SBIREGDATA_BASE_IDX                                                                   0
#define mmSMUSBI_ERRATA_STAT_REG                                                                       0x0085
#define mmSMUSBI_ERRATA_STAT_REG_BASE_IDX                                                              0
#define mmSMUSBI_SBICTRL                                                                               0x0086
#define mmSMUSBI_SBICTRL_BASE_IDX                                                                      0
#define mmSMUSBI_CKNBIRESET                                                                            0x0087
#define mmSMUSBI_CKNBIRESET_BASE_IDX                                                                   0
#define mmSMUSBI_TIMING                                                                                0x0088
#define mmSMUSBI_TIMING_BASE_IDX                                                                       0
#define mmSMUSBI_HS_TIMING                                                                             0x0089
#define mmSMUSBI_HS_TIMING_BASE_IDX                                                                    0
#define mmSBTSI_REMOTE_TEMP                                                                            0x008a
#define mmSBTSI_REMOTE_TEMP_BASE_IDX                                                                   0
#define mmSBRMI_CONTROL                                                                                0x008b
#define mmSBRMI_CONTROL_BASE_IDX                                                                       0
#define mmSBRMI_COMMAND                                                                                0x008c
#define mmSBRMI_COMMAND_BASE_IDX                                                                       0
#define mmSBRMI_WRITE_DATA0                                                                            0x008d
#define mmSBRMI_WRITE_DATA0_BASE_IDX                                                                   0
#define mmSBRMI_WRITE_DATA1                                                                            0x008e
#define mmSBRMI_WRITE_DATA1_BASE_IDX                                                                   0
#define mmSBRMI_WRITE_DATA2                                                                            0x008f
#define mmSBRMI_WRITE_DATA2_BASE_IDX                                                                   0
#define mmSBRMI_READ_DATA0                                                                             0x0090
#define mmSBRMI_READ_DATA0_BASE_IDX                                                                    0
#define mmSBRMI_READ_DATA1                                                                             0x0091
#define mmSBRMI_READ_DATA1_BASE_IDX                                                                    0
#define mmSBRMI_CORE_EN_NUMBER                                                                         0x0092
#define mmSBRMI_CORE_EN_NUMBER_BASE_IDX                                                                0
#define mmSBRMI_CORE_EN_STATUS0                                                                        0x0093
#define mmSBRMI_CORE_EN_STATUS0_BASE_IDX                                                               0
#define mmSBRMI_CORE_EN_STATUS1                                                                        0x0094
#define mmSBRMI_CORE_EN_STATUS1_BASE_IDX                                                               0
#define mmSBRMI_APIC_STATUS0                                                                           0x0095
#define mmSBRMI_APIC_STATUS0_BASE_IDX                                                                  0
#define mmSBRMI_APIC_STATUS1                                                                           0x0096
#define mmSBRMI_APIC_STATUS1_BASE_IDX                                                                  0
#define mmSBRMI_MCE_STATUS0                                                                            0x0097
#define mmSBRMI_MCE_STATUS0_BASE_IDX                                                                   0
#define mmSBRMI_MCE_STATUS1                                                                            0x0098
#define mmSBRMI_MCE_STATUS1_BASE_IDX                                                                   0
#define mmSMBUS_CNTL0                                                                                  0x0099
#define mmSMBUS_CNTL0_BASE_IDX                                                                         0
#define mmSMBUS_CNTL1                                                                                  0x009a
#define mmSMBUS_CNTL1_BASE_IDX                                                                         0
#define mmSMBUS_BLKWR_CMD_CTRL0                                                                        0x009b
#define mmSMBUS_BLKWR_CMD_CTRL0_BASE_IDX                                                               0
#define mmSMBUS_BLKWR_CMD_CTRL1                                                                        0x009c
#define mmSMBUS_BLKWR_CMD_CTRL1_BASE_IDX                                                               0
#define mmSMBUS_BLKRD_CMD_CTRL0                                                                        0x009d
#define mmSMBUS_BLKRD_CMD_CTRL0_BASE_IDX                                                               0
#define mmSMBUS_BLKRD_CMD_CTRL1                                                                        0x009e
#define mmSMBUS_BLKRD_CMD_CTRL1_BASE_IDX                                                               0
#define mmSMBUS_TIMING_CNTL0                                                                           0x009f
#define mmSMBUS_TIMING_CNTL0_BASE_IDX                                                                  0
#define mmSMBUS_TIMING_CNTL1                                                                           0x00a0
#define mmSMBUS_TIMING_CNTL1_BASE_IDX                                                                  0
#define mmSMBUS_TIMING_CNTL2                                                                           0x00a1
#define mmSMBUS_TIMING_CNTL2_BASE_IDX                                                                  0
#define mmSMBUS_TRIGGER_CNTL                                                                           0x00a2
#define mmSMBUS_TRIGGER_CNTL_BASE_IDX                                                                  0
#define mmSMBUS_UDID_CNTL0                                                                             0x00a3
#define mmSMBUS_UDID_CNTL0_BASE_IDX                                                                    0
#define mmSMBUS_UDID_CNTL1                                                                             0x00a4
#define mmSMBUS_UDID_CNTL1_BASE_IDX                                                                    0
#define mmSMBUS_UDID_CNTL2                                                                             0x00a5
#define mmSMBUS_UDID_CNTL2_BASE_IDX                                                                    0
#define mmSMUSBI_SMBUS                                                                                 0x00a6
#define mmSMUSBI_SMBUS_BASE_IDX                                                                        0
#define mmSMUSBI_ALERT                                                                                 0x00a7
#define mmSMUSBI_ALERT_BASE_IDX                                                                        0
#define mmTHM_TMON0_REMOTE_START                                                                       0x0100
#define mmTHM_TMON0_REMOTE_START_BASE_IDX                                                              0
#define mmTHM_TMON0_REMOTE_END                                                                         0x013f
#define mmTHM_TMON0_REMOTE_END_BASE_IDX                                                                0
#define mmTHM_TMON1_REMOTE_START                                                                       0x0140
#define mmTHM_TMON1_REMOTE_START_BASE_IDX                                                              0
#define mmTHM_TMON1_REMOTE_END                                                                         0x017f
#define mmTHM_TMON1_REMOTE_END_BASE_IDX                                                                0
#define mmTHM_TMON2_REMOTE_START                                                                       0x0180
#define mmTHM_TMON2_REMOTE_START_BASE_IDX                                                              0
#define mmTHM_TMON2_REMOTE_END                                                                         0x01bf
#define mmTHM_TMON2_REMOTE_END_BASE_IDX                                                                0
#define mmTHM_TMON3_REMOTE_START                                                                       0x01c0
#define mmTHM_TMON3_REMOTE_START_BASE_IDX                                                              0
#define mmTHM_TMON3_REMOTE_END                                                                         0x01ff
#define mmTHM_TMON3_REMOTE_END_BASE_IDX                                                                0

#endif