tag name | drm-intel-next-2018-12-21-1 (253912cb29641fa664fed6a912c8656d2802b075) |
tag date | 2018-12-21 12:05:13 -0800 |
tagged by | Rodrigo Vivi <rodrigo.vivi@intel.com> |
tagged object | commit 17960f35f1... |
Driver Changes:
- Selftests fixes and improvements (Chris, Tvrtko)
- PSR/PSR2 fixes and improvements (Jose)
- Makefile style fixes (Pedro)
- Implement Vesa's DP Extended Receiver Capability field (Matt Atwood)
- Allow FBC with 5k on newer displays gen10+ (Jose)
- HDCP-1.4 fixes and improvements (Ram)
- Move Render ring mmio init workaround to new common wa_list (Chris)
- Execlist: Apply a full mb before execution for Braswell (Chris)
- Forcibly evict stale csb entries on ICL (Mika)
- Push EMIT_INVALIDATE at request start to backends (Chris)
- EMIT_INVALIDATE after switch context (Chris)
- Pipeline PDP updates for Braswell (chris)
- Skip the ERR_PTR error state (Chris)
- Flush GPU relocs harder for gen3 (Chris)
- Watermark fixes and improvements (Ville, Matt Roper, Paulo)
- Use intel_ types more consistently (Matt Roper)
- Fix HDMI SCDC scrambling enable for CTS (Clint)
- Expand DFSM pipe disable to gen >= 9 (Bob)
- IS_GEN/IS_GEN_RANGE reorg and improvements (Lucas)
- Ice Lake VDBoxes (Oscar/Chris)
- DSC per connector debugfs node and fix (Manasi)
- HuC updated version for Broxton (Anusha)
- Update crtc scaler settings when needed for gen9+ (Hans)
- Ice Lake vswing programming changes for combo ports (Clint)
- Apply missed interrupt after reset w/a to all ringbuffer gen (Chris)
- Ice Lake fixes for TypeC and Thunderbolt (Imre)
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