From cedaf3073a33a95e276371783b20a14e208e184c Mon Sep 17 00:00:00 2001 From: Tom St Denis Date: Tue, 16 May 2017 10:22:03 -0400 Subject: drm/amd/display: Clean up indentation in dce120_tg_set_blank() Signed-off-by: Tom St Denis Reviewed-by: Harry Wentland Signed-off-by: Alex Deucher --- .../drm/amd/display/dc/dce120/dce120_timing_generator.c | 16 +++++----------- 1 file changed, 5 insertions(+), 11 deletions(-) (limited to 'drivers/gpu/drm/amd') diff --git a/drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c b/drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c index 1e2843e5d97e..c208196864ad 100644 --- a/drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c +++ b/drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c @@ -768,17 +768,11 @@ void dce120_tg_set_blank(struct timing_generator *tg, CRTC0_CRTC_DOUBLE_BUFFER_CONTROL, CRTC_BLANK_DATA_DOUBLE_BUFFER_EN, 0); - if (enable_blanking) { - CRTC_REG_SET( - CRTC0_CRTC_BLANK_CONTROL, - CRTC_BLANK_DATA_EN, 1); - - } else - dm_write_reg_soc15( - tg->ctx, - mmCRTC0_CRTC_BLANK_CONTROL, - tg110->offsets.crtc, - 0); + if (enable_blanking) + CRTC_REG_SET(CRTC0_CRTC_BLANK_CONTROL, CRTC_BLANK_DATA_EN, 1); + else + dm_write_reg_soc15(tg->ctx, mmCRTC0_CRTC_BLANK_CONTROL, + tg110->offsets.crtc, 0); } bool dce120_tg_validate_timing(struct timing_generator *tg, -- cgit v1.2.3