summaryrefslogtreecommitdiff
path: root/drivers/clk
AgeCommit message (Expand)AuthorFilesLines
2017-07-15Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linusLinus Torvalds5-0/+115
2017-07-11clk: boston: Add a driver for MIPS Boston board clocksPaul Burton5-0/+115
2017-06-29clk: gemini: Read status before using the valueJoel Stanley1-0/+1
2017-06-29clk: scpi: error when clock fails to registerJerome Brunet1-3/+5
2017-06-29clk: at91: Add sama5d2 suspend/resumeAlexandre Belloni4-1/+140
2017-06-22clk: keystone: TI_SCI_PROTOCOL is needed for clk driverArnd Bergmann1-1/+2
2017-06-22clk: samsung: audss: Fix silent hang on Exynos4412 due to disabled EPLLKrzysztof Kozlowski1-0/+1
2017-06-21clk: uniphier: provide NAND controller clock rateMasahiro Yamada1-4/+11
2017-06-21clk: hisilicon: add usb2 clocks for hi3798cv200 SoCJiancheng Xue1-0/+21
2017-06-21clk: Add Gemini SoC clock controllerLinus Walleij3-0/+464
2017-06-21clk: iproc: Remove __init marking on iproc_pll_clk_setup()Stephen Boyd1-6/+6
2017-06-19clk: bcm: Add clocks for Stingray SOCSandeep Tripathy3-0/+336
2017-06-19clk: mediatek: export cpu multiplexer clock for MT8173 SoCsSean Wang1-0/+23
2017-06-19clk: mediatek: export cpu multiplexer clock for MT2701/MT7623 SoCsSean Wang1-0/+8
2017-06-19clk: mediatek: add missing cpu mux causing Mediatek cpufreq can't workSean Wang3-1/+151
2017-06-19clk: renesas: cpg-mssr: Use of_device_get_match_data() helperGeert Uytterhoeven1-1/+1
2017-06-19clk: hi6220: add acpu clockZhangfei Gao1-0/+22
2017-06-19clk: zx296718: export I2S mux clocksShawn Guo1-4/+4
2017-06-19clk: imx7d: create clocks behind rawnand clock gateStefan Agner1-2/+4
2017-06-19clk: hi3660: Set PPLL2 to 2880MZhong Kaihua1-2/+2
2017-06-19clk: hi3660: add clocks for video encoder, decoder and ISPChen Jun1-0/+40
2017-06-19clk: hi3660: fix wrong parent name of clk_mux_sysbusChen Jun1-2/+4
2017-06-19clk: gcc-msm8916: add support to 9.6MHz codec clkSrinivas Kandagatla1-0/+1
2017-06-19clk: qcom: Add ipq8074 Global Clock Controller supportAbhishek Sahu3-0/+1017
2017-06-19clk: mvebu: cp110: Minor cleanupsStephen Boyd1-3/+2
2017-06-19Merge branch 'clk-cp110' of git://git.infradead.org/linux-mvebu into clk-nextStephen Boyd1-62/+138
2017-06-19clk: socfpga: Fix the smplsel on Arria10 and Stratix10Dinh Nguyen2-1/+4
2017-06-19clk: Hi3660: register fixed_rate_clks with CLK_OF_DECLARE_DRIVERLeo Yan1-10/+38
2017-06-19clk: mvebu: cp110: add sdio clock to cp-110 system controllerKonstantin Porotchkin1-5/+23
2017-06-19clk: mvebu: cp110: introduce a new bindingGregory CLEMENT1-15/+48
2017-06-19clk: mvebu: cp110: do not depend anymore of the *-clock-output-namesGregory CLEMENT1-40/+65
2017-06-16Merge tag 'meson-clk-for-4.13-2' of git://github.com/BayLibre/clk-meson into ...Stephen Boyd4-19/+25
2017-06-16Merge branch 'for-4.13-ti-clkctrl' of https://github.com/t-kristo/linux-pm in...Stephen Boyd4-1/+1193
2017-06-16clk: sunxi-ng: Staticize ccu_mux_helper_unapply_prediv()Stephen Boyd1-1/+1
2017-06-16Merge tag 'sunxi-clk-for-4.13' of https://git.kernel.org/pub/scm/linux/kernel...Stephen Boyd22-269/+1572
2017-06-16clk: meson: gxbb: add all clk81 parentsJerome Brunet1-5/+8
2017-06-16Merge branch 'next/headers' into next/driversJerome Brunet1-10/+10
2017-06-15clk: ti: omap4: add clkctrl clock dataTero Kristo3-0/+670
2017-06-15clk: ti: add support for clkctrl clocksTero Kristo3-1/+523
2017-06-14Merge branch 'clk-fixes' into clk-nextStephen Boyd5-4/+9
2017-06-14Merge tag 'sunxi-clk-fixes-for-4.12' of https://git.kernel.org/pub/scm/linux/...Stephen Boyd5-4/+9
2017-06-14Merge tag 'clk-v4.13-samsung' of git://git.kernel.org/pub/scm/linux/kernel/gi...Stephen Boyd10-216/+235
2017-06-14Merge tag 'v4.13-rockchip-clk1' of git://git.kernel.org/pub/scm/linux/kernel/...Stephen Boyd7-66/+735
2017-06-14clk: keystone: Add sci-clk driver supportTero Kristo5-9/+743
2017-06-12clk: meson: meson8b: add compatibles for Meson8 and Meson8m2Martin Blumenstingl2-4/+7
2017-06-12clk: meson8b: export the ethernet gate clockMartin Blumenstingl1-1/+1
2017-06-12clk: meson8b: export the USB clocksMartin Blumenstingl1-5/+5
2017-06-12clk: meson8b: export the gate clock for the HW random number generatorMartin Blumenstingl1-1/+1
2017-06-12clk: meson8b: export the SDIO clockMartin Blumenstingl1-1/+1
2017-06-12clk: meson8b: export the SAR ADC clocksMartin Blumenstingl1-2/+2