diff options
Diffstat (limited to 'drivers/gpu/drm/amd')
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp.h | 18 |
1 files changed, 6 insertions, 12 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp.h b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp.h index 34e501979b55..afe9d8f629d6 100644 --- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp.h +++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp.h @@ -742,17 +742,11 @@ type CM_SHAPER_RAMB_EXP_REGION_START_SEGMENT_G; \ type CM_SHAPER_RAMB_EXP_REGION_START_R; \ type CM_SHAPER_RAMB_EXP_REGION_START_SEGMENT_R; \ - type CM_SHAPER_RAMB_EXP_REGION_LINEAR_SLOPE_B; \ - type CM_SHAPER_RAMB_EXP_REGION_LINEAR_SLOPE_G; \ - type CM_SHAPER_RAMB_EXP_REGION_LINEAR_SLOPE_R; \ type CM_SHAPER_RAMB_EXP_REGION_END_B; \ - type CM_SHAPER_RAMB_EXP_REGION_END_SLOPE_B; \ type CM_SHAPER_RAMB_EXP_REGION_END_BASE_B; \ type CM_SHAPER_RAMB_EXP_REGION_END_G; \ - type CM_SHAPER_RAMB_EXP_REGION_END_SLOPE_G; \ type CM_SHAPER_RAMB_EXP_REGION_END_BASE_G; \ type CM_SHAPER_RAMB_EXP_REGION_END_R; \ - type CM_SHAPER_RAMB_EXP_REGION_END_SLOPE_R; \ type CM_SHAPER_RAMB_EXP_REGION_END_BASE_R; \ type CM_SHAPER_RAMB_EXP_REGION0_LUT_OFFSET; \ type CM_SHAPER_RAMB_EXP_REGION0_NUM_SEGMENTS; \ @@ -828,17 +822,11 @@ type CM_SHAPER_RAMA_EXP_REGION_START_SEGMENT_G; \ type CM_SHAPER_RAMA_EXP_REGION_START_R; \ type CM_SHAPER_RAMA_EXP_REGION_START_SEGMENT_R; \ - type CM_SHAPER_RAMA_EXP_REGION_LINEAR_SLOPE_B; \ - type CM_SHAPER_RAMA_EXP_REGION_LINEAR_SLOPE_G; \ - type CM_SHAPER_RAMA_EXP_REGION_LINEAR_SLOPE_R; \ type CM_SHAPER_RAMA_EXP_REGION_END_B; \ - type CM_SHAPER_RAMA_EXP_REGION_END_SLOPE_B; \ type CM_SHAPER_RAMA_EXP_REGION_END_BASE_B; \ type CM_SHAPER_RAMA_EXP_REGION_END_G; \ - type CM_SHAPER_RAMA_EXP_REGION_END_SLOPE_G; \ type CM_SHAPER_RAMA_EXP_REGION_END_BASE_G; \ type CM_SHAPER_RAMA_EXP_REGION_END_R; \ - type CM_SHAPER_RAMA_EXP_REGION_END_SLOPE_R; \ type CM_SHAPER_RAMA_EXP_REGION_END_BASE_R; \ type CM_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET; \ type CM_SHAPER_RAMA_EXP_REGION0_NUM_SEGMENTS; \ @@ -1160,6 +1148,9 @@ struct dcn_dpp_registers { uint32_t CM_SHAPER_RAMB_START_CNTL_B; uint32_t CM_SHAPER_RAMB_START_CNTL_G; uint32_t CM_SHAPER_RAMB_START_CNTL_R; + uint32_t CM_SHAPER_RAMB_END_CNTL_B; + uint32_t CM_SHAPER_RAMB_END_CNTL_G; + uint32_t CM_SHAPER_RAMB_END_CNTL_R; uint32_t CM_SHAPER_RAMB_REGION_0_1; uint32_t CM_SHAPER_RAMB_REGION_2_3; uint32_t CM_SHAPER_RAMB_REGION_4_5; @@ -1180,6 +1171,9 @@ struct dcn_dpp_registers { uint32_t CM_SHAPER_RAMA_START_CNTL_B; uint32_t CM_SHAPER_RAMA_START_CNTL_G; uint32_t CM_SHAPER_RAMA_START_CNTL_R; + uint32_t CM_SHAPER_RAMA_END_CNTL_B; + uint32_t CM_SHAPER_RAMA_END_CNTL_G; + uint32_t CM_SHAPER_RAMA_END_CNTL_R; uint32_t CM_SHAPER_RAMA_REGION_0_1; uint32_t CM_SHAPER_RAMA_REGION_2_3; uint32_t CM_SHAPER_RAMA_REGION_4_5; |