diff options
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/dce80')
4 files changed, 12 insertions, 188 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dce80/Makefile b/drivers/gpu/drm/amd/display/dc/dce80/Makefile index 1d54d5fa0fd2..c1105895e5fa 100644 --- a/drivers/gpu/drm/amd/display/dc/dce80/Makefile +++ b/drivers/gpu/drm/amd/display/dc/dce80/Makefile @@ -2,8 +2,7 @@ # Makefile for the 'controller' sub-component of DAL. # It provides the control and status of HW CRTC block. -DCE80 = dce80_timing_generator.o \ - dce80_compressor.o dce80_mem_input.o dce80_hw_sequencer.o \ +DCE80 = dce80_timing_generator.o dce80_compressor.o dce80_hw_sequencer.o \ dce80_resource.o AMD_DAL_DCE80 = $(addprefix $(AMDDALPATH)/dc/dce80/,$(DCE80)) diff --git a/drivers/gpu/drm/amd/display/dc/dce80/dce80_mem_input.c b/drivers/gpu/drm/amd/display/dc/dce80/dce80_mem_input.c deleted file mode 100644 index 933e3d819f27..000000000000 --- a/drivers/gpu/drm/amd/display/dc/dce80/dce80_mem_input.c +++ /dev/null @@ -1,83 +0,0 @@ -/* - * Copyright 2012-15 Advanced Micro Devices, Inc. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - * - * Authors: AMD - * - */ -#include "dm_services.h" - -#include "dce/dce_8_0_d.h" -#include "dce/dce_8_0_sh_mask.h" -/* TODO: this needs to be looked at, used by Stella's workaround*/ -#include "gmc/gmc_7_1_d.h" -#include "gmc/gmc_7_1_sh_mask.h" - -#include "include/logger_interface.h" -#include "inc/dce_calcs.h" - -#include "../dce110/dce110_mem_input.h" -#include "dce80_mem_input.h" - -#define MAX_WATERMARK 0xFFFF -#define SAFE_NBP_MARK 0x7FFF - -#define DCP_REG(reg) (reg + mem_input80->offsets.dcp) -#define DMIF_REG(reg) (reg + mem_input80->offsets.dmif) -#define PIPE_REG(reg) (reg + mem_input80->offsets.pipe) - -static struct mem_input_funcs dce80_mem_input_funcs = { - .mem_input_program_display_marks = - dce110_mem_input_program_display_marks, - .allocate_mem_input = dce_mem_input_allocate_dmif, - .free_mem_input = dce_mem_input_free_dmif, - .mem_input_program_surface_flip_and_addr = - dce110_mem_input_program_surface_flip_and_addr, - .mem_input_program_surface_config = - dce_mem_input_program_surface_config, - .mem_input_is_flip_pending = - dce110_mem_input_is_flip_pending, - .mem_input_update_dchub = NULL -}; - -/*****************************************/ -/* Constructor, Destructor */ -/*****************************************/ - -bool dce80_mem_input_construct( - struct dce110_mem_input *mem_input80, - struct dc_context *ctx, - uint32_t inst, - const struct dce110_mem_input_reg_offsets *offsets) -{ - /* supported stutter method - * STUTTER_MODE_ENHANCED - * STUTTER_MODE_QUAD_DMIF_BUFFER - */ - mem_input80->base.funcs = &dce80_mem_input_funcs; - mem_input80->base.ctx = ctx; - - mem_input80->base.inst = inst; - - mem_input80->offsets = *offsets; - - return true; -} - diff --git a/drivers/gpu/drm/amd/display/dc/dce80/dce80_mem_input.h b/drivers/gpu/drm/amd/display/dc/dce80/dce80_mem_input.h deleted file mode 100644 index 357b9e2e9f1e..000000000000 --- a/drivers/gpu/drm/amd/display/dc/dce80/dce80_mem_input.h +++ /dev/null @@ -1,36 +0,0 @@ -/* Copyright 2012-15 Advanced Micro Devices, Inc. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - * - * Authors: AMD - * - */ - -#ifndef __DC_MEM_INPUT_DCE80_H__ -#define __DC_MEM_INPUT_DCE80_H__ - -#include "mem_input.h" - -bool dce80_mem_input_construct( - struct dce110_mem_input *mem_input80, - struct dc_context *ctx, - uint32_t inst, - const struct dce110_mem_input_reg_offsets *offsets); - -#endif diff --git a/drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c b/drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c index 5735914a8737..095e437ce112 100644 --- a/drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c +++ b/drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c @@ -35,12 +35,12 @@ #include "include/irq_service_interface.h" #include "irq/dce80/irq_service_dce80.h" #include "dce110/dce110_timing_generator.h" -#include "dce110/dce110_mem_input.h" #include "dce110/dce110_resource.h" #include "dce80/dce80_timing_generator.h" +#include "dce/dce_mem_input.h" #include "dce/dce_link_encoder.h" #include "dce/dce_stream_encoder.h" -#include "dce80/dce80_mem_input.h" +#include "dce/dce_mem_input.h" #include "dce/dce_ipp.h" #include "dce/dce_transform.h" #include "dce/dce_opp.h" @@ -141,51 +141,6 @@ static const struct dce110_timing_generator_offsets dce80_tg_offsets[] = { } }; -static const struct dce110_mem_input_reg_offsets dce80_mi_reg_offsets[] = { - { - .dcp = (mmGRPH_CONTROL - mmGRPH_CONTROL), - .dmif = (mmDMIF_PG0_DPG_WATERMARK_MASK_CONTROL - - mmDPG_WATERMARK_MASK_CONTROL), - .pipe = (mmPIPE0_DMIF_BUFFER_CONTROL - - mmPIPE0_DMIF_BUFFER_CONTROL), - }, - { - .dcp = (mmDCP1_GRPH_CONTROL - mmGRPH_CONTROL), - .dmif = (mmDMIF_PG1_DPG_WATERMARK_MASK_CONTROL - - mmDPG_WATERMARK_MASK_CONTROL), - .pipe = (mmPIPE1_DMIF_BUFFER_CONTROL - - mmPIPE0_DMIF_BUFFER_CONTROL), - }, - { - .dcp = (mmDCP2_GRPH_CONTROL - mmGRPH_CONTROL), - .dmif = (mmDMIF_PG2_DPG_WATERMARK_MASK_CONTROL - - mmDPG_WATERMARK_MASK_CONTROL), - .pipe = (mmPIPE2_DMIF_BUFFER_CONTROL - - mmPIPE0_DMIF_BUFFER_CONTROL), - }, - { - .dcp = (mmDCP3_GRPH_CONTROL - mmGRPH_CONTROL), - .dmif = (mmDMIF_PG3_DPG_WATERMARK_MASK_CONTROL - - mmDPG_WATERMARK_MASK_CONTROL), - .pipe = (mmPIPE3_DMIF_BUFFER_CONTROL - - mmPIPE0_DMIF_BUFFER_CONTROL), - }, - { - .dcp = (mmDCP4_GRPH_CONTROL - mmGRPH_CONTROL), - .dmif = (mmDMIF_PG4_DPG_WATERMARK_MASK_CONTROL - - mmDPG_WATERMARK_MASK_CONTROL), - .pipe = (mmPIPE4_DMIF_BUFFER_CONTROL - - mmPIPE0_DMIF_BUFFER_CONTROL), - }, - { - .dcp = (mmDCP5_GRPH_CONTROL - mmGRPH_CONTROL), - .dmif = (mmDMIF_PG5_DPG_WATERMARK_MASK_CONTROL - - mmDPG_WATERMARK_MASK_CONTROL), - .pipe = (mmPIPE5_DMIF_BUFFER_CONTROL - - mmPIPE0_DMIF_BUFFER_CONTROL), - } -}; - /* set register offset */ #define SR(reg_name)\ .reg_name = mm ## reg_name @@ -541,28 +496,18 @@ static const struct dce_mem_input_mask mi_masks = { static struct mem_input *dce80_mem_input_create( struct dc_context *ctx, - uint32_t inst, - const struct dce110_mem_input_reg_offsets *offsets) + uint32_t inst) { - struct dce110_mem_input *mem_input80 = - dm_alloc(sizeof(struct dce110_mem_input)); + struct dce_mem_input *dce_mi = dm_alloc(sizeof(struct dce_mem_input)); - if (!mem_input80) + if (!dce_mi) { + BREAK_TO_DEBUGGER(); return NULL; - - if (dce80_mem_input_construct(mem_input80, ctx, inst, offsets)) { - struct mem_input *mi = &mem_input80->base; - - mi->regs = &mi_regs[inst]; - mi->shifts = &mi_shifts; - mi->masks = &mi_masks; - mi->wa.single_head_rdreq_dmif_limit = 2; - return mi; } - BREAK_TO_DEBUGGER(); - dm_free(mem_input80); - return NULL; + dce_mem_input_construct(dce_mi, ctx, inst, &mi_regs[inst], &mi_shifts, &mi_masks); + dce_mi->wa.single_head_rdreq_dmif_limit = 2; + return &dce_mi->base; } static void dce80_transform_destroy(struct transform **xfm) @@ -684,7 +629,7 @@ static void destruct(struct dce110_resource_pool *pool) dce_ipp_destroy(&pool->base.ipps[i]); if (pool->base.mis[i] != NULL) { - dm_free(TO_DCE110_MEM_INPUT(pool->base.mis[i])); + dm_free(TO_DCE_MEM_INPUT(pool->base.mis[i])); pool->base.mis[i] = NULL; } @@ -1000,8 +945,7 @@ static bool construct( goto res_create_fail; } - pool->base.mis[i] = dce80_mem_input_create(ctx, i, - &dce80_mi_reg_offsets[i]); + pool->base.mis[i] = dce80_mem_input_create(ctx, i); if (pool->base.mis[i] == NULL) { BREAK_TO_DEBUGGER(); dm_error("DC: failed to create memory input!\n"); |