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path: root/drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c
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Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c')
-rw-r--r--drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c4
1 files changed, 0 insertions, 4 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c b/drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c
index f53dc157db97..bd4524ef3a37 100644
--- a/drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c
+++ b/drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c
@@ -585,9 +585,7 @@ static uint32_t dce110_get_pix_clk_dividers(
pll_settings, pix_clk_params);
break;
case DCE_VERSION_11_2:
-#if defined(CONFIG_DRM_AMD_DC_DCE12_0)
case DCE_VERSION_12_0:
-#endif
dce112_get_pix_clk_dividers_helper(clk_src,
pll_settings, pix_clk_params);
break;
@@ -871,9 +869,7 @@ static bool dce110_program_pix_clk(
break;
case DCE_VERSION_11_2:
-#if defined(CONFIG_DRM_AMD_DC_DCE12_0)
case DCE_VERSION_12_0:
-#endif
if (clock_source->id != CLOCK_SOURCE_ID_DP_DTO) {
bp_pc_params.flags.SET_GENLOCK_REF_DIV_SRC =
pll_settings->use_external_clk;