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path: root/drivers/gpu/drm/amd/display/dc/dc.h
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Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/dc.h')
-rw-r--r--drivers/gpu/drm/amd/display/dc/dc.h50
1 files changed, 42 insertions, 8 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dc.h b/drivers/gpu/drm/amd/display/dc/dc.h
index e2e3c9df79ea..fa4b3c8b3bb7 100644
--- a/drivers/gpu/drm/amd/display/dc/dc.h
+++ b/drivers/gpu/drm/amd/display/dc/dc.h
@@ -38,7 +38,7 @@
#include "inc/compressor.h"
#include "dml/display_mode_lib.h"
-#define DC_VER "3.1.27"
+#define DC_VER "3.1.38"
#define MAX_SURFACES 3
#define MAX_STREAMS 6
@@ -48,6 +48,18 @@
/*******************************************************************************
* Display Core Interfaces
******************************************************************************/
+struct dmcu_version {
+ unsigned int date;
+ unsigned int month;
+ unsigned int year;
+ unsigned int interface_version;
+};
+
+struct dc_versions {
+ const char *dc_ver;
+ struct dmcu_version dmcu_version;
+};
+
struct dc_caps {
uint32_t max_streams;
uint32_t max_links;
@@ -62,6 +74,7 @@ struct dc_caps {
bool dcc_const_color;
bool dynamic_audio;
bool is_apu;
+ bool dual_link_dvi;
};
struct dc_dcc_surface_param {
@@ -94,6 +107,7 @@ struct dc_surface_dcc_cap {
};
struct dc_static_screen_events {
+ bool force_trigger;
bool cursor_update;
bool surface_update;
bool overlay_update;
@@ -170,6 +184,16 @@ enum wm_report_mode {
WM_REPORT_OVERRIDE = 1,
};
+struct dc_clocks {
+ int dispclk_khz;
+ int max_supported_dppclk_khz;
+ int dppclk_khz;
+ int dcfclk_khz;
+ int socclk_khz;
+ int dcfclk_deep_sleep_khz;
+ int fclk_khz;
+};
+
struct dc_debug {
bool surface_visual_confirm;
bool sanity_checks;
@@ -211,11 +235,15 @@ struct dc_debug {
bool disable_stereo_support;
bool vsr_support;
bool performance_trace;
+ bool az_endpoint_mute_only;
+ bool always_use_regamma;
+ bool p010_mpo_support;
};
struct dc_state;
struct resource_pool;
struct dce_hwseq;
struct dc {
+ struct dc_versions versions;
struct dc_caps caps;
struct dc_cap_funcs cap_funcs;
struct dc_config config;
@@ -252,6 +280,8 @@ struct dc {
bool optimized_required;
+ bool apply_edp_fast_boot_optimization;
+
/* FBC compressor */
#if defined(CONFIG_DRM_AMD_DC_FBC)
struct compressor *fbc_compressor;
@@ -288,9 +318,6 @@ struct dc_init_data {
struct dc_config flags;
uint32_t log_mask;
-#if defined(CONFIG_DRM_AMD_DC_FBC)
- uint64_t fbc_gpu_addr;
-#endif
};
struct dc *dc_create(const struct dc_init_data *init_params);
@@ -369,6 +396,8 @@ struct dc_transfer_func {
struct dc_transfer_func_distributed_points tf_pts;
enum dc_transfer_func_type type;
enum dc_transfer_func_predefined tf;
+ /* FP16 1.0 reference level in nits, default is 80 nits, only for PQ*/
+ uint32_t sdr_ref_white_level;
struct dc_context *ctx;
};
@@ -397,12 +426,15 @@ union surface_update_flags {
uint32_t swizzle_change:1;
uint32_t scaling_change:1;
uint32_t position_change:1;
- uint32_t in_transfer_func:1;
+ uint32_t in_transfer_func_change:1;
uint32_t input_csc_change:1;
+ uint32_t output_tf_change:1;
+ uint32_t pixel_format_change:1;
/* Full updates */
uint32_t new_plane:1;
uint32_t bpp_change:1;
+ uint32_t gamma_change:1;
uint32_t bandwidth_change:1;
uint32_t clock_change:1;
uint32_t stereo_format_change:1;
@@ -414,6 +446,7 @@ union surface_update_flags {
struct dc_plane_state {
struct dc_plane_address address;
+ struct dc_plane_flip_time time;
struct scaling_taps scaling_quality;
struct rect src_rect;
struct rect dst_rect;
@@ -429,6 +462,7 @@ struct dc_plane_state {
struct dc_bias_and_scale *bias_and_scale;
struct csc_transform input_csc_color_matrix;
struct fixed31_32 coeff_reduction_factor;
+ uint32_t sdr_white_level;
// TODO: No longer used, remove
struct dc_hdr_static_metadata hdr_static_ctx;
@@ -465,6 +499,7 @@ struct dc_plane_info {
enum plane_stereo_format stereo_format;
enum dc_color_space color_space;
enum color_transfer_func input_tf;
+ unsigned int sdr_white_level;
bool horizontal_mirror;
bool visible;
bool per_pixel_alpha;
@@ -489,10 +524,8 @@ struct dc_surface_update {
/* following updates require alloc/sleep/spin that is not isr safe,
* null means no updates
*/
- /* gamma TO BE REMOVED */
struct dc_gamma *gamma;
enum color_transfer_func color_input_tf;
- enum color_transfer_func color_output_tf;
struct dc_transfer_func *in_transfer_func;
struct csc_transform *input_csc_color_matrix;
@@ -524,6 +557,7 @@ struct dc_transfer_func *dc_create_transfer_func(void);
*/
struct dc_flip_addrs {
struct dc_plane_address address;
+ unsigned int flip_timestamp_in_us;
bool flip_immediate;
/* TODO: add flip duration for FreeSync */
};
@@ -672,7 +706,7 @@ enum dc_irq_source dc_interrupt_to_irq_source(
struct dc *dc,
uint32_t src_id,
uint32_t ext_id);
-void dc_interrupt_set(struct dc *dc, enum dc_irq_source src, bool enable);
+bool dc_interrupt_set(struct dc *dc, enum dc_irq_source src, bool enable);
void dc_interrupt_ack(struct dc *dc, enum dc_irq_source src);
enum dc_irq_source dc_get_hpd_irq_source_at_index(
struct dc *dc, uint32_t link_index);