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-rw-r--r--drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c8
-rw-r--r--drivers/gpu/drm/amd/display/dc/i2caux/dce110/aux_engine_dce110.c2
2 files changed, 4 insertions, 6 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c b/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c
index 37497e88a930..5bbfc34d6f01 100644
--- a/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c
+++ b/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c
@@ -1439,13 +1439,11 @@ static uint32_t get_max_pixel_clock_for_all_paths(
return max_pix_clk;
}
-/* Find clock state based on clock requested. if clock value is 0, simply
+/*
+ * Find clock state based on clock requested. if clock value is 0, simply
* set clock state as requested without finding clock state by clock value
- *TODO: when dce120_hw_sequencer.c is created, override apply_min_clock.
- *
- * TODOFPGA remove TODO after implement dal_display_clock_get_cur_clocks_value
- * etc support for dcn1.0
*/
+
static void apply_min_clocks(
struct dc *dc,
struct dc_state *context,
diff --git a/drivers/gpu/drm/amd/display/dc/i2caux/dce110/aux_engine_dce110.c b/drivers/gpu/drm/amd/display/dc/i2caux/dce110/aux_engine_dce110.c
index 98ce0fe5ac37..d3eaf8977a60 100644
--- a/drivers/gpu/drm/amd/display/dc/i2caux/dce110/aux_engine_dce110.c
+++ b/drivers/gpu/drm/amd/display/dc/i2caux/dce110/aux_engine_dce110.c
@@ -372,7 +372,7 @@ static enum aux_channel_operation_result get_channel_status(
10, aux110->timeout_period/10);
/* Note that the following bits are set in 'status.bits'
- * during CTS 4.2.1.2:
+ * during CTS 4.2.1.2 (FW 3.3.1):
* AUX_SW_RX_MIN_COUNT_VIOL, AUX_SW_RX_INVALID_STOP,
* AUX_SW_RX_RECV_NO_DET, AUX_SW_RX_RECV_INVALID_H.
*