path: root/include/uapi/drm/i915_drm.h
diff options
authorChris Wilson <>2016-08-04 16:32:23 +0100
committerChris Wilson <>2016-08-04 20:19:53 +0100
commit91b2db6f65fbbb1a6688bcc2e52596b723ea2472 (patch)
tree4667c1687f8679ee23633246266ff678af605f92 /include/uapi/drm/i915_drm.h
parent2ffffd0f85ab90f38569c39ef0455824511e80e2 (diff)
drm/i915: Pad GTT views of exec objects up to user specified size
Our GPUs impose certain requirements upon buffers that depend upon how exactly they are used. Typically this is expressed as that they require a larger surface than would be naively computed by pitch * height. Normally such requirements are hidden away in the userspace driver, but when we accept pointers from strangers and later impose extra conditions on them, the original client allocator has no idea about the monstrosities in the GPU and we require the userspace driver to inform the kernel how many padding pages are required beyond the client allocation. v2: Long time, no see v3: Try an anonymous union for uapi struct compatibility Signed-off-by: Chris Wilson <> Cc: Tvrtko Ursulin <> Reviewed-by: Tvrtko Ursulin <> Link:
Diffstat (limited to 'include/uapi/drm/i915_drm.h')
1 files changed, 6 insertions, 2 deletions
diff --git a/include/uapi/drm/i915_drm.h b/include/uapi/drm/i915_drm.h
index 33ce5ff9556a..0f292733cffc 100644
--- a/include/uapi/drm/i915_drm.h
+++ b/include/uapi/drm/i915_drm.h
@@ -727,11 +727,15 @@ struct drm_i915_gem_exec_object2 {
#define EXEC_OBJECT_WRITE (1<<2)
#define EXEC_OBJECT_PINNED (1<<4)
+#define EXEC_OBJECT_PAD_TO_SIZE (1<<5)
/* All remaining bits are MBZ and RESERVED FOR FUTURE USE */
__u64 flags;
- __u64 rsvd1;
+ union {
+ __u64 rsvd1;
+ __u64 pad_to_size;
+ };
__u64 rsvd2;