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authorCorbin McElhanney <corbin.mcelhanney@amd.com>2017-08-04 15:30:45 -0400
committerAlex Deucher <alexander.deucher@amd.com>2017-09-26 18:16:25 -0400
commit08b8ccfbcb511aa64efd8fa211f785597890af9e (patch)
treec67767c611a7a6c198862a0df3f8ad995de9e795 /drivers/gpu
parente1403629d86402ccc25a5c18feb80fc97f671c12 (diff)
drm/amd/display: Fix hw state logging regression
Signed-off-by: Corbin McElhanney <corbin.mcelhanney@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu')
-rw-r--r--drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c5
1 files changed, 4 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
index 292dfef91c9d..2fd9c33dbf1c 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
@@ -134,6 +134,7 @@ static void verify_allow_pstate_change_high(
static unsigned int pstate_wait_timeout_us = 40;
static unsigned int max_sampled_pstate_wait_us; /* data collection */
static bool forced_pstate_allow; /* help with revert wa */
+ static bool should_log_hw_state; /* prevent hw state log by default */
unsigned int debug_index = 0x7;
unsigned int debug_data;
@@ -191,7 +192,9 @@ static void verify_allow_pstate_change_high(
REG_WRITE(DCHUBBUB_ARB_DRAM_STATE_CNTL, force_allow_pstate);
forced_pstate_allow = true;
- dcn10_log_hw_state(DC_TO_CORE(hws->ctx->dc));
+ if (should_log_hw_state) {
+ dcn10_log_hw_state(DC_TO_CORE(hws->ctx->dc));
+ }
BREAK_TO_DEBUGGER();
}