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authorLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>2014-12-09 00:24:49 +0200
committerLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>2014-12-23 12:01:50 +0200
commit1b30dbde8596ca8de2497c2a50d5381dfe62ee8c (patch)
tree1949b3d8d642ddc371ad0b45a44869147629d56f /drivers/gpu/drm/rcar-du/rcar_du_regs.h
parent0c1c877681e73b87ef63634ed7da55a711de40a6 (diff)
drm: rcar-du: Add support for external pixel clock
The DU uses the module functional clock as the default pixel clock, but supports using an externally supplied pixel clock instead. Support this by adding the external pixel clock to the DT bindings, and selecting the clock automatically at runtime based on the requested mode pixel frequency. The input clock pins to DU channels routing is configurable, but currently hardcoded to connect input clock i to channel i. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Diffstat (limited to 'drivers/gpu/drm/rcar-du/rcar_du_regs.h')
-rw-r--r--drivers/gpu/drm/rcar-du/rcar_du_regs.h4
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/gpu/drm/rcar-du/rcar_du_regs.h b/drivers/gpu/drm/rcar-du/rcar_du_regs.h
index 73f7347f740b..c3639d1db28b 100644
--- a/drivers/gpu/drm/rcar-du/rcar_du_regs.h
+++ b/drivers/gpu/drm/rcar-du/rcar_du_regs.h
@@ -256,8 +256,8 @@
#define DIDSR_LCDS_LVDS0(n) (2 << (8 + (n) * 2))
#define DIDSR_LCDS_LVDS1(n) (3 << (8 + (n) * 2))
#define DIDSR_LCDS_MASK(n) (3 << (8 + (n) * 2))
-#define DIDSR_PCDS_CLK(n, clk) (clk << ((n) * 2))
-#define DIDSR_PCDS_MASK(n) (3 << ((n) * 2))
+#define DIDSR_PDCS_CLK(n, clk) (clk << ((n) * 2))
+#define DIDSR_PDCS_MASK(n) (3 << ((n) * 2))
/* -----------------------------------------------------------------------------
* Display Timing Generation Registers