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authorJordan Crouse <jcrouse@codeaurora.org>2018-01-22 11:10:46 -0700
committerRob Clark <robdclark@gmail.com>2018-02-20 10:41:22 -0500
commitedf5ceac316a95539a0b063d60d03f3226046f10 (patch)
tree5eb3a66029f08ac84fbb1b23930f8587ad6ed9f9 /drivers/gpu/drm/msm
parent9d20a0e6a8f4edf37d75f3bca41f99f52a440c22 (diff)
drm/msm: Pass the correct aperture end to drm_mm_init
drm_mm_init() takes the start and length of the intended virtual memory address region but the msm code is passing the end of the region instead. That would work out if the region started at 0 but it doesn't so the top of the region sneaks above the 32 bit boundary which won't work because the driver doesn't support 64 bit addresses for the GPU yet. Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
Diffstat (limited to 'drivers/gpu/drm/msm')
-rw-r--r--drivers/gpu/drm/msm/msm_gem_vma.c4
1 files changed, 3 insertions, 1 deletions
diff --git a/drivers/gpu/drm/msm/msm_gem_vma.c b/drivers/gpu/drm/msm/msm_gem_vma.c
index d34e331554f3..ffbec224551b 100644
--- a/drivers/gpu/drm/msm/msm_gem_vma.c
+++ b/drivers/gpu/drm/msm/msm_gem_vma.c
@@ -96,6 +96,8 @@ msm_gem_address_space_create(struct device *dev, struct iommu_domain *domain,
const char *name)
{
struct msm_gem_address_space *aspace;
+ u64 size = domain->geometry.aperture_end -
+ domain->geometry.aperture_start;
aspace = kzalloc(sizeof(*aspace), GFP_KERNEL);
if (!aspace)
@@ -106,7 +108,7 @@ msm_gem_address_space_create(struct device *dev, struct iommu_domain *domain,
aspace->mmu = msm_iommu_new(dev, domain);
drm_mm_init(&aspace->mm, (domain->geometry.aperture_start >> PAGE_SHIFT),
- (domain->geometry.aperture_end >> PAGE_SHIFT) - 1);
+ size >> PAGE_SHIFT);
kref_init(&aspace->kref);