summaryrefslogtreecommitdiff
path: root/drivers/gpu/drm/gma500/psb_intel_reg.h
diff options
context:
space:
mode:
authorAlan Cox <alan@linux.intel.com>2012-03-14 12:00:29 +0000
committerDave Airlie <airlied@redhat.com>2012-03-15 09:46:22 +0000
commit09016a11fc738e82ca1303e2332473b517bbd660 (patch)
treee347502a2cec3008c8a17269f9bee34c9509be1c /drivers/gpu/drm/gma500/psb_intel_reg.h
parent50d44a523759c39af1119285a5396ca387288af0 (diff)
gma500: suspend/resume support for Cedartrail
Update our tree to match the current driver head. Signed-off-by: Alan Cox <alan@linux.intel.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/gma500/psb_intel_reg.h')
-rw-r--r--drivers/gpu/drm/gma500/psb_intel_reg.h9
1 files changed, 9 insertions, 0 deletions
diff --git a/drivers/gpu/drm/gma500/psb_intel_reg.h b/drivers/gpu/drm/gma500/psb_intel_reg.h
index fcc0af03d685..e89d3a2e8fdc 100644
--- a/drivers/gpu/drm/gma500/psb_intel_reg.h
+++ b/drivers/gpu/drm/gma500/psb_intel_reg.h
@@ -177,6 +177,9 @@
#define LVDSPP_OFF 0x6120c
#define PP_CYCLE 0x61210
+#define PP_ON_DELAYS 0x61208 /* Cedartrail */
+#define PP_OFF_DELAYS 0x6120c /* Cedartrail */
+
#define PFIT_CONTROL 0x61230
#define PFIT_ENABLE (1 << 31)
#define PFIT_PIPE_MASK (3 << 29)
@@ -1252,6 +1255,12 @@ No status bits are changed.
# define SB_BYTE_ENABLE_SHIFT 4
# define SB_BUSY (1 << 0)
+#define DSPCLK_GATE_D 0x6200
+# define VRHUNIT_CLOCK_GATE_DISABLE (1 << 28) /* Fixed value on CDV */
+# define DPOUNIT_CLOCK_GATE_DISABLE (1 << 11)
+# define DPIOUNIT_CLOCK_GATE_DISABLE (1 << 6)
+
+#define RAMCLK_GATE_D 0x6210
/* 32-bit value read/written from the DPIO reg. */
#define SB_DATA 0x02104 /* cedarview */