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authorDave Airlie <airlied@redhat.com>2017-09-29 10:32:23 +1000
committerAlex Deucher <alexander.deucher@amd.com>2017-09-29 13:01:02 -0400
commite04a6123a45abf6836f547e679a8f9aca37ceeb6 (patch)
treea69d32956e77fdf9991e379dd6a0610a4cc43f95 /drivers/gpu/drm/amd
parent99d1abf8f41ed2c256e8cca7e9da71d751894c7f (diff)
amdgpu/dm: constify plane type.
Signed-off-by: Dave Airlie <airlied@redhat.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd')
-rw-r--r--drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h2
-rw-r--r--drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c6
2 files changed, 4 insertions, 4 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h
index b541ade8a03f..59e2e5d59562 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h
@@ -361,7 +361,7 @@ struct amdgpu_mode_info {
int num_dig; /* number of dig blocks */
int disp_priority;
const struct amdgpu_display_funcs *funcs;
- enum drm_plane_type *plane_type;
+ const enum drm_plane_type *plane_type;
};
#define AMDGPU_MAX_BL_LEVEL 0xFF
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index 89442cce7373..ef938521fec8 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -71,7 +71,7 @@
#include "i2caux_interface.h"
-static enum drm_plane_type dm_plane_type_default[AMDGPU_MAX_PLANES] = {
+static const enum drm_plane_type dm_plane_type_default[AMDGPU_MAX_PLANES] = {
DRM_PLANE_TYPE_PRIMARY,
DRM_PLANE_TYPE_PRIMARY,
DRM_PLANE_TYPE_PRIMARY,
@@ -80,14 +80,14 @@ static enum drm_plane_type dm_plane_type_default[AMDGPU_MAX_PLANES] = {
DRM_PLANE_TYPE_PRIMARY,
};
-static enum drm_plane_type dm_plane_type_carizzo[AMDGPU_MAX_PLANES] = {
+static const enum drm_plane_type dm_plane_type_carizzo[AMDGPU_MAX_PLANES] = {
DRM_PLANE_TYPE_PRIMARY,
DRM_PLANE_TYPE_PRIMARY,
DRM_PLANE_TYPE_PRIMARY,
DRM_PLANE_TYPE_OVERLAY,/* YUV Capable Underlay */
};
-static enum drm_plane_type dm_plane_type_stoney[AMDGPU_MAX_PLANES] = {
+static const enum drm_plane_type dm_plane_type_stoney[AMDGPU_MAX_PLANES] = {
DRM_PLANE_TYPE_PRIMARY,
DRM_PLANE_TYPE_PRIMARY,
DRM_PLANE_TYPE_OVERLAY, /* YUV Capable Underlay */