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authorFeifei Xu <Feifei.Xu@amd.com>2017-11-27 17:20:55 +0800
committerAlex Deucher <alexander.deucher@amd.com>2017-12-06 12:48:25 -0500
commita146391bbbc546a0dda0eac60fdf32d6076817b5 (patch)
treec3a71a83b76d74e3c837da770b3b2b8ba0cded5e /drivers/gpu/drm/amd/include
parent95c1f7aad241f5a761f7ac236154306b6519c4f8 (diff)
drm/amd/include:cleanup raven1 mp header files.
Cleanup asic_reg/raven1/MP folder. Signed-off-by: Feifei Xu <Feifei.Xu@amd.com> Acked-by: Christian K├Ânig <christian.koenig@amd.com> Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/include')
-rw-r--r--drivers/gpu/drm/amd/include/asic_reg/mp/mp_10_0_default.h (renamed from drivers/gpu/drm/amd/include/asic_reg/raven1/MP/mp_10_0_default.h)0
-rw-r--r--drivers/gpu/drm/amd/include/asic_reg/mp/mp_10_0_offset.h (renamed from drivers/gpu/drm/amd/include/asic_reg/raven1/MP/mp_10_0_offset.h)0
-rw-r--r--drivers/gpu/drm/amd/include/asic_reg/mp/mp_10_0_sh_mask.h (renamed from drivers/gpu/drm/amd/include/asic_reg/raven1/MP/mp_10_0_sh_mask.h)0
3 files changed, 0 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/include/asic_reg/raven1/MP/mp_10_0_default.h b/drivers/gpu/drm/amd/include/asic_reg/mp/mp_10_0_default.h
index f087a2bf3863..f087a2bf3863 100644
--- a/drivers/gpu/drm/amd/include/asic_reg/raven1/MP/mp_10_0_default.h
+++ b/drivers/gpu/drm/amd/include/asic_reg/mp/mp_10_0_default.h
diff --git a/drivers/gpu/drm/amd/include/asic_reg/raven1/MP/mp_10_0_offset.h b/drivers/gpu/drm/amd/include/asic_reg/mp/mp_10_0_offset.h
index 1063e5e8ea0e..1063e5e8ea0e 100644
--- a/drivers/gpu/drm/amd/include/asic_reg/raven1/MP/mp_10_0_offset.h
+++ b/drivers/gpu/drm/amd/include/asic_reg/mp/mp_10_0_offset.h
diff --git a/drivers/gpu/drm/amd/include/asic_reg/raven1/MP/mp_10_0_sh_mask.h b/drivers/gpu/drm/amd/include/asic_reg/mp/mp_10_0_sh_mask.h
index 9b0c8c575160..9b0c8c575160 100644
--- a/drivers/gpu/drm/amd/include/asic_reg/raven1/MP/mp_10_0_sh_mask.h
+++ b/drivers/gpu/drm/amd/include/asic_reg/mp/mp_10_0_sh_mask.h