diff options
| author | Alex Deucher <alexander.deucher@amd.com> | 2015-12-23 11:25:43 -0500 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2016-01-11 09:52:43 -0500 |
| commit | ba228ac8f512c9cd09cb4245c424ab1632da0c24 (patch) | |
| tree | cc64c605e6410088e63c1d6db01cf834d5cb00e2 /drivers/gpu/drm/amd/include/cgs_common.h | |
| parent | 57b4f7e68720e8a9f5e6e9e61446ec36822e4c57 (diff) | |
drm/amdgpu/cgs: add an interface to access PCI resources
This provides an interface to get access to the base address
of PCI resources (MMIO, DOORBELL, etc.). Only MMIO and
DOORBELL are implemented right now. This is necessary to
properly utilize shared drivers on platform devices. IP
modules can use this interface to get the base address
of the resource and add any additional offset and set the
size when setting up the platform driver(s).
Acked-by: Dave Airlie <airlied@redhat.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/include/cgs_common.h')
| -rw-r--r-- | drivers/gpu/drm/amd/include/cgs_common.h | 34 |
1 files changed, 34 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/include/cgs_common.h b/drivers/gpu/drm/amd/include/cgs_common.h index 03affb348f69..713aec954692 100644 --- a/drivers/gpu/drm/amd/include/cgs_common.h +++ b/drivers/gpu/drm/amd/include/cgs_common.h @@ -122,6 +122,17 @@ struct cgs_system_info { uint64_t padding[13]; }; +/* + * enum cgs_resource_type - GPU resource type + */ +enum cgs_resource_type { + CGS_RESOURCE_TYPE_MMIO = 0, + CGS_RESOURCE_TYPE_FB, + CGS_RESOURCE_TYPE_IO, + CGS_RESOURCE_TYPE_DOORBELL, + CGS_RESOURCE_TYPE_ROM, +}; + /** * struct cgs_clock_limits - Clock limits * @@ -417,6 +428,23 @@ typedef void (*cgs_write_pci_config_word_t)(void *cgs_device, unsigned addr, typedef void (*cgs_write_pci_config_dword_t)(void *cgs_device, unsigned addr, uint32_t value); + +/** + * cgs_get_pci_resource() - provide access to a device resource (PCI BAR) + * @cgs_device: opaque device handle + * @resource_type: Type of Resource (MMIO, IO, ROM, FB, DOORBELL) + * @size: size of the region + * @offset: offset from the start of the region + * @resource_base: base address (not including offset) returned + * + * Return: 0 on success, -errno otherwise + */ +typedef int (*cgs_get_pci_resource_t)(void *cgs_device, + enum cgs_resource_type resource_type, + uint64_t size, + uint64_t offset, + uint64_t *resource_base); + /** * cgs_atom_get_data_table() - Get a pointer to an ATOM BIOS data table * @cgs_device: opaque device handle @@ -593,6 +621,8 @@ struct cgs_ops { cgs_write_pci_config_byte_t write_pci_config_byte; cgs_write_pci_config_word_t write_pci_config_word; cgs_write_pci_config_dword_t write_pci_config_dword; + /* PCI resources */ + cgs_get_pci_resource_t get_pci_resource; /* ATOM BIOS */ cgs_atom_get_data_table_t atom_get_data_table; cgs_atom_get_cmd_table_revs_t atom_get_cmd_table_revs; @@ -708,5 +738,9 @@ struct cgs_device CGS_CALL(call_acpi_method, dev, acpi_method, acpi_function, pintput, poutput, output_count, input_size, output_size) #define cgs_query_system_info(dev, sys_info) \ CGS_CALL(query_system_info, dev, sys_info) +#define cgs_get_pci_resource(cgs_device, resource_type, size, offset, \ + resource_base) \ + CGS_CALL(get_pci_resource, cgs_device, resource_type, size, offset, \ + resource_base) #endif /* _CGS_COMMON_H */ |