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authorBhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>2017-08-01 15:00:25 -0400
committerAlex Deucher <alexander.deucher@amd.com>2017-09-26 18:16:40 -0400
commitfb3466a450cc4684654367ae2f47fc3fc7846574 (patch)
tree770a983af4307fc4d2120e133a9ccb17ea95c9bf /drivers/gpu/drm/amd/display/dc/dce80
parent503a7c6f2518be909fa61276ee002846524b588b (diff)
drm/amd/display: Flattening core_dc to dc
-Flattening core_dc to dc Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Reviewed-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/dce80')
-rw-r--r--drivers/gpu/drm/amd/display/dc/dce80/dce80_hw_sequencer.c5
-rw-r--r--drivers/gpu/drm/amd/display/dc/dce80/dce80_hw_sequencer.h4
-rw-r--r--drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c46
-rw-r--r--drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.h8
4 files changed, 31 insertions, 32 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dce80/dce80_hw_sequencer.c b/drivers/gpu/drm/amd/display/dc/dce80/dce80_hw_sequencer.c
index 4cba80ff6ca4..28fe3824441f 100644
--- a/drivers/gpu/drm/amd/display/dc/dce80/dce80_hw_sequencer.c
+++ b/drivers/gpu/drm/amd/display/dc/dce80/dce80_hw_sequencer.c
@@ -25,7 +25,6 @@
#include "dm_services.h"
#include "dc.h"
-#include "core_dc.h"
#include "core_types.h"
#include "dce80_hw_sequencer.h"
@@ -72,7 +71,7 @@ static const struct dce80_hw_seq_reg_offsets reg_offsets[] = {
/***************************PIPE_CONTROL***********************************/
static bool dce80_enable_display_power_gating(
- struct core_dc *dc,
+ struct dc *dc,
uint8_t controller_id,
struct dc_bios *dcb,
enum pipe_gating_control power_gating)
@@ -107,7 +106,7 @@ static bool dce80_enable_display_power_gating(
return false;
}
-bool dce80_hw_sequencer_construct(struct core_dc *dc)
+bool dce80_hw_sequencer_construct(struct dc *dc)
{
dce110_hw_sequencer_construct(dc);
diff --git a/drivers/gpu/drm/amd/display/dc/dce80/dce80_hw_sequencer.h b/drivers/gpu/drm/amd/display/dc/dce80/dce80_hw_sequencer.h
index 7cc203f433d3..9d6dd05bd596 100644
--- a/drivers/gpu/drm/amd/display/dc/dce80/dce80_hw_sequencer.h
+++ b/drivers/gpu/drm/amd/display/dc/dce80/dce80_hw_sequencer.h
@@ -28,9 +28,9 @@
#include "core_types.h"
-struct core_dc;
+struct dc;
-bool dce80_hw_sequencer_construct(struct core_dc *dc);
+bool dce80_hw_sequencer_construct(struct dc *dc);
#endif /* __DC_HWSS_DCE80_H__ */
diff --git a/drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c b/drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c
index 132117e8bb77..838bfdaee009 100644
--- a/drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c
@@ -684,7 +684,7 @@ static void destruct(struct dce110_resource_pool *pool)
}
static enum dc_status build_mapped_resource(
- const struct core_dc *dc,
+ const struct dc *dc,
struct validate_context *context,
struct validate_context *old_context)
{
@@ -720,7 +720,7 @@ static enum dc_status build_mapped_resource(
}
bool dce80_validate_bandwidth(
- const struct core_dc *dc,
+ struct dc *dc,
struct validate_context *context)
{
/* TODO implement when needed but for now hardcode max value*/
@@ -752,7 +752,7 @@ static bool dce80_validate_surface_sets(
}
enum dc_status dce80_validate_with_context(
- const struct core_dc *dc,
+ struct dc *dc,
const struct dc_validation_set set[],
int set_count,
struct validate_context *context,
@@ -795,7 +795,7 @@ enum dc_status dce80_validate_with_context(
}
enum dc_status dce80_validate_guaranteed(
- const struct core_dc *dc,
+ struct dc *dc,
struct dc_stream_state *dc_stream,
struct validate_context *context)
{
@@ -815,7 +815,7 @@ enum dc_status dce80_validate_guaranteed(
if (result == DC_OK) {
validate_guaranteed_copy_streams(
- context, dc->public.caps.max_streams);
+ context, dc->caps.max_streams);
result = resource_build_scaling_params_for_context(dc, context);
}
@@ -845,7 +845,7 @@ static const struct resource_funcs dce80_res_pool_funcs = {
static bool dce80_construct(
uint8_t num_virtual_links,
- struct core_dc *dc,
+ struct dc *dc,
struct dce110_resource_pool *pool)
{
unsigned int i;
@@ -865,9 +865,9 @@ static bool dce80_construct(
*************************************************/
pool->base.underlay_pipe_index = NO_UNDERLAY_PIPE;
pool->base.pipe_count = res_cap.num_timing_generator;
- dc->public.caps.max_downscale_ratio = 200;
- dc->public.caps.i2c_speed_in_khz = 40;
- dc->public.caps.max_cursor_size = 128;
+ dc->caps.max_downscale_ratio = 200;
+ dc->caps.i2c_speed_in_khz = 40;
+ dc->caps.max_cursor_size = 128;
/*************************************************
* Create resources *
@@ -974,7 +974,7 @@ static bool dce80_construct(
}
}
- dc->public.caps.max_planes = pool->base.pipe_count;
+ dc->caps.max_planes = pool->base.pipe_count;
if (!resource_construct(num_virtual_links, dc, &pool->base,
&res_create_funcs))
@@ -993,7 +993,7 @@ res_create_fail:
struct resource_pool *dce80_create_resource_pool(
uint8_t num_virtual_links,
- struct core_dc *dc)
+ struct dc *dc)
{
struct dce110_resource_pool *pool =
dm_alloc(sizeof(struct dce110_resource_pool));
@@ -1010,7 +1010,7 @@ struct resource_pool *dce80_create_resource_pool(
static bool dce81_construct(
uint8_t num_virtual_links,
- struct core_dc *dc,
+ struct dc *dc,
struct dce110_resource_pool *pool)
{
unsigned int i;
@@ -1030,9 +1030,9 @@ static bool dce81_construct(
*************************************************/
pool->base.underlay_pipe_index = NO_UNDERLAY_PIPE;
pool->base.pipe_count = res_cap_81.num_timing_generator;
- dc->public.caps.max_downscale_ratio = 200;
- dc->public.caps.i2c_speed_in_khz = 40;
- dc->public.caps.max_cursor_size = 128;
+ dc->caps.max_downscale_ratio = 200;
+ dc->caps.i2c_speed_in_khz = 40;
+ dc->caps.max_cursor_size = 128;
/*************************************************
* Create resources *
@@ -1139,7 +1139,7 @@ static bool dce81_construct(
}
}
- dc->public.caps.max_planes = pool->base.pipe_count;
+ dc->caps.max_planes = pool->base.pipe_count;
if (!resource_construct(num_virtual_links, dc, &pool->base,
&res_create_funcs))
@@ -1158,7 +1158,7 @@ res_create_fail:
struct resource_pool *dce81_create_resource_pool(
uint8_t num_virtual_links,
- struct core_dc *dc)
+ struct dc *dc)
{
struct dce110_resource_pool *pool =
dm_alloc(sizeof(struct dce110_resource_pool));
@@ -1175,7 +1175,7 @@ struct resource_pool *dce81_create_resource_pool(
static bool dce83_construct(
uint8_t num_virtual_links,
- struct core_dc *dc,
+ struct dc *dc,
struct dce110_resource_pool *pool)
{
unsigned int i;
@@ -1195,9 +1195,9 @@ static bool dce83_construct(
*************************************************/
pool->base.underlay_pipe_index = NO_UNDERLAY_PIPE;
pool->base.pipe_count = res_cap_83.num_timing_generator;
- dc->public.caps.max_downscale_ratio = 200;
- dc->public.caps.i2c_speed_in_khz = 40;
- dc->public.caps.max_cursor_size = 128;
+ dc->caps.max_downscale_ratio = 200;
+ dc->caps.i2c_speed_in_khz = 40;
+ dc->caps.max_cursor_size = 128;
/*************************************************
* Create resources *
@@ -1300,7 +1300,7 @@ static bool dce83_construct(
}
}
- dc->public.caps.max_planes = pool->base.pipe_count;
+ dc->caps.max_planes = pool->base.pipe_count;
if (!resource_construct(num_virtual_links, dc, &pool->base,
&res_create_funcs))
@@ -1319,7 +1319,7 @@ res_create_fail:
struct resource_pool *dce83_create_resource_pool(
uint8_t num_virtual_links,
- struct core_dc *dc)
+ struct dc *dc)
{
struct dce110_resource_pool *pool =
dm_alloc(sizeof(struct dce110_resource_pool));
diff --git a/drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.h b/drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.h
index 04f0cfe24ef2..eff31ab83a39 100644
--- a/drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.h
+++ b/drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.h
@@ -28,20 +28,20 @@
#include "core_types.h"
-struct core_dc;
+struct dc;
struct resource_pool;
struct resource_pool *dce80_create_resource_pool(
uint8_t num_virtual_links,
- struct core_dc *dc);
+ struct dc *dc);
struct resource_pool *dce81_create_resource_pool(
uint8_t num_virtual_links,
- struct core_dc *dc);
+ struct dc *dc);
struct resource_pool *dce83_create_resource_pool(
uint8_t num_virtual_links,
- struct core_dc *dc);
+ struct dc *dc);
#endif /* __DC_RESOURCE_DCE80_H__ */