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authorJordan Lazare <Jordan.Lazare@amd.com>2017-03-30 13:08:34 -0400
committerAlex Deucher <alexander.deucher@amd.com>2017-09-26 17:22:25 -0400
commit28f72454320d2084cc082c8509135bdfd4012c10 (patch)
treebb474b2631ebffe5cb543d7f68d22f9833b94456 /drivers/gpu/drm/amd/display/dc/dce80
parent6848e9896b9c9a26a44ac6764ca4bb7351ae573e (diff)
drm/amd/display: Fill in vrefresh and min_vblank_time for dce8/dce10
PPLib is now calling into DC to get vrefresh and min_vblank_time, but since full bandwidth calcs are missing for those generations, the pplib structures were never being filled. This change fills the currently required fields to prevent screen corruption. Signed-off-by: Jordan Lazare <Jordan.Lazare@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Reviewed-by: Jordan Lazare <Jordan.Lazare@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/dce80')
-rw-r--r--drivers/gpu/drm/amd/display/dc/dce80/dce80_hw_sequencer.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dce80/dce80_hw_sequencer.c b/drivers/gpu/drm/amd/display/dc/dce80/dce80_hw_sequencer.c
index 85a54d963f8d..9d4e7d8b836e 100644
--- a/drivers/gpu/drm/amd/display/dc/dce80/dce80_hw_sequencer.c
+++ b/drivers/gpu/drm/amd/display/dc/dce80/dce80_hw_sequencer.c
@@ -31,6 +31,7 @@
#include "dce/dce_hwseq.h"
#include "dce110/dce110_hw_sequencer.h"
+#include "dce100/dce100_hw_sequencer.h"
/* include DCE8 register header files */
#include "dce/dce_8_0_d.h"
@@ -118,6 +119,7 @@ static void set_bandwidth(
bool decrease_allowed)
{
dc->hwss.set_displaymarks(dc, context);
+ dce100_pplib_apply_display_requirements(dc, context);
}