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authorRoman Li <Roman.Li@amd.com>2017-05-17 12:07:30 -0400
committerAlex Deucher <alexander.deucher@amd.com>2017-09-26 18:07:17 -0400
commitccaf31ec714b596d1edb92b1ed4ccc4abf1f645c (patch)
treebd39bce51e144fd63adca378b609ce5027fb046d /drivers/gpu/drm/amd/display/dc/dce120
parent1f7f3aec125724da30ff1c2f2d359340feb0d9e1 (diff)
drm/amd/display: Fix 5th display lightup on Vega10
- fixing bug in calculation of reg offset for D5VGA_CONTROL Signed-off-by: Roman Li <Roman.Li@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/dce120')
-rw-r--r--drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c b/drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c
index 245356e72b36..dc8eeac6ac96 100644
--- a/drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c
+++ b/drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c
@@ -410,7 +410,7 @@ void dce120_timing_generator_disable_vga(struct timing_generator *tg)
break;
case CONTROLLER_ID_D4:
addr = mmD1VGA_CONTROL;
- offset = mmD1VGA_CONTROL - mmD1VGA_CONTROL;
+ offset = mmD5VGA_CONTROL - mmD1VGA_CONTROL;
break;
case CONTROLLER_ID_D5:
addr = mmD6VGA_CONTROL;