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authorHarry Wentland <harry.wentland@amd.com>2017-05-05 14:57:12 -0400
committerAlex Deucher <alexander.deucher@amd.com>2017-09-26 18:07:06 -0400
commit6a4c32dac559a90b83c5f268b02c1a94df411159 (patch)
treefd030656e22cb2af9aa5519e042fded13173ac29 /drivers/gpu/drm/amd/display/dc/dce120
parentf46661dd42f3648b92eca73ba2c48f5d9a418b1b (diff)
drm/amd/display: DCE12 num_timing_generators should be 6
We should also use it to determine pipe count. Signed-off-by: Harry Wentland <harry.wentland@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/dce120')
-rw-r--r--drivers/gpu/drm/amd/display/dc/dce120/dce120_resource.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dce120/dce120_resource.c b/drivers/gpu/drm/amd/display/dc/dce120/dce120_resource.c
index b6bdd1d52922..b13abb025e1b 100644
--- a/drivers/gpu/drm/amd/display/dc/dce120/dce120_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/dce120/dce120_resource.c
@@ -426,7 +426,7 @@ static const struct bios_registers bios_regs = {
};
static const struct resource_caps res_cap = {
- .num_timing_generator = 3,
+ .num_timing_generator = 6,
.num_audio = 7,
.num_stream_encoder = 6,
.num_pll = 6,
@@ -909,7 +909,7 @@ static bool construct(
pool->base.funcs = &dce120_res_pool_funcs;
/* TODO: Fill more data from GreenlandAsicCapability.cpp */
- pool->base.pipe_count = 6;
+ pool->base.pipe_count = res_cap.num_timing_generator;
pool->base.underlay_pipe_index = NO_UNDERLAY_PIPE;
dc->public.caps.max_downscale_ratio = 200;