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authorZeyu Fan <Zeyu.Fan@amd.com>2017-05-19 15:52:00 -0400
committerAlex Deucher <alexander.deucher@amd.com>2017-09-26 18:07:35 -0400
commit72dfad50179bb8c813d7c3a7ce149dafc4586fe6 (patch)
treec32795f9f7828fe5d923d46430f975c420078b4e /drivers/gpu/drm/amd/display/dc/dc_hw_types.h
parentc7dbdf1535a34741a8805d04a9ae75a887d8b581 (diff)
drm/amd/display: Add FORCE_HDR timing flag
Signed-off-by: Zeyu Fan <Zeyu.Fan@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/dc_hw_types.h')
-rw-r--r--drivers/gpu/drm/amd/display/dc/dc_hw_types.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dc_hw_types.h b/drivers/gpu/drm/amd/display/dc/dc_hw_types.h
index 58a3bcd5131f..b6e677786cbc 100644
--- a/drivers/gpu/drm/amd/display/dc/dc_hw_types.h
+++ b/drivers/gpu/drm/amd/display/dc/dc_hw_types.h
@@ -635,6 +635,8 @@ struct dc_crtc_timing_flags {
uint32_t YCBCR420 :1; /* TODO: shouldn't need this flag, should be a separate pixel format */
uint32_t DTD_COUNTER :5; /* values 1 to 16 */
+ uint32_t FORCE_HDR :1;
+
/* HDMI 2.0 - Support scrambling for TMDS character
* rates less than or equal to 340Mcsc */
uint32_t LTE_340MCSC_SCRAMBLE:1;