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authorChris Wilson <chris@chris-wilson.co.uk>2014-07-10 20:31:19 +0100
committerDaniel Vetter <daniel.vetter@ffwll.ch>2014-07-10 22:30:40 +0200
commit7b3c29f6fd374640266d82aafe6929761469e27b (patch)
tree7ca89b4a9e472d651c8371cfd4d992b87bf741cf
parentbf225f20d51fb1b77d47fce0628159a3eda027b9 (diff)
drm/i915: Make the RPS interrupt generation mask handle the vlv wadrm-intel-next-2014-07-11
We can eliminate a lot of special case code by making the computation of the interrupt mask be correct for all callers. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-rw-r--r--drivers/gpu/drm/i915/intel_pm.c10
1 files changed, 5 insertions, 5 deletions
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 55228df5cf23..780c3ab26f4f 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -3183,6 +3183,9 @@ static u32 gen6_rps_pm_mask(struct drm_i915_private *dev_priv, u8 val)
if (val < dev_priv->rps.max_freq_softlimit)
mask |= GEN6_PM_RP_UP_THRESHOLD;
+ mask |= dev_priv->pm_rps_events & (GEN6_PM_RP_DOWN_EI_EXPIRED | GEN6_PM_RP_UP_EI_EXPIRED);
+ mask &= dev_priv->pm_rps_events;
+
/* IVB and SNB hard hangs on looping batchbuffer
* if GEN6_PM_UP_EI_EXPIRED is masked.
*/
@@ -3276,11 +3279,8 @@ static void vlv_set_rps_idle(struct drm_i915_private *dev_priv)
vlv_force_gfx_clock(dev_priv, false);
- if (dev_priv->pm_rps_events & GEN6_PM_RP_UP_EI_EXPIRED)
- I915_WRITE(GEN6_PMINTRMSK, ~dev_priv->pm_rps_events);
- else
- I915_WRITE(GEN6_PMINTRMSK,
- gen6_rps_pm_mask(dev_priv, dev_priv->rps.cur_freq));
+ I915_WRITE(GEN6_PMINTRMSK,
+ gen6_rps_pm_mask(dev_priv, dev_priv->rps.cur_freq));
}
void gen6_rps_idle(struct drm_i915_private *dev_priv)