[devel-rename_to_VT3xxx]

- Rename CLE266, KM400, K8M800 and PM800 to VT3122, VT3205, VT3204, VT3259
    respectively.
- Add pci ids for the VT3314.
- Rework VIAIdentify to decently outline which is which.
- Adjust manpage to follow naming structure.
- Add missing defines to XFree86 case for manpage.

11 files changed, 219 insertions, 224 deletions

diff --git a/man/Imakefile b/man/Imakefile
index ff4458c..b218f35 100644
--- a/man/Imakefile
+++ b/man/Imakefile
@@ -5,7 +5,11 @@
 #if !defined(XF86DriverSDK)
 
 #ifdef XF86_VERSION_CURRENT
-CppManTarget(via,)
+XCOMM add in defines which are known to xorg but not to xfree86.
+EXTRAMANDEFS=-D__xservername__=XFree86 -D__xconfigfile__=XF86Config-4 \
+-D__appmansuffix__=$(MANSUFFIX)
+
+CppManTarget(via, $(EXTRAMANDEFS))
 #endif
 
 InstallModuleManPage(via)
diff --git a/man/via.man b/man/via.man
index cd52837..b2d201e 100644
--- a/man/via.man
+++ b/man/via.man
@@ -13,26 +13,30 @@ via \- VIA unichrome graphics driver
 .fi
 .SH DESCRIPTION
 .B via
-is an __xservername__ driver for VIA chipsets with onboard unichrome graphics.
+is an __xservername__ driver for VIA Unichrome integrated graphics.
 .PP
 The
 .B via
-driver supports the VIA CLE266, KM400/KN400 chipsets, including 2D 
-acceleration and the Xv video overlay extensions. Flat panel, TV and VGA
-outputs are supported.
+driver supports the following devices:
+.nf
+    VT3122:  CLE266 (CastleRock).
+    VT3205:  KM400, KM400A, KN400 (Unichrome).
+    VT3204:  K8M800, K8N800, K8N800A (Unichrome Pro, aka Pro B).
+    VT3259:  CN400, PM800, PM880, PN800, P4M800 (Unichrome Pro A).
+    VT3314:  VN800, P4M800Pro (Unichrome Pro ...).
 .PP
-K8M800/K8N800, PM8X0 and CN400 support is still under development.
+VT3204, VT3259 and VT3314 support is still limited.
 .PP
 Direct rendering 3D is available using experimental drivers in Mesa, 
-www.mesa3d.org. The current Direct Rendering Manager Linux kernel module is
-available at dri.sourceforge.net.
+www.mesa3d.org. The current Direct Rendering Manager Linux kernel module
+is available at dri.sourceforge.net.
 .PP
 Only a limited number of resolutions are supported at 60, 75, 85, 100 and
 120Hz (save memory bandwidth limitations): 640x480, 800x600, 1024x768, 
 1152x864, 1280x1024 and 1600x1200. Another range of resolutions is only
 possible at 60Hz: 720x480, 720x576, 848x480, 856x480, 1024x512, 1024x576,
-1280x768, 1280x960, 1400x1050 and 1440x1050. This behaviour will change in
-the not too distant future.
+1280x768, 1280x960, 1400x1050 and 1440x1050. This behaviour will change
+in the not too distant future.
 .PP
 .SH CONFIGURATION DETAILS
 Please refer to __xconfigfile__(__filemansuffix__) for general configuration
diff --git a/src/via_accel.c b/src/via_accel.c
index a343467..8d9fafc 100644
--- a/src/via_accel.c
+++ b/src/via_accel.c
@@ -537,11 +537,11 @@ VIAInitAccel(ScrnInfoPtr pScrn, ScreenPtr pScreen)
 	0;
     
     /*
-     * CLE266 has fast direct processor access to the framebuffer.
+     * VT3122 has fast direct processor access to the framebuffer.
      * Therefore, disable the PCI GXcopy.
      */
     
-    if (pVia->Chipset == VIA_CLE266)
+    if (pVia->Chipset == VT3122)
       xaaptr->ImageWriteFlags |= NO_GXCOPY;
 
     xaaptr->SetupForImageWrite = VIASetupForImageWrite;
diff --git a/src/via_bandwidth.c b/src/via_bandwidth.c
index a977239..cabbd43 100644
--- a/src/via_bandwidth.c
+++ b/src/via_bandwidth.c
@@ -36,7 +36,7 @@
  *
  */
 static void
-ViaSetCLE266APrimaryFIFO(ScrnInfoPtr pScrn, Bool Enable)
+ViaSetVT3122APrimaryFIFO(ScrnInfoPtr pScrn, Bool Enable)
 {
     VIAPtr pVia = VIAPTR(pScrn);
     CARD32  dwGE230, dwGE298;
@@ -68,21 +68,21 @@ typedef struct {
     CARD8    bTuningValue;
 } ViaExpireNumberTable;
 
-static ViaExpireNumberTable CLE266AExpireNumber[] = {
+static ViaExpireNumberTable VT3122AExpireNumber[] = {
     {1280, 768,32,0x03,0x3}, {1280,1024,32,0x03,0x4}, {1280,1024,32,0x04,0x3},
     {1600,1200,16,0x03,0x4}, {1600,1200,32,0x04,0x4}, {1024, 768,32,0x03,0xA},
     {1400,1050,16,0x03,0x3}, {1400,1050,32,0x03,0x4}, {1400,1050,32,0x04,0x4},
     { 800, 600,32,0x03,0xA}, {   0,   0, 0,   0,  0}
 };
 
-static ViaExpireNumberTable CLE266CExpireNumber[] = {
+static ViaExpireNumberTable VT3122CExpireNumber[] = {
     {1280, 768,32,0x03,0x3}, {1280,1024,32,0x03,0x4}, {1280,1024,32,0x04,0x4},
     {1600,1200,32,0x03,0x3}, {1600,1200,32,0x04,0x4}, {1024, 768,32,0x03,0xA},
     {1400,1050,32,0x03,0x4}, {1400,1050,32,0x04,0x4},
     { 800, 600,32,0x03,0xA}, {   0,   0, 0,   0,  0}
 };
 
-static ViaExpireNumberTable KM400ExpireNumber[]={
+static ViaExpireNumberTable VT3205ExpireNumber[]={
     {1280,1024,32,0x03,0x3}, {1280,1024,32,0x04,0x9}, {1280, 768,32,0x03,0x3},
     {1280, 768,32,0x04,0x9}, {1400,1050,32,0x03,0x3}, {1400,1050,32,0x04,0x9},
     {1600,1200,32,0x03,0x4}, {1600,1200,32,0x04,0xA}, {   0,   0, 0,   0,  0}
@@ -135,8 +135,8 @@ ViaSetPrimaryFIFO(ScrnInfoPtr pScrn, DisplayModePtr mode)
     }
 
     switch(pVia->Chipset) {
-    case VIA_CLE266:
-	if (CLE266_REV_IS_CX(pVia->ChipRev)) {
+    case VT3122:
+	if (VT3122_REV_IS_CX(pVia->ChipRev)) {
 	    if (pVia->HasSecondary) {  /* SAMM or DuoView case */
 		if (mode->HDisplay >= 1024) {
 		    ViaSeqMask(hwp, 0x16, 0x1C, 0x3F); /* 28 */
@@ -151,10 +151,10 @@ ViaSetPrimaryFIFO(ScrnInfoPtr pScrn, DisplayModePtr mode)
 	    hwp->writeSeq(hwp, 0x18, 0x57); /* 23 */
 
 	    /* originally when setting secondary */
-	    ViaSetPrimaryExpireNumber(pScrn, mode, CLE266CExpireNumber);
+	    ViaSetPrimaryExpireNumber(pScrn, mode, VT3122CExpireNumber);
 	} else {
 	    if ((mode->HDisplay > 1024) && pVia->HasSecondary) {
-		ViaSetCLE266APrimaryFIFO(pScrn, TRUE);
+		ViaSetVT3122APrimaryFIFO(pScrn, TRUE);
 
 		ViaSeqMask(hwp, 0x16, 0x17, 0x3F); /* 23 */
 		hwp->writeSeq(hwp, 0x17, 0x2F); /* 47 */
@@ -162,10 +162,10 @@ ViaSetPrimaryFIFO(ScrnInfoPtr pScrn, DisplayModePtr mode)
 	    }
 
 	    /* originally when setting secondary */
-	    ViaSetPrimaryExpireNumber(pScrn, mode, CLE266AExpireNumber);
+	    ViaSetPrimaryExpireNumber(pScrn, mode, VT3122AExpireNumber);
 	}
 	break;
-    case VIA_KM400:
+    case VT3205:
         if (pVia->HasSecondary) {  /* SAMM or DuoView case */
             if ((mode->HDisplay >= 1600) &&
                 (pVia->MemClk <= VIA_MEM_DDR200)) {
@@ -187,10 +187,9 @@ ViaSetPrimaryFIFO(ScrnInfoPtr pScrn, DisplayModePtr mode)
 	hwp->writeSeq(hwp, 0x18, 0x57); /* 23 */
 
 	/* originally when setting secondary */
-	ViaSetPrimaryExpireNumber(pScrn, mode, KM400ExpireNumber);
+	ViaSetPrimaryExpireNumber(pScrn, mode, VT3205ExpireNumber);
 	break;
-#ifdef HAVE_K8M800
-    case VIA_K8M800:
+    case VT3204:
 	hwp->writeSeq(hwp, 0x17, 0xBF); /* 384/2 - 1 = 191 (orig via comment: 384/8) */
 	ViaSeqMask(hwp, 0x16, 0x92, 0xBF); /* 328/4 = 82 = 0x52*/
 	ViaSeqMask(hwp, 0x18, 0x8a, 0xBF); /* 74 */
@@ -200,9 +199,7 @@ ViaSetPrimaryFIFO(ScrnInfoPtr pScrn, DisplayModePtr mode)
 	else
 	    ViaSeqMask(hwp, 0x22, 0x00, 0x1F); /* 128/4 = overflow = 0 */
 	break;
-#endif /* HAVE_K8M800 */
-#ifdef HAVE_PM800
-    case VIA_PM800:
+    case VT3259:
 	hwp->writeSeq(hwp, 0x17, 0x5F); /* 95 */
 	ViaSeqMask(hwp, 0x16, 0x20, 0xBF); /* 32 */
 	ViaSeqMask(hwp, 0x18, 0x10, 0xBF); /* 16 */
@@ -212,7 +209,6 @@ ViaSetPrimaryFIFO(ScrnInfoPtr pScrn, DisplayModePtr mode)
 	else
 	    ViaSeqMask(hwp, 0x22, 0x1F, 0x1F); /* 31 */
 	break;
-#endif /* HAVE_PM800 */
     default:
 	xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "ViaSetPrimaryFIFO:"
 		   " Chipset %d not implemented\n", pVia->Chipset);
@@ -235,8 +231,8 @@ ViaSetSecondaryFIFO(ScrnInfoPtr pScrn, DisplayModePtr mode)
     VIAFUNC(pScrn->scrnIndex);
 
     switch (pVia->Chipset) {
-    case VIA_CLE266:
-        if (CLE266_REV_IS_CX(pVia->ChipRev)) {
+    case VT3122:
+        if (VT3122_REV_IS_CX(pVia->ChipRev)) {
             if (mode->HDisplay >= 1024) {
 		ViaCrtcMask(hwp, 0x6A, 0x20, 0x20);
 		hwp->writeCrtc(hwp, 0x68, 0xAB); /* depth: 10, threshold: 11 */
@@ -256,7 +252,7 @@ ViaSetSecondaryFIFO(ScrnInfoPtr pScrn, DisplayModePtr mode)
 	    }
         }
 	break;
-    case VIA_KM400:
+    case VT3205:
 	if ((mode->HDisplay >= 1600) && (pVia->MemClk <= VIA_MEM_DDR200)) {
 	    ViaCrtcMask(hwp, 0x6A, 0x20, 0x20);
 	    hwp->writeCrtc(hwp, 0x68, 0xEB); /* depth: 14, threshold: 11 */
@@ -275,8 +271,7 @@ ViaSetSecondaryFIFO(ScrnInfoPtr pScrn, DisplayModePtr mode)
 	   hwp->writeCrtc(hwp, 0x68, 0x67); /* depth: 6, threshold: 7 */
 	}
 	break;
-#ifdef HAVE_K8M800
-    case VIA_K8M800:
+    case VT3204:
 	/* depth: (384 /8 -1 -1) = 46 = 0x2E */
 	ViaCrtcMask(hwp, 0x68, 0xE0, 0xF0);
 	ViaCrtcMask(hwp, 0x94, 0x00, 0x80);
@@ -295,9 +290,7 @@ ViaSetSecondaryFIFO(ScrnInfoPtr pScrn, DisplayModePtr mode)
 	else
 	    ViaCrtcMask(hwp, 0x94, 0x20, 0x7F); /* 128/4 */
 	break;
-#endif /* HAVE_K8M800 */
-#ifdef HAVE_PM800
-    case VIA_PM800:
+    case VT3259:
 	/* depth: 12 - 1 = 0x0B */
 	ViaCrtcMask(hwp, 0x68, 0xB0, 0xF0);
 	ViaCrtcMask(hwp, 0x94, 0x00, 0x80);
@@ -316,7 +309,6 @@ ViaSetSecondaryFIFO(ScrnInfoPtr pScrn, DisplayModePtr mode)
 	else
 	    ViaCrtcMask(hwp, 0x94, 0x20, 0x7F); /* 128/4 */
 	break;
-#endif /* HAVE_PM800 */
     default:
 	xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "ViaSetSecondaryFIFO:"
 		   " Chipset %d not implemented\n", pVia->Chipset);
@@ -325,7 +317,7 @@ ViaSetSecondaryFIFO(ScrnInfoPtr pScrn, DisplayModePtr mode)
 }
 
 /*
- * Wrap around ViaSetCLE266APrimaryFIFO
+ * Wrap around ViaSetVT3122APrimaryFIFO
  */
 void 
 ViaDisablePrimaryFIFO(ScrnInfoPtr pScrn)
@@ -336,7 +328,7 @@ ViaDisablePrimaryFIFO(ScrnInfoPtr pScrn)
 
     /* Cause of exit XWindow will dump back register value, others chipset no
      * need to set extended fifo value */
-    if ((pVia->Chipset == VIA_CLE266) && CLE266_REV_IS_AX(pVia->ChipRev) &&
+    if ((pVia->Chipset == VT3122) && VT3122_REV_IS_AX(pVia->ChipRev) &&
         ((pScrn->currentMode->HDisplay > 1024) || pVia->HasSecondary))
-        ViaSetCLE266APrimaryFIFO(pScrn, FALSE);
+        ViaSetVT3122APrimaryFIFO(pScrn, FALSE);
 }
diff --git a/src/via_dri.c b/src/via_dri.c
index d82a667..1b91029 100644
--- a/src/via_dri.c
+++ b/src/via_dri.c
@@ -160,14 +160,10 @@ VIADRIRingBufferInit(ScrnInfoPtr pScrn)
 	 * Info frome code-snippet on DRI-DEVEL list; Erdi Chen.
 	 */
 
-	switch (pVia->ChipId) {
-	case PCI_CHIP_VT3259:
+        if (pVia->Chipset == VT3259)
 	    pVIADRI->reg_pause_addr = 0x40c;
-	    break;
-	default:
+        else
 	    pVIADRI->reg_pause_addr = 0x418;
-	    break;
-	}
    
 	ringBufInit.offset = pVia->agpSize;
 	ringBufInit.size = AGP_CMDBUF_SIZE;
diff --git a/src/via_driver.c b/src/via_driver.c
index 67b64f4..0727ed1 100644
--- a/src/via_driver.c
+++ b/src/via_driver.c
@@ -90,21 +90,23 @@ DriverRec VIA =
 /* Supported chipsets */
 
 static SymTabRec VIAChipsets[] = {
-    {VIA_CLE266,   "CLE266"},
-    {VIA_KM400,    "KM400/KN400"},
-    {VIA_K8M800,   "K8M800"},
-    {VIA_PM800,    "PM800/PM880/CN400"},
-    {-1,            NULL }
+    {VT3122,  "VT3122"},
+    {VT3205,  "VT3205"},
+    {VT3204,  "VT3204"},
+    {VT3259,  "VT3259"},
+    {VT3314,  "VT3314"},
+    {-1,      NULL }
 };
 
 /* This table maps a PCI device ID to a chipset family identifier. */
 static PciChipsets VIAPciChipsets[] = {
-    /* {VIA_CLE266,   PCI_CHIP_CLE3022,   RES_SHARED_VGA}, */
-    {VIA_CLE266,   PCI_CHIP_CLE3122,   RES_SHARED_VGA},
-    {VIA_KM400,    PCI_CHIP_VT3205,    RES_SHARED_VGA},
-    {VIA_K8M800,   PCI_CHIP_VT3204,    RES_SHARED_VGA},
-    {VIA_PM800,    PCI_CHIP_VT3259,    RES_SHARED_VGA},
-    {-1,            -1,                RES_UNDEFINED}
+    /* {VT3022,   PCI_CHIP_VT3022,   RES_SHARED_VGA}, */
+    {VT3122,  PCI_CHIP_VT3122,  RES_SHARED_VGA},
+    {VT3205,  PCI_CHIP_VT3205,  RES_SHARED_VGA},
+    {VT3204,  PCI_CHIP_VT3204,  RES_SHARED_VGA},
+    {VT3259,  PCI_CHIP_VT3259,  RES_SHARED_VGA},
+    {VT3314,  PCI_CHIP_VT3314,  RES_SHARED_VGA},
+    {-1,      -1,               RES_UNDEFINED}
 };
 
 int gVIAEntityIndex = -1;
@@ -436,10 +438,20 @@ static const OptionInfoRec * VIAAvailableOptions(int chipid, int busid)
 } /* VIAAvailableOptions */
 
 
-static void VIAIdentify(int flags)
+/*
+ * This implementation is far more flexible and informative than
+ * xf86PrintChipSets. It allows for some semi-subversive VIA bashing too.
+ */
+static void 
+VIAIdentify(int flags)
 {
-    xf86PrintChipsets("VIA", "driver for VIA chipsets", VIAChipsets);
-} /* VIAIdentify */
+    xf86Msg(X_INFO, "VIA: driver for the VIA Unichrome integrated graphics devices.\n");
+    xf86Msg(X_INFO, "    VT3122: CLE266 (CastleRock).\n");
+    xf86Msg(X_INFO, "    VT3205: KM400, KM400A, KN400 (Unichrome).\n");
+    xf86Msg(X_INFO, "    VT3204: K8M800, K8N800, K8N800A (Unichrome Pro, aka Pro B).\n");
+    xf86Msg(X_INFO, "    VT3259: CN400, PM800, PM880, PN800, P4M800 (Unichrome Pro A).\n");
+    xf86Msg(X_INFO, "    VT3314: VN800, P4M800Pro (Unichrome Pro ...).\n");
+}
 
 
 static Bool VIAProbe(DriverPtr drv, int flags)
@@ -511,9 +523,10 @@ static Bool VIAProbe(DriverPtr drv, int flags)
 	    */
             pEnt = xf86GetEntityInfo(usedChips[i]);
 
+            /* Secondary needs a lot of work, this is just the tip of the iceberg.
+             * And... erm... sharable? -- Luc */
             /* CLE266 card support Dual-Head, mark the entity as sharable*/
-            if(pEnt->chipset == VIA_CLE266 || pEnt->chipset == VIA_KM400)
-            {
+            if (pEnt->chipset == VT3122 || pEnt->chipset == VT3205) {
                 static int instance = 0;
                 DevUnion* pPriv;
 
@@ -1169,26 +1182,16 @@ static Bool VIAPreInit(ScrnInfoPtr pScrn, int flags)
 
     xf86DrvMsg(pScrn->scrnIndex, from, "Chipset: \"%s\"\n", pScrn->chipset);
 
-#ifndef HAVE_K8M800
-    if (pVia->Chipset == VIA_K8M800) {
-	xf86DrvMsg(pScrn->scrnIndex, X_WARNING, 
-		   "This device seems to be a VIA Unichrome Pro K8M800.\n");
-	xf86DrvMsg(pScrn->scrnIndex, X_WARNING, 
-		   "There is no specific support for this device yet in this driver.\n");
-	xf86DrvMsg(pScrn->scrnIndex, X_WARNING, 
-		   "Please contact unichrome.sourceforge.net ASAP to resolve this.\n");
-    }
-#endif /* HAVE_K8M800 */
-#ifndef HAVE_PM800
-    if (pVia->Chipset == VIA_PM800) {
-	xf86DrvMsg(pScrn->scrnIndex, X_WARNING, 
-		   "This device seems to be a VIA Unichrome Pro PM800, PM880 or CN400.\n");
-	xf86DrvMsg(pScrn->scrnIndex, X_WARNING, 
-		   "There is no specific support for this device yet in this driver.\n");
-	xf86DrvMsg(pScrn->scrnIndex, X_WARNING, 
-		   "Please contact unichrome.sourceforge.net ASAP to resolve this.\n");
+    switch (pVia->Chipset) {
+    case VT3204:
+    case VT3259:
+    case VT3314:
+	xf86DrvMsg(pScrn->scrnIndex, X_WARNING, "Support for %s is limited at"
+                   " this time.\n", pScrn->chipset);
+        break;
+    default:
+        break;
     }
-#endif /* HAVE_PM800 */
 
     pVia->PciTag = pciTag(pVia->PciInfo->bus, pVia->PciInfo->device,
                           pVia->PciInfo->func);
@@ -1222,8 +1225,8 @@ static Bool VIAPreInit(ScrnInfoPtr pScrn, int flags)
         pVia->I2CScan = FALSE;
 #endif /* HAVE_DEBUG */
 
-    if (pVia->Chipset == VIA_CLE266)
-	ViaDoubleCheckCLE266Revision(pScrn);
+    if (pVia->Chipset == VT3122)
+	ViaDoubleCheckVT3122Revision(pScrn);
 
     xf86DrvMsg(pScrn->scrnIndex, from, "Chipset Rev.: %d\n", pVia->ChipRev);
 
@@ -1256,7 +1259,7 @@ static Bool VIAPreInit(ScrnInfoPtr pScrn, int flags)
 
     /* detect amount of installed ram */
     if (pScrn->videoRam < 16384 || pScrn->videoRam > 65536) {
-	if(pVia->Chipset == VIA_CLE266)
+	if (pVia->Chipset == VT3122)
 	    bMemSize = hwp->readSeq(hwp, 0x34);
 	else
 	    bMemSize = hwp->readSeq(hwp, 0x39);
@@ -1323,10 +1326,11 @@ static Bool VIAPreInit(ScrnInfoPtr pScrn, int flags)
 	return FALSE;
     }
 
-    if (pBIOSInfo->PanelActive && 
-        ((pVia->Chipset == VIA_K8M800) || (pVia->Chipset == VIA_PM800)))
-	xf86DrvMsg(pScrn->scrnIndex, X_WARNING, "Panel on K8M800 or PM800 is"
-		   " currently not supported.\n");
+    if (pBIOSInfo->PanelActive && ((pVia->Chipset == VT3204) || 
+                                   (pVia->Chipset == VT3259) ||
+                                   (pVia->Chipset == VT3314)))
+	xf86DrvMsg(pScrn->scrnIndex, X_WARNING, 
+                   "Panel on %s is currently not supported.\n", pScrn->chipset);
 
     /* Add own Modes */
     ViaModesAttach(pScrn, pScrn->monitor);
@@ -1351,14 +1355,14 @@ static Bool VIAPreInit(ScrnInfoPtr pScrn, int flags)
      * pScrn->maxVValue are set.  Since our VIAValidMode() already takes
      * care of this, we don't worry about setting them here.
      *
-     * CLE266A:
+     * VT3122A:
      *   Max Line Pitch: 4080, (FB corruption when higher, driver problem?)
      *   Max Height: 4096 (and beyond)
      *
-     * CLE266A: primary AdjustFrame only is able to use 24bits, so we are
+     * VT3122A: primary AdjustFrame only is able to use 24bits, so we are
      * limited to 12x11bits; 4080x2048 (~2:1), 3344x2508 (4:3) or 2896x2896
      * (1:1). 
-     * Test CLE266Cx, KM400, KM400A, K8M800, PM800, CN400 please.
+     * Test VT3122Cx, VT3205, VT3205A, VT3204, VT3259, VT3314 please.
      *
      * We should be able to limit the memory available for a mode to 32MB,
      * yet xf86ValidateModes (or miScanLineWidth) fails to catch this properly
@@ -2307,7 +2311,7 @@ VIAAdjustFrame(int scrnIndex, int x, int y, int flags)
 	hwp->writeCrtc(hwp, 0x0D, Base & 0xFF);
 	hwp->writeCrtc(hwp, 0x34, (Base & 0xFF0000) >> 16);
 #if 0
-	/* The CLE266A doesn't have this implemented, it seems. -- Luc */
+	/* The VT3122A doesn't have this implemented, it seems. -- Luc */
 	ViaCrtcMask(hwp, 0x48, Base >> 24, 0x03);
 #endif
     }
diff --git a/src/via_id.c b/src/via_id.c
index 229186b..7bf346a 100644
--- a/src/via_id.c
+++ b/src/via_id.c
@@ -34,7 +34,7 @@
 
 /*
  * Known missing devices:
- * cle266:
+ * VT3122:
  * Biostar M6VLQ Grand
  * Biostar M6VLQ Pro
  * PcChips M789CLU (with C3 onboard)
@@ -43,31 +43,31 @@
  * Soltek SL-B6A-F1000 (Qbic IQ3601 | C3 1Ghz onboard)
  * + loads of semi-embedded devices.
  *
- * km400:
- * Abit VA-20: ? km400 vs km400a ?
+ * VT3205:
+ * Abit VA-20: ? VT3205 or VT3205A ?
  * ECS KM400-M
  * ECS KM400-M2
  * ECS KM400A-M2
  * PcChips M851G
  * PcChips M851AG
- * Soltek SL-B7C-FGR (Qbic EQ3704 | km400a)
+ * Soltek SL-B7C-FGR (Qbic EQ3704 | VT3205A)
  * Soyo SY-K7VMP
  * Soyo SY-K7VMP2
  *
- * k8m800:
+ * VT3204:
  * Abit KV8-MAX3
  * Abit KV8
- * Biostar Ideq 210V (km400a)
+ * Biostar Ideq 210V (or VT3205A?)
  * Biostar M7VIZ
  * Chaintech MK8M800
  * ECS k8m800-m2
- * Epox EP-8KMM5I (km400a)
+ * Epox EP-8KMM5I (or VT3205A?)
  * MSI K8M Neo-V
  * PcChips M861G
  * Soltek SL-B9C-FGR (Qbic EQ3802-300P)
  * Soltek SL-K8M800I-R
  *
- * pm800:
+ * VT3259:
  * Asrock P4VM8
  * Biostar Ideq 210M
  * Biostar P4VMA-M
@@ -88,43 +88,44 @@
  *
  */
 static struct ViaCardIdStruct ViaCardId[] = {
-    /* CLE266 */
-    {"ECS G320",                              VIA_CLE266,  0x1019, 0xB320, VIA_DEVICE_CRT | VIA_DEVICE_LCD},
-    {"VIA EPIA M/MII/...",                    VIA_CLE266,  0x1106, 0x3122, VIA_DEVICE_CRT | VIA_DEVICE_TV},
-    /* KM400 */
-    {"Acer Aspire 135x",                      VIA_KM400,   0x1025, 0x0033, VIA_DEVICE_CRT | VIA_DEVICE_LCD | VIA_DEVICE_TV},
-    {"Asustek A7V8X-MX",                      VIA_KM400,   0x1043, 0x80ED, VIA_DEVICE_CRT},
-    {"Asustek A7V8X-MX SE/A7V400-MX",         VIA_KM400,   0x1043, 0x8118, VIA_DEVICE_CRT},
-    {"Mitac 8375X",                           VIA_KM400,   0x1071, 0x8375, VIA_DEVICE_CRT | VIA_DEVICE_LCD | VIA_DEVICE_TV}, /* aka UMAX 585T */
-    {"Soltek SL-75MIV2",                      VIA_KM400,   0x1106, 0x0000, VIA_DEVICE_CRT}, /* VIA/0x0000 */
-    {"Biostar iDEQ 200V/Chaintech 7VIF4",     VIA_KM400,   0x1106, 0x7205, VIA_DEVICE_CRT}, /* VIA/KM400 -- 2 distinct devices */
-    {"Shuttle FX43",                          VIA_KM400,   0x1297, 0xF643, VIA_DEVICE_CRT | VIA_DEVICE_TV},
-    {"Giga-byte 7VM400(A)M",                  VIA_KM400,   0x1458, 0xD000, VIA_DEVICE_CRT}, /* 7VM400M, GA-7VM400AM */
-    {"MSI KM4(A)M-V",                         VIA_KM400,   0x1462, 0x7061, VIA_DEVICE_CRT}, /* aka "DFI KM400-MLV" */
-    {"MSI KM4(A)M-L",                         VIA_KM400,   0x1462, 0x7348, VIA_DEVICE_CRT},
-    {"Abit VA-10 (1)",                        VIA_KM400,   0x147B, 0x140B, VIA_DEVICE_CRT},
-    {"Abit VA-10 (2)",                        VIA_KM400,   0x147B, 0x140C, VIA_DEVICE_CRT}, /* VA-10/VA-20 id difference is not confirmed */
-    {"Averatec 322x",                         VIA_KM400,   0x14FF, 0x030D, VIA_DEVICE_CRT | VIA_DEVICE_LCD},
-    {"Uniwill 755CI",                         VIA_KM400,   0x1584, 0x800A, VIA_DEVICE_CRT | VIA_DEVICE_LCD | VIA_DEVICE_TV}, /* aka "Gericom hummer advance", "Maxdata M-Book 1200X" */
-    {"Epox EP-8KMM3I",                        VIA_KM400,   0x1695, 0x9023, VIA_DEVICE_CRT},
-    {"ASRock Inc. K7VM2/3/4",                 VIA_KM400,   0x1849, 0x7205, VIA_DEVICE_CRT},
-    {"Soyo K7VME",                            VIA_KM400,   0xA723, 0x10FD, VIA_DEVICE_CRT},
-    /* K8M800 */
-    {"Acer Aspire 136x",                      VIA_K8M800,  0x1025, 0x006E, VIA_DEVICE_CRT | VIA_DEVICE_LCD | VIA_DEVICE_TV},
-    {"Mitac 8399",                            VIA_K8M800,  0x1071, 0x8399, VIA_DEVICE_CRT | VIA_DEVICE_LCD | VIA_DEVICE_TV}, /* aka "pogolinux konabook 3100" */
-    {"DFI K8M800-MLVF",                       VIA_K8M800,  0x1106, 0x3108, VIA_DEVICE_CRT}, /* VIA/K8M800 -- ??? PciInfo Alignment issue ??? */
-    {"Shuttle FX83",                          VIA_K8M800,  0x1297, 0xF683, VIA_DEVICE_CRT | VIA_DEVICE_TV},
-    {"Sharp Actius AL27",                     VIA_K8M800,  0x13BD, 0x1044, VIA_DEVICE_CRT | VIA_DEVICE_LCD},
-    {"Giga-byte GA-K8VM800M",                 VIA_K8M800,  0x1458, 0xD000, VIA_DEVICE_CRT},
-    {"MSI K8M Neo-V",                         VIA_K8M800,  0x1462, 0x0320, VIA_DEVICE_CRT},
-    {"MSI K8MM-ILSR",                         VIA_K8M800,  0x1462, 0x7410, VIA_DEVICE_CRT},
-    {"Abit KV-80",                            VIA_K8M800,  0x147B, 0x1419, VIA_DEVICE_CRT},
-    {"Averatec 54xx",                         VIA_K8M800,  0x1509, 0x3930, VIA_DEVICE_CRT | VIA_DEVICE_LCD},
-    {"Biostar K8VGA-M",                       VIA_K8M800,  0x1565, 0x1203, VIA_DEVICE_CRT},
-    /* PM800 */
-    {"ECS PM800-M2",                          VIA_PM800,   0x1106, 0x3118, VIA_DEVICE_CRT}, /* VIA/PM800 */
-    {"Biostar P4VMA-M",                       VIA_PM800,   0x1565, 0x1202, VIA_DEVICE_CRT},
-    {"Fujitsu/Siemens Amilo Pro V2010",       VIA_PM800,   0x1734, 0x1078, VIA_DEVICE_CRT | VIA_DEVICE_LCD | VIA_DEVICE_TV},
+    /* VT3122 */
+    {"ECS G320",                              VT3122,  0x1019, 0xB320, VIA_DEVICE_CRT | VIA_DEVICE_LCD},
+    {"VIA EPIA M/MII/...",                    VT3122,  0x1106, 0x3122, VIA_DEVICE_CRT | VIA_DEVICE_TV},
+    /* VT3205 */
+    {"Acer Aspire 135x",                      VT3205,   0x1025, 0x0033, VIA_DEVICE_CRT | VIA_DEVICE_LCD | VIA_DEVICE_TV},
+    {"Asustek A7V8X-MX",                      VT3205,   0x1043, 0x80ED, VIA_DEVICE_CRT},
+    {"Asustek A7V8X-MX SE/A7V400-MX",         VT3205,   0x1043, 0x8118, VIA_DEVICE_CRT},
+    {"Mitac 8375X",                           VT3205,   0x1071, 0x8375, VIA_DEVICE_CRT | VIA_DEVICE_LCD | VIA_DEVICE_TV}, /* aka UMAX 585T */
+    {"Soltek SL-75MIV2",                      VT3205,   0x1106, 0x0000, VIA_DEVICE_CRT}, /* VIA/0x0000 */
+    {"Biostar iDEQ 200V/Chaintech 7VIF4",     VT3205,   0x1106, 0x7205, VIA_DEVICE_CRT}, /* VIA/VT3205 -- 2 distinct devices */
+    {"Shuttle FX43",                          VT3205,   0x1297, 0xF643, VIA_DEVICE_CRT | VIA_DEVICE_TV},
+    {"Giga-byte 7VM400(A)M",                  VT3205,   0x1458, 0xD000, VIA_DEVICE_CRT}, /* 7VM400M, GA-7VM400AM */
+    {"MSI KM4(A)M-V",                         VT3205,   0x1462, 0x7061, VIA_DEVICE_CRT}, /* aka "DFI KM400-MLV" */
+    {"MSI KM4(A)M-L",                         VT3205,   0x1462, 0x7348, VIA_DEVICE_CRT},
+    {"Abit VA-10 (1)",                        VT3205,   0x147B, 0x140B, VIA_DEVICE_CRT},
+    {"Abit VA-10 (2)",                        VT3205,   0x147B, 0x140C, VIA_DEVICE_CRT}, /* VA-10/VA-20 id difference is not confirmed */
+    {"Averatec 322x",                         VT3205,   0x14FF, 0x030D, VIA_DEVICE_CRT | VIA_DEVICE_LCD},
+    {"Uniwill 755CI",                         VT3205,   0x1584, 0x800A, VIA_DEVICE_CRT | VIA_DEVICE_LCD | VIA_DEVICE_TV}, /* aka "Gericom hummer advance", "Maxdata M-Book 1200X" */
+    {"Epox EP-8KMM3I",                        VT3205,   0x1695, 0x9023, VIA_DEVICE_CRT},
+    {"ASRock Inc. K7VM2/3/4",                 VT3205,   0x1849, 0x7205, VIA_DEVICE_CRT},
+    {"Soyo K7VME",                            VT3205,   0xA723, 0x10FD, VIA_DEVICE_CRT},
+    /* VT3204 */
+    {"Acer Aspire 136x",                      VT3204,  0x1025, 0x006E, VIA_DEVICE_CRT | VIA_DEVICE_LCD | VIA_DEVICE_TV},
+    {"Mitac 8399",                            VT3204,  0x1071, 0x8399, VIA_DEVICE_CRT | VIA_DEVICE_LCD | VIA_DEVICE_TV}, /* aka "pogolinux konabook 3100" */
+    {"DFI K8M800-MLVF",                       VT3204,  0x1106, 0x3108, VIA_DEVICE_CRT}, /* VIA/VT3204 -- ??? PciInfo Alignment issue ??? */
+    {"Shuttle FX83",                          VT3204,  0x1297, 0xF683, VIA_DEVICE_CRT | VIA_DEVICE_TV},
+    {"Sharp Actius AL27",                     VT3204,  0x13BD, 0x1044, VIA_DEVICE_CRT | VIA_DEVICE_LCD},
+    {"Giga-byte GA-K8VM800M",                 VT3204,  0x1458, 0xD000, VIA_DEVICE_CRT},
+    {"MSI K8M Neo-V",                         VT3204,  0x1462, 0x0320, VIA_DEVICE_CRT},
+    {"MSI K8MM-ILSR",                         VT3204,  0x1462, 0x7410, VIA_DEVICE_CRT},
+    {"Abit KV-80",                            VT3204,  0x147B, 0x1419, VIA_DEVICE_CRT},
+    {"Averatec 54xx",                         VT3204,  0x1509, 0x3930, VIA_DEVICE_CRT | VIA_DEVICE_LCD},
+    {"Biostar K8VGA-M",                       VT3204,  0x1565, 0x1203, VIA_DEVICE_CRT},
+    /* VT3259 */
+    {"ECS PM800-M2",                          VT3259,   0x1106, 0x3118, VIA_DEVICE_CRT}, /* VIA/VT3259 */
+    {"Biostar P4VMA-M",                       VT3259,   0x1565, 0x1202, VIA_DEVICE_CRT},
+    {"Fujitsu/Siemens Amilo Pro V2010",       VT3259,   0x1734, 0x1078, VIA_DEVICE_CRT | VIA_DEVICE_LCD | VIA_DEVICE_TV},
+    /* VT3314 */
     /* keep this */
     {NULL,                                    VIA_UNKNOWN, 0x0000, 0x0000, VIA_DEVICE_NONE}
 };
@@ -134,22 +135,22 @@ static struct ViaCardIdStruct ViaCardId[] = {
  * We don't do anything but warn really.
  */
 void
-ViaDoubleCheckCLE266Revision(ScrnInfoPtr pScrn)
+ViaDoubleCheckVT3122Revision(ScrnInfoPtr pScrn)
 {
     vgaHWPtr hwp = VGAHWPTR(pScrn);
     VIAPtr pVia = VIAPTR(pScrn);
-    /* Crtc 0x4F is only defined in CLE266Cx */
+    /* Crtc 0x4F is only defined in VT3122Cx */
     CARD8 tmp = hwp->readCrtc(hwp, 0x4F);
     
     hwp->writeCrtc(hwp, 0x4F, 0x55);
     
     if (hwp->readCrtc(hwp, 0x4F) == 0x55) {
-	if (CLE266_REV_IS_AX(pVia->ChipRev))
-	    xf86DrvMsg(pScrn->scrnIndex, X_WARNING, "CLE266 Revision seems"
+	if (VT3122_REV_IS_AX(pVia->ChipRev))
+	    xf86DrvMsg(pScrn->scrnIndex, X_WARNING, "VT3122 Revision seems"
 		       " to be Cx, yet %d was detected previously.\n", pVia->ChipRev);
     } else {
-	if (CLE266_REV_IS_CX(pVia->ChipRev))
-	    xf86DrvMsg(pScrn->scrnIndex, X_WARNING, "CLE266 Revision seems"
+	if (VT3122_REV_IS_CX(pVia->ChipRev))
+	    xf86DrvMsg(pScrn->scrnIndex, X_WARNING, "VT3122 Revision seems"
 		       " to be Ax, yet %d was detected previously.\n", pVia->ChipRev);
     }
     hwp->writeCrtc(hwp, 0x4F, tmp);
diff --git a/src/via_id.h b/src/via_id.h
index 65ee15f..0356c0a 100644
--- a/src/via_id.h
+++ b/src/via_id.h
@@ -24,24 +24,19 @@
 #ifndef _VIA_ID_H_
 #define _VIA_ID_H_ 1
 
-/*
- * K8M800 and PM800/PM880/CN400 are currently untested
- * and support is disabled.
- */
-
-#define HAVE_K8M800
-#define HAVE_PM800
-
-
 /* Chip tags.  These are used to group the adapters into
  * related families.
+ *
+ * Sadly, VIA has a completely insane naming structure. I have no
+ * other option but to represent them by their VT3*** names.
  */
 enum VIACHIPTAGS {
     VIA_UNKNOWN = 0,
-    VIA_CLE266,
-    VIA_KM400,
-    VIA_K8M800,
-    VIA_PM800,
+    VT3122, /* CLE266 */
+    VT3205, /* KM400 */
+    VT3204, /* K8M800 */
+    VT3259, /* PM800, CN400, PM880, P4M800, whatever. */
+    VT3314, /* P4M800Pro and [CV]N[6789]00, VIA is still making up its mind */
     VIA_LAST
 };
 
@@ -58,11 +53,12 @@ enum VIACHIPTAGS {
  * provide any further information.
  *
  */
-/* #define PCI_CHIP_CLE3022        0x3022 */ /* CLE266??? */
-#define PCI_CHIP_VT3204         0x3108 /* K8M800 */
-#define PCI_CHIP_VT3259         0x3118 /* PM800/PM880/CN400 */
-#define PCI_CHIP_CLE3122        0x3122 /* CLE266 */
-#define PCI_CHIP_VT3205         0x7205 /* KM400 */
+/* #define PCI_CHIP_VT3022  0x3022 */ /* CLE266??? */
+#define PCI_CHIP_VT3122  0x3122
+#define PCI_CHIP_VT3205  0x7205
+#define PCI_CHIP_VT3204  0x3108
+#define PCI_CHIP_VT3259  0x3118
+#define PCI_CHIP_VT3314  0x3344
 
 /*
  * There is also quite some conflicting information on the
@@ -81,8 +77,8 @@ enum VIACHIPTAGS {
  * It seems to be 0x10, anything from that and up is Cx, anything
  * below is Ax
  */
-#define CLE266_REV_IS_CX(x) ((x) >= 0x10)
-#define CLE266_REV_IS_AX(x) ((x) < 0x10)
+#define VT3122_REV_IS_CX(x) ((x) >= 0x10)
+#define VT3122_REV_IS_AX(x) ((x) < 0x10)
 
 struct ViaCardIdStruct {
     char*  String;  /* Full identification string. */
@@ -92,7 +88,7 @@ struct ViaCardIdStruct {
     CARD8  Outputs; /* ORed list of VIA_DEVICE_CRT, VIA_DEVICE_LCD, VIA_DEVICE_TV */
 };
 
-void ViaDoubleCheckCLE266Revision(ScrnInfoPtr pScrn);
+void ViaDoubleCheckVT3122Revision(ScrnInfoPtr pScrn);
 void ViaCheckCardId(ScrnInfoPtr pScrn);
 
 #endif /* _VIA_ID_H_ */
diff --git a/src/via_mode.c b/src/via_mode.c
index 964089a..fe93d26 100644
--- a/src/via_mode.c
+++ b/src/via_mode.c
@@ -728,21 +728,21 @@ ViaGetMemoryBandwidth(ScrnInfoPtr pScrn)
     VIAFUNC(pScrn->scrnIndex);
    
     switch (pVia->Chipset) {
-    case VIA_CLE266:
-	if (CLE266_REV_IS_AX(pVia->ChipRev))
-	    return ViaBandwidthTable[VIA_BW_CLE266A].Bandwidth[pVia->MemClk];
+    case VT3122:
+	if (VT3122_REV_IS_AX(pVia->ChipRev))
+	    return ViaBandwidthTable[VIA_BW_VT3122A].Bandwidth[pVia->MemClk];
 	else
-	    return ViaBandwidthTable[VIA_BW_CLE266C].Bandwidth[pVia->MemClk];
-    case VIA_KM400:
+	    return ViaBandwidthTable[VIA_BW_VT3122C].Bandwidth[pVia->MemClk];
+    case VT3205:
         /* 0x84 is earliest public device, 0x80 is more likely though */
 	if (pVia->ChipRev < 0x84)
-	    return ViaBandwidthTable[VIA_BW_KM400].Bandwidth[pVia->MemClk];
+	    return ViaBandwidthTable[VIA_BW_VT3205].Bandwidth[pVia->MemClk];
 	else
-	    return ViaBandwidthTable[VIA_BW_KM400A].Bandwidth[pVia->MemClk];
-    case VIA_K8M800:
-	return ViaBandwidthTable[VIA_BW_K8M800].Bandwidth[pVia->MemClk];
-    case VIA_PM800:
-	return ViaBandwidthTable[VIA_BW_PM800].Bandwidth[pVia->MemClk];
+	    return ViaBandwidthTable[VIA_BW_VT3205A].Bandwidth[pVia->MemClk];
+    case VT3204:
+	return ViaBandwidthTable[VIA_BW_VT3204].Bandwidth[pVia->MemClk];
+    case VT3259:
+	return ViaBandwidthTable[VIA_BW_VT3259].Bandwidth[pVia->MemClk];
     default:
 	xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "ViaBandwidthAllowed: Unknown Chipset.\n");
 	return VIA_BW_MIN;
@@ -976,7 +976,7 @@ ViaSetPrimaryDotclock(ScrnInfoPtr pScrn, CARD32 clock)
 
     ViaDebug(hwp->pScrn->scrnIndex, "%s to 0x%lX\n", __FUNCTION__, clock);
 
-    if ((pVia->Chipset == VIA_CLE266) || (pVia->Chipset == VIA_KM400)) {
+    if ((pVia->Chipset == VT3122) || (pVia->Chipset == VT3205)) {
 	hwp->writeSeq(hwp, 0x46, clock >> 8);
 	hwp->writeSeq(hwp, 0x47, clock & 0xFF);
     } else { /* unichrome pro */
@@ -1000,7 +1000,7 @@ ViaSetSecondaryDotclock(ScrnInfoPtr pScrn, CARD32 clock)
 
     ViaDebug(hwp->pScrn->scrnIndex, "%s to 0x%lX\n", __FUNCTION__, clock);
 
-    if ((pVia->Chipset == VIA_CLE266) || (pVia->Chipset == VIA_KM400)) {
+    if ((pVia->Chipset == VT3122) || (pVia->Chipset == VT3205)) {
 	hwp->writeSeq(hwp, 0x44, clock >> 8);
 	hwp->writeSeq(hwp, 0x45, clock & 0xFF);
     } else { /* unichrome pro */
@@ -1212,8 +1212,7 @@ VIASetLCDMode(ScrnInfoPtr pScrn, DisplayModePtr mode)
         if (pBIOSInfo->BusWidth == VIA_DI_12BIT) {
 	    hwp->writeCrtc(hwp, 0x6B, 0xA8);
 
-            if ((pVia->Chipset == VIA_CLE266) &&
-		CLE266_REV_IS_AX(pVia->ChipRev))
+            if ((pVia->Chipset == VT3122) && VT3122_REV_IS_AX(pVia->ChipRev))
 		hwp->writeCrtc(hwp, 0x93, 0xB1);
             else
 		hwp->writeCrtc(hwp, 0x93, 0xAF);
@@ -1229,8 +1228,7 @@ VIASetLCDMode(ScrnInfoPtr pScrn, DisplayModePtr mode)
         /* Enable SAMM */
         if (pBIOSInfo->BusWidth == VIA_DI_12BIT) {
 	    ViaCrtcMask(hwp, 0x6B, 0x20, 0x20);
-            if ((pVia->Chipset == VIA_CLE266) &&
-		CLE266_REV_IS_AX(pVia->ChipRev))
+            if ((pVia->Chipset == VT3122) && VT3122_REV_IS_AX(pVia->ChipRev))
 		hwp->writeCrtc(hwp, 0x93, 0xB1);
             else
 		hwp->writeCrtc(hwp, 0x93, 0xAF);
@@ -1407,7 +1405,7 @@ ViaModePrimaryVGA(ScrnInfoPtr pScrn, DisplayModePtr mode)
     hwp->writeCrtc(hwp, 0x0C, 0x00);
     hwp->writeCrtc(hwp, 0x0D, 0x00);
     hwp->writeCrtc(hwp, 0x34, 0x00);
-    ViaCrtcMask(hwp, 0x48, 0x00, 0x03); /* is this even possible on CLE266A ? */
+    ViaCrtcMask(hwp, 0x48, 0x00, 0x03); /* is this even possible on VT3122A ? */
 
     /* vertical sync start : 2047 */
     ViaDebug(pScrn->scrnIndex, "CrtcVSyncStart: 0x%03X\n", mode->CrtcVSyncStart);
@@ -1494,7 +1492,7 @@ ViaModeDotClockTranslate(ScrnInfoPtr pScrn, DisplayModePtr mode)
 
     for (i = 0; ViaDotClocks[i].DotClock; i++)
 	if (ViaDotClocks[i].DotClock == mode->Clock) {
-	    if ((pVia->Chipset == VIA_CLE266) || (pVia->Chipset == VIA_KM400))
+	    if ((pVia->Chipset == VT3122) || (pVia->Chipset == VT3205))
 		return ViaDotClocks[i].UniChrome;
 	    else
 		return ViaDotClocks[i].UniChromePro;	
@@ -1526,7 +1524,7 @@ ViaModePrimary(ScrnInfoPtr pScrn, DisplayModePtr mode)
     ViaModePrimaryVGA(pScrn, mode);
     pBIOSInfo->Clock = ViaModeDotClockTranslate(pScrn, mode);
 
-    /* Don't do this before the Sequencer is set: locks up KM400 and K8M800 */
+    /* Don't do this before the Sequencer is set: locks up VT3205 and VT3204 */
     if (pVia->FirstInit)
 	memset(pVia->FBBase, 0x00, pVia->videoRambytes);
     
@@ -1545,8 +1543,8 @@ ViaModePrimary(ScrnInfoPtr pScrn, DisplayModePtr mode)
     if (pBIOSInfo->TVActive) {
 	/* Quick 'n dirty workaround for non-primary case until TVCrtcMode
 	   is removed -- copy from clock handling code below */
-	if ((pVia->Chipset == VIA_CLE266) && CLE266_REV_IS_AX(pVia->ChipRev))
-	    ViaSetPrimaryDotclock(pScrn, 0x471C); /* CLE266Ax use 2x XCLK */
+	if ((pVia->Chipset == VT3122) && VT3122_REV_IS_AX(pVia->ChipRev))
+	    ViaSetPrimaryDotclock(pScrn, 0x471C); /* VT3122Ax use 2x XCLK */
 	else
 	    ViaSetPrimaryDotclock(pScrn, 0x871C);
 	ViaSetUseExternalClock(hwp);
@@ -1566,7 +1564,7 @@ ViaModePrimary(ScrnInfoPtr pScrn, DisplayModePtr mode)
             ViaCrtcMask(hwp, 0x6A, 0x80, 0x80);
             ViaCrtcMask(hwp, 0x6C, 0x80, 0x80);
             
-            if ((pVia->Chipset == VIA_CLE266) && CLE266_REV_IS_AX(pVia->ChipRev)) {
+            if ((pVia->Chipset == VT3122) && VT3122_REV_IS_AX(pVia->ChipRev)) {
                 ViaCrtcMask(hwp, 0x6B, 0x20, 0x20);
                 ViaCrtcMask(hwp, 0x6C, 0x10, 0x10);
             }
@@ -1575,7 +1573,7 @@ ViaModePrimary(ScrnInfoPtr pScrn, DisplayModePtr mode)
             if (!pVia->SAMM || pVia->FirstInit)
                 hwp->writeCrtc(hwp, 0x79, 0x00);
         } else {
-            if ((pVia->Chipset == VIA_CLE266) && CLE266_REV_IS_AX(pVia->ChipRev))
+            if ((pVia->Chipset == VT3122) && VT3122_REV_IS_AX(pVia->ChipRev))
                 ViaCrtcMask(hwp, 0x6B, 0x80, 0x80);
         }
         ViaCrtcMask(hwp, 0x6A, 0x40, 0x40);
@@ -1583,8 +1581,8 @@ ViaModePrimary(ScrnInfoPtr pScrn, DisplayModePtr mode)
         ViaCrtcMask(hwp, 0x6C, 0x01, 0x01);
         ViaSeqMask(hwp, 0x1E, 0xC0, 0xC0); /* Enable DI0/DVP0 */
         
-	if ((pVia->Chipset == VIA_CLE266) && CLE266_REV_IS_AX(pVia->ChipRev))
-	    ViaSetPrimaryDotclock(pScrn, 0x471C); /* CLE266Ax use 2x XCLK */
+	if ((pVia->Chipset == VT3122) && VT3122_REV_IS_AX(pVia->ChipRev))
+	    ViaSetPrimaryDotclock(pScrn, 0x471C); /* VT3122Ax use 2x XCLK */
 	else
 	    ViaSetPrimaryDotclock(pScrn, 0x871C);
     } else {
@@ -1756,8 +1754,8 @@ ViaModeSecondary(ScrnInfoPtr pScrn, DisplayModePtr mode)
     if (pBIOSInfo->TVActive && pBIOSInfo->TVMode)
 	pBIOSInfo->TVMode(pScrn, mode);
 
-    /* CLE266A2 apparently doesn't like this */
-    if ((pVia->Chipset != VIA_CLE266) || (pVia->ChipRev != 0x02))
+    /* VT3122A2 apparently doesn't like this */
+    if ((pVia->Chipset != VT3122) || (pVia->ChipRev != 0x02))
 	ViaCrtcMask(hwp, 0x6C, 0x00, 0x1E);
 
     if (pBIOSInfo->PanelActive && (pBIOSInfo->PanelIndex != VIA_BIOS_NUM_PANEL)) {
@@ -1813,7 +1811,7 @@ ViaLCDPower(ScrnInfoPtr pScrn, Bool On)
 	ViaCrtcMask(hwp, 0x6A, 0x00, 0x08);
 
     /* Find Panel Size Index for PowerSeq Table */
-    if (pVia->Chipset == VIA_CLE266) {
+    if (pVia->Chipset == VT3122) {
         if (pBIOSInfo->PanelSize != VIA_PANEL_INVALID) {
             for (i = 0; i < NumPowerOn; i++) {
                 if (lcdTable[pBIOSInfo->PanelIndex].powerSeq == powerOn[i].powerSeq)
diff --git a/src/via_mode.h b/src/via_mode.h
index 01e23cf..8789121 100644
--- a/src/via_mode.h
+++ b/src/via_mode.h
@@ -34,12 +34,12 @@
 #define VIA_BW_MIN 74000000 /* > 640x480@60Hz@32bpp */
 
 /* index to table */
-#define VIA_BW_CLE266A  0
-#define VIA_BW_CLE266C  1
-#define VIA_BW_KM400    2
-#define VIA_BW_KM400A   3
-#define VIA_BW_K8M800   4
-#define VIA_BW_PM800    5
+#define VIA_BW_VT3122A  0
+#define VIA_BW_VT3122C  1
+#define VIA_BW_VT3205   2
+#define VIA_BW_VT3205A  3
+#define VIA_BW_VT3204   4
+#define VIA_BW_VT3259   5
 #define VIA_BW_ALL      6
 
 /*
@@ -50,12 +50,12 @@ static struct {
     CARD8 Device; /* equal to index */
     CARD32 Bandwidth[VIA_MEM_END];
 } ViaBandwidthTable[VIA_BW_ALL] = {
-    { VIA_BW_CLE266A, { 394000000,  461000000, VIA_BW_MIN, VIA_BW_MIN } },
-    { VIA_BW_CLE266C, { 394000000,  461000000, VIA_BW_MIN, VIA_BW_MIN } },
-    { VIA_BW_KM400,   { 394000000,  461000000,  461000000, VIA_BW_MIN } },
-    { VIA_BW_KM400A,  { 394000000,  461000000,  461000000,  461000000 } },
-    { VIA_BW_K8M800,  { 394000000,  461000000,  461000000,  461000000 } },
-    { VIA_BW_PM800,   { 394000000,  461000000,  461000000,  461000000 } }
+    { VIA_BW_VT3122A, { 394000000,  461000000, VIA_BW_MIN, VIA_BW_MIN } },
+    { VIA_BW_VT3122C, { 394000000,  461000000, VIA_BW_MIN, VIA_BW_MIN } },
+    { VIA_BW_VT3205,  { 394000000,  461000000,  461000000, VIA_BW_MIN } },
+    { VIA_BW_VT3205A, { 394000000,  461000000,  461000000,  461000000 } },
+    { VIA_BW_VT3204,  { 394000000,  461000000,  461000000,  461000000 } },
+    { VIA_BW_VT3259,  { 394000000,  461000000,  461000000,  461000000 } }
 };
     
 /*
diff --git a/src/via_video.c b/src/via_video.c
index 7668d98..7498fdf 100644
--- a/src/via_video.c
+++ b/src/via_video.c
@@ -352,7 +352,7 @@ viaCalculateVideoColor(VIAPtr pVia, CARD32 *col1, CARD32 *col2)
     float fA,fB1,fC1,fD,fB2,fC2,fB3,fC3;
     float fPI,fContrast,fSaturation,fHue,fBrightness;
 
-    float ColorCoefficientCLE266Ax[5] = {1.164, 1.596, 0.54, 0.45, 2.2};
+    float ColorCoefficientVT3122Ax[5] = {1.164, 1.596, 0.54, 0.45, 2.2};
     float ColorCoefficientOther[5] = {1.1875, 1.625, 0.875, 0.375, 2.0};
     const float *mCoeff;
 
@@ -362,11 +362,11 @@ viaCalculateVideoColor(VIAPtr pVia, CARD32 *col1, CARD32 *col2)
 
     fPI = (float)(M_PI/180.);
 
-    if ((pVia->Chipset == VIA_CLE266) && CLE266_REV_IS_AX(pVia->ChipRev)) {
+    if ((pVia->Chipset == VT3122) && VT3122_REV_IS_AX(pVia->ChipRev)) {
         fBrightness = rangeEqualize(0.,10000.,-128.,128.,-12.,(float) Port->brightness);
         fContrast = rangeEqualize(0.,20000.,0.,1.6645,1.1,(float) Port->contrast);
         fSaturation = rangeEqualize(0.,20000,0.,2.,1.15,(float) Port->saturation);
-        mCoeff = ColorCoefficientCLE266Ax;
+        mCoeff = ColorCoefficientVT3122Ax;
     } else {
         fBrightness = rangeEqualize(0.,10000.,-128.,128.,-16.,(float) Port->brightness);
         fContrast = rangeEqualize(0.,20000.,0.,1.6645,1.0,(float) Port->contrast);
@@ -386,7 +386,7 @@ viaCalculateVideoColor(VIAPtr pVia, CARD32 *col1, CARD32 *col2)
     fB3 = (float)(mCoeff[4]*fContrast*fSaturation*cos(fHue*fPI));
     fC3 = (float)(mCoeff[4]*fContrast*fSaturation*sin(fHue*fPI));
 
-    if ((pVia->Chipset == VIA_CLE266) && CLE266_REV_IS_AX(pVia->ChipRev)) {
+    if ((pVia->Chipset == VT3122) && VT3122_REV_IS_AX(pVia->ChipRev)) {
         dwA = vPackFloat(fA,1.9375,-0.,32,5,0);
         dwB1 = vPackFloat(fB1,0.75,-0.75,8.,2,1);
         dwC1 = vPackFloat(fC1,2.875,1.,16.,5,0);
@@ -906,7 +906,7 @@ ViaSwovBandwidth(ScrnInfoPtr pScrn)
     /* Small trick here. We keep the height in 16's of lines and width in 32's 
        to avoid numeric overflow */
 
-    if (pVia->Chipset == VIA_CLE266) {
+    if (pVia->Chipset == VT3122) {
 	CARD32 bandwidth = (mode->HDisplay >> 4) * (mode->VDisplay >> 5) *
 	    pScrn->bitsPerPixel * mode->VRefresh;
 	
@@ -1018,7 +1018,7 @@ ViaHQVFetch(struct ViaSwov *Swov, struct ViaXvPort *Port)
                    __FUNCTION__);
     }
 
-    if (Swov->HQVFetchByteUnit) /* CLE266A */
+    if (Swov->HQVFetchByteUnit) /* VT3122A */
         Fetch >>= 3;
 
     if ((Port->Deinterlace & VIA_DEINT_BOB) &&
@@ -1213,21 +1213,21 @@ ViaSwovFIFO(VIAPtr pVia, struct ViaSwov *Swov)
     CARD8 depth, prethreshold, threshold;
 
     switch (pVia->Chipset) {
-    case VIA_CLE266:
-        if (CLE266_REV_IS_CX(pVia->ChipRev)) {
+    case VT3122:
+        if (VT3122_REV_IS_CX(pVia->ChipRev)) {
             depth = 64;
             prethreshold = 56;
             threshold = 56;
             Swov->Video->Video3Control |= V3_EXPIRE_NUM_F;
-        } else { /* CLE266Ax */
+        } else { /* VT3122Ax */
             depth = 32;
             prethreshold = 16;
             threshold = 8;
             Swov->Video->Video3Control |= V3_EXPIRE_NUM;
         }
         break;
-    case VIA_KM400:
-    case VIA_K8M800:
+    case VT3205:
+    case VT3204:
         depth = 32;
         prethreshold = 29;
         threshold = 29;
@@ -1256,7 +1256,7 @@ ViaHQVInit(struct ViaSwov *Swov)
     struct ViaXvPort *Port = Swov->Port;
 
     Swov->HQV->Control = HQV_SRC_SW;
-    /* not CLE266Ax could need |= HQV_ENABLE | HQV_SW_FLIP */
+    /* not VT3122Ax could need |= HQV_ENABLE | HQV_SW_FLIP */
 
     switch (Port->FourCC) {
     case FOURCC_YV12:
@@ -1421,7 +1421,7 @@ ViaSwovZoomV(struct ViaSwov *Swov, struct ViaXvPort *Port)
         tmp = Src_H * 0x0400 / Port->Drw_H;
         Swov->Video->Video3Zoom |= ((tmp & 0x3ff) | V3_Y_ZOOM_ENABLE);
 
-        if ((VIAPTR(pScrn)->Chipset == VIA_CLE266) && (pScrn->currentMode->HDisplay > 1024))
+        if ((VIAPTR(pScrn)->Chipset == VT3122) && (pScrn->currentMode->HDisplay > 1024))
             /* Temporary fix for 2D bandwidth problem. 2002/08/01*/
             Swov->Video->Video3Minify |= V3_YCBCR_INTERPOLY;
         else
@@ -2145,8 +2145,8 @@ ViaSwovInit(ScrnInfoPtr pScrn)
 
     /* old HWDiff stuff */
     switch(pVia->Chipset) {
-    case VIA_CLE266:
-        if (CLE266_REV_IS_AX(pVia->ChipRev)) {
+    case VT3122:
+        if (VT3122_REV_IS_AX(pVia->ChipRev)) {
             Swov->ThreeHQVBuffer = FALSE;
             Swov->HQVFetchByteUnit = TRUE;
             Swov->HQVDisablePatch = FALSE;
@@ -2156,17 +2156,17 @@ ViaSwovInit(ScrnInfoPtr pScrn)
             Swov->HQVDisablePatch = TRUE;
         }
         break;
-    case VIA_KM400:
+    case VT3205:
         Swov->ThreeHQVBuffer = TRUE;
         Swov->HQVFetchByteUnit = FALSE;
         Swov->HQVDisablePatch = TRUE;
         break;
-    case VIA_K8M800:
+    case VT3204:
         Swov->ThreeHQVBuffer = TRUE;
         Swov->HQVFetchByteUnit = FALSE;
         Swov->HQVDisablePatch = TRUE;
         break;
-    case VIA_PM800:
+    case VT3259:
         Swov->ThreeHQVBuffer = TRUE;
         Swov->HQVFetchByteUnit = FALSE;
         Swov->HQVDisablePatch = FALSE;