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authorRik Faith <faith@alephnull.com>2000-08-25 12:49:18 +0000
committerRik Faith <faith@alephnull.com>2000-08-25 12:49:18 +0000
commit37643234affb329775d3330eed650dee59d39bad (patch)
treea1008ff8d871f3e0d950c732b2f96c08d0ca46f1
parentac3c3571a714a38f7572f94c40fe143b43beb3b9 (diff)
Apply patch from Alan Hourihane to temporarily allow compilation on Alpha
(the driver has not been tested on Alpha -- this just makes it compile)
-rw-r--r--linux/mga_dma.c6
-rw-r--r--linux/mga_state.c10
-rw-r--r--linux/r128_dma.c8
3 files changed, 24 insertions, 0 deletions
diff --git a/linux/mga_dma.c b/linux/mga_dma.c
index 0df0906e5..9ca722966 100644
--- a/linux/mga_dma.c
+++ b/linux/mga_dma.c
@@ -82,6 +82,7 @@ static void mga_delay(void)
return;
}
+#ifdef __i386__
void mga_flush_write_combine(void)
{
int xchangeDummy;
@@ -92,6 +93,7 @@ void mga_flush_write_combine(void)
" movl $0,%%eax ; cpuid ; pop %%edx ; pop %%ecx ; pop %%ebx ;"
" pop %%eax" : /* no outputs */ : /* no inputs */ );
}
+#endif
/* These are two age tags that will never be sent to
* the hardware */
@@ -427,7 +429,9 @@ void mga_fire_primary(drm_device_t *dev, drm_mga_prim_buf_t *prim)
}
}
+#ifdef __i386__
mga_flush_write_combine();
+#endif
atomic_inc(&dev_priv->pending_bufs);
MGA_WRITE(MGAREG_PRIMADDRESS, phys_head | TT_GENERAL);
MGA_WRITE(MGAREG_PRIMEND, (phys_head + num_dwords * 4) | use_agp);
@@ -824,7 +828,9 @@ static int mga_dma_initialize(drm_device_t *dev, drm_mga_init_t *init) {
* the status register will be correct
*/
+#ifdef __i386__
mga_flush_write_combine();
+#endif
MGA_WRITE(MGAREG_PRIMADDRESS, phys_head | TT_GENERAL);
MGA_WRITE(MGAREG_PRIMEND, ((phys_head + num_dwords * 4) |
diff --git a/linux/mga_state.c b/linux/mga_state.c
index 2e808e8c0..5a9c76325 100644
--- a/linux/mga_state.c
+++ b/linux/mga_state.c
@@ -820,7 +820,9 @@ int mga_clear_bufs(struct inode *inode, struct file *filp,
mga_dma_dispatch_clear(dev, clear.flags,
clear.clear_color, clear.clear_depth);
PRIMUPDATE(dev_priv);
+#ifdef __i386__
mga_flush_write_combine();
+#endif
mga_dma_schedule(dev, 1);
return 0;
}
@@ -850,7 +852,9 @@ int mga_swap_bufs(struct inode *inode, struct file *filp,
PRIMUPDATE(dev_priv);
set_bit(MGA_BUF_SWAP_PENDING,
&dev_priv->current_prim->buffer_status);
+#ifdef __i386__
mga_flush_write_combine();
+#endif
mga_dma_schedule(dev, 1);
return 0;
}
@@ -898,7 +902,9 @@ int mga_iload(struct inode *inode, struct file *filp,
AGEBUF(dev_priv, buf_priv);
buf_priv->discard = 1;
mga_freelist_put(dev, buf);
+#ifdef __i386__
mga_flush_write_combine();
+#endif
mga_dma_schedule(dev, 1);
return 0;
}
@@ -946,7 +952,9 @@ int mga_vertex(struct inode *inode, struct file *filp,
mga_dma_dispatch_vertex(dev, buf);
PRIMUPDATE(dev_priv);
+#ifdef __i386__
mga_flush_write_combine();
+#endif
mga_dma_schedule(dev, 1);
return 0;
}
@@ -993,7 +1001,9 @@ int mga_indices(struct inode *inode, struct file *filp,
mga_dma_dispatch_indices(dev, buf, indices.start, indices.end);
PRIMUPDATE(dev_priv);
+#ifdef __i386__
mga_flush_write_combine();
+#endif
mga_dma_schedule(dev, 1);
return 0;
}
diff --git a/linux/r128_dma.c b/linux/r128_dma.c
index 16f79c1f6..d4b75bedc 100644
--- a/linux/r128_dma.c
+++ b/linux/r128_dma.c
@@ -68,6 +68,7 @@ int R128_READ_PLL(drm_device_t *dev, int addr)
return R128_READ(R128_CLOCK_CNTL_DATA);
}
+#ifdef __i386__
static void r128_flush_write_combine(void)
{
int xchangeDummy;
@@ -86,6 +87,7 @@ static void r128_flush_write_combine(void)
"pop %%ebx ;"
"pop %%eax" : /* no outputs */ : /* no inputs */ );
}
+#endif
static void r128_status(drm_device_t *dev)
{
@@ -496,8 +498,10 @@ static int r128_submit_packets_ring_secure(drm_device_t *dev,
dev_priv->ring_start,
write * sizeof(u32));
+#ifdef __i386__
/* Make sure WC cache has been flushed */
r128_flush_write_combine();
+#endif
dev_priv->sarea_priv->ring_write = write;
R128_WRITE(R128_PM4_BUFFER_DL_WPTR, write);
@@ -599,8 +603,10 @@ static int r128_submit_packets_ring(drm_device_t *dev,
dev_priv->ring_start,
write * sizeof(u32));
+#ifdef __i386__
/* Make sure WC cache has been flushed */
r128_flush_write_combine();
+#endif
dev_priv->sarea_priv->ring_write = write;
R128_WRITE(R128_PM4_BUFFER_DL_WPTR, write);
@@ -766,8 +772,10 @@ static int r128_send_vertbufs(drm_device_t *dev, drm_r128_vertex_t *v)
r128_mark_vertbufs_done(dev);
}
+#ifdef __i386__
/* Make sure WC cache has been flushed (if in PIO mode) */
if (!dev_priv->cce_is_bm_mode) r128_flush_write_combine();
+#endif
/* FIXME: Add support for sending vertex buffer to the CCE here
instead of in client code. The v->prim holds the primitive