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31 hoursdrm/i915: Fix PCH PLL assertions to not assume CRTC:PLL relationshipHEADmasterChris Wilson1-23/+33
31 hourspin-bugChris Wilson1-15/+0
31 hoursprefault-faultChris Wilson1-1/+13
31 hoursevictChris Wilson2-17/+1
31 hoursno-more-flush-ringChris Wilson2-99/+5
31 hourssimply-flush-invalidateChris Wilson1-20/+12
31 hourswrite-0-upon-inactiveChris Wilson1-1/+0
31 hoursno-more-gpu-write-listChris Wilson5-46/+3
31 hoursclear-gpu-write-domain-on-inactiveChris Wilson3-10/+3
31 hoursno-more-process-flushingChris Wilson1-27/+0
31 hoursno-more-flushing-listChris Wilson4-58/+2
31 hoursflush-all-upon-dispatchChris Wilson1-40/+10
31 hoursagp/intel: Insert a memory-barrier prior to updating PTEChris Wilson1-0/+7
31 hoursagp/intel: Insert a write barrier before flushing the chipsetChris Wilson1-0/+1
31 hourssched: add infrastructure for gpu waitsDaniel Vetter3-0/+39
31 hoursconst-fb-helper-funcsChris Wilson1-1/+1
31 hoursivbChris Wilson5-69/+79
31 hoursdrm/i915: Don't trace the frequency accessed registers for aux channel i2cChris Wilson1-20/+20
31 hoursseqnoChris Wilson5-36/+38
31 hourssimpler-wait?Chris Wilson1-30/+43
31 hoursben-fixChris Wilson1-7/+0
31 hoursdrm/i915: Always update RPS interrupts thresholds along with frequencyChris Wilson2-47/+47
31 hoursxp:non-blocking-set-to-gttChris Wilson1-6/+41
31 hoursdrm/i915: s/i915_wait_reqest/i915_wait_seqno/gBen Widawsky4-13/+13
31 hoursdrm/i915: wait render timeout ioctlBen Widawsky4-0/+66
31 hoursdrm/i915: extract some common olr+wedge codeBen Widawsky1-1/+1
31 hoursdrm/i915: timeout parameter for seqno waitBen Widawsky1-12/+46
31 hoursdrm/i915: remove some extra retiringBen Widawsky4-5/+0
31 hoursdrm/i915: Remove surplus initialisation of ring-listsChris Wilson1-10/+0
31 hoursdrm/i915: Disable IRQs for the duration of the resetChris Wilson1-9/+9
31 hoursdrm/i915: Finish pending tasks before doing a resetChris Wilson1-0/+2
31 hoursdrm/i915: Cancel outstanding modeset workers before suspendChris Wilson3-7/+15
31 hoursdrm/i915: Limit page allocations to lowmem (dma32) for i965Chris Wilson1-1/+9
31 hoursdrm/i915: Show pin count in debugfsChris Wilson1-0/+2
31 hoursfree-planesChris Wilson3-31/+42
31 hoursdrm/i915: check combination of VBT and register panel sequence timings for eDPChris Wilson1-7/+12
31 hoursdrm/i915/overlay: Fully configure overlay before turning onChris Wilson1-27/+20
31 hoursdrm/i915: Run deferred hotplug events upon restoring fbcon on lastclose()Chris Wilson1-2/+8
31 hoursdrm/i915: Always free unpin_workChris Wilson1-4/+1
31 hoursdrm/i915: Perform a chipset flush just once before executionChris Wilson3-16/+47
31 hoursdrm/i915: Force TLB invalidation for erratum on 830/845 BLTChris Wilson1-0/+7
31 hoursdrm: Reduce the number of retries whilst reading EDIDsChris Wilson1-7/+23
31 hoursclear-ringbufferChris Wilson1-0/+4
31 hoursdrm/i915: Introduce vmap (mapping of user pages into video memory) ioctlChris Wilson8-119/+404
31 hoursdrm/i915: Use a slab for object allocationChris Wilson4-7/+33
31 hoursdrm/i915: Segregate memory domains in the GTT using coloringChris Wilson4-15/+83
31 hoursdrm: Add colouring to the range allocatorChris Wilson14-88/+145
31 hoursdrm/i915: Track dirtying of CPU cache for LLCChris Wilson2-2/+6
31 hoursdrm/i915: Up/downclock LVDS on vblanksChris Wilson1-41/+56
31 hoursdrm/i915: Synchronize userspace palette LUT (i.e. gamma) changes to vblankChris Wilson1-15/+29
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