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authorJesse Barnes <jbarnes@virtuousgeek.org>2012-06-20 17:53:13 (GMT)
committer Daniel Vetter <daniel.vetter@ffwll.ch>2012-06-20 20:52:49 (GMT)
commitff049b6ce21d2814451afd4a116d001712e0116b (patch) (side-by-side diff)
treeb3354d7552126001e6cbaec2dea7079a38f2539a
parent7983117f0ba2cec585f1c643297de5ea15ed9920 (diff)
downloaddrm-intel-ff049b6ce21d2814451afd4a116d001712e0116b.zip
drm-intel-ff049b6ce21d2814451afd4a116d001712e0116b.tar.gz
drm/i915: bind driver to ValleyView chipsetsdrm-intel-next-2012-06-21
With the code in place, we can bind the driver, should make bisect possible. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (more/less context) (ignore whitespace changes)
-rw-r--r--drivers/gpu/drm/i915/i915_drv.c3
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index d1306c0..05adbf2 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -352,6 +352,9 @@ static const struct pci_device_id pciidlist[] = { /* aka */
INTEL_VGA_DEVICE(0x0406, &intel_haswell_m_info), /* GT1 mobile */
INTEL_VGA_DEVICE(0x0416, &intel_haswell_m_info), /* GT2 mobile */
INTEL_VGA_DEVICE(0x0c16, &intel_haswell_d_info), /* SDV */
+ INTEL_VGA_DEVICE(0x0f30, &intel_valleyview_m_info),
+ INTEL_VGA_DEVICE(0x0157, &intel_valleyview_m_info),
+ INTEL_VGA_DEVICE(0x0155, &intel_valleyview_d_info),
{0, 0, 0}
};