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2015-08-14i965/vec4: divide width and exec_size by 2 for 64-bit typesi965-fp64-v2Connor Abbott1-7/+31
2015-08-14i965: add brw_vecn_grf()Connor Abbott1-0/+6
2015-08-14i965/vec4/nir: translate d2f/f2dConnor Abbott1-0/+32
2015-08-14i965/vec4: generate d2f/f2d pseudo-instructionsConnor Abbott1-0/+25
2015-08-14i965/vec4: teach DCE about d2f/f2dConnor Abbott1-0/+2
2015-08-14i965/vec4: teach opt_reduce_swizzle about d2f/f2dConnor Abbott1-0/+6
2015-08-14i965/vec4: add double/float conversion pseudo-opcodesConnor Abbott2-0/+6
2015-08-14i965/vec4/nir: implement double packing/unpackingConnor Abbott1-0/+56
2015-08-14i965/vec4/nir: implement double comparisonsConnor Abbott1-2/+22
2015-08-14i965/vec4/nir: fix emitting 64-bit immediatesConnor Abbott1-4/+15
2015-08-14i965/vec4: don't constant propagate 64-bit immediatesConnor Abbott1-0/+7
2015-08-14i965/vec4: add support for printing DF immediatesConnor Abbott1-0/+3
2015-08-14i965/vec4: add a constructor for DF immediatesConnor Abbott2-0/+10
2015-08-14i965/vec4: teach DCE about 64-bit typesConnor Abbott1-0/+10
2015-08-14i965/vec4/nir: duplicate swizzles and writemasks for doublesConnor Abbott1-7/+25
2015-08-14i965/vec4: set the right type for 64-bit registersConnor Abbott1-0/+3
2015-08-14i965/vec4/nir: allocate two registers for dvec3/dvec4Connor Abbott1-3/+22
2015-08-14i965/vec4: handle doubles in type_size()Connor Abbott1-3/+6
2015-08-14i965: add new BRW_SWIZZLE definesConnor Abbott1-0/+4
2015-08-14i965: add pass for splitting dvec3/dvec4 ALU operationsConnor Abbott4-0/+366
2015-08-14i965/fs: fix dst width calculation in CSEConnor Abbott1-1/+1
2015-08-14i965/fs: fix regs_written in LOAD_PAYLOAD for doublesConnor Abbott1-2/+5
2015-08-14i965/fs: fix is_copy_payload() for doublesConnor Abbott1-2/+2
2015-08-14i965: fix brw_glsl_base_type_for_nir_type() for doublesConnor Abbott1-3/+6
2015-08-14i965: fix brw_type_for_nir_type() for doublesConnor Abbott1-4/+12
2015-08-14i965: use pack/unpackDouble loweringConnor Abbott1-0/+2
2015-08-14XXX i965/fs: fix uniform emission againConnor Abbott1-5/+4
2015-08-14i965/fs: fix load_uniform intrinsic for doublesConnor Abbott1-1/+1
2015-08-14i965/fs: fix assign_constant_locations() when regs_read() > 1Connor Abbott1-2/+2
2015-08-14i965/fs: fix regs_read() for uniformsConnor Abbott1-1/+1
2015-08-14nir/split_var_copies: handle doublesConnor Abbott1-0/+2
2015-08-14i965/fs: fix compares for doublesConnor Abbott1-3/+31
2015-08-14i965/fs: extend exec_size halving in the generatorConnor Abbott1-6/+10
2015-08-14XXX remove exec size hackConnor Abbott1-7/+0
2015-08-14nir/cse: handle 64-bit bit-sizesConnor Abbott1-4/+17
2015-08-14i965: use double lowering passConnor Abbott1-0/+4
2015-08-14i965/fs: add support for printing double immediatesConnor Abbott1-0/+3
2015-08-14i965: fix is_one() and is_negative_one() for doublesConnor Abbott1-6/+28
2015-08-14i965/fs: don't propagate 64-bit immediatesConnor Abbott1-0/+2
2015-08-14i965/eu: add support for DF immediatesConnor Abbott1-7/+21
2015-08-14i965: add support for disassembling DF immediatesConnor Abbott1-1/+1
2015-08-14i965: add support for getting/setting DF immediatesConnor Abbott1-0/+25
2015-08-14i965: fix 64-bit immediates in brw_inst(_set)_bitsConnor Abbott1-2/+4
2015-08-14i965/fs: add support for f2d and d2fConnor Abbott1-0/+19
2015-08-14i965/gen8: Add support for double precision constant operandsTopi Pohjolainen5-2/+33
2015-08-14i965/fs: use the NIR bit size when creating registersConnor Abbott1-6/+29
2015-08-14i965/disasm: fix disasm of 3-src doublesConnor Abbott1-0/+1
2015-08-14i965/eu: allow doubles in math instructionsConnor Abbott1-2/+4
2015-08-14i965/eu: fix 3-src workaround for doublesConnor Abbott1-0/+4
2015-08-14i965/eu: Allow 3-src float ops with doublesTopi Pohjolainen1-6/+14
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