diff options
| author | Vijay Purushothaman <vijay.a.purushothaman@intel.com> | 2014-02-07 20:43:12 +0530 |
|---|---|---|
| committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2014-02-07 19:58:25 +0100 |
| commit | 179f2668da116698fee66dd16c49c75d4b91a8a4 (patch) | |
| tree | af85a21c94e286f4f378370aed95bd2e3bb5ebd0 | |
| parent | b8a5ff8d7c676a04e0da5ec16bb068dd39459042 (diff) | |
drm/i915: Fix correct FIFO size for Baytrail
B-spec says the FIFO total size is 512. So fix this to 512.
Signed-off-by: Vijay Purushothaman <vijay.a.purushothaman@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
| -rw-r--r-- | drivers/gpu/drm/i915/i915_reg.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index cc3ea049269b..fb73031cdb65 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -3395,7 +3395,7 @@ #define I915_FIFO_LINE_SIZE 64 #define I830_FIFO_LINE_SIZE 32 -#define VALLEYVIEW_FIFO_SIZE 255 +#define VALLEYVIEW_FIFO_SIZE 511 #define G4X_FIFO_SIZE 127 #define I965_FIFO_SIZE 512 #define I945_FIFO_SIZE 127 |