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authorDavid Dawes <dawes@xfree86.org>2001-04-09 16:27:54 +0000
committerDavid Dawes <dawes@xfree86.org>2001-04-09 16:27:54 +0000
commitc176a0186e7007aa91cbfbd4f5e1ede383a02b65 (patch)
treeac69693805b94bef8674a383389254d4c5406f1d
parent54cdc36ba62c72cccd93d546fdfb97e9d6f60da4 (diff)
Import -f XFree86 4.0.99.2
-rw-r--r--bsd-core/Makefile5
-rw-r--r--bsd-core/drmP.h32
-rw-r--r--bsd-core/tdfx/Makefile15
-rw-r--r--bsd/Makefile5
-rw-r--r--bsd/Makefile.bsd5
-rw-r--r--bsd/drm/proc.c8
-rw-r--r--bsd/drm/sysctl.c56
-rw-r--r--bsd/drmP.h32
-rw-r--r--bsd/gamma/Makefile15
-rw-r--r--bsd/mga/mga_dma.c1077
-rw-r--r--bsd/mga/mga_drv.c714
-rw-r--r--bsd/mga/mga_drv.h496
-rw-r--r--bsd/mga/mga_state.c1109
-rw-r--r--bsd/tdfx/Makefile15
-rw-r--r--bsd/tdfx/tdfx_drv.c741
-rw-r--r--libdrm/xf86drm.c479
-rw-r--r--libdrm/xf86drmHash.c34
-rw-r--r--linux-core/Makefile.kernel4
-rw-r--r--linux-core/drmP.h606
-rw-r--r--linux-core/drm_auth.c162
-rw-r--r--linux-core/drm_context.c760
-rw-r--r--linux-core/drm_dma.c594
-rw-r--r--linux-core/drm_drv.c938
-rw-r--r--linux-core/drm_lock.c251
-rw-r--r--linux-core/drm_proc.c630
-rw-r--r--linux-core/drm_stub.c152
-rw-r--r--linux-core/i810_dma.c530
-rw-r--r--linux-core/i810_drm.h4
-rw-r--r--linux-core/i810_drv.c672
-rw-r--r--linux-core/i810_drv.h85
-rw-r--r--linux-core/mga_drv.c690
-rw-r--r--linux-core/r128_drv.c733
-rw-r--r--linux-core/radeon_drv.c731
-rw-r--r--linux-core/tdfx_drv.c689
-rw-r--r--linux/Makefile.kernel4
-rw-r--r--linux/Makefile.linux75
-rw-r--r--linux/compat-pre24.h1
-rw-r--r--linux/drm.h107
-rw-r--r--linux/drmP.h606
-rw-r--r--linux/drm_auth.h162
-rw-r--r--linux/drm_context.h760
-rw-r--r--linux/drm_dma.h594
-rw-r--r--linux/drm_drv.h938
-rw-r--r--linux/drm_lists.h227
-rw-r--r--linux/drm_lock.h251
-rw-r--r--linux/drm_proc.h630
-rw-r--r--linux/drm_stub.h152
-rw-r--r--linux/gamma.h93
-rw-r--r--linux/gamma_dma.c428
-rw-r--r--linux/gamma_drv.c576
-rw-r--r--linux/gamma_drv.h85
-rw-r--r--linux/i810.h112
-rw-r--r--linux/i810_dma.c530
-rw-r--r--linux/i810_drm.h4
-rw-r--r--linux/i810_drv.c672
-rw-r--r--linux/i810_drv.h85
-rw-r--r--linux/mga_dma.c1379
-rw-r--r--linux/mga_drm.h394
-rw-r--r--linux/mga_drv.c690
-rw-r--r--linux/mga_drv.h1011
-rw-r--r--linux/mga_state.c1544
-rw-r--r--linux/mga_warp.c215
-rw-r--r--linux/r128_cce.c198
-rw-r--r--linux/r128_drm.h12
-rw-r--r--linux/r128_drv.c733
-rw-r--r--linux/r128_drv.h164
-rw-r--r--linux/r128_state.c261
-rw-r--r--linux/radeon_cp.c181
-rw-r--r--linux/radeon_drm.h34
-rw-r--r--linux/radeon_drv.c731
-rw-r--r--linux/radeon_drv.h170
-rw-r--r--linux/radeon_state.c312
-rw-r--r--linux/tdfx_drv.c689
-rw-r--r--shared-core/drm.h107
-rw-r--r--shared/drm.h107
75 files changed, 16887 insertions, 12206 deletions
diff --git a/bsd-core/Makefile b/bsd-core/Makefile
new file mode 100644
index 00000000..61cba175
--- /dev/null
+++ b/bsd-core/Makefile
@@ -0,0 +1,5 @@
+# $FreeBSD$
+
+SUBDIR = drm tdfx mga gamma
+
+.include <bsd.subdir.mk>
diff --git a/bsd-core/drmP.h b/bsd-core/drmP.h
index b62aff08..7a1159c7 100644
--- a/bsd-core/drmP.h
+++ b/bsd-core/drmP.h
@@ -25,7 +25,7 @@
* DEALINGS IN THE SOFTWARE.
*
* $PI: xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/drmP.h,v 1.58 1999/08/30 13:05:00 faith Exp $
- * $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/drmP.h,v 1.1 2000/06/17 00:03:28 martin Exp $
+ * $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/drmP.h,v 1.3 2001/03/06 16:45:26 dawes Exp $
*
*/
@@ -49,11 +49,11 @@
#include <sys/sysctl.h>
#include <sys/select.h>
#include <sys/bus.h>
-#if __FreeBSD_version >= 500005
+#if __FreeBSD_version >= 400005
#include <sys/taskqueue.h>
#endif
-#if __FreeBSD_version >= 500006
+#if __FreeBSD_version >= 400006
#define DRM_AGP
#endif
@@ -73,6 +73,11 @@ typedef u_int32_t spinlock_t;
#define atomic_add(n, p) atomic_add_int(p, n)
#define atomic_sub(n, p) atomic_subtract_int(p, n)
+/* The version number here is a guess */
+#if __FreeBSD_version >= 500010
+#define callout_init(a) callout_init(a, 0)
+#endif
+
/* Fake this */
static __inline u_int32_t
test_and_set_bit(int b, volatile u_int32_t *p)
@@ -128,14 +133,14 @@ find_first_zero_bit(volatile u_int32_t *p, int max)
* Fake out the module macros for versions of FreeBSD where they don't
* exist.
*/
-#if __FreeBSD_version < 500002
+#if __FreeBSD_version < 400002
#define MODULE_VERSION(a,b) struct __hack
#define MODULE_DEPEND(a,b,c,d,e) struct __hack
#endif
-#define DRM_DEBUG_CODE 2 /* Include debugging code (if > 1, then
+#define DRM_DEBUG_CODE 0 /* Include debugging code (if > 1, then
also include looping detection. */
#define DRM_DMA_HISTOGRAM 1 /* Make histogram of DMA latency. */
@@ -340,6 +345,7 @@ typedef struct drm_freelist {
int low_mark; /* Low water mark */
int high_mark; /* High water mark */
atomic_t wfh; /* If waiting for high mark */
+ struct simplelock lock; /* hope this doesn't need to be linux compatible */
} drm_freelist_t;
typedef struct drm_buf_entry {
@@ -509,15 +515,15 @@ typedef struct drm_device {
/* Context support */
struct resource *irq; /* Interrupt used by board */
void *irqh; /* Handle from bus_setup_intr */
- __volatile__ int context_flag; /* Context swapping flag */
- __volatile__ int interrupt_flag;/* Interruption handler flag */
- __volatile__ int dma_flag; /* DMA dispatch flag */
+ __volatile__ long context_flag; /* Context swapping flag */
+ __volatile__ long interrupt_flag;/* Interruption handler flag */
+ __volatile__ long dma_flag; /* DMA dispatch flag */
struct callout timer; /* Timer for delaying ctx switch */
int context_wait; /* Processes waiting on ctx switch */
int last_checked; /* Last context checked for DMA */
int last_context; /* Last current context */
int last_switch; /* Time at last context switch */
-#if __FreeBSD_version >= 500005
+#if __FreeBSD_version >= 400005
struct task task;
#endif
struct timespec ctx_start;
@@ -594,7 +600,13 @@ extern int drm_sysctl_cleanup(drm_device_t *dev);
/* Memory management support (memory.c) */
extern void drm_mem_init(void);
-extern int drm_mem_info SYSCTL_HANDLER_ARGS;
+
+#if __FreeBSD_version < 411000
+#define DRM_SYSCTL_HANDLER_ARGS SYSCTL_HANDLER_ARGS
+#else
+#define DRM_SYSCTL_HANDLER_ARGS (SYSCTL_HANDLER_ARGS)
+#endif
+extern int drm_mem_info DRM_SYSCTL_HANDLER_ARGS;
extern void *drm_alloc(size_t size, int area);
extern void *drm_realloc(void *oldpt, size_t oldsize, size_t size,
int area);
diff --git a/bsd-core/tdfx/Makefile b/bsd-core/tdfx/Makefile
new file mode 100644
index 00000000..4362a5ba
--- /dev/null
+++ b/bsd-core/tdfx/Makefile
@@ -0,0 +1,15 @@
+# $FreeBSD$
+
+KMOD = tdfx
+SRCS = tdfx_drv.c tdfx_context.c
+SRCS += device_if.h bus_if.h pci_if.h
+CFLAGS += ${DEBUG_FLAGS} -I. -I..
+KMODDEPS = drm
+
+@:
+ ln -sf /sys @
+
+machine:
+ ln -sf /sys/i386/include machine
+
+.include <bsd.kmod.mk>
diff --git a/bsd/Makefile b/bsd/Makefile
new file mode 100644
index 00000000..61cba175
--- /dev/null
+++ b/bsd/Makefile
@@ -0,0 +1,5 @@
+# $FreeBSD$
+
+SUBDIR = drm tdfx mga gamma
+
+.include <bsd.subdir.mk>
diff --git a/bsd/Makefile.bsd b/bsd/Makefile.bsd
new file mode 100644
index 00000000..61cba175
--- /dev/null
+++ b/bsd/Makefile.bsd
@@ -0,0 +1,5 @@
+# $FreeBSD$
+
+SUBDIR = drm tdfx mga gamma
+
+.include <bsd.subdir.mk>
diff --git a/bsd/drm/proc.c b/bsd/drm/proc.c
index 3f6616ef..6ca3fabc 100644
--- a/bsd/drm/proc.c
+++ b/bsd/drm/proc.c
@@ -25,7 +25,7 @@
* DEALINGS IN THE SOFTWARE.
*
* $PI: xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/proc.c,v 1.4 1999/08/20 15:36:46 faith Exp $
- * $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/drm/proc.c,v 1.1 2000/06/17 00:03:30 martin Exp $
+ * $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/drm/proc.c,v 1.2 2001/03/02 02:45:38 dawes Exp $
*
*/
@@ -165,7 +165,7 @@ static int _drm_vm_info(char *buf, char **start, off_t offset, int len,
{
drm_device_t *dev = (drm_device_t *)data;
drm_map_t *map;
- const char *types[] = { "FB", "REG", "SHM" };
+ const char *types[] = { "FB", "REG", "SHM", "AGP" };
const char *type;
int i;
@@ -176,7 +176,7 @@ static int _drm_vm_info(char *buf, char **start, off_t offset, int len,
"address mtrr\n\n");
for (i = 0; i < dev->map_count; i++) {
map = dev->maplist[i];
- if (map->type < 0 || map->type > 2) type = "??";
+ if (map->type < 0 || map->type > 3) type = "??";
else type = types[map->type];
DRM_PROC_PRINT("%4d 0x%08lx 0x%08lx %4.4s 0x%02x 0x%08lx ",
i,
@@ -226,7 +226,7 @@ static int _drm_queues_info(char *buf, char **start, off_t offset, int len,
atomic_inc(&q->use_count);
DRM_PROC_PRINT_RET(atomic_dec(&q->use_count),
"%5d/0x%03x %5d %5d"
- " %5d/%c%c/%c%c%c %5d %10d %10d %10d\n",
+ " %5d/%c%c/%c%c%c %5Zd %10d %10d %10d\n",
i,
q->flags,
atomic_read(&q->use_count),
diff --git a/bsd/drm/sysctl.c b/bsd/drm/sysctl.c
index a890abac..0bc04d22 100644
--- a/bsd/drm/sysctl.c
+++ b/bsd/drm/sysctl.c
@@ -25,7 +25,7 @@
* DEALINGS IN THE SOFTWARE.
*
* $PI$
- * $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/drm/sysctl.c,v 1.1 2000/06/17 00:03:31 martin Exp $
+ * $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/drm/sysctl.c,v 1.2 2001/03/02 02:45:38 dawes Exp $
*
*/
@@ -35,21 +35,21 @@
SYSCTL_NODE(_hw, OID_AUTO, dri, CTLFLAG_RW, 0, "DRI Graphics");
-static int drm_name_info SYSCTL_HANDLER_ARGS;
-static int drm_vm_info SYSCTL_HANDLER_ARGS;
-static int drm_clients_info SYSCTL_HANDLER_ARGS;
-static int drm_queues_info SYSCTL_HANDLER_ARGS;
-static int drm_bufs_info SYSCTL_HANDLER_ARGS;
+static int drm_name_info DRM_SYSCTL_HANDLER_ARGS;
+static int drm_vm_info DRM_SYSCTL_HANDLER_ARGS;
+static int drm_clients_info DRM_SYSCTL_HANDLER_ARGS;
+static int drm_queues_info DRM_SYSCTL_HANDLER_ARGS;
+static int drm_bufs_info DRM_SYSCTL_HANDLER_ARGS;
#if DRM_DEBUG_CODExx
-static int drm_vma_info SYSCTL_HANDLER_ARGS;
+static int drm_vma_info DRM_SYSCTL_HANDLER_ARGS;
#endif
#if DRM_DMA_HISTOGRAM
-static int drm_histo_info SYSCTL_HANDLER_ARGS;
+static int drm_histo_info DRM_SYSCTL_HANDLER_ARGS;
#endif
struct drm_sysctl_list {
const char *name;
- int (*f) SYSCTL_HANDLER_ARGS;
+ int (*f) DRM_SYSCTL_HANDLER_ARGS;
} drm_sysctl_list[] = {
{ "name", drm_name_info },
{ "mem", drm_mem_info },
@@ -137,7 +137,7 @@ int drm_sysctl_cleanup(drm_device_t *dev)
return 0;
}
-static int drm_name_info SYSCTL_HANDLER_ARGS
+static int drm_name_info DRM_SYSCTL_HANDLER_ARGS
{
drm_device_t *dev = arg1;
char buf[128];
@@ -155,11 +155,11 @@ static int drm_name_info SYSCTL_HANDLER_ARGS
return 0;
}
-static int _drm_vm_info SYSCTL_HANDLER_ARGS
+static int _drm_vm_info DRM_SYSCTL_HANDLER_ARGS
{
drm_device_t *dev = arg1;
drm_map_t *map;
- const char *types[] = { "FB", "REG", "SHM" };
+ const char *types[] = { "FB", "REG", "SHM", "AGP" };
const char *type;
int i;
char buf[128];
@@ -172,7 +172,7 @@ static int _drm_vm_info SYSCTL_HANDLER_ARGS
for (i = 0; i < dev->map_count; i++) {
map = dev->maplist[i];
- if (map->type < 0 || map->type > 2) type = "??";
+ if (map->type < 0 || map->type > 3) type = "??";
else type = types[map->type];
DRM_SYSCTL_PRINT("%4d 0x%08lx 0x%08lx %4.4s 0x%02x 0x%08lx ",
i,
@@ -192,7 +192,7 @@ static int _drm_vm_info SYSCTL_HANDLER_ARGS
return 0;
}
-static int drm_vm_info SYSCTL_HANDLER_ARGS
+static int drm_vm_info DRM_SYSCTL_HANDLER_ARGS
{
drm_device_t *dev = arg1;
int ret;
@@ -205,7 +205,7 @@ static int drm_vm_info SYSCTL_HANDLER_ARGS
}
-static int _drm_queues_info SYSCTL_HANDLER_ARGS
+static int _drm_queues_info DRM_SYSCTL_HANDLER_ARGS
{
drm_device_t *dev = arg1;
int i;
@@ -221,7 +221,7 @@ static int _drm_queues_info SYSCTL_HANDLER_ARGS
atomic_inc(&q->use_count);
DRM_SYSCTL_PRINT_RET(atomic_dec(&q->use_count),
"%5d/0x%03x %5d %5d"
- " %5d/%c%c/%c%c%c %5d %10d %10d %10d\n",
+ " %5d/%c%c/%c%c%c %5Zd %10d %10d %10d\n",
i,
q->flags,
atomic_read(&q->use_count),
@@ -243,7 +243,7 @@ static int _drm_queues_info SYSCTL_HANDLER_ARGS
return 0;
}
-static int drm_queues_info SYSCTL_HANDLER_ARGS
+static int drm_queues_info DRM_SYSCTL_HANDLER_ARGS
{
drm_device_t *dev = arg1;
int ret;
@@ -257,7 +257,7 @@ static int drm_queues_info SYSCTL_HANDLER_ARGS
/* drm_bufs_info is called whenever a process reads
hw.dri.0.bufs. */
-static int _drm_bufs_info SYSCTL_HANDLER_ARGS
+static int _drm_bufs_info DRM_SYSCTL_HANDLER_ARGS
{
drm_device_t *dev = arg1;
drm_device_dma_t *dma = dev->dma;
@@ -293,7 +293,7 @@ static int _drm_bufs_info SYSCTL_HANDLER_ARGS
return 0;
}
-static int drm_bufs_info SYSCTL_HANDLER_ARGS
+static int drm_bufs_info DRM_SYSCTL_HANDLER_ARGS
{
drm_device_t *dev = arg1;
int ret;
@@ -305,7 +305,7 @@ static int drm_bufs_info SYSCTL_HANDLER_ARGS
}
-static int _drm_clients_info SYSCTL_HANDLER_ARGS
+static int _drm_clients_info DRM_SYSCTL_HANDLER_ARGS
{
drm_device_t *dev = arg1;
drm_file_t *priv;
@@ -327,7 +327,7 @@ static int _drm_clients_info SYSCTL_HANDLER_ARGS
return 0;
}
-static int drm_clients_info SYSCTL_HANDLER_ARGS
+static int drm_clients_info DRM_SYSCTL_HANDLER_ARGS
{
drm_device_t *dev = arg1;
int ret;
@@ -340,7 +340,7 @@ static int drm_clients_info SYSCTL_HANDLER_ARGS
#if DRM_DEBUG_CODExx
-static int _drm_vma_info SYSCTL_HANDLER_ARGS
+static int _drm_vma_info DRM_SYSCTL_HANDLER_ARGS
{
drm_device_t *dev = arg1;
drm_vma_entry_t *pt;
@@ -412,7 +412,7 @@ static int _drm_vma_info SYSCTL_HANDLER_ARGS
return 0;
}
-static int drm_vma_info SYSCTL_HANDLER_ARGS
+static int drm_vma_info DRM_SYSCTL_HANDLER_ARGS
{
drm_device_t *dev = arg1;
int ret;
@@ -426,7 +426,7 @@ static int drm_vma_info SYSCTL_HANDLER_ARGS
#if DRM_DMA_HISTOGRAM
-static int _drm_histo_info SYSCTL_HANDLER_ARGS
+static int _drm_histo_info DRM_SYSCTL_HANDLER_ARGS
{
drm_device_t *dev = arg1;
drm_device_dma_t *dma = dev->dma;
@@ -498,9 +498,9 @@ static int _drm_histo_info SYSCTL_HANDLER_ARGS
} else {
DRM_SYSCTL_PRINT("lock none\n");
}
- DRM_SYSCTL_PRINT("context_flag 0x%08x\n", dev->context_flag);
- DRM_SYSCTL_PRINT("interrupt_flag 0x%08x\n", dev->interrupt_flag);
- DRM_SYSCTL_PRINT("dma_flag 0x%08x\n", dev->dma_flag);
+ DRM_SYSCTL_PRINT("context_flag 0x%08lx\n", dev->context_flag);
+ DRM_SYSCTL_PRINT("interrupt_flag 0x%08lx\n", dev->interrupt_flag);
+ DRM_SYSCTL_PRINT("dma_flag 0x%08lx\n", dev->dma_flag);
DRM_SYSCTL_PRINT("queue_count %10d\n", dev->queue_count);
DRM_SYSCTL_PRINT("last_context %10d\n", dev->last_context);
@@ -541,7 +541,7 @@ static int _drm_histo_info SYSCTL_HANDLER_ARGS
return 0;
}
-static int drm_histo_info SYSCTL_HANDLER_ARGS
+static int drm_histo_info DRM_SYSCTL_HANDLER_ARGS
{
drm_device_t *dev = arg1;
int ret;
diff --git a/bsd/drmP.h b/bsd/drmP.h
index b62aff08..7a1159c7 100644
--- a/bsd/drmP.h
+++ b/bsd/drmP.h
@@ -25,7 +25,7 @@
* DEALINGS IN THE SOFTWARE.
*
* $PI: xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/drmP.h,v 1.58 1999/08/30 13:05:00 faith Exp $
- * $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/drmP.h,v 1.1 2000/06/17 00:03:28 martin Exp $
+ * $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/drmP.h,v 1.3 2001/03/06 16:45:26 dawes Exp $
*
*/
@@ -49,11 +49,11 @@
#include <sys/sysctl.h>
#include <sys/select.h>
#include <sys/bus.h>
-#if __FreeBSD_version >= 500005
+#if __FreeBSD_version >= 400005
#include <sys/taskqueue.h>
#endif
-#if __FreeBSD_version >= 500006
+#if __FreeBSD_version >= 400006
#define DRM_AGP
#endif
@@ -73,6 +73,11 @@ typedef u_int32_t spinlock_t;
#define atomic_add(n, p) atomic_add_int(p, n)
#define atomic_sub(n, p) atomic_subtract_int(p, n)
+/* The version number here is a guess */
+#if __FreeBSD_version >= 500010
+#define callout_init(a) callout_init(a, 0)
+#endif
+
/* Fake this */
static __inline u_int32_t
test_and_set_bit(int b, volatile u_int32_t *p)
@@ -128,14 +133,14 @@ find_first_zero_bit(volatile u_int32_t *p, int max)
* Fake out the module macros for versions of FreeBSD where they don't
* exist.
*/
-#if __FreeBSD_version < 500002
+#if __FreeBSD_version < 400002
#define MODULE_VERSION(a,b) struct __hack
#define MODULE_DEPEND(a,b,c,d,e) struct __hack
#endif
-#define DRM_DEBUG_CODE 2 /* Include debugging code (if > 1, then
+#define DRM_DEBUG_CODE 0 /* Include debugging code (if > 1, then
also include looping detection. */
#define DRM_DMA_HISTOGRAM 1 /* Make histogram of DMA latency. */
@@ -340,6 +345,7 @@ typedef struct drm_freelist {
int low_mark; /* Low water mark */
int high_mark; /* High water mark */
atomic_t wfh; /* If waiting for high mark */
+ struct simplelock lock; /* hope this doesn't need to be linux compatible */
} drm_freelist_t;
typedef struct drm_buf_entry {
@@ -509,15 +515,15 @@ typedef struct drm_device {
/* Context support */
struct resource *irq; /* Interrupt used by board */
void *irqh; /* Handle from bus_setup_intr */
- __volatile__ int context_flag; /* Context swapping flag */
- __volatile__ int interrupt_flag;/* Interruption handler flag */
- __volatile__ int dma_flag; /* DMA dispatch flag */
+ __volatile__ long context_flag; /* Context swapping flag */
+ __volatile__ long interrupt_flag;/* Interruption handler flag */
+ __volatile__ long dma_flag; /* DMA dispatch flag */
struct callout timer; /* Timer for delaying ctx switch */
int context_wait; /* Processes waiting on ctx switch */
int last_checked; /* Last context checked for DMA */
int last_context; /* Last current context */
int last_switch; /* Time at last context switch */
-#if __FreeBSD_version >= 500005
+#if __FreeBSD_version >= 400005
struct task task;
#endif
struct timespec ctx_start;
@@ -594,7 +600,13 @@ extern int drm_sysctl_cleanup(drm_device_t *dev);
/* Memory management support (memory.c) */
extern void drm_mem_init(void);
-extern int drm_mem_info SYSCTL_HANDLER_ARGS;
+
+#if __FreeBSD_version < 411000
+#define DRM_SYSCTL_HANDLER_ARGS SYSCTL_HANDLER_ARGS
+#else
+#define DRM_SYSCTL_HANDLER_ARGS (SYSCTL_HANDLER_ARGS)
+#endif
+extern int drm_mem_info DRM_SYSCTL_HANDLER_ARGS;
extern void *drm_alloc(size_t size, int area);
extern void *drm_realloc(void *oldpt, size_t oldsize, size_t size,
int area);
diff --git a/bsd/gamma/Makefile b/bsd/gamma/Makefile
new file mode 100644
index 00000000..37f3f5e7
--- /dev/null
+++ b/bsd/gamma/Makefile
@@ -0,0 +1,15 @@
+# $FreeBSD$
+
+KMOD = gamma
+SRCS = gamma_drv.c gamma_dma.c
+SRCS += device_if.h bus_if.h pci_if.h
+CFLAGS += ${DEBUG_FLAGS} -I. -I..
+KMODDEPS = drm
+
+@:
+ ln -sf /sys @
+
+machine:
+ ln -sf /sys/i386/include machine
+
+.include <bsd.kmod.mk>
diff --git a/bsd/mga/mga_dma.c b/bsd/mga/mga_dma.c
new file mode 100644
index 00000000..85c29df7
--- /dev/null
+++ b/bsd/mga/mga_dma.c
@@ -0,0 +1,1077 @@
+/* mga_dma.c -- DMA support for mga g200/g400
+ * Created: Mon Dec 13 01:50:01 1999 by jhartmann@precisioninsight.com
+ *
+ * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
+ * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ *
+ * Authors: Rickard E. (Rik) Faith <faith@valinux.com>
+ * Jeff Hartmann <jhartmann@valinux.com>
+ * Keith Whitwell <keithw@valinux.com>
+ *
+ */
+
+#define __NO_VERSION__
+#include "drmP.h"
+#include "mga_drv.h"
+
+#include <machine/bus.h>
+#include <machine/resource.h>
+#include <sys/rman.h>
+#include <vm/vm.h>
+#include <vm/pmap.h>
+
+#define MGA_REG(reg) 2
+#define MGA_BASE(reg) ((unsigned long) \
+ ((drm_device_t *)dev)->maplist[MGA_REG(reg)]->handle)
+#define MGA_ADDR(reg) (MGA_BASE(reg) + reg)
+#define MGA_DEREF(reg) *(__volatile__ int *)MGA_ADDR(reg)
+#define MGA_READ(reg) MGA_DEREF(reg)
+#define MGA_WRITE(reg,val) do { MGA_DEREF(reg) = val; } while (0)
+
+#define PDEA_pagpxfer_enable 0x2
+
+static int mga_flush_queue(drm_device_t *dev);
+
+static unsigned long mga_alloc_page(drm_device_t *dev)
+{
+ unsigned long address;
+
+ DRM_DEBUG("%s\n", __FUNCTION__);
+
+ address = (unsigned long) drm_alloc(PAGE_SIZE, DRM_MEM_DMA);
+ if(address == 0UL) {
+ return 0;
+ }
+
+ return address;
+}
+
+static void mga_free_page(drm_device_t *dev, unsigned long page)
+{
+ DRM_DEBUG("%s\n", __FUNCTION__);
+
+ if(page == 0UL) {
+ return;
+ }
+ drm_free((void *) page, PAGE_SIZE, DRM_MEM_DMA);
+ return;
+}
+
+static void mga_delay(void)
+{
+ return;
+}
+
+void mga_flush_write_combine(void)
+{
+ int xchangeDummy;
+ DRM_DEBUG("%s\n", __FUNCTION__);
+
+ __asm__ volatile(" push %%eax ; xchg %%eax, %0 ; pop %%eax" : : "m" (xchangeDummy));
+ __asm__ volatile(" push %%eax ; push %%ebx ; push %%ecx ; push %%edx ;"
+ " movl $0,%%eax ; cpuid ; pop %%edx ; pop %%ecx ; pop %%ebx ;"
+ " pop %%eax" : /* no outputs */ : /* no inputs */ );
+}
+
+/* These are two age tags that will never be sent to
+ * the hardware */
+#define MGA_BUF_USED 0xffffffff
+#define MGA_BUF_FREE 0
+
+static int mga_freelist_init(drm_device_t *dev)
+{
+ drm_device_dma_t *dma = dev->dma;
+ drm_buf_t *buf;
+ drm_mga_buf_priv_t *buf_priv;
+ drm_mga_private_t *dev_priv = (drm_mga_private_t *)dev->dev_private;
+ drm_mga_freelist_t *item;
+ int i;
+
+ DRM_DEBUG("%s\n", __FUNCTION__);
+
+ dev_priv->head = drm_alloc(sizeof(drm_mga_freelist_t), DRM_MEM_DRIVER);
+ if(dev_priv->head == NULL) return ENOMEM;
+ memset(dev_priv->head, 0, sizeof(drm_mga_freelist_t));
+ dev_priv->head->age = MGA_BUF_USED;
+
+ for (i = 0; i < dma->buf_count; i++) {
+ buf = dma->buflist[ i ];
+ buf_priv = buf->dev_private;
+ item = drm_alloc(sizeof(drm_mga_freelist_t),
+ DRM_MEM_DRIVER);
+ if(item == NULL) return ENOMEM;
+ memset(item, 0, sizeof(drm_mga_freelist_t));
+ item->age = MGA_BUF_FREE;
+ item->prev = dev_priv->head;
+ item->next = dev_priv->head->next;
+ if(dev_priv->head->next != NULL)
+ dev_priv->head->next->prev = item;
+ if(item->next == NULL) dev_priv->tail = item;
+ item->buf = buf;
+ buf_priv->my_freelist = item;
+ buf_priv->discard = 0;
+ dev_priv->head->next = item;
+ }
+
+ return 0;
+}
+
+static void mga_freelist_cleanup(drm_device_t *dev)
+{
+ drm_mga_private_t *dev_priv = (drm_mga_private_t *)dev->dev_private;
+ drm_mga_freelist_t *item;
+ drm_mga_freelist_t *prev;
+
+ DRM_DEBUG("%s\n", __FUNCTION__);
+
+ item = dev_priv->head;
+ while(item) {
+ prev = item;
+ item = item->next;
+ drm_free(prev, sizeof(drm_mga_freelist_t), DRM_MEM_DRIVER);
+ }
+
+ dev_priv->head = dev_priv->tail = NULL;
+}
+
+/* Frees dispatch lock */
+static __inline void mga_dma_quiescent(drm_device_t *dev)
+{
+ drm_device_dma_t *dma = dev->dma;
+ drm_mga_private_t *dev_priv = (drm_mga_private_t *)dev->dev_private;
+ drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
+ unsigned long end;
+ int i;
+
+ DRM_DEBUG("%s\n", __FUNCTION__);
+ end = ticks + (hz*3);
+ while(1) {
+ if(!test_and_set_bit(MGA_IN_DISPATCH,
+ &dev_priv->dispatch_status)) {
+ break;
+ }
+ if((signed)(end - ticks) <= 0) {
+ DRM_ERROR("irqs: %d wanted %d\n",
+ atomic_read(&dev->total_irq),
+ atomic_read(&dma->total_lost));
+ DRM_ERROR("lockup\n");
+ return;
+ }
+ for (i = 0 ; i < 2000 ; i++) mga_delay();
+ }
+ end = ticks + (hz*3);
+ DRM_DEBUG("quiescent status : %x\n", MGA_READ(MGAREG_STATUS));
+ while((MGA_READ(MGAREG_STATUS) & 0x00030001) != 0x00020000) {
+ if((signed)(end - ticks) <= 0) {
+ DRM_ERROR("irqs: %d wanted %d\n",
+ atomic_read(&dev->total_irq),
+ atomic_read(&dma->total_lost));
+ DRM_ERROR("lockup\n");
+ clear_bit(MGA_IN_DISPATCH, &dev_priv->dispatch_status);
+ return;
+ }
+ for (i = 0 ; i < 2000 ; i++) mga_delay();
+ }
+ sarea_priv->dirty |= MGA_DMA_FLUSH;
+
+ clear_bit(MGA_IN_DISPATCH, &dev_priv->dispatch_status);
+ DRM_DEBUG("exit, dispatch_status = 0x%02x\n",dev_priv->dispatch_status);
+}
+
+static void mga_reset_freelist(drm_device_t *dev)
+{
+ drm_device_dma_t *dma = dev->dma;
+ drm_buf_t *buf;
+ drm_mga_buf_priv_t *buf_priv;
+ int i;
+
+ for (i = 0; i < dma->buf_count; i++) {
+ buf = dma->buflist[ i ];
+ buf_priv = buf->dev_private;
+ buf_priv->my_freelist->age = MGA_BUF_FREE;
+ }
+}
+
+/* Least recently used :
+ * These operations are not atomic b/c they are protected by the
+ * hardware lock */
+
+drm_buf_t *mga_freelist_get(drm_device_t *dev)
+{
+ drm_mga_private_t *dev_priv =
+ (drm_mga_private_t *) dev->dev_private;
+ drm_mga_freelist_t *prev;
+ drm_mga_freelist_t *next;
+ static int failed = 0;
+ int ret, s;
+
+ DRM_DEBUG("%s : tail->age : %d last_prim_age : %d\n", __FUNCTION__,
+ dev_priv->tail->age, dev_priv->last_prim_age);
+
+ if(failed >= 1000 && dev_priv->tail->age >= dev_priv->last_prim_age) {
+ DRM_DEBUG("I'm waiting on the freelist!!! %d\n",
+ dev_priv->last_prim_age);
+ s = splsofttq();
+ set_bit(MGA_IN_GETBUF, &dev_priv->dispatch_status);
+ for (;;) {
+ mga_dma_schedule(dev, 0);
+/* if(!test_bit(MGA_IN_GETBUF,
+ &dev_priv->dispatch_status)) */
+ if(dev_priv->tail->age < dev_priv->last_prim_age)
+ break;
+ atomic_inc(&dev->total_sleeps);
+ ret = tsleep(&dev_priv->buf_queue, PZERO|PCATCH,
+ "mgafg", 0);
+ if (ret == EINTR) {
+ clear_bit(MGA_IN_GETBUF,
+ &dev_priv->dispatch_status);
+ break;
+ }
+ }
+ splx(s);
+ clear_bit(MGA_IN_GETBUF, &dev_priv->dispatch_status);
+ if (ret) return NULL;
+ }
+
+ if(dev_priv->tail->age < dev_priv->last_prim_age) {
+ prev = dev_priv->tail->prev;
+ next = dev_priv->tail;
+ prev->next = NULL;
+ next->prev = next->next = NULL;
+ dev_priv->tail = prev;
+ next->age = MGA_BUF_USED;
+ failed = 0;
+ return next->buf;
+ }
+
+ failed++;
+ return NULL;
+}
+
+int mga_freelist_put(drm_device_t *dev, drm_buf_t *buf)
+{
+ drm_mga_private_t *dev_priv =
+ (drm_mga_private_t *) dev->dev_private;
+ drm_mga_buf_priv_t *buf_priv = buf->dev_private;
+ drm_mga_freelist_t *prev;
+ drm_mga_freelist_t *head;
+ drm_mga_freelist_t *next;
+
+ DRM_DEBUG("%s\n", __FUNCTION__);
+
+ if(buf_priv->my_freelist->age == MGA_BUF_USED) {
+ /* Discarded buffer, put it on the tail */
+ next = buf_priv->my_freelist;
+ next->age = MGA_BUF_FREE;
+ prev = dev_priv->tail;
+ prev->next = next;
+ next->prev = prev;
+ next->next = NULL;
+ dev_priv->tail = next;
+ DRM_DEBUG("Discarded\n");
+ } else {
+ /* Normally aged buffer, put it on the head + 1,
+ * as the real head is a sentinal element
+ */
+ next = buf_priv->my_freelist;
+ head = dev_priv->head;
+ prev = head->next;
+ head->next = next;
+ prev->prev = next;
+ next->prev = head;
+ next->next = prev;
+ }
+
+ return 0;
+}
+
+static int mga_init_primary_bufs(drm_device_t *dev, drm_mga_init_t *init)
+{
+ drm_mga_private_t *dev_priv = dev->dev_private;
+ drm_mga_prim_buf_t *prim_buffer;
+ int i, temp, size_of_buf;
+ int offset = init->reserved_map_agpstart;
+
+ DRM_DEBUG("%s\n", __FUNCTION__);
+ dev_priv->primary_size = ((init->primary_size + PAGE_SIZE - 1) /
+ PAGE_SIZE) * PAGE_SIZE;
+ size_of_buf = dev_priv->primary_size / MGA_NUM_PRIM_BUFS;
+ dev_priv->warp_ucode_size = init->warp_ucode_size;
+ dev_priv->prim_bufs = drm_alloc(sizeof(drm_mga_prim_buf_t *) *
+ (MGA_NUM_PRIM_BUFS + 1),
+ DRM_MEM_DRIVER);
+ if(dev_priv->prim_bufs == NULL) {
+ DRM_ERROR("Unable to allocate memory for prim_buf\n");
+ return ENOMEM;
+ }
+ memset(dev_priv->prim_bufs,
+ 0, sizeof(drm_mga_prim_buf_t *) * (MGA_NUM_PRIM_BUFS + 1));
+
+ temp = init->warp_ucode_size + dev_priv->primary_size;
+ temp = ((temp + PAGE_SIZE - 1) / PAGE_SIZE) * PAGE_SIZE;
+
+ dev_priv->ioremap = drm_ioremap(dev->agp->base + offset,
+ temp);
+ if(dev_priv->ioremap == NULL) {
+ DRM_DEBUG("Ioremap failed\n");
+ return ENOMEM;
+ }
+ dev_priv->wait_queue = 0;
+
+ for(i = 0; i < MGA_NUM_PRIM_BUFS; i++) {
+ prim_buffer = drm_alloc(sizeof(drm_mga_prim_buf_t),
+ DRM_MEM_DRIVER);
+ if(prim_buffer == NULL) return ENOMEM;
+ memset(prim_buffer, 0, sizeof(drm_mga_prim_buf_t));
+ prim_buffer->phys_head = offset + dev->agp->base;
+ prim_buffer->current_dma_ptr =
+ prim_buffer->head =
+ (u_int32_t *) (dev_priv->ioremap +
+ offset -
+ init->reserved_map_agpstart);
+ prim_buffer->num_dwords = 0;
+ prim_buffer->max_dwords = size_of_buf / sizeof(u_int32_t);
+ prim_buffer->max_dwords -= 5; /* Leave room for the softrap */
+ prim_buffer->sec_used = 0;
+ prim_buffer->idx = i;
+ prim_buffer->prim_age = i + 1;
+ offset = offset + size_of_buf;
+ dev_priv->prim_bufs[i] = prim_buffer;
+ }
+ dev_priv->current_prim_idx = 0;
+ dev_priv->next_prim =
+ dev_priv->last_prim =
+ dev_priv->current_prim =
+ dev_priv->prim_bufs[0];
+ dev_priv->next_prim_age = 2;
+ dev_priv->last_prim_age = 1;
+ set_bit(MGA_BUF_IN_USE, &dev_priv->current_prim->buffer_status);
+ return 0;
+}
+
+static void mga_fire_primary(drm_device_t *dev, drm_mga_prim_buf_t *prim)
+{
+ drm_mga_private_t *dev_priv = dev->dev_private;
+ drm_device_dma_t *dma = dev->dma;
+ drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
+ int use_agp = PDEA_pagpxfer_enable;
+ unsigned long end;
+ int i;
+ int next_idx;
+ PRIMLOCALS;
+
+ DRM_DEBUG("%s\n", __FUNCTION__);
+ dev_priv->last_prim = prim;
+
+ /* We never check for overflow, b/c there is always room */
+ PRIMPTR(prim);
+ if(num_dwords <= 0) {
+ DRM_DEBUG("num_dwords == 0 when dispatched\n");
+ goto out_prim_wait;
+ }
+ PRIMOUTREG( MGAREG_DMAPAD, 0);
+ PRIMOUTREG( MGAREG_DMAPAD, 0);
+ PRIMOUTREG( MGAREG_DMAPAD, 0);
+ PRIMOUTREG( MGAREG_SOFTRAP, 0);
+ PRIMFINISH(prim);
+
+ end = ticks + (hz*3);
+ if(sarea_priv->dirty & MGA_DMA_FLUSH) {
+ DRM_DEBUG("Dma top flush\n");
+ while((MGA_READ(MGAREG_STATUS) & 0x00030001) != 0x00020000) {
+ if((signed)(end - ticks) <= 0) {
+ DRM_ERROR("irqs: %d wanted %d\n",
+ atomic_read(&dev->total_irq),
+ atomic_read(&dma->total_lost));
+ DRM_ERROR("lockup in fire primary "
+ "(Dma Top Flush)\n");
+ goto out_prim_wait;
+ }
+
+ for (i = 0 ; i < 4096 ; i++) mga_delay();
+ }
+ sarea_priv->dirty &= ~(MGA_DMA_FLUSH);
+ } else {
+ DRM_DEBUG("Status wait\n");
+ while((MGA_READ(MGAREG_STATUS) & 0x00020001) != 0x00020000) {
+ if((signed)(end - ticks) <= 0) {
+ DRM_ERROR("irqs: %d wanted %d\n",
+ atomic_read(&dev->total_irq),
+ atomic_read(&dma->total_lost));
+ DRM_ERROR("lockup in fire primary "
+ "(Status Wait)\n");
+ goto out_prim_wait;
+ }
+
+ for (i = 0 ; i < 4096 ; i++) mga_delay();
+ }
+ }
+
+ mga_flush_write_combine();
+ atomic_inc(&dev_priv->pending_bufs);
+ MGA_WRITE(MGAREG_PRIMADDRESS, phys_head | TT_GENERAL);
+ MGA_WRITE(MGAREG_PRIMEND, (phys_head + num_dwords * 4) | use_agp);
+ prim->num_dwords = 0;
+ sarea_priv->last_enqueue = prim->prim_age;
+
+ next_idx = prim->idx + 1;
+ if(next_idx >= MGA_NUM_PRIM_BUFS)
+ next_idx = 0;
+
+ dev_priv->next_prim = dev_priv->prim_bufs[next_idx];
+ return;
+
+ out_prim_wait:
+ prim->num_dwords = 0;
+ prim->sec_used = 0;
+ clear_bit(MGA_BUF_IN_USE, &prim->buffer_status);
+ wakeup(&dev_priv->wait_queue);
+ clear_bit(MGA_BUF_SWAP_PENDING, &prim->buffer_status);
+ clear_bit(MGA_IN_DISPATCH, &dev_priv->dispatch_status);
+}
+
+int mga_advance_primary(drm_device_t *dev)
+{
+ drm_mga_private_t *dev_priv = dev->dev_private;
+ drm_mga_prim_buf_t *prim_buffer;
+ drm_device_dma_t *dma = dev->dma;
+ int next_prim_idx;
+ int ret = 0;
+ int s;
+
+ /* This needs to reset the primary buffer if available,
+ * we should collect stats on how many times it bites
+ * it's tail */
+ DRM_DEBUG("%s\n", __FUNCTION__);
+
+ next_prim_idx = dev_priv->current_prim_idx + 1;
+ if(next_prim_idx >= MGA_NUM_PRIM_BUFS)
+ next_prim_idx = 0;
+ prim_buffer = dev_priv->prim_bufs[next_prim_idx];
+ set_bit(MGA_IN_WAIT, &dev_priv->dispatch_status);
+
+ /* In use is cleared in interrupt handler */
+
+ s = splsofttq();
+ if(test_and_set_bit(MGA_BUF_IN_USE, &prim_buffer->buffer_status)) {
+ for (;;) {
+ mga_dma_schedule(dev, 0);
+ if(!test_and_set_bit(MGA_BUF_IN_USE,
+ &prim_buffer->buffer_status))
+ break;
+ atomic_inc(&dev->total_sleeps);
+ atomic_inc(&dma->total_missed_sched);
+ ret = tsleep(&dev_priv->wait_queue, PZERO|PCATCH,
+ "mgaap", 0);
+ if (ret)
+ break;
+ }
+ if(ret) {
+ splx(s);
+ return ret;
+ }
+ }
+ clear_bit(MGA_IN_WAIT, &dev_priv->dispatch_status);
+ splx(s);
+
+ /* This primary buffer is now free to use */
+ prim_buffer->current_dma_ptr = prim_buffer->head;
+ prim_buffer->num_dwords = 0;
+ prim_buffer->sec_used = 0;
+ prim_buffer->prim_age = dev_priv->next_prim_age++;
+ if(prim_buffer->prim_age == 0 || prim_buffer->prim_age == 0xffffffff) {
+ mga_flush_queue(dev);
+ mga_dma_quiescent(dev);
+ mga_reset_freelist(dev);
+ prim_buffer->prim_age = (dev_priv->next_prim_age += 2);
+ }
+
+ /* Reset all buffer status stuff */
+ clear_bit(MGA_BUF_NEEDS_OVERFLOW, &prim_buffer->buffer_status);
+ clear_bit(MGA_BUF_FORCE_FIRE, &prim_buffer->buffer_status);
+ clear_bit(MGA_BUF_SWAP_PENDING, &prim_buffer->buffer_status);
+
+ dev_priv->current_prim = prim_buffer;
+ dev_priv->current_prim_idx = next_prim_idx;
+ return 0;
+}
+
+/* More dynamic performance decisions */
+static __inline int mga_decide_to_fire(drm_device_t *dev)
+{
+ drm_mga_private_t *dev_priv = (drm_mga_private_t *)dev->dev_private;
+
+ DRM_DEBUG("%s\n", __FUNCTION__);
+
+ if(test_bit(MGA_BUF_FORCE_FIRE, &dev_priv->next_prim->buffer_status)) {
+ return 1;
+ }
+
+ if (test_bit(MGA_IN_GETBUF, &dev_priv->dispatch_status) &&
+ dev_priv->next_prim->num_dwords) {
+ return 1;
+ }
+
+ if (test_bit(MGA_IN_FLUSH, &dev_priv->dispatch_status) &&
+ dev_priv->next_prim->num_dwords) {
+ return 1;
+ }
+
+ if(atomic_read(&dev_priv->pending_bufs) <= MGA_NUM_PRIM_BUFS - 1) {
+ if(test_bit(MGA_BUF_SWAP_PENDING,
+ &dev_priv->next_prim->buffer_status)) {
+ return 1;
+ }
+ }
+
+ if(atomic_read(&dev_priv->pending_bufs) <= MGA_NUM_PRIM_BUFS / 2) {
+ if(dev_priv->next_prim->sec_used >= MGA_DMA_BUF_NR / 8) {
+ return 1;
+ }
+ }
+
+ if(atomic_read(&dev_priv->pending_bufs) >= MGA_NUM_PRIM_BUFS / 2) {
+ if(dev_priv->next_prim->sec_used >= MGA_DMA_BUF_NR / 4) {
+ return 1;
+ }
+ }
+
+ return 0;
+}
+
+int mga_dma_schedule(drm_device_t *dev, int locked)
+{
+ drm_mga_private_t *dev_priv = (drm_mga_private_t *)dev->dev_private;
+ int retval =0 ;
+
+ if (!dev_priv) return EBUSY;
+
+ if (test_and_set_bit(0, &dev->dma_flag)) {
+ retval = EBUSY;
+ goto sch_out_wakeup;
+ }
+
+ DRM_DEBUG("%s\n", __FUNCTION__);
+ if (!dev_priv) {
+ DRM_DEBUG("dev_priv is not set\n");
+ return (0);
+ }
+
+ if(test_bit(MGA_IN_FLUSH, &dev_priv->dispatch_status) ||
+ test_bit(MGA_IN_WAIT, &dev_priv->dispatch_status) ||
+ test_bit(MGA_IN_GETBUF, &dev_priv->dispatch_status)) {
+ locked = 1;
+ }
+
+ if (!locked &&
+ !drm_lock_take(&dev->lock.hw_lock->lock, DRM_KERNEL_CONTEXT)) {
+ clear_bit(0, &dev->dma_flag);
+ DRM_DEBUG("Not locked\n");
+ retval = EBUSY;
+ goto sch_out_wakeup;
+ }
+
+ if(!test_and_set_bit(MGA_IN_DISPATCH, &dev_priv->dispatch_status)) {
+ /* Fire dma buffer */
+ if(mga_decide_to_fire(dev)) {
+ clear_bit(MGA_BUF_FORCE_FIRE,
+ &dev_priv->next_prim->buffer_status);
+ if(dev_priv->current_prim == dev_priv->next_prim) {
+ /* Schedule overflow for a later time */
+ set_bit(MGA_BUF_NEEDS_OVERFLOW,
+ &dev_priv->next_prim->buffer_status);
+ }
+ mga_fire_primary(dev, dev_priv->next_prim);
+ } else {
+ clear_bit(MGA_IN_DISPATCH, &dev_priv->dispatch_status);
+ }
+ }
+
+ if (!locked) {
+ if (drm_lock_free(dev, &dev->lock.hw_lock->lock,
+ DRM_KERNEL_CONTEXT)) {
+ DRM_ERROR("\n");
+ }
+ }
+ clear_bit(0, &dev->dma_flag);
+sch_out_wakeup:
+ if(test_bit(MGA_IN_FLUSH, &dev_priv->dispatch_status) &&
+ atomic_read(&dev_priv->pending_bufs) == 0) {
+ /* Everything has been processed by the hardware */
+ clear_bit(MGA_IN_FLUSH, &dev_priv->dispatch_status);
+ wakeup(&dev_priv->flush_queue);
+ }
+
+ if(test_bit(MGA_IN_GETBUF, &dev_priv->dispatch_status) &&
+ dev_priv->tail->age < dev_priv->last_prim_age)
+ wakeup(&dev_priv->buf_queue);
+
+ return retval;
+}
+
+static void mga_dma_service(void *arg)
+{
+ drm_device_t *dev = (drm_device_t *)arg;
+ drm_mga_private_t *dev_priv = (drm_mga_private_t *)dev->dev_private;
+ drm_mga_prim_buf_t *last_prim_buffer;
+
+ atomic_inc(&dev->total_irq);
+ if((MGA_READ(MGAREG_STATUS) & 0x00000001) != 0x00000001) return;
+ MGA_WRITE(MGAREG_ICLEAR, 0x00000001);
+ last_prim_buffer = dev_priv->last_prim;
+ last_prim_buffer->num_dwords = 0;
+ last_prim_buffer->sec_used = 0;
+ dev_priv->sarea_priv->last_dispatch =
+ dev_priv->last_prim_age = last_prim_buffer->prim_age;
+ clear_bit(MGA_BUF_IN_USE, &last_prim_buffer->buffer_status);
+ clear_bit(MGA_BUF_SWAP_PENDING, &last_prim_buffer->buffer_status);
+ clear_bit(MGA_IN_DISPATCH, &dev_priv->dispatch_status);
+ atomic_dec(&dev_priv->pending_bufs);
+ taskqueue_enqueue(taskqueue_swi, &dev->task);
+ wakeup(&dev_priv->wait_queue);
+}
+
+static void mga_dma_task_queue(void *device, int pending)
+{
+ DRM_DEBUG("%s\n", __FUNCTION__);
+ mga_dma_schedule((drm_device_t *)device, 0);
+}
+
+int mga_dma_cleanup(drm_device_t *dev)
+{
+ DRM_DEBUG("%s\n", __FUNCTION__);
+
+ if(dev->dev_private) {
+ drm_mga_private_t *dev_priv =
+ (drm_mga_private_t *) dev->dev_private;
+
+ if (dev->irq) mga_flush_queue(dev);
+ mga_dma_quiescent(dev);
+ if(dev_priv->ioremap) {
+ int temp = (dev_priv->warp_ucode_size +
+ dev_priv->primary_size +
+ PAGE_SIZE - 1) / PAGE_SIZE * PAGE_SIZE;
+
+ drm_ioremapfree((void *) dev_priv->ioremap, temp);
+ }
+ if(dev_priv->real_status_page != 0UL) {
+ mga_free_page(dev, dev_priv->real_status_page);
+ }
+ if(dev_priv->prim_bufs != NULL) {
+ int i;
+ for(i = 0; i < MGA_NUM_PRIM_BUFS; i++) {
+ if(dev_priv->prim_bufs[i] != NULL) {
+ drm_free(dev_priv->prim_bufs[i],
+ sizeof(drm_mga_prim_buf_t),
+ DRM_MEM_DRIVER);
+ }
+ }
+ drm_free(dev_priv->prim_bufs, sizeof(void *) *
+ (MGA_NUM_PRIM_BUFS + 1),
+ DRM_MEM_DRIVER);
+ }
+ if(dev_priv->head != NULL) {
+ mga_freelist_cleanup(dev);
+ }
+
+
+ drm_free(dev->dev_private, sizeof(drm_mga_private_t),
+ DRM_MEM_DRIVER);
+ dev->dev_private = NULL;
+ }
+
+ return 0;
+}
+
+static int mga_dma_initialize(drm_device_t *dev, drm_mga_init_t *init) {
+ drm_mga_private_t *dev_priv;
+ drm_map_t *sarea_map = NULL;
+
+ dev_priv = drm_alloc(sizeof(drm_mga_private_t), DRM_MEM_DRIVER);
+ if(dev_priv == NULL) return ENOMEM;
+ dev->dev_private = (void *) dev_priv;
+
+ memset(dev_priv, 0, sizeof(drm_mga_private_t));
+
+ if((init->reserved_map_idx >= dev->map_count) ||
+ (init->buffer_map_idx >= dev->map_count)) {
+ mga_dma_cleanup(dev);
+ DRM_DEBUG("reserved_map or buffer_map are invalid\n");
+ return EINVAL;
+ }
+
+ dev_priv->reserved_map_idx = init->reserved_map_idx;
+ dev_priv->buffer_map_idx = init->buffer_map_idx;
+ sarea_map = dev->maplist[0];
+ dev_priv->sarea_priv = (drm_mga_sarea_t *)
+ ((u_int8_t *)sarea_map->handle +
+ init->sarea_priv_offset);
+
+ /* Scale primary size to the next page */
+ dev_priv->chipset = init->chipset;
+ dev_priv->frontOffset = init->frontOffset;
+ dev_priv->backOffset = init->backOffset;
+ dev_priv->depthOffset = init->depthOffset;
+ dev_priv->textureOffset = init->textureOffset;
+ dev_priv->textureSize = init->textureSize;
+ dev_priv->cpp = init->cpp;
+ dev_priv->sgram = init->sgram;
+ dev_priv->stride = init->stride;
+
+ dev_priv->mAccess = init->mAccess;
+ dev_priv->flush_queue = 0;
+ dev_priv->WarpPipe = 0xff000000;
+ dev_priv->vertexsize = 0;
+
+ DRM_DEBUG("chipset: %d ucode_size: %d backOffset: %x depthOffset: %x\n",
+ dev_priv->chipset, dev_priv->warp_ucode_size,
+ dev_priv->backOffset, dev_priv->depthOffset);
+ DRM_DEBUG("cpp: %d sgram: %d stride: %d maccess: %x\n",
+ dev_priv->cpp, dev_priv->sgram, dev_priv->stride,
+ dev_priv->mAccess);
+
+ memcpy(&dev_priv->WarpIndex, &init->WarpIndex,
+ sizeof(drm_mga_warp_index_t) * MGA_MAX_WARP_PIPES);
+
+ if(mga_init_primary_bufs(dev, init) != 0) {
+ DRM_ERROR("Can not initialize primary buffers\n");
+ mga_dma_cleanup(dev);
+ return ENOMEM;
+ }
+ dev_priv->real_status_page = mga_alloc_page(dev);
+ if(dev_priv->real_status_page == 0UL) {
+ mga_dma_cleanup(dev);
+ DRM_ERROR("Can not allocate status page\n");
+ return ENOMEM;
+ }
+
+ dev_priv->status_page = (void*)dev_priv->real_status_page; /* XXX wants nocache */
+#if 0
+ dev_priv->status_page =
+ ioremap_nocache(virt_to_bus((void *)dev_priv->real_status_page),
+ PAGE_SIZE);
+
+ if(dev_priv->status_page == NULL) {
+ mga_dma_cleanup(dev);
+ DRM_ERROR("Can not remap status page\n");
+ return ENOMEM;
+ }
+#endif
+
+ /* Write status page when secend or softrap occurs */
+ MGA_WRITE(MGAREG_PRIMPTR,
+ vtophys((void *)dev_priv->real_status_page) | 0x00000003);
+
+
+ /* Private is now filled in, initialize the hardware */
+ {
+ PRIMLOCALS;
+ PRIMGETPTR( dev_priv );
+
+ PRIMOUTREG(MGAREG_DMAPAD, 0);
+ PRIMOUTREG(MGAREG_DMAPAD, 0);
+ PRIMOUTREG(MGAREG_DWGSYNC, 0x0100);
+ PRIMOUTREG(MGAREG_SOFTRAP, 0);
+ /* Poll for the first buffer to insure that
+ * the status register will be correct
+ */
+
+ mga_flush_write_combine();
+ MGA_WRITE(MGAREG_PRIMADDRESS, phys_head | TT_GENERAL);
+
+ MGA_WRITE(MGAREG_PRIMEND, ((phys_head + num_dwords * 4) |
+ PDEA_pagpxfer_enable));
+
+ while(MGA_READ(MGAREG_DWGSYNC) != 0x0100) ;
+ }
+
+ if(mga_freelist_init(dev) != 0) {
+ DRM_ERROR("Could not initialize freelist\n");
+ mga_dma_cleanup(dev);
+ return ENOMEM;
+ }
+ return 0;
+}
+
+int
+mga_dma_init(dev_t kdev, u_long cmd, caddr_t data, int flags, struct proc *p)
+{
+ drm_device_t *dev = kdev->si_drv1;
+ drm_mga_init_t init;
+
+ DRM_DEBUG("%s\n", __FUNCTION__);
+
+ init = *(drm_mga_init_t *) data;
+
+ switch(init.func) {
+ case MGA_INIT_DMA:
+ return mga_dma_initialize(dev, &init);
+ case MGA_CLEANUP_DMA:
+ return mga_dma_cleanup(dev);
+ }
+
+ return EINVAL;
+}
+
+int mga_irq_install(drm_device_t *dev, int irq)
+{
+ int rid;
+ int retcode;
+
+ if (!irq) return EINVAL;
+
+ lockmgr(&dev->dev_lock, LK_EXCLUSIVE, 0, curproc);
+ if (dev->irq) {
+ lockmgr(&dev->dev_lock, LK_RELEASE, 0, curproc);
+ return EBUSY;
+ }
+ lockmgr(&dev->dev_lock, LK_RELEASE, 0, curproc);
+
+ DRM_DEBUG("install irq handler %d\n", irq);
+
+ dev->context_flag = 0;
+ dev->interrupt_flag = 0;
+ dev->dma_flag = 0;
+ dev->dma->next_buffer = NULL;
+ dev->dma->next_queue = NULL;
+ dev->dma->this_buffer = NULL;
+ TASK_INIT(&dev->task, 0, mga_dma_task_queue, dev);
+
+ /* Before installing handler */
+ MGA_WRITE(MGAREG_IEN, 0);
+ /* Install handler */
+ rid = 0;
+ dev->irq = bus_alloc_resource(dev->device, SYS_RES_IRQ, &rid,
+ 0, ~0, 1, RF_SHAREABLE);
+ if (!dev->irq)
+ return ENOENT;
+
+ retcode = bus_setup_intr(dev->device, dev->irq, INTR_TYPE_TTY,
+ mga_dma_service, dev, &dev->irqh);
+ if (retcode) {
+ bus_release_resource(dev->device, SYS_RES_IRQ, 0, dev->irq);
+ dev->irq = 0;
+ return retcode;
+ }
+
+ /* After installing handler */
+ MGA_WRITE(MGAREG_ICLEAR, 0x00000001);
+ MGA_WRITE(MGAREG_IEN, 0x00000001);
+ return 0;
+}
+
+int mga_irq_uninstall(drm_device_t *dev)
+{
+ if (!dev->irq)
+ return EINVAL;
+
+ DRM_DEBUG("remove irq handler %ld\n", rman_get_start(dev->irq));
+ MGA_WRITE(MGAREG_ICLEAR, 0x00000001);
+ MGA_WRITE(MGAREG_IEN, 0);
+
+ bus_teardown_intr(dev->device, dev->irq, dev->irqh);
+ bus_release_resource(dev->device, SYS_RES_IRQ, 0, dev->irq);
+ dev->irq = 0;
+
+ return 0;
+}
+
+int mga_control(dev_t kdev, u_long cmd, caddr_t data,
+ int flags, struct proc *p)
+{
+ drm_device_t *dev = kdev->si_drv1;
+ drm_control_t ctl;
+
+ ctl = *(drm_control_t *) data;
+
+ DRM_DEBUG("%s\n", __FUNCTION__);
+
+ switch (ctl.func) {
+ case DRM_INST_HANDLER:
+ return mga_irq_install(dev, ctl.irq);
+ case DRM_UNINST_HANDLER:
+ return mga_irq_uninstall(dev);
+ default:
+ return EINVAL;
+ }
+}
+
+static int mga_flush_queue(drm_device_t *dev)
+{
+ drm_mga_private_t *dev_priv = (drm_mga_private_t *)dev->dev_private;
+ int ret = 0;
+ int s;
+
+ DRM_DEBUG("%s\n", __FUNCTION__);
+
+ if(!dev_priv) return 0;
+
+ if(dev_priv->next_prim->num_dwords != 0) {
+ s = splsofttq();
+ set_bit(MGA_IN_FLUSH, &dev_priv->dispatch_status);
+ for (;;) {
+ mga_dma_schedule(dev, 0);
+ if (!test_bit(MGA_IN_FLUSH,
+ &dev_priv->dispatch_status))
+ break;
+ atomic_inc(&dev->total_sleeps);
+ ret = tsleep(&dev_priv->flush_queue, PZERO|PCATCH,
+ "mgafq", 0);
+ if (ret) {
+ clear_bit(MGA_IN_FLUSH,
+ &dev_priv->dispatch_status);
+ break;
+ }
+ }
+ splx(s);
+ }
+ return ret;
+}
+
+/* Must be called with the lock held */
+void mga_reclaim_buffers(drm_device_t *dev, pid_t pid)
+{
+ drm_device_dma_t *dma = dev->dma;
+ int i;
+
+ if (!dma) return;
+ if(dev->dev_private == NULL) return;
+ if(dma->buflist == NULL) return;
+
+ DRM_DEBUG("%s\n", __FUNCTION__);
+ mga_flush_queue(dev);
+
+ for (i = 0; i < dma->buf_count; i++) {
+ drm_buf_t *buf = dma->buflist[ i ];
+ drm_mga_buf_priv_t *buf_priv = buf->dev_private;
+
+ /* Only buffers that need to get reclaimed ever
+ * get set to free
+ */
+ if (buf->pid == pid && buf_priv) {
+ if(buf_priv->my_freelist->age == MGA_BUF_USED)
+ buf_priv->my_freelist->age = MGA_BUF_FREE;
+ }
+ }
+}
+
+int mga_lock(dev_t kdev, u_long cmd, caddr_t data,
+ int flags, struct proc *p)
+{
+ drm_device_t *dev = kdev->si_drv1;
+ int ret = 0;
+ drm_lock_t lock;
+
+ DRM_DEBUG("%s\n", __FUNCTION__);
+ lock = *(drm_lock_t *) data;
+
+ if (lock.context == DRM_KERNEL_CONTEXT) {
+ DRM_ERROR("Process %d using kernel context %d\n",
+ p->p_pid, lock.context);
+ return EINVAL;
+ }
+
+ DRM_DEBUG("%d (pid %d) requests lock (0x%08x), flags = 0x%08x\n",
+ lock.context, p->p_pid, dev->lock.hw_lock->lock,
+ lock.flags);
+
+ if (lock.context < 0) {
+ return EINVAL;
+ }
+
+ /* Only one queue:
+ */
+
+ if (!ret) {
+ atomic_inc(&dev->lock.lock_queue);
+ for (;;) {
+ if (!dev->lock.hw_lock) {
+ /* Device has been unregistered */
+ ret = EINTR;
+ break;
+ }
+ if (drm_lock_take(&dev->lock.hw_lock->lock,
+ lock.context)) {
+ dev->lock.pid = p->p_pid;
+ dev->lock.lock_time = ticks;
+ atomic_inc(&dev->total_locks);
+ break; /* Got lock */
+ }
+
+ /* Contention */
+ atomic_inc(&dev->total_sleeps);
+ ret = tsleep(&dev->lock.lock_queue, PZERO|PCATCH,
+ "mgal2", 0);
+ if (ret)
+ break;
+ }
+ atomic_dec(&dev->lock.lock_queue);
+ }
+
+ if (!ret) {
+ if (lock.flags & _DRM_LOCK_QUIESCENT) {
+ DRM_DEBUG("_DRM_LOCK_QUIESCENT\n");
+ mga_flush_queue(dev);
+ mga_dma_quiescent(dev);
+ }
+ }
+
+ if (ret) DRM_DEBUG("%d %s\n", lock.context, ret ? "interrupted" : "has lock");
+ return ret;
+}
+
+int mga_flush_ioctl(dev_t kdev, u_long cmd, caddr_t data,
+ int flags, struct proc *p)
+{
+ drm_device_t *dev = kdev->si_drv1;
+ drm_lock_t lock;
+ drm_mga_private_t *dev_priv = (drm_mga_private_t *)dev->dev_private;
+ int s;
+
+ DRM_DEBUG("%s\n", __FUNCTION__);
+ lock = *(drm_lock_t *) data;
+
+ if(!_DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock)) {
+ DRM_ERROR("mga_flush_ioctl called without lock held\n");
+ return EINVAL;
+ }
+
+ if(lock.flags & _DRM_LOCK_FLUSH || lock.flags & _DRM_LOCK_FLUSH_ALL) {
+ drm_mga_prim_buf_t *temp_buf;
+ temp_buf = dev_priv->current_prim;
+
+ s = splsofttq();
+ if(temp_buf && temp_buf->num_dwords) {
+ set_bit(MGA_BUF_FORCE_FIRE, &temp_buf->buffer_status);
+ mga_advance_primary(dev);
+ }
+ mga_dma_schedule(dev, 1);
+ splx(s);
+ }
+ if(lock.flags & _DRM_LOCK_QUIESCENT) {
+ mga_flush_queue(dev);
+ mga_dma_quiescent(dev);
+ }
+
+ return 0;
+}
diff --git a/bsd/mga/mga_drv.c b/bsd/mga/mga_drv.c
new file mode 100644
index 00000000..77d7c440
--- /dev/null
+++ b/bsd/mga/mga_drv.c
@@ -0,0 +1,714 @@
+/* mga_drv.c -- Matrox g200/g400 driver
+ * Created: Mon Dec 13 01:56:22 1999 by jhartmann@precisioninsight.com
+ *
+ * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
+ * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ *
+ * Authors: Rickard E. (Rik) Faith <faith@valinux.com>
+ * Jeff Hartmann <jhartmann@valinux.com>
+ *
+ *
+ */
+
+#include "drmP.h"
+#include "mga_drv.h"
+
+#include <pci/pcivar.h>
+
+MODULE_DEPEND(mga, drm, 1, 1, 1);
+MODULE_DEPEND(mga, agp, 1, 1, 1);
+
+#define MGA_NAME "mga"
+#define MGA_DESC "Matrox g200/g400"
+#define MGA_DATE "20000928"
+#define MGA_MAJOR 2
+#define MGA_MINOR 0
+#define MGA_PATCHLEVEL 0
+
+drm_ctx_t mga_res_ctx;
+
+static int mga_probe(device_t dev)
+{
+ const char *s = 0;
+
+ switch (pci_get_devid(dev)) {
+ case 0x0525102b:
+ s = "Matrox MGA G400 AGP graphics accelerator";
+ break;
+
+ case 0x0521102b:
+ s = "Matrox MGA G200 AGP graphics accelerator";
+ break;
+ }
+
+ if (s) {
+ device_set_desc(dev, s);
+ return 0;
+ }
+
+ return ENXIO;
+}
+
+static int mga_attach(device_t dev)
+{
+ return mga_init(dev);
+}
+
+static int mga_detach(device_t dev)
+{
+ mga_cleanup(dev);
+ return 0;
+}
+
+static device_method_t mga_methods[] = {
+ /* Device interface */
+ DEVMETHOD(device_probe, mga_probe),
+ DEVMETHOD(device_attach, mga_attach),
+ DEVMETHOD(device_detach, mga_detach),
+
+ { 0, 0 }
+};
+
+static driver_t mga_driver = {
+ "drm",
+ mga_methods,
+ sizeof(drm_device_t),
+};
+
+static devclass_t mga_devclass;
+#define MGA_SOFTC(unit) \
+ ((drm_device_t *) devclass_get_softc(mga_devclass, unit))
+
+DRIVER_MODULE(if_mga, pci, mga_driver, mga_devclass, 0, 0);
+
+#define CDEV_MAJOR 145
+ /* mga_drv.c */
+static struct cdevsw mga_cdevsw = {
+ /* open */ mga_open,
+ /* close */ mga_close,
+ /* read */ drm_read,
+ /* write */ drm_write,
+ /* ioctl */ mga_ioctl,
+ /* poll */ drm_poll,
+ /* mmap */ drm_mmap,
+ /* strategy */ nostrategy,
+ /* name */ "mga",
+ /* maj */ CDEV_MAJOR,
+ /* dump */ nodump,
+ /* psize */ nopsize,
+ /* flags */ D_TTY | D_TRACKCLOSE,
+ /* bmaj */ -1
+};
+
+static drm_ioctl_desc_t mga_ioctls[] = {
+ [DRM_IOCTL_NR(DRM_IOCTL_VERSION)] = { mga_version, 0, 0 },
+ [DRM_IOCTL_NR(DRM_IOCTL_GET_UNIQUE)] = { drm_getunique, 0, 0 },
+ [DRM_IOCTL_NR(DRM_IOCTL_GET_MAGIC)] = { drm_getmagic, 0, 0 },
+ [DRM_IOCTL_NR(DRM_IOCTL_IRQ_BUSID)] = { drm_irq_busid, 0, 1 },
+
+ [DRM_IOCTL_NR(DRM_IOCTL_SET_UNIQUE)] = { drm_setunique, 1, 1 },
+ [DRM_IOCTL_NR(DRM_IOCTL_BLOCK)] = { drm_block, 1, 1 },
+ [DRM_IOCTL_NR(DRM_IOCTL_UNBLOCK)] = { drm_unblock, 1, 1 },
+ [DRM_IOCTL_NR(DRM_IOCTL_CONTROL)] = { mga_control, 1, 1 },
+ [DRM_IOCTL_NR(DRM_IOCTL_AUTH_MAGIC)] = { drm_authmagic, 1, 1 },
+ [DRM_IOCTL_NR(DRM_IOCTL_ADD_MAP)] = { drm_addmap, 1, 1 },
+ [DRM_IOCTL_NR(DRM_IOCTL_ADD_BUFS)] = { mga_addbufs, 1, 1 },
+ [DRM_IOCTL_NR(DRM_IOCTL_MARK_BUFS)] = { mga_markbufs, 1, 1 },
+ [DRM_IOCTL_NR(DRM_IOCTL_INFO_BUFS)] = { mga_infobufs, 1, 0 },
+ [DRM_IOCTL_NR(DRM_IOCTL_MAP_BUFS)] = { mga_mapbufs, 1, 0 },
+ [DRM_IOCTL_NR(DRM_IOCTL_FREE_BUFS)] = { mga_freebufs, 1, 0 },
+
+ [DRM_IOCTL_NR(DRM_IOCTL_ADD_CTX)] = { mga_addctx, 1, 1 },
+ [DRM_IOCTL_NR(DRM_IOCTL_RM_CTX)] = { mga_rmctx, 1, 1 },
+ [DRM_IOCTL_NR(DRM_IOCTL_MOD_CTX)] = { mga_modctx, 1, 1 },
+ [DRM_IOCTL_NR(DRM_IOCTL_GET_CTX)] = { mga_getctx, 1, 0 },
+ [DRM_IOCTL_NR(DRM_IOCTL_SWITCH_CTX)] = { mga_switchctx, 1, 1 },
+ [DRM_IOCTL_NR(DRM_IOCTL_NEW_CTX)] = { mga_newctx, 1, 1 },
+ [DRM_IOCTL_NR(DRM_IOCTL_RES_CTX)] = { mga_resctx, 1, 0 },
+ [DRM_IOCTL_NR(DRM_IOCTL_ADD_DRAW)] = { drm_adddraw, 1, 1 },
+ [DRM_IOCTL_NR(DRM_IOCTL_RM_DRAW)] = { drm_rmdraw, 1, 1 },
+
+ [DRM_IOCTL_NR(DRM_IOCTL_DMA)] = { mga_dma, 1, 0 },
+
+ [DRM_IOCTL_NR(DRM_IOCTL_LOCK)] = { mga_lock, 1, 0 },
+ [DRM_IOCTL_NR(DRM_IOCTL_UNLOCK)] = { mga_unlock, 1, 0 },
+ [DRM_IOCTL_NR(DRM_IOCTL_FINISH)] = { drm_finish, 1, 0 },
+
+ [DRM_IOCTL_NR(DRM_IOCTL_AGP_ACQUIRE)] = { drm_agp_acquire, 1, 1 },
+ [DRM_IOCTL_NR(DRM_IOCTL_AGP_RELEASE)] = { drm_agp_release, 1, 1 },
+ [DRM_IOCTL_NR(DRM_IOCTL_AGP_ENABLE)] = { drm_agp_enable, 1, 1 },
+ [DRM_IOCTL_NR(DRM_IOCTL_AGP_INFO)] = { drm_agp_info, 1, 0 },
+ [DRM_IOCTL_NR(DRM_IOCTL_AGP_ALLOC)] = { drm_agp_alloc, 1, 1 },
+ [DRM_IOCTL_NR(DRM_IOCTL_AGP_FREE)] = { drm_agp_free, 1, 1 },
+ [DRM_IOCTL_NR(DRM_IOCTL_AGP_BIND)] = { drm_agp_bind, 1, 1 },
+ [DRM_IOCTL_NR(DRM_IOCTL_AGP_UNBIND)] = { drm_agp_unbind, 1, 1 },
+ [DRM_IOCTL_NR(DRM_IOCTL_MGA_INIT)] = { mga_dma_init, 1, 1 },
+ [DRM_IOCTL_NR(DRM_IOCTL_MGA_SWAP)] = { mga_swap_bufs, 1, 0 },
+ [DRM_IOCTL_NR(DRM_IOCTL_MGA_CLEAR)] = { mga_clear_bufs, 1, 0 },
+ [DRM_IOCTL_NR(DRM_IOCTL_MGA_ILOAD)] = { mga_iload, 1, 0 },
+ [DRM_IOCTL_NR(DRM_IOCTL_MGA_VERTEX)] = { mga_vertex, 1, 0 },
+ [DRM_IOCTL_NR(DRM_IOCTL_MGA_FLUSH)] = { mga_flush_ioctl, 1, 0 },
+ [DRM_IOCTL_NR(DRM_IOCTL_MGA_INDICES)] = { mga_indices, 1, 0 },
+};
+
+#define MGA_IOCTL_COUNT DRM_ARRAY_SIZE(mga_ioctls)
+
+static int mga_setup(drm_device_t *dev)
+{
+ int i;
+
+ device_busy(dev->device);
+
+ atomic_set(&dev->ioctl_count, 0);
+ atomic_set(&dev->vma_count, 0);
+ dev->buf_use = 0;
+ atomic_set(&dev->buf_alloc, 0);
+
+ drm_dma_setup(dev);
+
+ atomic_set(&dev->total_open, 0);
+ atomic_set(&dev->total_close, 0);
+ atomic_set(&dev->total_ioctl, 0);
+ atomic_set(&dev->total_irq, 0);
+ atomic_set(&dev->total_ctx, 0);
+ atomic_set(&dev->total_locks, 0);
+ atomic_set(&dev->total_unlocks, 0);
+ atomic_set(&dev->total_contends, 0);
+ atomic_set(&dev->total_sleeps, 0);
+
+ for (i = 0; i < DRM_HASH_SIZE; i++) {
+ dev->magiclist[i].head = NULL;
+ dev->magiclist[i].tail = NULL;
+ }
+ dev->maplist = NULL;
+ dev->map_count = 0;
+ dev->vmalist = NULL;
+ dev->lock.hw_lock = NULL;
+ dev->lock.lock_queue = 0;
+ dev->queue_count = 0;
+ dev->queue_reserved = 0;
+ dev->queue_slots = 0;
+ dev->queuelist = NULL;
+ dev->irq = 0;
+ dev->context_flag = 0;
+ dev->interrupt_flag = 0;
+ dev->dma_flag = 0;
+ dev->last_context = 0;
+ dev->last_switch = 0;
+ dev->last_checked = 0;
+ callout_init(&dev->timer);
+ dev->context_wait = 0;
+
+ timespecclear(&dev->ctx_start);
+ timespecclear(&dev->lck_start);
+
+ dev->buf_rp = dev->buf;
+ dev->buf_wp = dev->buf;
+ dev->buf_end = dev->buf + DRM_BSZ;
+ bzero(&dev->buf_sel, sizeof dev->buf_sel);
+ dev->buf_sigio = NULL;
+ dev->buf_readers = 0;
+ dev->buf_writers = 0;
+ dev->buf_selecting = 0;
+
+ DRM_DEBUG("\n");
+
+ /* The kernel's context could be created here, but is now created
+ in drm_dma_enqueue. This is more resource-efficient for
+ hardware that does not do DMA, but may mean that
+ drm_select_queue fails between the time the interrupt is
+ initialized and the time the queues are initialized. */
+
+ return 0;
+}
+
+
+static int mga_takedown(drm_device_t *dev)
+{
+ int i;
+ drm_magic_entry_t *pt, *next;
+ drm_map_t *map;
+ drm_vma_entry_t *vma, *vma_next;
+
+ DRM_DEBUG("\n");
+
+ if (dev->irq) mga_irq_uninstall(dev);
+
+ lockmgr(&dev->dev_lock, LK_EXCLUSIVE, 0, curproc);
+ callout_stop(&dev->timer);
+
+ if (dev->devname) {
+ drm_free(dev->devname, strlen(dev->devname)+1, DRM_MEM_DRIVER);
+ dev->devname = NULL;
+ }
+
+ if (dev->unique) {
+ drm_free(dev->unique, strlen(dev->unique)+1, DRM_MEM_DRIVER);
+ dev->unique = NULL;
+ dev->unique_len = 0;
+ }
+ /* Clear pid list */
+ for (i = 0; i < DRM_HASH_SIZE; i++) {
+ for (pt = dev->magiclist[i].head; pt; pt = next) {
+ next = pt->next;
+ drm_free(pt, sizeof(*pt), DRM_MEM_MAGIC);
+ }
+ dev->magiclist[i].head = dev->magiclist[i].tail = NULL;
+ }
+ /* Clear AGP information */
+ if (dev->agp) {
+ drm_agp_mem_t *entry;
+ drm_agp_mem_t *nexte;
+
+ /* Remove AGP resources, but leave dev->agp
+ intact until cleanup is called. */
+ for (entry = dev->agp->memory; entry; entry = nexte) {
+ nexte = entry->next;
+ if (entry->bound) drm_unbind_agp(entry->handle);
+ drm_free_agp(entry->handle, entry->pages);
+ drm_free(entry, sizeof(*entry), DRM_MEM_AGPLISTS);
+ }
+ dev->agp->memory = NULL;
+
+ if (dev->agp->acquired)
+ agp_release(dev->agp->agpdev);
+
+ dev->agp->acquired = 0;
+ dev->agp->enabled = 0;
+ }
+ /* Clear vma list (only built for debugging) */
+ if (dev->vmalist) {
+ for (vma = dev->vmalist; vma; vma = vma_next) {
+ vma_next = vma->next;
+ drm_free(vma, sizeof(*vma), DRM_MEM_VMAS);
+ }
+ dev->vmalist = NULL;
+ }
+
+ /* Clear map area and mtrr information */
+ if (dev->maplist) {
+ for (i = 0; i < dev->map_count; i++) {
+ map = dev->maplist[i];
+ switch (map->type) {
+ case _DRM_REGISTERS:
+ case _DRM_FRAME_BUFFER:
+#ifdef CONFIG_MTRR
+ if (map->mtrr >= 0) {
+ int retcode;
+ retcode = mtrr_del(map->mtrr,
+ map->offset,
+ map->size);
+ DRM_DEBUG("mtrr_del = %d\n", retcode);
+ }
+#endif
+ drm_ioremapfree(map->handle, map->size);
+ break;
+ case _DRM_SHM:
+ drm_free_pages((unsigned long)map->handle,
+ drm_order(map->size)
+ - PAGE_SHIFT,
+ DRM_MEM_SAREA);
+ break;
+ case _DRM_AGP:
+ break;
+ }
+ drm_free(map, sizeof(*map), DRM_MEM_MAPS);
+ }
+ drm_free(dev->maplist,
+ dev->map_count * sizeof(*dev->maplist),
+ DRM_MEM_MAPS);
+ dev->maplist = NULL;
+ dev->map_count = 0;
+ }
+
+ if (dev->queuelist) {
+ for (i = 0; i < dev->queue_count; i++) {
+ drm_waitlist_destroy(&dev->queuelist[i]->waitlist);
+ if (dev->queuelist[i]) {
+ drm_free(dev->queuelist[i],
+ sizeof(*dev->queuelist[0]),
+ DRM_MEM_QUEUES);
+ dev->queuelist[i] = NULL;
+ }
+ }
+ drm_free(dev->queuelist,
+ dev->queue_slots * sizeof(*dev->queuelist),
+ DRM_MEM_QUEUES);
+ dev->queuelist = NULL;
+ }
+
+ drm_dma_takedown(dev);
+
+ dev->queue_count = 0;
+ if (dev->lock.hw_lock) {
+ dev->lock.hw_lock = NULL; /* SHM removed */
+ dev->lock.pid = 0;
+ wakeup(&dev->lock.lock_queue);
+ }
+ lockmgr(&dev->dev_lock, LK_RELEASE, 0, curproc);
+
+ return 0;
+}
+
+/* mga_init is called via mga_attach at module load time, */
+
+int
+mga_init(device_t nbdev)
+{
+ int retcode;
+ drm_device_t *dev = device_get_softc(nbdev);
+
+ DRM_DEBUG("\n");
+
+ memset((void *)dev, 0, sizeof(*dev));
+ simple_lock_init(&dev->count_lock);
+ lockinit(&dev->dev_lock, PZERO, "drmlk", 0, 0);
+
+#if 0
+ drm_parse_options(mga);
+#endif
+ dev->device = nbdev;
+ dev->devnode = make_dev(&mga_cdevsw,
+ device_get_unit(nbdev),
+ DRM_DEV_UID,
+ DRM_DEV_GID,
+ DRM_DEV_MODE,
+ MGA_NAME);
+ dev->name = MGA_NAME;
+
+ DRM_DEBUG("doing mem init\n");
+ drm_mem_init();
+ DRM_DEBUG("doing proc init\n");
+ drm_sysctl_init(dev);
+ TAILQ_INIT(&dev->files);
+ DRM_DEBUG("doing agp init\n");
+ dev->agp = drm_agp_init();
+ if(dev->agp == NULL) {
+ DRM_INFO("The mga drm module requires the agp module"
+ " to function correctly\nPlease load the agp"
+ " module before you load the mga module\n");
+ drm_sysctl_cleanup(dev);
+ mga_takedown(dev);
+ return ENOMEM;
+ }
+#if 0
+ dev->agp->agp_mtrr = mtrr_add(dev->agp->agp_info.aper_base,
+ dev->agp->agp_info.aper_size * 1024 * 1024,
+ MTRR_TYPE_WRCOMB,
+ 1);
+#endif
+ DRM_DEBUG("doing ctxbitmap init\n");
+ if((retcode = drm_ctxbitmap_init(dev))) {
+ DRM_ERROR("Cannot allocate memory for context bitmap.\n");
+ drm_sysctl_cleanup(dev);
+ mga_takedown(dev);
+ return retcode;
+ }
+
+ DRM_INFO("Initialized %s %d.%d.%d %s on minor %d\n",
+ MGA_NAME,
+ MGA_MAJOR,
+ MGA_MINOR,
+ MGA_PATCHLEVEL,
+ MGA_DATE,
+ device_get_unit(nbdev));
+
+ return 0;
+}
+
+/* mga_cleanup is called via cleanup_module at module unload time. */
+
+void mga_cleanup(device_t nbdev)
+{
+ drm_device_t *dev = device_get_softc(nbdev);
+
+ DRM_DEBUG("\n");
+
+ drm_sysctl_cleanup(dev);
+ destroy_dev(dev->devnode);
+
+ DRM_INFO("Module unloaded\n");
+ drm_ctxbitmap_cleanup(dev);
+ mga_dma_cleanup(dev);
+#if 0
+ if(dev->agp && dev->agp->agp_mtrr) {
+ int retval;
+ retval = mtrr_del(dev->agp->agp_mtrr,
+ dev->agp->agp_info.aper_base,
+ dev->agp->agp_info.aper_size * 1024*1024);
+ DRM_DEBUG("mtrr_del = %d\n", retval);
+ }
+#endif
+
+ mga_takedown(dev);
+ if (dev->agp) {
+ drm_free(dev->agp, sizeof(*dev->agp), DRM_MEM_AGPLISTS);
+ dev->agp = NULL;
+ }
+}
+
+int
+mga_version(dev_t kdev, u_long cmd, caddr_t data, int flags, struct proc *p)
+{
+ drm_version_t version;
+ int len;
+
+ version = *(drm_version_t *) data;
+
+#define DRM_COPY(name,value) \
+ len = strlen(value); \
+ if (len > name##_len) len = name##_len; \
+ name##_len = strlen(value); \
+ if (len && name) { \
+ int error = copyout(value, name, len); \
+ if (error) return error; \
+ }
+
+ version.version_major = MGA_MAJOR;
+ version.version_minor = MGA_MINOR;
+ version.version_patchlevel = MGA_PATCHLEVEL;
+
+ DRM_COPY(version.name, MGA_NAME);
+ DRM_COPY(version.date, MGA_DATE);
+ DRM_COPY(version.desc, MGA_DESC);
+
+ *(drm_version_t *) data = version;
+ return 0;
+}
+
+int
+mga_open(dev_t kdev, int flags, int fmt, struct proc *p)
+{
+ drm_device_t *dev = MGA_SOFTC(minor(kdev));
+ int retcode = 0;
+
+ DRM_DEBUG("open_count = %d\n", dev->open_count);
+
+ device_busy(dev->device);
+ if (!(retcode = drm_open_helper(kdev, flags, fmt, p, dev))) {
+ atomic_inc(&dev->total_open);
+ simple_lock(&dev->count_lock);
+ if (!dev->open_count++) {
+ simple_unlock(&dev->count_lock);
+ retcode = mga_setup(dev);
+ }
+ simple_unlock(&dev->count_lock);
+ }
+ device_unbusy(dev->device);
+
+ return retcode;
+}
+
+int
+mga_close(dev_t kdev, int flags, int fmt, struct proc *p)
+{
+ drm_device_t *dev = kdev->si_drv1;
+ drm_file_t *priv;
+ int retcode = 0;
+
+ DRM_DEBUG("pid = %d, open_count = %d\n",
+ p->p_pid, dev->open_count);
+
+ priv = drm_find_file_by_proc(dev, p);
+ if (!priv) {
+ DRM_DEBUG("can't find authenticator\n");
+ return EINVAL;
+ }
+
+ if (dev->lock.hw_lock && _DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock)
+ && dev->lock.pid == p->p_pid) {
+ mga_reclaim_buffers(dev, priv->pid);
+ DRM_ERROR("Process %d dead, freeing lock for context %d\n",
+ p->p_pid,
+ _DRM_LOCKING_CONTEXT(dev->lock.hw_lock->lock));
+ drm_lock_free(dev,
+ &dev->lock.hw_lock->lock,
+ _DRM_LOCKING_CONTEXT(dev->lock.hw_lock->lock));
+
+ /* FIXME: may require heavy-handed reset of
+ hardware at this point, possibly
+ processed via a callback to the X
+ server. */
+ } else if (dev->lock.hw_lock) {
+ /* The lock is required to reclaim buffers */
+ for (;;) {
+ if (!dev->lock.hw_lock) {
+ /* Device has been unregistered */
+ retcode = EINTR;
+ break;
+ }
+ if (drm_lock_take(&dev->lock.hw_lock->lock,
+ DRM_KERNEL_CONTEXT)) {
+ dev->lock.pid = p->p_pid;
+ dev->lock.lock_time = ticks;
+ atomic_inc(&dev->total_locks);
+ break; /* Got lock */
+ }
+ /* Contention */
+ atomic_inc(&dev->total_sleeps);
+ retcode = tsleep(&dev->lock.lock_queue,
+ PZERO|PCATCH,
+ "drmlk2",
+ 0);
+ if (retcode)
+ break;
+ }
+ if(!retcode) {
+ mga_reclaim_buffers(dev, priv->pid);
+ drm_lock_free(dev, &dev->lock.hw_lock->lock,
+ DRM_KERNEL_CONTEXT);
+ }
+ }
+ funsetown(dev->buf_sigio);
+
+ lockmgr(&dev->dev_lock, LK_EXCLUSIVE, 0, p);
+ priv = drm_find_file_by_proc(dev, p);
+ if (priv) {
+ priv->refs--;
+ if (!priv->refs) {
+ TAILQ_REMOVE(&dev->files, priv, link);
+ drm_free(priv, sizeof(*priv), DRM_MEM_FILES);
+ }
+ }
+ lockmgr(&dev->dev_lock, LK_RELEASE, 0, p);
+
+ atomic_inc(&dev->total_close);
+ simple_lock(&dev->count_lock);
+ if (!--dev->open_count) {
+ if (atomic_read(&dev->ioctl_count) || dev->blocked) {
+ DRM_ERROR("Device busy: %d %d\n",
+ atomic_read(&dev->ioctl_count),
+ dev->blocked);
+ simple_unlock(&dev->count_lock);
+ return EBUSY;
+ }
+ simple_unlock(&dev->count_lock);
+ device_unbusy(dev->device);
+ return mga_takedown(dev);
+ }
+ simple_unlock(&dev->count_lock);
+ return retcode;
+}
+
+
+/* mga_ioctl is called whenever a process performs an ioctl on /dev/drm. */
+
+int
+mga_ioctl(dev_t kdev, u_long cmd, caddr_t data, int flags, struct proc *p)
+{
+ int nr = DRM_IOCTL_NR(cmd);
+ drm_device_t *dev = kdev->si_drv1;
+ drm_file_t *priv;
+ int retcode = 0;
+ drm_ioctl_desc_t *ioctl;
+ d_ioctl_t *func;
+
+ DRM_DEBUG("dev=%p\n", dev);
+ priv = drm_find_file_by_proc(dev, p);
+ if (!priv) {
+ DRM_DEBUG("can't find authenticator\n");
+ return EINVAL;
+ }
+
+ atomic_inc(&dev->ioctl_count);
+ atomic_inc(&dev->total_ioctl);
+ ++priv->ioctl_count;
+
+ DRM_DEBUG("pid = %d, cmd = 0x%02lx, nr = 0x%02x, auth = %d\n",
+ p->p_pid, cmd, nr, priv->authenticated);
+
+ switch (cmd) {
+ case FIONBIO:
+ atomic_dec(&dev->ioctl_count);
+ return 0;
+
+ case FIOASYNC:
+ atomic_dec(&dev->ioctl_count);
+ dev->flags |= FASYNC;
+ return 0;
+
+ case FIOSETOWN:
+ atomic_dec(&dev->ioctl_count);
+ return fsetown(*(int *)data, &dev->buf_sigio);
+
+ case FIOGETOWN:
+ atomic_dec(&dev->ioctl_count);
+ *(int *) data = fgetown(dev->buf_sigio);
+ return 0;
+ }
+
+ if (nr >= MGA_IOCTL_COUNT) {
+ retcode = EINVAL;
+ } else {
+ ioctl = &mga_ioctls[nr];
+ func = ioctl->func;
+
+ if (!func) {
+ DRM_DEBUG("no function\n");
+ retcode = EINVAL;
+ } else if ((ioctl->root_only && suser(p))
+ || (ioctl->auth_needed && !priv->authenticated)) {
+ retcode = EACCES;
+ } else {
+ retcode = (func)(kdev, cmd, data, flags, p);
+ }
+ }
+
+ atomic_dec(&dev->ioctl_count);
+ return retcode;
+}
+
+int
+mga_unlock(dev_t kdev, u_long cmd, caddr_t data, int flags, struct proc *p)
+{
+ drm_device_t *dev = kdev->si_drv1;
+ drm_lock_t lock;
+ int s;
+
+ lock = *(drm_lock_t *) data;
+
+ if (lock.context == DRM_KERNEL_CONTEXT) {
+ DRM_ERROR("Process %d using kernel context %d\n",
+ p->p_pid, lock.context);
+ return EINVAL;
+ }
+
+ DRM_DEBUG("%d frees lock (%d holds)\n",
+ lock.context,
+ _DRM_LOCKING_CONTEXT(dev->lock.hw_lock->lock));
+ atomic_inc(&dev->total_unlocks);
+ if (_DRM_LOCK_IS_CONT(dev->lock.hw_lock->lock))
+ atomic_inc(&dev->total_contends);
+ drm_lock_transfer(dev, &dev->lock.hw_lock->lock, DRM_KERNEL_CONTEXT);
+
+ s = splsofttq();
+ mga_dma_schedule(dev, 1);
+ splx(s);
+
+ if (drm_lock_free(dev, &dev->lock.hw_lock->lock,
+ DRM_KERNEL_CONTEXT)) {
+ DRM_ERROR("\n");
+ }
+
+ return 0;
+}
diff --git a/bsd/mga/mga_drv.h b/bsd/mga/mga_drv.h
new file mode 100644
index 00000000..9e51a20d
--- /dev/null
+++ b/bsd/mga/mga_drv.h
@@ -0,0 +1,496 @@
+/* mga_drv.h -- Private header for the Matrox g200/g400 driver
+ * Created: Mon Dec 13 01:50:01 1999 by jhartmann@precisioninsight.com
+ *
+ * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
+ * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
+ * All rights reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ *
+ * Authors: Rickard E. (Rik) Faith <faith@valinux.com>
+ * Jeff Hartmann <jhartmann@valinux.com>
+ *
+ */
+
+#ifndef _MGA_DRV_H_
+#define _MGA_DRV_H_
+
+#define MGA_BUF_IN_USE 0
+#define MGA_BUF_SWAP_PENDING 1
+#define MGA_BUF_FORCE_FIRE 2
+#define MGA_BUF_NEEDS_OVERFLOW 3
+
+typedef struct {
+ u_int32_t buffer_status;
+ int num_dwords;
+ int max_dwords;
+ u_int32_t *current_dma_ptr;
+ u_int32_t *head;
+ u_int32_t phys_head;
+ unsigned int prim_age;
+ int sec_used;
+ int idx;
+} drm_mga_prim_buf_t;
+
+typedef struct _drm_mga_freelist {
+ __volatile__ unsigned int age;
+ drm_buf_t *buf;
+ struct _drm_mga_freelist *next;
+ struct _drm_mga_freelist *prev;
+} drm_mga_freelist_t;
+
+#define MGA_IN_DISPATCH 0
+#define MGA_IN_FLUSH 1
+#define MGA_IN_WAIT 2
+#define MGA_IN_GETBUF 3
+
+typedef struct _drm_mga_private {
+ u_int32_t dispatch_status;
+ unsigned int next_prim_age;
+ __volatile__ unsigned int last_prim_age;
+ int reserved_map_idx;
+ int buffer_map_idx;
+ drm_mga_sarea_t *sarea_priv;
+ int primary_size;
+ int warp_ucode_size;
+ int chipset;
+ unsigned int frontOffset;
+ unsigned int backOffset;
+ unsigned int depthOffset;
+ unsigned int textureOffset;
+ unsigned int textureSize;
+ int cpp;
+ unsigned int stride;
+ int sgram;
+ int use_agp;
+ drm_mga_warp_index_t WarpIndex[MGA_MAX_G400_PIPES];
+ unsigned int WarpPipe;
+ unsigned int vertexsize;
+ atomic_t pending_bufs;
+ void *status_page;
+ unsigned long real_status_page;
+ u_int8_t *ioremap;
+ drm_mga_prim_buf_t **prim_bufs;
+ drm_mga_prim_buf_t *next_prim;
+ drm_mga_prim_buf_t *last_prim;
+ drm_mga_prim_buf_t *current_prim;
+ int current_prim_idx;
+ drm_mga_freelist_t *head;
+ drm_mga_freelist_t *tail;
+ int flush_queue; /* Processes waiting until flush */
+ int wait_queue; /* Processes waiting until interrupt */
+ int buf_queue; /* Processes waiting for a free buf */
+ /* Some validated register values:
+ */
+ u_int32_t mAccess;
+} drm_mga_private_t;
+
+ /* mga_drv.c */
+extern int mga_init(device_t);
+extern void mga_cleanup(device_t);
+extern d_ioctl_t mga_version;
+extern d_open_t mga_open;
+extern d_close_t mga_close;
+extern d_ioctl_t mga_ioctl;
+extern d_ioctl_t mga_unlock;
+
+ /* mga_dma.c */
+extern int mga_dma_schedule(drm_device_t *dev, int locked);
+extern int mga_irq_install(drm_device_t *dev, int irq);
+extern int mga_irq_uninstall(drm_device_t *dev);
+extern d_ioctl_t mga_dma;
+extern d_ioctl_t mga_control;
+extern d_ioctl_t mga_lock;
+
+/* mga_dma_init does init and release */
+extern int mga_dma_cleanup(drm_device_t *dev);
+extern d_ioctl_t mga_dma_init;
+extern d_ioctl_t mga_flush_ioctl;
+extern void mga_flush_write_combine(void);
+extern unsigned int mga_create_sync_tag(drm_device_t *dev);
+extern drm_buf_t *mga_freelist_get(drm_device_t *dev);
+extern int mga_freelist_put(drm_device_t *dev, drm_buf_t *buf);
+extern int mga_advance_primary(drm_device_t *dev);
+extern void mga_reclaim_buffers(drm_device_t *dev, pid_t pid);
+
+ /* mga_bufs.c */
+extern d_ioctl_t mga_addbufs;
+extern d_ioctl_t mga_infobufs;
+extern d_ioctl_t mga_markbufs;
+extern d_ioctl_t mga_freebufs;
+extern d_ioctl_t mga_mapbufs;
+extern d_ioctl_t mga_addmap;
+ /* mga_state.c */
+extern d_ioctl_t mga_clear_bufs;
+extern d_ioctl_t mga_swap_bufs;
+extern d_ioctl_t mga_iload;
+extern d_ioctl_t mga_vertex;
+extern d_ioctl_t mga_indices;
+ /* mga_context.c */
+extern d_ioctl_t mga_resctx;
+extern d_ioctl_t mga_addctx;
+extern d_ioctl_t mga_modctx;
+extern d_ioctl_t mga_getctx;
+extern d_ioctl_t mga_switchctx;
+extern d_ioctl_t mga_newctx;
+extern d_ioctl_t mga_rmctx;
+
+extern int mga_context_switch(drm_device_t *dev, int old, int new);
+extern int mga_context_switch_complete(drm_device_t *dev, int new);
+
+
+typedef enum {
+ TT_GENERAL,
+ TT_BLIT,
+ TT_VECTOR,
+ TT_VERTEX
+} transferType_t;
+
+typedef struct {
+ drm_mga_freelist_t *my_freelist;
+ int discard;
+ int dispatched;
+} drm_mga_buf_priv_t;
+
+#define DWGREG0 0x1c00
+#define DWGREG0_END 0x1dff
+#define DWGREG1 0x2c00
+#define DWGREG1_END 0x2dff
+
+#define ISREG0(r) (r >= DWGREG0 && r <= DWGREG0_END)
+#define ADRINDEX0(r) (u_int8_t)((r - DWGREG0) >> 2)
+#define ADRINDEX1(r) (u_int8_t)(((r - DWGREG1) >> 2) | 0x80)
+#define ADRINDEX(r) (ISREG0(r) ? ADRINDEX0(r) : ADRINDEX1(r))
+
+#define MGA_VERBOSE 0
+#define MGA_NUM_PRIM_BUFS 8
+
+#define PRIMLOCALS u_int8_t tempIndex[4]; u_int32_t *dma_ptr; u_int32_t phys_head; \
+ int outcount, num_dwords
+
+#define PRIM_OVERFLOW(dev, dev_priv, length) do { \
+ drm_mga_prim_buf_t *tmp_buf = \
+ dev_priv->prim_bufs[dev_priv->current_prim_idx]; \
+ if( test_bit(MGA_BUF_NEEDS_OVERFLOW, \
+ &tmp_buf->buffer_status)) { \
+ mga_advance_primary(dev); \
+ mga_dma_schedule(dev, 1); \
+ tmp_buf = dev_priv->prim_bufs[dev_priv->current_prim_idx]; \
+ } else if( tmp_buf->max_dwords - tmp_buf->num_dwords < length ||\
+ tmp_buf->sec_used > MGA_DMA_BUF_NR/2) { \
+ set_bit(MGA_BUF_FORCE_FIRE, &tmp_buf->buffer_status); \
+ mga_advance_primary(dev); \
+ mga_dma_schedule(dev, 1); \
+ tmp_buf = dev_priv->prim_bufs[dev_priv->current_prim_idx]; \
+ } \
+ if(MGA_VERBOSE) \
+ DRM_DEBUG("PRIMGETPTR in %s\n", __FUNCTION__); \
+ dma_ptr = tmp_buf->current_dma_ptr; \
+ num_dwords = tmp_buf->num_dwords; \
+ phys_head = tmp_buf->phys_head; \
+ outcount = 0; \
+} while(0)
+
+#define PRIMGETPTR(dev_priv) do { \
+ drm_mga_prim_buf_t *tmp_buf = \
+ dev_priv->prim_bufs[dev_priv->current_prim_idx]; \
+ if(MGA_VERBOSE) \
+ DRM_DEBUG("PRIMGETPTR in %s\n", __FUNCTION__); \
+ dma_ptr = tmp_buf->current_dma_ptr; \
+ num_dwords = tmp_buf->num_dwords; \
+ phys_head = tmp_buf->phys_head; \
+ outcount = 0; \
+} while(0)
+
+#define PRIMPTR(prim_buf) do { \
+ if(MGA_VERBOSE) \
+ DRM_DEBUG("PRIMPTR in %s\n", __FUNCTION__); \
+ dma_ptr = prim_buf->current_dma_ptr; \
+ num_dwords = prim_buf->num_dwords; \
+ phys_head = prim_buf->phys_head; \
+ outcount = 0; \
+} while(0)
+
+#define PRIMFINISH(prim_buf) do { \
+ if (MGA_VERBOSE) { \
+ DRM_DEBUG( "PRIMFINISH in %s\n", __FUNCTION__); \
+ if (outcount & 3) \
+ DRM_DEBUG(" --- truncation\n"); \
+ } \
+ prim_buf->num_dwords = num_dwords; \
+ prim_buf->current_dma_ptr = dma_ptr; \
+} while(0)
+
+#define PRIMADVANCE(dev_priv) do { \
+drm_mga_prim_buf_t *tmp_buf = \
+ dev_priv->prim_bufs[dev_priv->current_prim_idx]; \
+ if (MGA_VERBOSE) { \
+ DRM_DEBUG("PRIMADVANCE in %s\n", __FUNCTION__); \
+ if (outcount & 3) \
+ DRM_DEBUG(" --- truncation\n"); \
+ } \
+ tmp_buf->num_dwords = num_dwords; \
+ tmp_buf->current_dma_ptr = dma_ptr; \
+} while (0)
+
+#define PRIMUPDATE(dev_priv) do { \
+ drm_mga_prim_buf_t *tmp_buf = \
+ dev_priv->prim_bufs[dev_priv->current_prim_idx]; \
+ tmp_buf->sec_used++; \
+} while (0)
+
+#define AGEBUF(dev_priv, buf_priv) do { \
+ drm_mga_prim_buf_t *tmp_buf = \
+ dev_priv->prim_bufs[dev_priv->current_prim_idx]; \
+ buf_priv->my_freelist->age = tmp_buf->prim_age; \
+} while (0)
+
+
+#define PRIMOUTREG(reg, val) do { \
+ tempIndex[outcount]=ADRINDEX(reg); \
+ dma_ptr[1+outcount] = val; \
+ if (MGA_VERBOSE) \
+ DRM_DEBUG(" PRIMOUT %d: 0x%x -- 0x%x\n", \
+ num_dwords + 1 + outcount, ADRINDEX(reg), val); \
+ if( ++outcount == 4) { \
+ outcount = 0; \
+ dma_ptr[0] = *(u_int32_t *)tempIndex; \
+ dma_ptr+=5; \
+ num_dwords += 5; \
+ } \
+}while (0)
+
+/* A reduced set of the mga registers.
+ */
+
+#define MGAREG_MGA_EXEC 0x0100
+#define MGAREG_ALPHACTRL 0x2c7c
+#define MGAREG_AR0 0x1c60
+#define MGAREG_AR1 0x1c64
+#define MGAREG_AR2 0x1c68
+#define MGAREG_AR3 0x1c6c
+#define MGAREG_AR4 0x1c70
+#define MGAREG_AR5 0x1c74
+#define MGAREG_AR6 0x1c78
+#define MGAREG_CXBNDRY 0x1c80
+#define MGAREG_CXLEFT 0x1ca0
+#define MGAREG_CXRIGHT 0x1ca4
+#define MGAREG_DMAPAD 0x1c54
+#define MGAREG_DSTORG 0x2cb8
+#define MGAREG_DWGCTL 0x1c00
+#define MGAREG_DWGSYNC 0x2c4c
+#define MGAREG_FCOL 0x1c24
+#define MGAREG_FIFOSTATUS 0x1e10
+#define MGAREG_FOGCOL 0x1cf4
+#define MGAREG_FXBNDRY 0x1c84
+#define MGAREG_FXLEFT 0x1ca8
+#define MGAREG_FXRIGHT 0x1cac
+#define MGAREG_ICLEAR 0x1e18
+#define MGAREG_IEN 0x1e1c
+#define MGAREG_LEN 0x1c5c
+#define MGAREG_MACCESS 0x1c04
+#define MGAREG_PITCH 0x1c8c
+#define MGAREG_PLNWT 0x1c1c
+#define MGAREG_PRIMADDRESS 0x1e58
+#define MGAREG_PRIMEND 0x1e5c
+#define MGAREG_PRIMPTR 0x1e50
+#define MGAREG_SECADDRESS 0x2c40
+#define MGAREG_SECEND 0x2c44
+#define MGAREG_SETUPADDRESS 0x2cd0
+#define MGAREG_SETUPEND 0x2cd4
+#define MGAREG_SOFTRAP 0x2c48
+#define MGAREG_SRCORG 0x2cb4
+#define MGAREG_STATUS 0x1e14
+#define MGAREG_STENCIL 0x2cc8
+#define MGAREG_STENCILCTL 0x2ccc
+#define MGAREG_TDUALSTAGE0 0x2cf8
+#define MGAREG_TDUALSTAGE1 0x2cfc
+#define MGAREG_TEXBORDERCOL 0x2c5c
+#define MGAREG_TEXCTL 0x2c30
+#define MGAREG_TEXCTL2 0x2c3c
+#define MGAREG_TEXFILTER 0x2c58
+#define MGAREG_TEXHEIGHT 0x2c2c
+#define MGAREG_TEXORG 0x2c24
+#define MGAREG_TEXORG1 0x2ca4
+#define MGAREG_TEXORG2 0x2ca8
+#define MGAREG_TEXORG3 0x2cac
+#define MGAREG_TEXORG4 0x2cb0
+#define MGAREG_TEXTRANS 0x2c34
+#define MGAREG_TEXTRANSHIGH 0x2c38
+#define MGAREG_TEXWIDTH 0x2c28
+#define MGAREG_WACCEPTSEQ 0x1dd4
+#define MGAREG_WCODEADDR 0x1e6c
+#define MGAREG_WFLAG 0x1dc4
+#define MGAREG_WFLAG1 0x1de0
+#define MGAREG_WFLAGNB 0x1e64
+#define MGAREG_WFLAGNB1 0x1e08
+#define MGAREG_WGETMSB 0x1dc8
+#define MGAREG_WIADDR 0x1dc0
+#define MGAREG_WIADDR2 0x1dd8
+#define MGAREG_WMISC 0x1e70
+#define MGAREG_WVRTXSZ 0x1dcc
+#define MGAREG_YBOT 0x1c9c
+#define MGAREG_YDST 0x1c90
+#define MGAREG_YDSTLEN 0x1c88
+#define MGAREG_YDSTORG 0x1c94
+#define MGAREG_YTOP 0x1c98
+#define MGAREG_ZORG 0x1c0c
+
+/* Warp registers */
+#define MGAREG_WR0 0x2d00
+#define MGAREG_WR1 0x2d04
+#define MGAREG_WR2 0x2d08
+#define MGAREG_WR3 0x2d0c
+#define MGAREG_WR4 0x2d10
+#define MGAREG_WR5 0x2d14
+#define MGAREG_WR6 0x2d18
+#define MGAREG_WR7 0x2d1c
+#define MGAREG_WR8 0x2d20
+#define MGAREG_WR9 0x2d24
+#define MGAREG_WR10 0x2d28
+#define MGAREG_WR11 0x2d2c
+#define MGAREG_WR12 0x2d30
+#define MGAREG_WR13 0x2d34
+#define MGAREG_WR14 0x2d38
+#define MGAREG_WR15 0x2d3c
+#define MGAREG_WR16 0x2d40
+#define MGAREG_WR17 0x2d44
+#define MGAREG_WR18 0x2d48
+#define MGAREG_WR19 0x2d4c
+#define MGAREG_WR20 0x2d50
+#define MGAREG_WR21 0x2d54
+#define MGAREG_WR22 0x2d58
+#define MGAREG_WR23 0x2d5c
+#define MGAREG_WR24 0x2d60
+#define MGAREG_WR25 0x2d64
+#define MGAREG_WR26 0x2d68
+#define MGAREG_WR27 0x2d6c
+#define MGAREG_WR28 0x2d70
+#define MGAREG_WR29 0x2d74
+#define MGAREG_WR30 0x2d78
+#define MGAREG_WR31 0x2d7c
+#define MGAREG_WR32 0x2d80
+#define MGAREG_WR33 0x2d84
+#define MGAREG_WR34 0x2d88
+#define MGAREG_WR35 0x2d8c
+#define MGAREG_WR36 0x2d90
+#define MGAREG_WR37 0x2d94
+#define MGAREG_WR38 0x2d98
+#define MGAREG_WR39 0x2d9c
+#define MGAREG_WR40 0x2da0
+#define MGAREG_WR41 0x2da4
+#define MGAREG_WR42 0x2da8
+#define MGAREG_WR43 0x2dac
+#define MGAREG_WR44 0x2db0
+#define MGAREG_WR45 0x2db4
+#define MGAREG_WR46 0x2db8
+#define MGAREG_WR47 0x2dbc
+#define MGAREG_WR48 0x2dc0
+#define MGAREG_WR49 0x2dc4
+#define MGAREG_WR50 0x2dc8
+#define MGAREG_WR51 0x2dcc
+#define MGAREG_WR52 0x2dd0
+#define MGAREG_WR53 0x2dd4
+#define MGAREG_WR54 0x2dd8
+#define MGAREG_WR55 0x2ddc
+#define MGAREG_WR56 0x2de0
+#define MGAREG_WR57 0x2de4
+#define MGAREG_WR58 0x2de8
+#define MGAREG_WR59 0x2dec
+#define MGAREG_WR60 0x2df0
+#define MGAREG_WR61 0x2df4
+#define MGAREG_WR62 0x2df8
+#define MGAREG_WR63 0x2dfc
+
+
+#define PDEA_pagpxfer_enable 0x2
+
+#define WIA_wmode_suspend 0x0
+#define WIA_wmode_start 0x3
+#define WIA_wagp_agp 0x4
+
+#define DC_opcod_line_open 0x0
+#define DC_opcod_autoline_open 0x1
+#define DC_opcod_line_close 0x2
+#define DC_opcod_autoline_close 0x3
+#define DC_opcod_trap 0x4
+#define DC_opcod_texture_trap 0x6
+#define DC_opcod_bitblt 0x8
+#define DC_opcod_iload 0x9
+#define DC_atype_rpl 0x0
+#define DC_atype_rstr 0x10
+#define DC_atype_zi 0x30
+#define DC_atype_blk 0x40
+#define DC_atype_i 0x70
+#define DC_linear_xy 0x0
+#define DC_linear_linear 0x80
+#define DC_zmode_nozcmp 0x0
+#define DC_zmode_ze 0x200
+#define DC_zmode_zne 0x300
+#define DC_zmode_zlt 0x400
+#define DC_zmode_zlte 0x500
+#define DC_zmode_zgt 0x600
+#define DC_zmode_zgte 0x700
+#define DC_solid_disable 0x0
+#define DC_solid_enable 0x800
+#define DC_arzero_disable 0x0
+#define DC_arzero_enable 0x1000
+#define DC_sgnzero_disable 0x0
+#define DC_sgnzero_enable 0x2000
+#define DC_shftzero_disable 0x0
+#define DC_shftzero_enable 0x4000
+#define DC_bop_SHIFT 16
+#define DC_trans_SHIFT 20
+#define DC_bltmod_bmonolef 0x0
+#define DC_bltmod_bmonowf 0x8000000
+#define DC_bltmod_bplan 0x2000000
+#define DC_bltmod_bfcol 0x4000000
+#define DC_bltmod_bu32bgr 0x6000000
+#define DC_bltmod_bu32rgb 0xe000000
+#define DC_bltmod_bu24bgr 0x16000000
+#define DC_bltmod_bu24rgb 0x1e000000
+#define DC_pattern_disable 0x0
+#define DC_pattern_enable 0x20000000
+#define DC_transc_disable 0x0
+#define DC_transc_enable 0x40000000
+#define DC_clipdis_disable 0x0
+#define DC_clipdis_enable 0x80000000
+
+#define SETADD_mode_vertlist 0x0
+
+
+#define MGA_CLEAR_CMD (DC_opcod_trap | DC_arzero_enable | \
+ DC_sgnzero_enable | DC_shftzero_enable | \
+ (0xC << DC_bop_SHIFT) | DC_clipdis_enable | \
+ DC_solid_enable | DC_transc_enable)
+
+
+#define MGA_COPY_CMD (DC_opcod_bitblt | DC_atype_rpl | DC_linear_xy | \
+ DC_solid_disable | DC_arzero_disable | \
+ DC_sgnzero_enable | DC_shftzero_enable | \
+ (0xC << DC_bop_SHIFT) | DC_bltmod_bfcol | \
+ DC_pattern_disable | DC_transc_disable | \
+ DC_clipdis_enable) \
+
+#define MGA_FLUSH_CMD (DC_opcod_texture_trap | (0xF << DC_trans_SHIFT) |\
+ DC_arzero_enable | DC_sgnzero_enable | \
+ DC_atype_i)
+
+#endif
diff --git a/bsd/mga/mga_state.c b/bsd/mga/mga_state.c
new file mode 100644
index 00000000..fb365631
--- /dev/null
+++ b/bsd/mga/mga_state.c
@@ -0,0 +1,1109 @@
+/* mga_state.c -- State support for mga g200/g400
+ * Created: Thu Jan 27 02:53:43 2000 by jhartmann@precisioninsight.com
+ *
+ * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
+ * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ *
+ * Authors: Jeff Hartmann <jhartmann@precisioninsight.com>
+ * Keith Whitwell <keithw@precisioninsight.com>
+ *
+ */
+
+#define __NO_VERSION__
+#include "drmP.h"
+#include "mga_drv.h"
+#include "drm.h"
+
+typedef u_int16_t u16;
+typedef u_int32_t u32;
+
+#define MGAEMITCLIP_SIZE 10
+#define MGAEMITCTX_SIZE 20
+#define MGAG200EMITTEX_SIZE 20
+#define MGAG400EMITTEX0_SIZE 30
+#define MGAG400EMITTEX1_SIZE 25
+#define MGAG400EMITPIPE_SIZE 50
+#define MGAG200EMITPIPE_SIZE 15
+
+#define MAX_STATE_SIZE ((MGAEMITCLIP_SIZE * MGA_NR_SAREA_CLIPRECTS) + \
+ MGAEMITCTX_SIZE + MGAG400EMITTEX0_SIZE + \
+ MGAG400EMITTEX1_SIZE + MGAG400EMITPIPE_SIZE)
+
+
+
+static void mgaEmitClipRect(drm_mga_private_t * dev_priv,
+ drm_clip_rect_t * box)
+{
+ drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
+ unsigned int *regs = sarea_priv->ContextState;
+ PRIMLOCALS;
+ DRM_DEBUG("%s\n", __FUNCTION__);
+
+ /* This takes 10 dwords */
+ PRIMGETPTR(dev_priv);
+
+ /* Force reset of dwgctl (eliminates clip disable) */
+ if (dev_priv->chipset == MGA_CARD_TYPE_G400) {
+#if 0
+ PRIMOUTREG(MGAREG_DMAPAD, 0);
+ PRIMOUTREG(MGAREG_DWGSYNC, 0);
+ PRIMOUTREG(MGAREG_DWGSYNC, 0);
+ PRIMOUTREG(MGAREG_DWGCTL, regs[MGA_CTXREG_DWGCTL]);
+#else
+ PRIMOUTREG(MGAREG_DWGCTL, regs[MGA_CTXREG_DWGCTL]);
+ PRIMOUTREG(MGAREG_LEN + MGAREG_MGA_EXEC, 0x80000000);
+ PRIMOUTREG(MGAREG_DWGCTL, regs[MGA_CTXREG_DWGCTL]);
+ PRIMOUTREG(MGAREG_LEN + MGAREG_MGA_EXEC, 0x80000000);
+#endif
+ }
+ PRIMOUTREG(MGAREG_DMAPAD, 0);
+ PRIMOUTREG(MGAREG_CXBNDRY, ((box->x2) << 16) | (box->x1));
+ PRIMOUTREG(MGAREG_YTOP, box->y1 * dev_priv->stride / dev_priv->cpp);
+ PRIMOUTREG(MGAREG_YBOT, box->y2 * dev_priv->stride / dev_priv->cpp);
+
+ PRIMADVANCE(dev_priv);
+}
+
+static void mgaEmitContext(drm_mga_private_t * dev_priv)
+{
+ drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
+ unsigned int *regs = sarea_priv->ContextState;
+ PRIMLOCALS;
+ DRM_DEBUG("%s\n", __FUNCTION__);
+
+ /* This takes a max of 20 dwords */
+ PRIMGETPTR(dev_priv);
+
+ PRIMOUTREG(MGAREG_DSTORG, regs[MGA_CTXREG_DSTORG]);
+ PRIMOUTREG(MGAREG_MACCESS, regs[MGA_CTXREG_MACCESS]);
+ PRIMOUTREG(MGAREG_PLNWT, regs[MGA_CTXREG_PLNWT]);
+ PRIMOUTREG(MGAREG_DWGCTL, regs[MGA_CTXREG_DWGCTL]);
+
+ PRIMOUTREG(MGAREG_ALPHACTRL, regs[MGA_CTXREG_ALPHACTRL]);
+ PRIMOUTREG(MGAREG_FOGCOL, regs[MGA_CTXREG_FOGCOLOR]);
+ PRIMOUTREG(MGAREG_WFLAG, regs[MGA_CTXREG_WFLAG]);
+ PRIMOUTREG(MGAREG_ZORG, dev_priv->depthOffset); /* invarient */
+
+ if (dev_priv->chipset == MGA_CARD_TYPE_G400) {
+ PRIMOUTREG(MGAREG_WFLAG1, regs[MGA_CTXREG_WFLAG]);
+ PRIMOUTREG(MGAREG_TDUALSTAGE0, regs[MGA_CTXREG_TDUAL0]);
+ PRIMOUTREG(MGAREG_TDUALSTAGE1, regs[MGA_CTXREG_TDUAL1]);
+ PRIMOUTREG(MGAREG_FCOL, regs[MGA_CTXREG_FCOL]);
+
+ PRIMOUTREG(MGAREG_STENCIL, regs[MGA_CTXREG_STENCIL]);
+ PRIMOUTREG(MGAREG_STENCILCTL, regs[MGA_CTXREG_STENCILCTL]);
+ PRIMOUTREG(MGAREG_DMAPAD, 0);
+ PRIMOUTREG(MGAREG_DMAPAD, 0);
+
+ } else {
+ PRIMOUTREG(MGAREG_FCOL, regs[MGA_CTXREG_FCOL]);
+ PRIMOUTREG(MGAREG_DMAPAD, 0);
+ PRIMOUTREG(MGAREG_DMAPAD, 0);
+ PRIMOUTREG(MGAREG_DMAPAD, 0);
+ }
+
+ PRIMADVANCE(dev_priv);
+}
+
+static void mgaG200EmitTex(drm_mga_private_t * dev_priv)
+{
+ drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
+ unsigned int *regs = sarea_priv->TexState[0];
+ PRIMLOCALS;
+ DRM_DEBUG("%s\n", __FUNCTION__);
+
+ PRIMGETPTR(dev_priv);
+
+ /* This takes 20 dwords */
+
+ PRIMOUTREG(MGAREG_TEXCTL2, regs[MGA_TEXREG_CTL2]);
+ PRIMOUTREG(MGAREG_TEXCTL, regs[MGA_TEXREG_CTL]);
+ PRIMOUTREG(MGAREG_TEXFILTER, regs[MGA_TEXREG_FILTER]);
+ PRIMOUTREG(MGAREG_TEXBORDERCOL, regs[MGA_TEXREG_BORDERCOL]);
+
+ PRIMOUTREG(MGAREG_TEXORG, regs[MGA_TEXREG_ORG]);
+ PRIMOUTREG(MGAREG_TEXORG1, regs[MGA_TEXREG_ORG1]);
+ PRIMOUTREG(MGAREG_TEXORG2, regs[MGA_TEXREG_ORG2]);
+ PRIMOUTREG(MGAREG_TEXORG3, regs[MGA_TEXREG_ORG3]);
+
+ PRIMOUTREG(MGAREG_TEXORG4, regs[MGA_TEXREG_ORG4]);
+ PRIMOUTREG(MGAREG_TEXWIDTH, regs[MGA_TEXREG_WIDTH]);
+ PRIMOUTREG(MGAREG_TEXHEIGHT, regs[MGA_TEXREG_HEIGHT]);
+ PRIMOUTREG(MGAREG_WR24, regs[MGA_TEXREG_WIDTH]);
+
+ PRIMOUTREG(MGAREG_WR34, regs[MGA_TEXREG_HEIGHT]);
+ PRIMOUTREG(MGAREG_TEXTRANS, 0xffff);
+ PRIMOUTREG(MGAREG_TEXTRANSHIGH, 0xffff);
+ PRIMOUTREG(MGAREG_DMAPAD, 0);
+
+ PRIMADVANCE(dev_priv);
+}
+
+#define TMC_dualtex_enable 0x80
+
+static void mgaG400EmitTex0(drm_mga_private_t * dev_priv)
+{
+ drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
+ unsigned int *regs = sarea_priv->TexState[0];
+ PRIMLOCALS;
+ DRM_DEBUG("%s\n", __FUNCTION__);
+
+ PRIMGETPTR(dev_priv);
+
+ /* This takes a max of 30 dwords */
+
+ PRIMOUTREG(MGAREG_TEXCTL2, regs[MGA_TEXREG_CTL2] | 0x00008000);
+ PRIMOUTREG(MGAREG_TEXCTL, regs[MGA_TEXREG_CTL]);
+ PRIMOUTREG(MGAREG_TEXFILTER, regs[MGA_TEXREG_FILTER]);
+ PRIMOUTREG(MGAREG_TEXBORDERCOL, regs[MGA_TEXREG_BORDERCOL]);
+
+ PRIMOUTREG(MGAREG_TEXORG, regs[MGA_TEXREG_ORG]);
+ PRIMOUTREG(MGAREG_TEXORG1, regs[MGA_TEXREG_ORG1]);
+ PRIMOUTREG(MGAREG_TEXORG2, regs[MGA_TEXREG_ORG2]);
+ PRIMOUTREG(MGAREG_TEXORG3, regs[MGA_TEXREG_ORG3]);
+
+ PRIMOUTREG(MGAREG_TEXORG4, regs[MGA_TEXREG_ORG4]);
+ PRIMOUTREG(MGAREG_TEXWIDTH, regs[MGA_TEXREG_WIDTH]);
+ PRIMOUTREG(MGAREG_TEXHEIGHT, regs[MGA_TEXREG_HEIGHT]);
+ PRIMOUTREG(MGAREG_WR49, 0);
+
+ PRIMOUTREG(MGAREG_WR57, 0);
+ PRIMOUTREG(MGAREG_WR53, 0);
+ PRIMOUTREG(MGAREG_WR61, 0);
+ PRIMOUTREG(MGAREG_WR52, 0x40);
+
+ PRIMOUTREG(MGAREG_WR60, 0x40);
+ PRIMOUTREG(MGAREG_WR54, regs[MGA_TEXREG_WIDTH] | 0x40);
+ PRIMOUTREG(MGAREG_WR62, regs[MGA_TEXREG_HEIGHT] | 0x40);
+ PRIMOUTREG(MGAREG_DMAPAD, 0);
+
+ PRIMOUTREG(MGAREG_DMAPAD, 0);
+ PRIMOUTREG(MGAREG_DMAPAD, 0);
+
+ PRIMOUTREG(MGAREG_TEXTRANS, 0xffff);
+ PRIMOUTREG(MGAREG_TEXTRANSHIGH, 0xffff);
+
+ PRIMADVANCE(dev_priv);
+}
+
+#define TMC_map1_enable 0x80000000
+
+static void mgaG400EmitTex1(drm_mga_private_t * dev_priv)
+{
+ drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
+ unsigned int *regs = sarea_priv->TexState[1];
+ PRIMLOCALS;
+ DRM_DEBUG("%s\n", __FUNCTION__);
+
+ PRIMGETPTR(dev_priv);
+
+ /* This takes 25 dwords */
+
+ PRIMOUTREG(MGAREG_TEXCTL2,
+ regs[MGA_TEXREG_CTL2] | TMC_map1_enable | 0x00008000);
+ PRIMOUTREG(MGAREG_TEXCTL, regs[MGA_TEXREG_CTL]);
+ PRIMOUTREG(MGAREG_TEXFILTER, regs[MGA_TEXREG_FILTER]);
+ PRIMOUTREG(MGAREG_TEXBORDERCOL, regs[MGA_TEXREG_BORDERCOL]);
+
+ PRIMOUTREG(MGAREG_TEXORG, regs[MGA_TEXREG_ORG]);
+ PRIMOUTREG(MGAREG_TEXORG1, regs[MGA_TEXREG_ORG1]);
+ PRIMOUTREG(MGAREG_TEXORG2, regs[MGA_TEXREG_ORG2]);
+ PRIMOUTREG(MGAREG_TEXORG3, regs[MGA_TEXREG_ORG3]);
+
+ PRIMOUTREG(MGAREG_TEXORG4, regs[MGA_TEXREG_ORG4]);
+ PRIMOUTREG(MGAREG_TEXWIDTH, regs[MGA_TEXREG_WIDTH]);
+ PRIMOUTREG(MGAREG_TEXHEIGHT, regs[MGA_TEXREG_HEIGHT]);
+ PRIMOUTREG(MGAREG_WR49, 0);
+
+ PRIMOUTREG(MGAREG_WR57, 0);
+ PRIMOUTREG(MGAREG_WR53, 0);
+ PRIMOUTREG(MGAREG_WR61, 0);
+ PRIMOUTREG(MGAREG_WR52, regs[MGA_TEXREG_WIDTH] | 0x40);
+
+ PRIMOUTREG(MGAREG_WR60, regs[MGA_TEXREG_HEIGHT] | 0x40);
+
+ PRIMOUTREG(MGAREG_TEXTRANS, 0xffff);
+ PRIMOUTREG(MGAREG_TEXTRANSHIGH, 0xffff);
+ PRIMOUTREG(MGAREG_TEXCTL2, regs[MGA_TEXREG_CTL2] | 0x00008000);
+
+ PRIMADVANCE(dev_priv);
+}
+
+#define MAGIC_FPARAM_HEX_VALUE 0x46480000
+/* This is the hex value of 12800.0f which is a magic value we must
+ * set in wr56.
+ */
+
+
+#define EMIT_PIPE 50
+static void mgaG400EmitPipe(drm_mga_private_t * dev_priv)
+{
+ drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
+ unsigned int pipe = sarea_priv->WarpPipe;
+ PRIMLOCALS;
+ DRM_DEBUG("%s\n", __FUNCTION__);
+
+ PRIMGETPTR(dev_priv);
+
+ /* This takes 50 dwords */
+
+ /* Establish vertex size.
+ */
+ PRIMOUTREG(MGAREG_WIADDR2, WIA_wmode_suspend);
+ PRIMOUTREG(MGAREG_DMAPAD, 0);
+ PRIMOUTREG(MGAREG_DMAPAD, 0);
+ PRIMOUTREG(MGAREG_DMAPAD, 0);
+
+ if (pipe & MGA_T2) {
+ PRIMOUTREG(MGAREG_WVRTXSZ, 0x00001e09);
+ PRIMOUTREG(MGAREG_DMAPAD, 0);
+ PRIMOUTREG(MGAREG_DMAPAD, 0);
+ PRIMOUTREG(MGAREG_DMAPAD, 0);
+
+ PRIMOUTREG(MGAREG_WACCEPTSEQ, 0);
+ PRIMOUTREG(MGAREG_WACCEPTSEQ, 0);
+ PRIMOUTREG(MGAREG_WACCEPTSEQ, 0);
+ PRIMOUTREG(MGAREG_WACCEPTSEQ, 0x1e000000);
+ } else {
+ if (dev_priv->WarpPipe & MGA_T2) {
+ /* Flush the WARP pipe */
+ PRIMOUTREG(MGAREG_YDST, 0);
+ PRIMOUTREG(MGAREG_FXLEFT, 0);
+ PRIMOUTREG(MGAREG_FXRIGHT, 1);
+ PRIMOUTREG(MGAREG_DWGCTL, MGA_FLUSH_CMD);
+
+ PRIMOUTREG(MGAREG_LEN + MGAREG_MGA_EXEC, 1);
+ PRIMOUTREG(MGAREG_DWGSYNC, 0x7000);
+ PRIMOUTREG(MGAREG_TEXCTL2, 0x00008000);
+ PRIMOUTREG(MGAREG_LEN + MGAREG_MGA_EXEC, 0);
+
+ PRIMOUTREG(MGAREG_TEXCTL2, 0x80 | 0x00008000);
+ PRIMOUTREG(MGAREG_LEN + MGAREG_MGA_EXEC, 0);
+ PRIMOUTREG(MGAREG_TEXCTL2, 0x00008000);
+ PRIMOUTREG(MGAREG_DMAPAD, 0);
+ }
+
+ PRIMOUTREG(MGAREG_WVRTXSZ, 0x00001807);
+ PRIMOUTREG(MGAREG_DMAPAD, 0);
+ PRIMOUTREG(MGAREG_DMAPAD, 0);
+ PRIMOUTREG(MGAREG_DMAPAD, 0);
+
+ PRIMOUTREG(MGAREG_WACCEPTSEQ, 0);
+ PRIMOUTREG(MGAREG_WACCEPTSEQ, 0);
+ PRIMOUTREG(MGAREG_WACCEPTSEQ, 0);
+ PRIMOUTREG(MGAREG_WACCEPTSEQ, 0x18000000);
+ }
+
+ PRIMOUTREG(MGAREG_WFLAG, 0);
+ PRIMOUTREG(MGAREG_WFLAG1, 0);
+ PRIMOUTREG(MGAREG_WR56, MAGIC_FPARAM_HEX_VALUE);
+ PRIMOUTREG(MGAREG_DMAPAD, 0);
+
+ PRIMOUTREG(MGAREG_WR49, 0); /* Tex stage 0 */
+ PRIMOUTREG(MGAREG_WR57, 0); /* Tex stage 0 */
+ PRIMOUTREG(MGAREG_WR53, 0); /* Tex stage 1 */
+ PRIMOUTREG(MGAREG_WR61, 0); /* Tex stage 1 */
+
+
+ PRIMOUTREG(MGAREG_WR54, 0x40); /* Tex stage 0 : w */
+ PRIMOUTREG(MGAREG_WR62, 0x40); /* Tex stage 0 : h */
+ PRIMOUTREG(MGAREG_WR52, 0x40); /* Tex stage 1 : w */
+ PRIMOUTREG(MGAREG_WR60, 0x40); /* Tex stage 1 : h */
+
+
+ /* Dma pading required due to hw bug */
+ PRIMOUTREG(MGAREG_DMAPAD, 0xffffffff);
+ PRIMOUTREG(MGAREG_DMAPAD, 0xffffffff);
+ PRIMOUTREG(MGAREG_DMAPAD, 0xffffffff);
+ PRIMOUTREG(MGAREG_WIADDR2,
+ (u32) (dev_priv->WarpIndex[pipe].
+ phys_addr | WIA_wmode_start | WIA_wagp_agp));
+ PRIMADVANCE(dev_priv);
+}
+
+static void mgaG200EmitPipe(drm_mga_private_t * dev_priv)
+{
+ drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
+ unsigned int pipe = sarea_priv->WarpPipe;
+ PRIMLOCALS;
+ DRM_DEBUG("%s\n", __FUNCTION__);
+
+ PRIMGETPTR(dev_priv);
+
+ /* This takes 15 dwords */
+
+ PRIMOUTREG(MGAREG_WIADDR, WIA_wmode_suspend);
+ PRIMOUTREG(MGAREG_WVRTXSZ, 7);
+ PRIMOUTREG(MGAREG_WFLAG, 0);
+ PRIMOUTREG(MGAREG_WR24, 0); /* tex w/h */
+
+ PRIMOUTREG(MGAREG_WR25, 0x100);
+ PRIMOUTREG(MGAREG_WR34, 0); /* tex w/h */
+ PRIMOUTREG(MGAREG_WR42, 0xFFFF);
+ PRIMOUTREG(MGAREG_WR60, 0xFFFF);
+
+ /* Dma pading required due to hw bug */
+ PRIMOUTREG(MGAREG_DMAPAD, 0xffffffff);
+ PRIMOUTREG(MGAREG_DMAPAD, 0xffffffff);
+ PRIMOUTREG(MGAREG_DMAPAD, 0xffffffff);
+ PRIMOUTREG(MGAREG_WIADDR,
+ (u32) (dev_priv->WarpIndex[pipe].
+ phys_addr | WIA_wmode_start | WIA_wagp_agp));
+
+ PRIMADVANCE(dev_priv);
+}
+
+static void mgaEmitState(drm_mga_private_t * dev_priv)
+{
+ drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
+ unsigned int dirty = sarea_priv->dirty;
+ DRM_DEBUG("%s\n", __FUNCTION__);
+
+ if (dev_priv->chipset == MGA_CARD_TYPE_G400) {
+ int multitex = sarea_priv->WarpPipe & MGA_T2;
+
+ if (sarea_priv->WarpPipe != dev_priv->WarpPipe) {
+ mgaG400EmitPipe(dev_priv);
+ dev_priv->WarpPipe = sarea_priv->WarpPipe;
+ }
+
+ if (dirty & MGA_UPLOAD_CTX) {
+ mgaEmitContext(dev_priv);
+ sarea_priv->dirty &= ~MGA_UPLOAD_CTX;
+ }
+
+ if (dirty & MGA_UPLOAD_TEX0) {
+ mgaG400EmitTex0(dev_priv);
+ sarea_priv->dirty &= ~MGA_UPLOAD_TEX0;
+ }
+
+ if ((dirty & MGA_UPLOAD_TEX1) && multitex) {
+ mgaG400EmitTex1(dev_priv);
+ sarea_priv->dirty &= ~MGA_UPLOAD_TEX1;
+ }
+ } else {
+ if (sarea_priv->WarpPipe != dev_priv->WarpPipe) {
+ mgaG200EmitPipe(dev_priv);
+ dev_priv->WarpPipe = sarea_priv->WarpPipe;
+ }
+
+ if (dirty & MGA_UPLOAD_CTX) {
+ mgaEmitContext(dev_priv);
+ sarea_priv->dirty &= ~MGA_UPLOAD_CTX;
+ }
+
+ if (dirty & MGA_UPLOAD_TEX0) {
+ mgaG200EmitTex(dev_priv);
+ sarea_priv->dirty &= ~MGA_UPLOAD_TEX0;
+ }
+ }
+}
+
+
+/* Disallow all write destinations except the front and backbuffer.
+ */
+static int mgaVerifyContext(drm_mga_private_t * dev_priv)
+{
+ drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
+ unsigned int *regs = sarea_priv->ContextState;
+
+ DRM_DEBUG("%s\n", __FUNCTION__);
+
+ if (regs[MGA_CTXREG_DSTORG] != dev_priv->frontOffset &&
+ regs[MGA_CTXREG_DSTORG] != dev_priv->backOffset) {
+ DRM_DEBUG("BAD DSTORG: %x (front %x, back %x)\n\n",
+ regs[MGA_CTXREG_DSTORG], dev_priv->frontOffset,
+ dev_priv->backOffset);
+ regs[MGA_CTXREG_DSTORG] = 0;
+ return -1;
+ }
+
+ return 0;
+}
+
+/* Disallow texture reads from PCI space.
+ */
+static int mgaVerifyTex(drm_mga_private_t * dev_priv, int unit)
+{
+ drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
+
+ DRM_DEBUG("%s\n", __FUNCTION__);
+
+ if ((sarea_priv->TexState[unit][MGA_TEXREG_ORG] & 0x3) == 0x1) {
+ DRM_DEBUG("BAD TEXREG_ORG: %x, unit %d\n",
+ sarea_priv->TexState[unit][MGA_TEXREG_ORG],
+ unit);
+ sarea_priv->TexState[unit][MGA_TEXREG_ORG] = 0;
+ return -1;
+ }
+
+ return 0;
+}
+
+static int mgaVerifyState(drm_mga_private_t * dev_priv)
+{
+ drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
+ unsigned int dirty = sarea_priv->dirty;
+ int rv = 0;
+
+ DRM_DEBUG("%s\n", __FUNCTION__);
+
+ if (sarea_priv->nbox > MGA_NR_SAREA_CLIPRECTS)
+ sarea_priv->nbox = MGA_NR_SAREA_CLIPRECTS;
+
+ if (dirty & MGA_UPLOAD_CTX)
+ rv |= mgaVerifyContext(dev_priv);
+
+ if (dirty & MGA_UPLOAD_TEX0)
+ rv |= mgaVerifyTex(dev_priv, 0);
+
+ if (dev_priv->chipset == MGA_CARD_TYPE_G400) {
+ if (dirty & MGA_UPLOAD_TEX1)
+ rv |= mgaVerifyTex(dev_priv, 1);
+
+ if (dirty & MGA_UPLOAD_PIPE)
+ rv |= (sarea_priv->WarpPipe > MGA_MAX_G400_PIPES);
+ } else {
+ if (dirty & MGA_UPLOAD_PIPE)
+ rv |= (sarea_priv->WarpPipe > MGA_MAX_G200_PIPES);
+ }
+
+ return rv == 0;
+}
+
+static int mgaVerifyIload(drm_mga_private_t * dev_priv,
+ unsigned long bus_address,
+ unsigned int dstOrg, int length)
+{
+ DRM_DEBUG("%s\n", __FUNCTION__);
+
+ if (dstOrg < dev_priv->textureOffset ||
+ dstOrg + length >
+ (dev_priv->textureOffset + dev_priv->textureSize)) {
+ return EINVAL;
+ }
+ if (length % 64) {
+ return EINVAL;
+ }
+ return 0;
+}
+
+/* This copies a 64 byte aligned agp region to the frambuffer
+ * with a standard blit, the ioctl needs to do checking */
+
+static void mga_dma_dispatch_tex_blit(drm_device_t * dev,
+ unsigned long bus_address,
+ int length, unsigned int destOrg)
+{
+ drm_mga_private_t *dev_priv = dev->dev_private;
+ int use_agp = PDEA_pagpxfer_enable | 0x00000001;
+ u16 y2;
+ PRIMLOCALS;
+ DRM_DEBUG("%s\n", __FUNCTION__);
+
+ y2 = length / 64;
+
+ PRIM_OVERFLOW(dev, dev_priv, 30);
+
+ PRIMOUTREG(MGAREG_DSTORG, destOrg);
+ PRIMOUTREG(MGAREG_MACCESS, 0x00000000);
+ DRM_DEBUG("srcorg : %lx\n", bus_address | use_agp);
+ PRIMOUTREG(MGAREG_SRCORG, (u32) bus_address | use_agp);
+ PRIMOUTREG(MGAREG_AR5, 64);
+
+ PRIMOUTREG(MGAREG_PITCH, 64);
+ PRIMOUTREG(MGAREG_DMAPAD, 0);
+ PRIMOUTREG(MGAREG_DMAPAD, 0);
+ PRIMOUTREG(MGAREG_DWGCTL, MGA_COPY_CMD);
+
+ PRIMOUTREG(MGAREG_AR0, 63);
+ PRIMOUTREG(MGAREG_AR3, 0);
+ PRIMOUTREG(MGAREG_FXBNDRY, (63 << 16));
+ PRIMOUTREG(MGAREG_YDSTLEN + MGAREG_MGA_EXEC, y2);
+
+ PRIMOUTREG(MGAREG_DMAPAD, 0);
+ PRIMOUTREG(MGAREG_SRCORG, 0);
+ PRIMOUTREG(MGAREG_PITCH, dev_priv->stride / dev_priv->cpp);
+ PRIMOUTREG(MGAREG_DWGSYNC, 0x7000);
+
+ PRIMADVANCE(dev_priv);
+}
+
+static void mga_dma_dispatch_vertex(drm_device_t * dev, drm_buf_t * buf)
+{
+ drm_mga_private_t *dev_priv = dev->dev_private;
+ drm_mga_buf_priv_t *buf_priv = buf->dev_private;
+ drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
+ unsigned long address = (unsigned long) buf->bus_address;
+ int length = buf->used;
+ int use_agp = PDEA_pagpxfer_enable;
+ int i = 0;
+ PRIMLOCALS;
+ DRM_DEBUG("%s\n", __FUNCTION__);
+
+ DRM_DEBUG("dispatch vertex %d addr 0x%lx, "
+ "length 0x%x nbox %d dirty %x\n",
+ buf->idx, address, length,
+ sarea_priv->nbox, sarea_priv->dirty);
+
+ DRM_DEBUG("used : %d, total : %d\n", buf->used, buf->total);
+
+ if (buf->used) {
+ /* WARNING: if you change any of the state functions verify
+ * these numbers (Overestimating this doesn't hurt).
+ */
+ buf_priv->dispatched = 1;
+ PRIM_OVERFLOW(dev, dev_priv,
+ (MAX_STATE_SIZE + (5 * MGA_NR_SAREA_CLIPRECTS)));
+ mgaEmitState(dev_priv);
+
+#if 0
+ length = dev_priv->vertexsize * 3 * 4;
+#endif
+
+
+
+ do {
+ if (i < sarea_priv->nbox) {
+ DRM_DEBUG("idx %d Emit box %d/%d:"
+ "%d,%d - %d,%d\n",
+ buf->idx,
+ i, sarea_priv->nbox,
+ sarea_priv->boxes[i].x1,
+ sarea_priv->boxes[i].y1,
+ sarea_priv->boxes[i].x2,
+ sarea_priv->boxes[i].y2);
+
+ mgaEmitClipRect(dev_priv,
+ &sarea_priv->boxes[i]);
+ }
+
+ PRIMGETPTR(dev_priv);
+ PRIMOUTREG(MGAREG_DMAPAD, 0);
+ PRIMOUTREG(MGAREG_DMAPAD, 0);
+ PRIMOUTREG(MGAREG_SECADDRESS,
+ ((u32) address) | TT_VERTEX);
+ PRIMOUTREG(MGAREG_SECEND,
+ (((u32) (address + length)) | use_agp));
+ PRIMADVANCE(dev_priv);
+ } while (++i < sarea_priv->nbox);
+ }
+
+ if (buf_priv->discard) {
+ if (buf_priv->dispatched == 1)
+ AGEBUF(dev_priv, buf_priv);
+ buf_priv->dispatched = 0;
+ mga_freelist_put(dev, buf);
+ }
+
+
+}
+
+
+static void mga_dma_dispatch_indices(drm_device_t * dev,
+ drm_buf_t * buf,
+ unsigned int start, unsigned int end)
+{
+ drm_mga_private_t *dev_priv = dev->dev_private;
+ drm_mga_buf_priv_t *buf_priv = buf->dev_private;
+ drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
+ unsigned int address = (unsigned int) buf->bus_address;
+ int use_agp = PDEA_pagpxfer_enable;
+ int i = 0;
+ PRIMLOCALS;
+ DRM_DEBUG("%s\n", __FUNCTION__);
+
+ DRM_DEBUG("dispatch indices %d addr 0x%x, "
+ "start 0x%x end 0x%x nbox %d dirty %x\n",
+ buf->idx, address, start, end,
+ sarea_priv->nbox, sarea_priv->dirty);
+
+ if (start != end) {
+ /* WARNING: if you change any of the state functions verify
+ * these numbers (Overestimating this doesn't hurt).
+ */
+ buf_priv->dispatched = 1;
+ PRIM_OVERFLOW(dev, dev_priv,
+ (MAX_STATE_SIZE + (5 * MGA_NR_SAREA_CLIPRECTS)));
+
+ mgaEmitState(dev_priv);
+
+ do {
+ if (i < sarea_priv->nbox) {
+ DRM_DEBUG("idx %d Emit box %d/%d:"
+ "%d,%d - %d,%d\n",
+ buf->idx,
+ i, sarea_priv->nbox,
+ sarea_priv->boxes[i].x1,
+ sarea_priv->boxes[i].y1,
+ sarea_priv->boxes[i].x2,
+ sarea_priv->boxes[i].y2);
+
+ mgaEmitClipRect(dev_priv,
+ &sarea_priv->boxes[i]);
+ }
+
+ PRIMGETPTR(dev_priv);
+ PRIMOUTREG(MGAREG_DMAPAD, 0);
+ PRIMOUTREG(MGAREG_DMAPAD, 0);
+ PRIMOUTREG(MGAREG_SETUPADDRESS,
+ ((address + start) |
+ SETADD_mode_vertlist));
+ PRIMOUTREG(MGAREG_SETUPEND,
+ ((address + end) | use_agp));
+
+ PRIMADVANCE(dev_priv);
+ } while (++i < sarea_priv->nbox);
+ }
+ if (buf_priv->discard) {
+ if (buf_priv->dispatched == 1)
+ AGEBUF(dev_priv, buf_priv);
+ buf_priv->dispatched = 0;
+ mga_freelist_put(dev, buf);
+ }
+}
+
+
+static void mga_dma_dispatch_clear(drm_device_t * dev, int flags,
+ unsigned int clear_color,
+ unsigned int clear_zval,
+ unsigned int clear_colormask,
+ unsigned int clear_depthmask)
+
+{
+ drm_mga_private_t *dev_priv = dev->dev_private;
+ drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
+ unsigned int *regs = sarea_priv->ContextState;
+ int nbox = sarea_priv->nbox;
+ drm_clip_rect_t *pbox = sarea_priv->boxes;
+ unsigned int cmd;
+ int i;
+ PRIMLOCALS;
+ DRM_DEBUG("%s\n", __FUNCTION__);
+
+ if (dev_priv->sgram)
+ cmd = MGA_CLEAR_CMD | DC_atype_blk;
+ else
+ cmd = MGA_CLEAR_CMD | DC_atype_rstr;
+
+ PRIM_OVERFLOW(dev, dev_priv, 35 * MGA_NR_SAREA_CLIPRECTS);
+
+ for (i = 0; i < nbox; i++) {
+ unsigned int height = pbox[i].y2 - pbox[i].y1;
+
+ DRM_DEBUG("dispatch clear %d,%d-%d,%d flags %x!\n",
+ pbox[i].x1, pbox[i].y1, pbox[i].x2,
+ pbox[i].y2, flags);
+
+ if (flags & MGA_FRONT) {
+ DRM_DEBUG("clear front\n");
+ PRIMOUTREG(MGAREG_DMAPAD, 0);
+ PRIMOUTREG(MGAREG_PLNWT, clear_colormask);
+ PRIMOUTREG(MGAREG_YDSTLEN,
+ (pbox[i].y1 << 16) | height);
+ PRIMOUTREG(MGAREG_FXBNDRY,
+ (pbox[i].x2 << 16) | pbox[i].x1);
+
+ PRIMOUTREG(MGAREG_DMAPAD, 0);
+ PRIMOUTREG(MGAREG_FCOL, clear_color);
+ PRIMOUTREG(MGAREG_DSTORG, dev_priv->frontOffset);
+ PRIMOUTREG(MGAREG_DWGCTL + MGAREG_MGA_EXEC, cmd);
+ }
+
+ if (flags & MGA_BACK) {
+ DRM_DEBUG("clear back\n");
+ PRIMOUTREG(MGAREG_DMAPAD, 0);
+ PRIMOUTREG(MGAREG_PLNWT, clear_colormask);
+ PRIMOUTREG(MGAREG_YDSTLEN,
+ (pbox[i].y1 << 16) | height);
+ PRIMOUTREG(MGAREG_FXBNDRY,
+ (pbox[i].x2 << 16) | pbox[i].x1);
+
+ PRIMOUTREG(MGAREG_DMAPAD, 0);
+ PRIMOUTREG(MGAREG_FCOL, clear_color);
+ PRIMOUTREG(MGAREG_DSTORG, dev_priv->backOffset);
+ PRIMOUTREG(MGAREG_DWGCTL + MGAREG_MGA_EXEC, cmd);
+ }
+
+ if (flags & MGA_DEPTH) {
+ DRM_DEBUG("clear depth\n");
+ PRIMOUTREG(MGAREG_DMAPAD, 0);
+ PRIMOUTREG(MGAREG_PLNWT, clear_depthmask);
+ PRIMOUTREG(MGAREG_YDSTLEN,
+ (pbox[i].y1 << 16) | height);
+ PRIMOUTREG(MGAREG_FXBNDRY,
+ (pbox[i].x2 << 16) | pbox[i].x1);
+
+ PRIMOUTREG(MGAREG_DMAPAD, 0);
+ PRIMOUTREG(MGAREG_FCOL, clear_zval);
+ PRIMOUTREG(MGAREG_DSTORG, dev_priv->depthOffset);
+ PRIMOUTREG(MGAREG_DWGCTL + MGAREG_MGA_EXEC, cmd);
+ }
+ }
+
+ /* Force reset of DWGCTL */
+ PRIMOUTREG(MGAREG_DMAPAD, 0);
+ PRIMOUTREG(MGAREG_DMAPAD, 0);
+ PRIMOUTREG(MGAREG_DMAPAD, 0);
+ PRIMOUTREG(MGAREG_DWGCTL, regs[MGA_CTXREG_DWGCTL]);
+ PRIMADVANCE(dev_priv);
+}
+
+static void mga_dma_dispatch_swap(drm_device_t * dev)
+{
+ drm_mga_private_t *dev_priv = dev->dev_private;
+ drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
+ unsigned int *regs = sarea_priv->ContextState;
+ int nbox = sarea_priv->nbox;
+ drm_clip_rect_t *pbox = sarea_priv->boxes;
+ int i;
+ int pixel_stride = dev_priv->stride / dev_priv->cpp;
+
+ PRIMLOCALS;
+ DRM_DEBUG("%s\n", __FUNCTION__);
+
+ PRIM_OVERFLOW(dev, dev_priv, (MGA_NR_SAREA_CLIPRECTS * 5) + 20);
+
+ PRIMOUTREG(MGAREG_DMAPAD, 0);
+ PRIMOUTREG(MGAREG_DMAPAD, 0);
+ PRIMOUTREG(MGAREG_DWGSYNC, 0x7100);
+ PRIMOUTREG(MGAREG_DWGSYNC, 0x7000);
+
+ PRIMOUTREG(MGAREG_DSTORG, dev_priv->frontOffset);
+ PRIMOUTREG(MGAREG_MACCESS, dev_priv->mAccess);
+ PRIMOUTREG(MGAREG_SRCORG, dev_priv->backOffset);
+ PRIMOUTREG(MGAREG_AR5, pixel_stride);
+
+ PRIMOUTREG(MGAREG_DMAPAD, 0);
+ PRIMOUTREG(MGAREG_DMAPAD, 0);
+ PRIMOUTREG(MGAREG_DMAPAD, 0);
+ PRIMOUTREG(MGAREG_DWGCTL, MGA_COPY_CMD);
+
+
+ for (i = 0; i < nbox; i++) {
+ unsigned int h = pbox[i].y2 - pbox[i].y1;
+ unsigned int start = pbox[i].y1 * pixel_stride;
+
+ PRIMOUTREG(MGAREG_AR0, start + pbox[i].x2 - 1);
+ PRIMOUTREG(MGAREG_AR3, start + pbox[i].x1);
+ PRIMOUTREG(MGAREG_FXBNDRY,
+ pbox[i].x1 | ((pbox[i].x2 - 1) << 16));
+ PRIMOUTREG(MGAREG_YDSTLEN + MGAREG_MGA_EXEC,
+ (pbox[i].y1 << 16) | h);
+ }
+
+ /* Force reset of DWGCTL */
+ PRIMOUTREG(MGAREG_DMAPAD, 0);
+ PRIMOUTREG(MGAREG_DMAPAD, 0);
+ PRIMOUTREG(MGAREG_SRCORG, 0);
+ PRIMOUTREG(MGAREG_DWGCTL, regs[MGA_CTXREG_DWGCTL]);
+
+ PRIMADVANCE(dev_priv);
+}
+
+int mga_clear_bufs(dev_t kdev, u_long cmd, caddr_t data,
+ int flags, struct proc *p)
+{
+ drm_device_t *dev = kdev->si_drv1;
+ drm_mga_private_t *dev_priv =
+ (drm_mga_private_t *) dev->dev_private;
+ drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
+ drm_mga_clear_t clear;
+ int s;
+
+ clear = *(drm_mga_clear_t *) data;
+ DRM_DEBUG("%s\n", __FUNCTION__);
+
+ if (!_DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock)) {
+ DRM_ERROR("mga_clear_bufs called without lock held\n");
+ return EINVAL;
+ }
+
+ if (sarea_priv->nbox > MGA_NR_SAREA_CLIPRECTS)
+ sarea_priv->nbox = MGA_NR_SAREA_CLIPRECTS;
+
+ /* Make sure we restore the 3D state next time.
+ */
+ dev_priv->sarea_priv->dirty |= MGA_UPLOAD_CTX;
+ mga_dma_dispatch_clear(dev, clear.flags,
+ clear.clear_color,
+ clear.clear_depth,
+ clear.clear_color_mask,
+ clear.clear_depth_mask);
+ PRIMUPDATE(dev_priv);
+ mga_flush_write_combine();
+ s = splsofttq();
+ mga_dma_schedule(dev, 1);
+ splx(s);
+ return 0;
+}
+
+int mga_swap_bufs(dev_t kdev, u_long cmd, caddr_t data,
+ int flags, struct proc *p)
+{
+ drm_device_t *dev = kdev->si_drv1;
+ drm_mga_private_t *dev_priv =
+ (drm_mga_private_t *) dev->dev_private;
+ drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
+ int s;
+
+ DRM_DEBUG("%s\n", __FUNCTION__);
+
+ if (!_DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock)) {
+ DRM_ERROR("mga_swap_bufs called without lock held\n");
+ return EINVAL;
+ }
+
+ if (sarea_priv->nbox > MGA_NR_SAREA_CLIPRECTS)
+ sarea_priv->nbox = MGA_NR_SAREA_CLIPRECTS;
+
+ /* Make sure we restore the 3D state next time.
+ */
+ dev_priv->sarea_priv->dirty |= MGA_UPLOAD_CTX;
+ mga_dma_dispatch_swap(dev);
+ PRIMUPDATE(dev_priv);
+ set_bit(MGA_BUF_SWAP_PENDING,
+ &dev_priv->current_prim->buffer_status);
+ mga_flush_write_combine();
+ s = splsofttq();
+ mga_dma_schedule(dev, 1);
+ splx(s);
+ return 0;
+}
+
+int mga_iload(dev_t kdev, u_long cmd, caddr_t data,
+ int flags, struct proc *p)
+{
+ drm_device_t *dev = kdev->si_drv1;
+ drm_device_dma_t *dma = dev->dma;
+ drm_mga_private_t *dev_priv =
+ (drm_mga_private_t *) dev->dev_private;
+ drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
+ drm_buf_t *buf;
+ drm_mga_buf_priv_t *buf_priv;
+ drm_mga_iload_t iload;
+ unsigned long bus_address;
+ int s;
+
+ DRM_DEBUG("%s\n", __FUNCTION__);
+
+ DRM_DEBUG("Starting Iload\n");
+ iload = *(drm_mga_iload_t *) data;
+
+ if (!_DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock)) {
+ DRM_ERROR("mga_iload called without lock held\n");
+ return EINVAL;
+ }
+
+ buf = dma->buflist[iload.idx];
+ buf_priv = buf->dev_private;
+ bus_address = buf->bus_address;
+ DRM_DEBUG("bus_address %lx, length %d, destorg : %x\n",
+ bus_address, iload.length, iload.destOrg);
+
+ if (mgaVerifyIload(dev_priv,
+ bus_address, iload.destOrg, iload.length)) {
+ mga_freelist_put(dev, buf);
+ return EINVAL;
+ }
+
+ sarea_priv->dirty |= MGA_UPLOAD_CTX;
+
+ mga_dma_dispatch_tex_blit(dev, bus_address, iload.length,
+ iload.destOrg);
+ AGEBUF(dev_priv, buf_priv);
+ buf_priv->discard = 1;
+ mga_freelist_put(dev, buf);
+ mga_flush_write_combine();
+ s = splsofttq();
+ mga_dma_schedule(dev, 1);
+ splx(s);
+ return 0;
+}
+
+int mga_vertex(dev_t kdev, u_long cmd, caddr_t data,
+ int flags, struct proc *p)
+{
+ drm_device_t *dev = kdev->si_drv1;
+ drm_mga_private_t *dev_priv =
+ (drm_mga_private_t *) dev->dev_private;
+ drm_device_dma_t *dma = dev->dma;
+ drm_buf_t *buf;
+ drm_mga_buf_priv_t *buf_priv;
+ drm_mga_vertex_t vertex;
+
+ DRM_DEBUG("%s\n", __FUNCTION__);
+
+ vertex = *(drm_mga_vertex_t *) data;
+
+ if (!_DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock)) {
+ DRM_ERROR("mga_vertex called without lock held\n");
+ return EINVAL;
+ }
+
+ DRM_DEBUG("mga_vertex\n");
+
+ buf = dma->buflist[vertex.idx];
+ buf_priv = buf->dev_private;
+
+ buf->used = vertex.used;
+ buf_priv->discard = vertex.discard;
+
+ if (!mgaVerifyState(dev_priv)) {
+ if (vertex.discard) {
+ if (buf_priv->dispatched == 1)
+ AGEBUF(dev_priv, buf_priv);
+ buf_priv->dispatched = 0;
+ mga_freelist_put(dev, buf);
+ }
+ DRM_DEBUG("bad state\n");
+ return EINVAL;
+ }
+
+ mga_dma_dispatch_vertex(dev, buf);
+
+ PRIMUPDATE(dev_priv);
+ mga_flush_write_combine();
+ mga_dma_schedule(dev, 1);
+ return 0;
+}
+
+
+int mga_indices(dev_t kdev, u_long cmd, caddr_t data,
+ int flags, struct proc *p)
+{
+ drm_device_t *dev = kdev->si_drv1;
+ drm_mga_private_t *dev_priv =
+ (drm_mga_private_t *) dev->dev_private;
+ drm_device_dma_t *dma = dev->dma;
+ drm_buf_t *buf;
+ drm_mga_buf_priv_t *buf_priv;
+ drm_mga_indices_t indices;
+ DRM_DEBUG("%s\n", __FUNCTION__);
+
+ indices = *(drm_mga_indices_t *) data;
+
+ if (!_DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock)) {
+ DRM_ERROR("mga_indices called without lock held\n");
+ return EINVAL;
+ }
+
+ DRM_DEBUG("mga_indices\n");
+
+ buf = dma->buflist[indices.idx];
+ buf_priv = buf->dev_private;
+
+ buf_priv->discard = indices.discard;
+
+ if (!mgaVerifyState(dev_priv)) {
+ if (indices.discard) {
+ if (buf_priv->dispatched == 1)
+ AGEBUF(dev_priv, buf_priv);
+ buf_priv->dispatched = 0;
+ mga_freelist_put(dev, buf);
+ }
+ return EINVAL;
+ }
+
+ mga_dma_dispatch_indices(dev, buf, indices.start, indices.end);
+
+ PRIMUPDATE(dev_priv);
+ mga_flush_write_combine();
+ mga_dma_schedule(dev, 1);
+ return 0;
+}
+
+
+
+static int
+mga_dma_get_buffers(drm_device_t * dev, drm_dma_t * d, struct proc *p)
+{
+ int i, error;
+ drm_buf_t *buf;
+ DRM_DEBUG("%s\n", __FUNCTION__);
+
+ for (i = d->granted_count; i < d->request_count; i++) {
+ buf = mga_freelist_get(dev);
+ if (!buf)
+ break;
+ buf->pid = p->p_pid;
+ error = copyout(&buf->idx,
+ &d->request_indices[i],
+ sizeof(buf->idx));
+ if (error) return error;
+ error = copyout(&buf->total,
+ &d->request_sizes[i],
+ sizeof(buf->total));
+ if (error) return error;
+ ++d->granted_count;
+ }
+ return 0;
+}
+
+int mga_dma(dev_t kdev, u_long cmd, caddr_t data,
+ int flags, struct proc *p)
+{
+ drm_device_t *dev = kdev->si_drv1;
+ drm_device_dma_t *dma = dev->dma;
+ int retcode = 0;
+ drm_dma_t d;
+ DRM_DEBUG("%s\n", __FUNCTION__);
+
+ d = *(drm_dma_t *) data;
+ DRM_DEBUG("%d %d: %d send, %d req\n",
+ p->p_pid, d.context, d.send_count, d.request_count);
+
+ if (!_DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock)) {
+ DRM_ERROR("mga_dma called without lock held\n");
+ return EINVAL;
+ }
+
+ /* Please don't send us buffers.
+ */
+ if (d.send_count != 0) {
+ DRM_ERROR
+ ("Process %d trying to send %d buffers via drmDMA\n",
+ p->p_pid, d.send_count);
+ return EINVAL;
+ }
+
+ /* We'll send you buffers.
+ */
+ if (d.request_count < 0 || d.request_count > dma->buf_count) {
+ DRM_ERROR
+ ("Process %d trying to get %d buffers (of %d max)\n",
+ p->p_pid, d.request_count, dma->buf_count);
+ return EINVAL;
+ }
+
+ d.granted_count = 0;
+
+ if (d.request_count) {
+ retcode = mga_dma_get_buffers(dev, &d, p);
+ }
+
+ DRM_DEBUG("%d returning, granted = %d\n",
+ p->p_pid, d.granted_count);
+ *(drm_dma_t *) data = d;
+ return retcode;
+}
diff --git a/bsd/tdfx/Makefile b/bsd/tdfx/Makefile
new file mode 100644
index 00000000..4362a5ba
--- /dev/null
+++ b/bsd/tdfx/Makefile
@@ -0,0 +1,15 @@
+# $FreeBSD$
+
+KMOD = tdfx
+SRCS = tdfx_drv.c tdfx_context.c
+SRCS += device_if.h bus_if.h pci_if.h
+CFLAGS += ${DEBUG_FLAGS} -I. -I..
+KMODDEPS = drm
+
+@:
+ ln -sf /sys @
+
+machine:
+ ln -sf /sys/i386/include machine
+
+.include <bsd.kmod.mk>
diff --git a/bsd/tdfx/tdfx_drv.c b/bsd/tdfx/tdfx_drv.c
new file mode 100644
index 00000000..202df7c3
--- /dev/null
+++ b/bsd/tdfx/tdfx_drv.c
@@ -0,0 +1,741 @@
+/* tdfx.c -- tdfx driver -*- c -*-
+ * Created: Thu Oct 7 10:38:32 1999 by faith@precisioninsight.com
+ *
+ * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
+ * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ *
+ * Authors:
+ * Rickard E. (Rik) Faith <faith@valinux.com>
+ * Daryll Strauss <daryll@valinux.com>
+ *
+ */
+
+#include "drmP.h"
+#include "tdfx_drv.h"
+
+#include <pci/pcivar.h>
+
+MODULE_DEPEND(tdfx, drm, 1, 1, 1);
+#ifdef DRM_AGP
+MODULE_DEPEND(tdfx, agp, 1, 1, 1);
+#endif
+
+#define TDFX_NAME "tdfx"
+#define TDFX_DESC "tdfx"
+#define TDFX_DATE "20000928"
+#define TDFX_MAJOR 1
+#define TDFX_MINOR 0
+#define TDFX_PATCHLEVEL 0
+
+static int tdfx_init(device_t nbdev);
+static void tdfx_cleanup(device_t nbdev);
+
+drm_ctx_t tdfx_res_ctx;
+
+static int tdfx_probe(device_t dev)
+{
+ const char *s = 0;
+
+ switch (pci_get_devid(dev)) {
+ case 0x0003121a:
+ s = "3Dfx Voodoo Banshee graphics accelerator";
+ break;
+
+ case 0x0005121a:
+ s = "3Dfx Voodoo 3 graphics accelerator";
+ break;
+ case 0x0009121a:
+ s = "3Dfx Voodoo 5 graphics accelerator";
+ break;
+ }
+
+ if (s) {
+ device_set_desc(dev, s);
+ return 0;
+ }
+
+ return ENXIO;
+}
+
+static int tdfx_attach(device_t dev)
+{
+ tdfx_init(dev);
+ return 0;
+}
+
+static int tdfx_detach(device_t dev)
+{
+ tdfx_cleanup(dev);
+ return 0;
+}
+
+static device_method_t tdfx_methods[] = {
+ /* Device interface */
+ DEVMETHOD(device_probe, tdfx_probe),
+ DEVMETHOD(device_attach, tdfx_attach),
+ DEVMETHOD(device_detach, tdfx_detach),
+
+ { 0, 0 }
+};
+
+static driver_t tdfx_driver = {
+ "drm",
+ tdfx_methods,
+ sizeof(drm_device_t),
+};
+
+static devclass_t tdfx_devclass;
+#define TDFX_SOFTC(unit) \
+ ((drm_device_t *) devclass_get_softc(tdfx_devclass, unit))
+
+DRIVER_MODULE(if_tdfx, pci, tdfx_driver, tdfx_devclass, 0, 0);
+
+#define CDEV_MAJOR 145
+ /* tdfx_drv.c */
+static d_open_t tdfx_open;
+static d_close_t tdfx_close;
+static d_ioctl_t tdfx_version;
+static d_ioctl_t tdfx_ioctl;
+static d_ioctl_t tdfx_lock;
+static d_ioctl_t tdfx_unlock;
+
+static struct cdevsw tdfx_cdevsw = {
+ /* open */ tdfx_open,
+ /* close */ tdfx_close,
+ /* read */ drm_read,
+ /* write */ drm_write,
+ /* ioctl */ tdfx_ioctl,
+ /* poll */ drm_poll,
+ /* mmap */ drm_mmap,
+ /* strategy */ nostrategy,
+ /* name */ "tdfx",
+ /* maj */ CDEV_MAJOR,
+ /* dump */ nodump,
+ /* psize */ nopsize,
+ /* flags */ D_TTY | D_TRACKCLOSE,
+ /* bmaj */ -1
+};
+
+static drm_ioctl_desc_t tdfx_ioctls[] = {
+ [DRM_IOCTL_NR(DRM_IOCTL_VERSION)] = { tdfx_version, 0, 0 },
+ [DRM_IOCTL_NR(DRM_IOCTL_GET_UNIQUE)] = { drm_getunique, 0, 0 },
+ [DRM_IOCTL_NR(DRM_IOCTL_GET_MAGIC)] = { drm_getmagic, 0, 0 },
+ [DRM_IOCTL_NR(DRM_IOCTL_IRQ_BUSID)] = { drm_irq_busid, 0, 1 },
+
+ [DRM_IOCTL_NR(DRM_IOCTL_SET_UNIQUE)] = { drm_setunique, 1, 1 },
+ [DRM_IOCTL_NR(DRM_IOCTL_BLOCK)] = { drm_block, 1, 1 },
+ [DRM_IOCTL_NR(DRM_IOCTL_UNBLOCK)] = { drm_unblock, 1, 1 },
+ [DRM_IOCTL_NR(DRM_IOCTL_AUTH_MAGIC)] = { drm_authmagic, 1, 1 },
+ [DRM_IOCTL_NR(DRM_IOCTL_ADD_MAP)] = { drm_addmap, 1, 1 },
+
+ [DRM_IOCTL_NR(DRM_IOCTL_ADD_CTX)] = { tdfx_addctx, 1, 1 },
+ [DRM_IOCTL_NR(DRM_IOCTL_RM_CTX)] = { tdfx_rmctx, 1, 1 },
+ [DRM_IOCTL_NR(DRM_IOCTL_MOD_CTX)] = { tdfx_modctx, 1, 1 },
+ [DRM_IOCTL_NR(DRM_IOCTL_GET_CTX)] = { tdfx_getctx, 1, 0 },
+ [DRM_IOCTL_NR(DRM_IOCTL_SWITCH_CTX)] = { tdfx_switchctx, 1, 1 },
+ [DRM_IOCTL_NR(DRM_IOCTL_NEW_CTX)] = { tdfx_newctx, 1, 1 },
+ [DRM_IOCTL_NR(DRM_IOCTL_RES_CTX)] = { tdfx_resctx, 1, 0 },
+ [DRM_IOCTL_NR(DRM_IOCTL_ADD_DRAW)] = { drm_adddraw, 1, 1 },
+ [DRM_IOCTL_NR(DRM_IOCTL_RM_DRAW)] = { drm_rmdraw, 1, 1 },
+ [DRM_IOCTL_NR(DRM_IOCTL_LOCK)] = { tdfx_lock, 1, 0 },
+ [DRM_IOCTL_NR(DRM_IOCTL_UNLOCK)] = { tdfx_unlock, 1, 0 },
+ [DRM_IOCTL_NR(DRM_IOCTL_FINISH)] = { drm_finish, 1, 0 },
+#ifdef DRM_AGP
+ [DRM_IOCTL_NR(DRM_IOCTL_AGP_ACQUIRE)] = {drm_agp_acquire, 1, 1},
+ [DRM_IOCTL_NR(DRM_IOCTL_AGP_RELEASE)] = {drm_agp_release, 1, 1},
+ [DRM_IOCTL_NR(DRM_IOCTL_AGP_ENABLE)] = {drm_agp_enable, 1, 1},
+ [DRM_IOCTL_NR(DRM_IOCTL_AGP_INFO)] = {drm_agp_info, 1, 1},
+ [DRM_IOCTL_NR(DRM_IOCTL_AGP_ALLOC)] = {drm_agp_alloc, 1, 1},
+ [DRM_IOCTL_NR(DRM_IOCTL_AGP_FREE)] = {drm_agp_free, 1, 1},
+ [DRM_IOCTL_NR(DRM_IOCTL_AGP_BIND)] = {drm_agp_unbind, 1, 1},
+ [DRM_IOCTL_NR(DRM_IOCTL_AGP_UNBIND)] = {drm_agp_bind, 1, 1},
+#endif
+};
+#define TDFX_IOCTL_COUNT DRM_ARRAY_SIZE(tdfx_ioctls)
+
+static int
+tdfx_setup(drm_device_t *dev)
+{
+ int i;
+
+ device_busy(dev->device);
+
+ atomic_set(&dev->ioctl_count, 0);
+ atomic_set(&dev->vma_count, 0);
+ dev->buf_use = 0;
+ atomic_set(&dev->buf_alloc, 0);
+
+ atomic_set(&dev->total_open, 0);
+ atomic_set(&dev->total_close, 0);
+ atomic_set(&dev->total_ioctl, 0);
+ atomic_set(&dev->total_irq, 0);
+ atomic_set(&dev->total_ctx, 0);
+ atomic_set(&dev->total_locks, 0);
+ atomic_set(&dev->total_unlocks, 0);
+ atomic_set(&dev->total_contends, 0);
+ atomic_set(&dev->total_sleeps, 0);
+
+ for (i = 0; i < DRM_HASH_SIZE; i++) {
+ dev->magiclist[i].head = NULL;
+ dev->magiclist[i].tail = NULL;
+ }
+ dev->maplist = NULL;
+ dev->map_count = 0;
+ dev->vmalist = NULL;
+ dev->lock.hw_lock = NULL;
+ dev->lock.lock_queue = 0;
+ dev->queue_count = 0;
+ dev->queue_reserved = 0;
+ dev->queue_slots = 0;
+ dev->queuelist = NULL;
+ dev->irq = 0;
+ dev->context_flag = 0;
+ dev->interrupt_flag = 0;
+ dev->dma = 0;
+ dev->dma_flag = 0;
+ dev->last_context = 0;
+ dev->last_switch = 0;
+ dev->last_checked = 0;
+ callout_init(&dev->timer);
+ dev->context_wait = 0;
+
+ timespecclear(&dev->ctx_start);
+ timespecclear(&dev->lck_start);
+
+ dev->buf_rp = dev->buf;
+ dev->buf_wp = dev->buf;
+ dev->buf_end = dev->buf + DRM_BSZ;
+ bzero(&dev->buf_sel, sizeof dev->buf_sel);
+ dev->buf_sigio = NULL;
+ dev->buf_readers = 0;
+ dev->buf_writers = 0;
+ dev->buf_selecting = 0;
+
+ tdfx_res_ctx.handle=-1;
+
+ DRM_DEBUG("\n");
+
+ /* The kernel's context could be created here, but is now created
+ in drm_dma_enqueue. This is more resource-efficient for
+ hardware that does not do DMA, but may mean that
+ drm_select_queue fails between the time the interrupt is
+ initialized and the time the queues are initialized. */
+
+ return 0;
+}
+
+
+static int
+tdfx_takedown(drm_device_t *dev)
+{
+ int i;
+ drm_magic_entry_t *pt, *next;
+ drm_map_t *map;
+ drm_vma_entry_t *vma, *vma_next;
+
+ DRM_DEBUG("\n");
+
+ lockmgr(&dev->dev_lock, LK_EXCLUSIVE, 0, curproc);
+ callout_stop(&dev->timer);
+
+ if (dev->devname) {
+ drm_free(dev->devname, strlen(dev->devname)+1, DRM_MEM_DRIVER);
+ dev->devname = NULL;
+ }
+
+ if (dev->unique) {
+ drm_free(dev->unique, strlen(dev->unique)+1, DRM_MEM_DRIVER);
+ dev->unique = NULL;
+ dev->unique_len = 0;
+ }
+ /* Clear pid list */
+ for (i = 0; i < DRM_HASH_SIZE; i++) {
+ for (pt = dev->magiclist[i].head; pt; pt = next) {
+ next = pt->next;
+ drm_free(pt, sizeof(*pt), DRM_MEM_MAGIC);
+ }
+ dev->magiclist[i].head = dev->magiclist[i].tail = NULL;
+ }
+#ifdef DRM_AGP
+ /* Clear AGP information */
+ if (dev->agp) {
+ drm_agp_mem_t *temp;
+ drm_agp_mem_t *temp_next;
+
+ temp = dev->agp->memory;
+ while(temp != NULL) {
+ temp_next = temp->next;
+ drm_free_agp(temp->handle, temp->pages);
+ drm_free(temp, sizeof(*temp), DRM_MEM_AGPLISTS);
+ temp = temp_next;
+ }
+
+ if (dev->agp->acquired)
+ agp_release(dev->agp->agpdev);
+ drm_free(dev->agp, sizeof(*dev->agp), DRM_MEM_AGPLISTS);
+ dev->agp = NULL;
+ }
+#endif
+
+ /* Clear vma list (only built for debugging) */
+ if (dev->vmalist) {
+ for (vma = dev->vmalist; vma; vma = vma_next) {
+ vma_next = vma->next;
+ drm_free(vma, sizeof(*vma), DRM_MEM_VMAS);
+ }
+ dev->vmalist = NULL;
+ }
+
+ /* Clear map area and mtrr information */
+ if (dev->maplist) {
+ for (i = 0; i < dev->map_count; i++) {
+ map = dev->maplist[i];
+ switch (map->type) {
+ case _DRM_REGISTERS:
+ case _DRM_FRAME_BUFFER:
+#ifdef CONFIG_MTRR
+ if (map->mtrr >= 0) {
+ int retcode;
+ retcode = mtrr_del(map->mtrr,
+ map->offset,
+ map->size);
+ DRM_DEBUG("mtrr_del = %d\n", retcode);
+ }
+#endif
+ drm_ioremapfree(map->handle, map->size);
+ break;
+ case _DRM_SHM:
+ drm_free_pages((unsigned long)map->handle,
+ drm_order(map->size)
+ - PAGE_SHIFT,
+ DRM_MEM_SAREA);
+ break;
+ case _DRM_AGP:
+ break; /* XXX */
+ }
+ drm_free(map, sizeof(*map), DRM_MEM_MAPS);
+ }
+ drm_free(dev->maplist,
+ dev->map_count * sizeof(*dev->maplist),
+ DRM_MEM_MAPS);
+ dev->maplist = NULL;
+ dev->map_count = 0;
+ }
+
+ if (dev->lock.hw_lock) {
+ dev->lock.hw_lock = NULL; /* SHM removed */
+ dev->lock.pid = 0;
+ wakeup(&dev->lock.lock_queue);
+ }
+ lockmgr(&dev->dev_lock, LK_RELEASE, 0, curproc);
+
+ return 0;
+}
+
+/* tdfx_init is called via tdfx_attach at module load time, */
+
+static int
+tdfx_init(device_t nbdev)
+{
+ drm_device_t *dev = device_get_softc(nbdev);
+ int retcode;
+
+ DRM_DEBUG("\n");
+
+ memset((void *)dev, 0, sizeof(*dev));
+ simple_lock_init(&dev->count_lock);
+ lockinit(&dev->dev_lock, PZERO, "drmlk", 0, 0);
+
+#if 0
+ drm_parse_options(tdfx);
+#endif
+
+ dev->device = nbdev;
+ dev->devnode = make_dev(&tdfx_cdevsw,
+ device_get_unit(nbdev),
+ DRM_DEV_UID,
+ DRM_DEV_GID,
+ DRM_DEV_MODE,
+ TDFX_NAME);
+ dev->name = TDFX_NAME;
+
+ drm_mem_init();
+ drm_sysctl_init(dev);
+ TAILQ_INIT(&dev->files);
+
+#ifdef DRM_AGP
+ dev->agp = drm_agp_init();
+#endif
+ if((retcode = drm_ctxbitmap_init(dev))) {
+ DRM_ERROR("Cannot allocate memory for context bitmap.\n");
+ drm_sysctl_cleanup(dev);
+ tdfx_takedown(dev);
+ return retcode;
+ }
+
+ DRM_INFO("Initialized %s %d.%d.%d %s on minor %d\n",
+ TDFX_NAME,
+ TDFX_MAJOR,
+ TDFX_MINOR,
+ TDFX_PATCHLEVEL,
+ TDFX_DATE,
+ device_get_unit(nbdev));
+
+ return 0;
+}
+
+/* tdfx_cleanup is called via tdfx_detach at module unload time. */
+
+static void
+tdfx_cleanup(device_t nbdev)
+{
+ drm_device_t *dev = device_get_softc(nbdev);
+
+ DRM_DEBUG("\n");
+
+ drm_sysctl_cleanup(dev);
+ destroy_dev(dev->devnode);
+
+ DRM_INFO("Module unloaded\n");
+
+ drm_ctxbitmap_cleanup(dev);
+ tdfx_takedown(dev);
+}
+
+static int
+tdfx_version(dev_t kdev, u_long cmd, caddr_t data, int flags, struct proc *p)
+{
+ drm_version_t version;
+ int len;
+
+ version = *(drm_version_t *) data;
+
+#define DRM_COPY(name,value) \
+ len = strlen(value); \
+ if (len > name##_len) len = name##_len; \
+ name##_len = strlen(value); \
+ if (len && name) { \
+ int error = copyout(value, name, len); \
+ if (error) return error; \
+ }
+
+ version.version_major = TDFX_MAJOR;
+ version.version_minor = TDFX_MINOR;
+ version.version_patchlevel = TDFX_PATCHLEVEL;
+
+ DRM_COPY(version.name, TDFX_NAME);
+ DRM_COPY(version.date, TDFX_DATE);
+ DRM_COPY(version.desc, TDFX_DESC);
+
+ *(drm_version_t *) data = version;
+ return 0;
+}
+
+static int
+tdfx_open(dev_t kdev, int flags, int fmt, struct proc *p)
+{
+ drm_device_t *dev = TDFX_SOFTC(minor(kdev));
+ int retcode = 0;
+
+ DRM_DEBUG("open_count = %d\n", dev->open_count);
+
+ device_busy(dev->device);
+ if (!(retcode = drm_open_helper(kdev, flags, fmt, p, dev))) {
+ atomic_inc(&dev->total_open);
+ simple_lock(&dev->count_lock);
+ if (!dev->open_count++) {
+ simple_unlock(&dev->count_lock);
+ retcode = tdfx_setup(dev);
+ }
+ simple_unlock(&dev->count_lock);
+ }
+ device_unbusy(dev->device);
+
+ return retcode;
+}
+
+static int
+tdfx_close(dev_t kdev, int flags, int fmt, struct proc *p)
+{
+ drm_device_t *dev = kdev->si_drv1;
+ int retcode = 0;
+
+ DRM_DEBUG("open_count = %d\n", dev->open_count);
+ if (!(retcode = drm_close(kdev, flags, fmt, p))) {
+ atomic_inc(&dev->total_close);
+ simple_lock(&dev->count_lock);
+ if (!--dev->open_count) {
+ if (atomic_read(&dev->ioctl_count) || dev->blocked) {
+ DRM_ERROR("Device busy: %d %d\n",
+ atomic_read(&dev->ioctl_count),
+ dev->blocked);
+ simple_unlock(&dev->count_lock);
+ return EBUSY;
+ }
+ simple_unlock(&dev->count_lock);
+ device_unbusy(dev->device);
+ return tdfx_takedown(dev);
+ }
+ simple_unlock(&dev->count_lock);
+ }
+
+ return retcode;
+}
+
+/* tdfx_ioctl is called whenever a process performs an ioctl on /dev/drm. */
+
+static int
+tdfx_ioctl(dev_t kdev, u_long cmd, caddr_t data, int flags, struct proc *p)
+{
+ int nr = DRM_IOCTL_NR(cmd);
+ drm_device_t *dev = kdev->si_drv1;
+ drm_file_t *priv;
+ int retcode = 0;
+ drm_ioctl_desc_t *ioctl;
+ d_ioctl_t *func;
+
+ DRM_DEBUG("dev=%p\n", dev);
+ priv = drm_find_file_by_proc(dev, p);
+ if (!priv) {
+ DRM_DEBUG("can't find authenticator\n");
+ return EINVAL;
+ }
+
+ atomic_inc(&dev->ioctl_count);
+ atomic_inc(&dev->total_ioctl);
+ ++priv->ioctl_count;
+
+ DRM_DEBUG("pid = %d, cmd = 0x%02lx, nr = 0x%02x, auth = %d\n",
+ p->p_pid, cmd, nr, priv->authenticated);
+
+ switch (cmd) {
+ case FIONBIO:
+ atomic_dec(&dev->ioctl_count);
+ return 0;
+
+ case FIOASYNC:
+ atomic_dec(&dev->ioctl_count);
+ dev->flags |= FASYNC;
+ return 0;
+
+ case FIOSETOWN:
+ atomic_dec(&dev->ioctl_count);
+ return fsetown(*(int *)data, &dev->buf_sigio);
+
+ case FIOGETOWN:
+ atomic_dec(&dev->ioctl_count);
+ *(int *) data = fgetown(dev->buf_sigio);
+ return 0;
+ }
+
+ if (nr >= TDFX_IOCTL_COUNT) {
+ retcode = EINVAL;
+ } else {
+ ioctl = &tdfx_ioctls[nr];
+ func = ioctl->func;
+
+ if (!func) {
+ DRM_DEBUG("no function\n");
+ retcode = EINVAL;
+ } else if ((ioctl->root_only && suser(p))
+ || (ioctl->auth_needed && !priv->authenticated)) {
+ retcode = EACCES;
+ } else {
+ retcode = (func)(kdev, cmd, data, flags, p);
+ }
+ }
+
+ atomic_dec(&dev->ioctl_count);
+ return retcode;
+}
+
+static int
+tdfx_lock(dev_t kdev, u_long cmd, caddr_t data, int flags, struct proc *p)
+{
+ drm_device_t *dev = kdev->si_drv1;
+ int ret = 0;
+ drm_lock_t lock;
+#if DRM_DMA_HISTOGRAM
+
+ getnanotime(&dev->lck_start);
+#endif
+
+ lock = *(drm_lock_t *) data;
+
+ if (lock.context == DRM_KERNEL_CONTEXT) {
+ DRM_ERROR("Process %d using kernel context %d\n",
+ p->p_pid, lock.context);
+ return EINVAL;
+ }
+
+ DRM_DEBUG("%d (pid %d) requests lock (0x%08x), flags = 0x%08x\n",
+ lock.context, p->p_pid, dev->lock.hw_lock->lock,
+ lock.flags);
+
+#if 0
+ /* dev->queue_count == 0 right now for
+ tdfx. FIXME? */
+ if (lock.context < 0 || lock.context >= dev->queue_count)
+ return EINVAL;
+#endif
+
+ if (!ret) {
+#if 0
+ if (_DRM_LOCKING_CONTEXT(dev->lock.hw_lock->lock)
+ != lock.context) {
+ long j = ticks - dev->lock.lock_time;
+
+ if (lock.context == tdfx_res_ctx.handle &&
+ j >= 0 && j < DRM_LOCK_SLICE) {
+ /* Can't take lock if we just had it and
+ there is contention. */
+ DRM_DEBUG("%d (pid %d) delayed j=%d dev=%d ticks=%d\n",
+ lock.context, p->p_pid, j,
+ dev->lock.lock_time, ticks);
+ ret = tsleep(&never, PZERO|PCATCH, "drmlk1",
+ DRM_LOCK_SLICE - j);
+ if (ret)
+ return ret;
+ DRM_DEBUG("ticks=%d\n", ticks);
+ }
+ }
+#endif
+ for (;;) {
+ if (!dev->lock.hw_lock) {
+ /* Device has been unregistered */
+ ret = EINTR;
+ break;
+ }
+ if (drm_lock_take(&dev->lock.hw_lock->lock,
+ lock.context)) {
+ dev->lock.pid = p->p_pid;
+ dev->lock.lock_time = ticks;
+ atomic_inc(&dev->total_locks);
+ break; /* Got lock */
+ }
+
+ /* Contention */
+ atomic_inc(&dev->total_sleeps);
+ ret = tsleep(&dev->lock.lock_queue,
+ PZERO|PCATCH,
+ "drmlk2",
+ 0);
+ if (ret)
+ break;
+ }
+ }
+
+#if 0
+ if (!ret && dev->last_context != lock.context &&
+ lock.context != tdfx_res_ctx.handle &&
+ dev->last_context != tdfx_res_ctx.handle) {
+ add_wait_queue(&dev->context_wait, &entry);
+ current->state = TASK_INTERRUPTIBLE;
+ /* PRE: dev->last_context != lock.context */
+ tdfx_context_switch(dev, dev->last_context, lock.context);
+ /* POST: we will wait for the context
+ switch and will dispatch on a later call
+ when dev->last_context == lock.context
+ NOTE WE HOLD THE LOCK THROUGHOUT THIS
+ TIME! */
+ current->policy |= SCHED_YIELD;
+ schedule();
+ current->state = TASK_RUNNING;
+ remove_wait_queue(&dev->context_wait, &entry);
+ if (signal_pending(current)) {
+ ret = EINTR;
+ } else if (dev->last_context != lock.context) {
+ DRM_ERROR("Context mismatch: %d %d\n",
+ dev->last_context, lock.context);
+ }
+ }
+#endif
+
+ if (!ret) {
+ if (lock.flags & _DRM_LOCK_READY) {
+ /* Wait for space in DMA/FIFO */
+ }
+ if (lock.flags & _DRM_LOCK_QUIESCENT) {
+ /* Make hardware quiescent */
+#if 0
+ tdfx_quiescent(dev);
+#endif
+ }
+ }
+
+#if 0
+ DRM_ERROR("pid = %5d, old counter = %5ld\n",
+ p->p_pid, current->counter);
+#endif
+#if 0
+ while (current->counter > 25)
+ current->counter >>= 1; /* decrease time slice */
+ DRM_ERROR("pid = %5d, new counter = %5ld\n",
+ p->p_pid, current->counter);
+#endif
+ DRM_DEBUG("%d %s\n", lock.context, ret ? "interrupted" : "has lock");
+
+#if DRM_DMA_HISTOGRAM
+ {
+ struct timespec ts;
+ getnanotime(&ts);
+ timespecsub(&ts, &dev->lck_start);
+ atomic_inc(&dev->histo.lhld[drm_histogram_slot(&ts)]);
+ }
+#endif
+
+ return ret;
+}
+
+
+static int
+tdfx_unlock(dev_t kdev, u_long cmd, caddr_t data, int flags, struct proc *p)
+{
+ drm_device_t *dev = kdev->si_drv1;
+ drm_lock_t lock;
+
+ lock = *(drm_lock_t *) data;
+
+ if (lock.context == DRM_KERNEL_CONTEXT) {
+ DRM_ERROR("Process %d using kernel context %d\n",
+ p->p_pid, lock.context);
+ return EINVAL;
+ }
+
+ DRM_DEBUG("%d frees lock (%d holds)\n",
+ lock.context,
+ _DRM_LOCKING_CONTEXT(dev->lock.hw_lock->lock));
+ atomic_inc(&dev->total_unlocks);
+ if (_DRM_LOCK_IS_CONT(dev->lock.hw_lock->lock))
+ atomic_inc(&dev->total_contends);
+ drm_lock_transfer(dev, &dev->lock.hw_lock->lock, DRM_KERNEL_CONTEXT);
+ /* FIXME: Try to send data to card here */
+ if (!dev->context_flag) {
+ if (drm_lock_free(dev, &dev->lock.hw_lock->lock,
+ DRM_KERNEL_CONTEXT)) {
+ DRM_ERROR("\n");
+ }
+ }
+
+ return 0;
+}
diff --git a/libdrm/xf86drm.c b/libdrm/xf86drm.c
index 5c2c08c3..a7be5031 100644
--- a/libdrm/xf86drm.c
+++ b/libdrm/xf86drm.c
@@ -11,11 +11,11 @@
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
- *
+ *
* The above copyright notice and this permission notice (including the next
* paragraph) shall be included in all copies or substantial portions of the
* Software.
- *
+ *
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
@@ -23,12 +23,12 @@
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
* DEALINGS IN THE SOFTWARE.
- *
+ *
* Authors: Rickard E. (Rik) Faith <faith@valinux.com>
* Kevin E. Martin <martin@valinux.com>
*
- * $XFree86: xc/programs/Xserver/hw/xfree86/os-support/linux/drm/xf86drm.c,v 1.17 2000/09/24 13:51:32 alanh Exp $
- *
+ * $XFree86: xc/programs/Xserver/hw/xfree86/os-support/linux/drm/xf86drm.c,v 1.18 2001/03/21 18:08:54 dawes Exp $
+ *
*/
#ifdef XFree86Server
@@ -81,7 +81,18 @@ extern unsigned long _bus_base(void);
#include "xf86drm.h"
#include "drm.h"
-#define DRM_FIXED_DEVICE_MAJOR 145
+#ifndef DRM_MAJOR
+#define DRM_MAJOR 226 /* Linux */
+#endif
+
+#ifndef __linux__
+#undef DRM_MAJOR
+#define DRM_MAJOR 145 /* Should set in drm.h for *BSD */
+#endif
+
+#ifndef DRM_MAX_MINOR
+#define DRM_MAX_MINOR 16
+#endif
#ifdef __linux__
#include <sys/sysmacros.h> /* for makedev() */
@@ -119,7 +130,7 @@ void drmFree(void *pt)
static char *drmStrdup(const char *s)
{
char *retval = NULL;
-
+
if (s) {
retval = _DRM_MALLOC(strlen(s)+1);
strcpy(retval, s);
@@ -161,93 +172,108 @@ static drmHashEntry *drmGetEntry(int fd)
return entry;
}
-/* drm_open is used to open the /dev/dri device */
-
-static int drm_open(const char *file)
-{
- int fd = open(file, O_RDWR, 0);
-
- if (fd >= 0) return fd;
- return -errno;
-}
-
-static int drmOpenDevice(const char *path, long dev,
- mode_t mode, uid_t user, gid_t group)
+static int drmOpenDevice(long dev, int minor)
{
#ifdef XFree86LOADER
struct xf86stat st;
#else
struct stat st;
#endif
+ char buf[64];
+ int fd;
+ mode_t dirmode = DRM_DEV_DIRMODE;
+ mode_t devmode = DRM_DEV_MODE;
+ int isroot = !geteuid();
+#if defined(XFree86Server)
+ uid_t user = DRM_DEV_UID;
+ gid_t group = DRM_DEV_GID;
+#endif
- /* Fiddle mode to remove execute bits */
- mode &= ~(S_IXUSR|S_IXGRP|S_IXOTH);
+#if defined(XFree86Server)
+ devmode = xf86ConfigDRI.mode ? xf86ConfigDRI.mode : DRM_DEV_MODE;
+ dirmode = (devmode & S_IRUSR) ? S_IXUSR : 0;
+ dirmode |= (devmode & S_IRGRP) ? S_IXGRP : 0;
+ dirmode |= (devmode & S_IROTH) ? S_IXOTH : 0;
+ dirmode |= devmode;
+ devmode &= ~(S_IXUSR|S_IXGRP|S_IXOTH);
+ group = (xf86ConfigDRI.group >= 0) ? xf86ConfigDRI.group : DRM_DEV_GID;
+#endif
- if (!stat(path, &st) && st.st_rdev == dev) {
- if (!geteuid()) {
- chown(path, user, group);
- chmod(path, mode);
- }
- return drm_open(path);
+ if (stat(DRM_DIR_NAME, &st)) {
+ if (!isroot) return DRM_ERR_NOT_ROOT;
+ remove(DRM_DIR_NAME);
+ mkdir(DRM_DIR_NAME, dirmode);
}
+#if defined(XFree86Server)
+ chown(DRM_DIR_NAME, user, group);
+ chmod(DRM_DIR_NAME, dirmode);
+#endif
- if (geteuid()) return DRM_ERR_NOT_ROOT;
- remove(path);
- if (mknod(path, S_IFCHR, dev)) {
- remove(path);
- return DRM_ERR_NOT_ROOT;
+ sprintf(buf, DRM_DEV_NAME, DRM_DIR_NAME, minor);
+ if (stat(buf, &st) || st.st_rdev != dev) {
+ if (!isroot) return DRM_ERR_NOT_ROOT;
+ remove(buf);
+ mknod(buf, S_IFCHR | devmode, dev);
}
- chown(path, user, group);
- chmod(path, mode);
- return drm_open(path);
+#if defined(XFree86Server)
+ chown(buf, user, group);
+ chmod(buf, devmode);
+#endif
+
+ if ((fd = open(buf, O_RDWR, 0)) >= 0) return fd;
+ remove(buf);
+ return -errno;
}
-/* drmAvailable looks for /proc/dri, and returns 1 if it is present. On
- OSs that do not have a Linux-like /proc, this information will not be
- available, and we'll have to create a device and check if the driver is
- loaded that way. */
+int drmOpenMinor(int minor, int create)
+{
+ int fd;
+ char buf[64];
+
+ if (create) return drmOpenDevice(makedev(DRM_MAJOR, minor), minor);
+
+ sprintf(buf, DRM_DEV_NAME, DRM_DIR_NAME, minor);
+ if ((fd = open(buf, O_RDWR, 0)) >= 0) return fd;
+ return -errno;
+}
+
+/* drmAvailable looks for (DRM_MAJOR, 0) and returns 1 if it returns
+ information for DRM_IOCTL_VERSION. For backward compatibility with
+ older Linux implementations, /proc/dri is also checked. */
int drmAvailable(void)
{
- char dev_name[64];
drmVersionPtr version;
int retval = 0;
int fd;
+
+ if ((fd = drmOpenMinor(0, 1)) < 0) {
+ /* Try proc for backward Linux compatibility */
+ if (!access("/proc/dri/0", R_OK)) return 1;
+ return 0;
+ }
- if (!access("/proc/dri/0", R_OK)) return 1;
-
- sprintf(dev_name, "/dev/dri-temp-%d", getpid());
-
- remove(dev_name);
- if ((fd = drmOpenDevice(dev_name, makedev(DRM_FIXED_DEVICE_MAJOR, 0),
- S_IRUSR, geteuid(), getegid())) >= 0) {
- /* Read version to make sure this is
- actually a DRI device. */
- if ((version = drmGetVersion(fd))) {
- retval = 1;
- drmFreeVersion(version);
- }
- close(fd);
+ if ((version = drmGetVersion(fd))) {
+ retval = 1;
+ drmFreeVersion(version);
}
- remove(dev_name);
+ close(fd);
return retval;
}
static int drmOpenByBusid(const char *busid)
{
- int i;
- char dev_name[64];
- char *buf;
- int fd;
-
- for (i = 0; i < 8; i++) {
- sprintf(dev_name, "/dev/dri/card%d", i);
- if ((fd = drm_open(dev_name)) >= 0) {
+ int i;
+ int fd;
+ const char *buf;
+
+ for (i = 0; i < DRM_MAX_MINOR; i++) {
+ if ((fd = drmOpenMinor(i, 0)) >= 0) {
buf = drmGetBusid(fd);
if (buf && !strcmp(buf, busid)) {
- drmFreeBusid(buf);
- return fd;
+ drmFreeBusid(buf);
+ return fd;
}
if (buf) drmFreeBusid(buf);
close(fd);
@@ -258,54 +284,43 @@ static int drmOpenByBusid(const char *busid)
static int drmOpenByName(const char *name)
{
- int i;
- char proc_name[64];
- char dev_name[64];
- char buf[512];
- mode_t mode = DRM_DEV_MODE;
- mode_t dirmode;
- gid_t group = DRM_DEV_GID;
- uid_t user = DRM_DEV_UID;
- int fd;
- char *pt;
- char *driver = NULL;
- char *devstring;
- long dev = 0;
- int retcode;
-
-#if defined(XFree86Server)
- mode = xf86ConfigDRI.mode ? xf86ConfigDRI.mode : DRM_DEV_MODE;
- group = (xf86ConfigDRI.group >= 0) ? xf86ConfigDRI.group : DRM_DEV_GID;
-#endif
-
-#if defined(XFree86Server)
+ int i;
+ int fd;
+ drmVersionPtr version;
+
if (!drmAvailable()) {
+#if !defined(XFree86Server)
+ return -1;
+#else
/* try to load the kernel module now */
if (!xf86LoadKernelModule(name)) {
ErrorF("[drm] failed to load kernel module \"%s\"\n",
name);
return -1;
}
- }
-#else
- if (!drmAvailable())
- return -1;
#endif
+ }
- if (!geteuid()) {
- dirmode = mode;
- if (dirmode & S_IRUSR) dirmode |= S_IXUSR;
- if (dirmode & S_IRGRP) dirmode |= S_IXGRP;
- if (dirmode & S_IROTH) dirmode |= S_IXOTH;
- dirmode &= ~(S_IWGRP | S_IWOTH);
- mkdir("/dev/dri", 0);
- chown("/dev/dri", user, group);
- chmod("/dev/dri", dirmode);
+ for (i = 0; i < DRM_MAX_MINOR; i++) {
+ if ((fd = drmOpenMinor(i, 1)) >= 0) {
+ if ((version = drmGetVersion(fd))) {
+ if (!strcmp(version->name, name)) {
+ drmFreeVersion(version);
+ return fd;
+ }
+ drmFreeVersion(version);
+ }
+ }
}
+#ifdef __linux__
+ /* Backward-compatibility /proc support */
for (i = 0; i < 8; i++) {
+ char proc_name[64], buf[512];
+ char *driver, *pt, *devstring;
+ int retcode;
+
sprintf(proc_name, "/proc/dri/%d/name", i);
- sprintf(dev_name, "/dev/dri/card%d", i);
if ((fd = open(proc_name, 0, 0)) >= 0) {
retcode = read(fd, buf, sizeof(buf)-1);
close(fd);
@@ -319,34 +334,17 @@ static int drmOpenByName(const char *name)
for (devstring = ++pt; *pt && *pt != ' '; ++pt)
;
if (*pt) { /* Found busid */
- return drmOpenByBusid(++pt);
+ return drmOpenByBusid(++pt);
} else { /* No busid */
- dev = strtol(devstring, NULL, 0);
- return drmOpenDevice(dev_name, dev,
- mode, user, group);
+ return drmOpenDevice(strtol(devstring, NULL, 0),i);
}
}
}
}
- } else {
- drmVersionPtr version;
- /* /proc/dri not available, possibly
- because we aren't on a Linux system.
- So, try to create the next device and
- see if it's active. */
- dev = makedev(DRM_FIXED_DEVICE_MAJOR, i);
- if ((fd = drmOpenDevice(dev_name, dev, mode, user, group))) {
- if ((version = drmGetVersion(fd))) {
- if (!strcmp(version->name, name)) {
- drmFreeVersion(version);
- return fd;
- }
- drmFreeVersion(version);
- }
- }
- remove(dev_name);
}
}
+#endif
+
return -1;
}
@@ -408,7 +406,7 @@ drmVersionPtr drmGetVersion(int fd)
version->date = NULL;
version->desc_len = 0;
version->desc = NULL;
-
+
if (ioctl(fd, DRM_IOCTL_VERSION, version)) {
drmFreeKernelVersion(version);
return NULL;
@@ -421,7 +419,7 @@ drmVersionPtr drmGetVersion(int fd)
version->date = drmMalloc(version->date_len + 1);
if (version->desc_len)
version->desc = drmMalloc(version->desc_len + 1);
-
+
if (ioctl(fd, DRM_IOCTL_VERSION, version)) {
drmFreeKernelVersion(version);
return NULL;
@@ -503,7 +501,7 @@ int drmAddMap(int fd,
map.offset = offset;
#ifdef __alpha__
/* Make sure we add the bus_base to all but shm */
- if (type != DRM_SHM)
+ if (type != DRM_SHM)
map.offset += BUS_BASE;
#endif
map.size = size;
@@ -515,18 +513,28 @@ int drmAddMap(int fd,
return 0;
}
+int drmRmMap(int fd, drmHandle handle)
+{
+ drm_map_t map;
+
+ map.handle = (void *)handle;
+
+ if(ioctl(fd, DRM_IOCTL_RM_MAP, &map)) return -errno;
+ return 0;
+}
+
int drmAddBufs(int fd, int count, int size, drmBufDescFlags flags,
int agp_offset)
{
drm_buf_desc_t request;
-
+
request.count = count;
request.size = size;
request.low_mark = 0;
request.high_mark = 0;
request.flags = flags;
request.agp_start = agp_offset;
-
+
if (ioctl(fd, DRM_IOCTL_ADD_BUFS, &request)) return -errno;
return request.count;
}
@@ -542,16 +550,16 @@ int drmMarkBufs(int fd, double low, double high)
if (ioctl(fd, DRM_IOCTL_INFO_BUFS, &info)) return -EINVAL;
if (!info.count) return -EINVAL;
-
+
if (!(info.list = drmMalloc(info.count * sizeof(*info.list))))
return -ENOMEM;
-
+
if (ioctl(fd, DRM_IOCTL_INFO_BUFS, &info)) {
int retval = -errno;
drmFree(info.list);
return retval;
}
-
+
for (i = 0; i < info.count; i++) {
info.list[i].low_mark = low * info.list[i].count;
info.list[i].high_mark = high * info.list[i].count;
@@ -562,7 +570,7 @@ int drmMarkBufs(int fd, double low, double high)
}
}
drmFree(info.list);
-
+
return 0;
}
@@ -630,7 +638,7 @@ drmBufInfoPtr drmGetBufInfo(int fd)
if (info.count) {
if (!(info.list = drmMalloc(info.count * sizeof(*info.list))))
return NULL;
-
+
if (ioctl(fd, DRM_IOCTL_INFO_BUFS, &info)) {
drmFree(info.list);
return NULL;
@@ -657,7 +665,7 @@ drmBufMapPtr drmMapBufs(int fd)
drm_buf_map_t bufs;
drmBufMapPtr retval;
int i;
-
+
bufs.count = 0;
bufs.list = NULL;
if (ioctl(fd, DRM_IOCTL_MAP_BUFS, &bufs)) return NULL;
@@ -689,16 +697,19 @@ drmBufMapPtr drmMapBufs(int fd)
int drmUnmapBufs(drmBufMapPtr bufs)
{
int i;
-
+
for (i = 0; i < bufs->count; i++) {
munmap(bufs->list[i].address, bufs->list[i].total);
}
return 0;
}
+#define DRM_DMA_RETRY 16
+
int drmDMA(int fd, drmDMAReqPtr request)
{
drm_dma_t dma;
+ int ret, i = 0;
/* Copy to hidden structure */
dma.context = request->context;
@@ -710,10 +721,17 @@ int drmDMA(int fd, drmDMAReqPtr request)
dma.request_size = request->request_size;
dma.request_indices = request->request_list;
dma.request_sizes = request->request_sizes;
- if (ioctl(fd, DRM_IOCTL_DMA, &dma)) return -errno;
- request->granted_count = dma.granted_count;
-
- return 0;
+
+ do {
+ ret = ioctl( fd, DRM_IOCTL_DMA, &dma );
+ } while ( ret && errno == EAGAIN && i++ < DRM_DMA_RETRY );
+
+ if ( ret == 0 ) {
+ request->granted_count = dma.granted_count;
+ return 0;
+ } else {
+ return -errno;
+ }
}
int drmGetLock(int fd, drmContext context, drmLockFlags flags)
@@ -728,7 +746,7 @@ int drmGetLock(int fd, drmContext context, drmLockFlags flags)
if (flags & DRM_LOCK_FLUSH_ALL) lock.flags |= _DRM_LOCK_FLUSH_ALL;
if (flags & DRM_HALT_ALL_QUEUES) lock.flags |= _DRM_HALT_ALL_QUEUES;
if (flags & DRM_HALT_CUR_QUEUES) lock.flags |= _DRM_HALT_CUR_QUEUES;
-
+
while (ioctl(fd, DRM_IOCTL_LOCK, &lock))
;
return 0;
@@ -827,7 +845,7 @@ int drmGetContextFlags(int fd, drmContext context, drmContextFlagsPtr flags)
if (ctx.flags & _DRM_CONTEXT_2DONLY) *flags |= DRM_CONTEXT_2DONLY;
return 0;
}
-
+
int drmDestroyContext(int fd, drmContext handle)
{
drm_ctx_t ctx;
@@ -1074,12 +1092,189 @@ void *drmGetContextTag(int fd, drmContext context)
{
drmHashEntry *entry = drmGetEntry(fd);
void *value;
-
+
if (drmHashLookup(entry->tagTable, context, &value)) return NULL;
return value;
}
+int drmAddContextPrivateMapping(int fd, drmContext ctx_id, drmHandle handle)
+{
+ drm_ctx_priv_map_t map;
+
+ map.ctx_id = ctx_id;
+ map.handle = (void *)handle;
+
+ if (ioctl(fd, DRM_IOCTL_SET_SAREA_CTX, &map)) return -errno;
+ return 0;
+}
+
+int drmGetContextPrivateMapping(int fd, drmContext ctx_id, drmHandlePtr handle)
+{
+ drm_ctx_priv_map_t map;
+
+ map.ctx_id = ctx_id;
+
+ if (ioctl(fd, DRM_IOCTL_GET_SAREA_CTX, &map)) return -errno;
+ if (handle) *handle = (drmHandle)map.handle;
+
+ return 0;
+}
+
+int drmGetMap(int fd, int idx, drmHandle *offset, drmSize *size,
+ drmMapType *type, drmMapFlags *flags, drmHandle *handle,
+ int *mtrr)
+{
+ drm_map_t map;
+
+ map.offset = idx;
+ if (ioctl(fd, DRM_IOCTL_GET_MAP, &map)) return -errno;
+ *offset = map.offset;
+ *size = map.size;
+ *type = map.type;
+ *flags = map.flags;
+ *handle = (unsigned long)map.handle;
+ *mtrr = map.mtrr;
+ return 0;
+}
+
+int drmGetClient(int fd, int idx, int *auth, int *pid, int *uid,
+ unsigned long *magic, unsigned long *iocs)
+{
+ drm_client_t client;
+
+ client.idx = idx;
+ if (ioctl(fd, DRM_IOCTL_GET_CLIENT, &client)) return -errno;
+ *auth = client.auth;
+ *pid = client.pid;
+ *uid = client.uid;
+ *magic = client.magic;
+ *iocs = client.iocs;
+ return 0;
+}
+
+int drmGetStats(int fd, drmStatsT *stats)
+{
+ drm_stats_t s;
+ int i;
+
+ if (ioctl(fd, DRM_IOCTL_GET_STATS, &s)) return -errno;
+
+ stats->count = 0;
+ memset(stats, 0, sizeof(*stats));
+ if (s.count > sizeof(stats->data)/sizeof(stats->data[0]))
+ return -1;
+
+#define SET_VALUE \
+ stats->data[i].long_format = "%-20.20s"; \
+ stats->data[i].rate_format = "%8.8s"; \
+ stats->data[i].isvalue = 1; \
+ stats->data[i].verbose = 0
+
+#define SET_COUNT \
+ stats->data[i].long_format = "%-20.20s"; \
+ stats->data[i].rate_format = "%5.5s"; \
+ stats->data[i].isvalue = 0; \
+ stats->data[i].mult_names = "kgm"; \
+ stats->data[i].mult = 1000; \
+ stats->data[i].verbose = 0
+
+#define SET_BYTE \
+ stats->data[i].long_format = "%-20.20s"; \
+ stats->data[i].rate_format = "%5.5s"; \
+ stats->data[i].isvalue = 0; \
+ stats->data[i].mult_names = "KGM"; \
+ stats->data[i].mult = 1024; \
+ stats->data[i].verbose = 0
+
+
+ stats->count = s.count;
+ for (i = 0; i < s.count; i++) {
+ stats->data[i].value = s.data[i].value;
+ switch (s.data[i].type) {
+ case _DRM_STAT_LOCK:
+ stats->data[i].long_name = "Lock";
+ stats->data[i].rate_name = "Lock";
+ SET_VALUE;
+ break;
+ case _DRM_STAT_OPENS:
+ stats->data[i].long_name = "Opens";
+ stats->data[i].rate_name = "O";
+ SET_COUNT;
+ stats->data[i].verbose = 1;
+ break;
+ case _DRM_STAT_CLOSES:
+ stats->data[i].long_name = "Closes";
+ stats->data[i].rate_name = "Lock";
+ SET_COUNT;
+ stats->data[i].verbose = 1;
+ break;
+ case _DRM_STAT_IOCTLS:
+ stats->data[i].long_name = "Ioctls";
+ stats->data[i].rate_name = "Ioc/s";
+ SET_COUNT;
+ break;
+ case _DRM_STAT_LOCKS:
+ stats->data[i].long_name = "Locks";
+ stats->data[i].rate_name = "Lck/s";
+ SET_COUNT;
+ break;
+ case _DRM_STAT_UNLOCKS:
+ stats->data[i].long_name = "Unlocks";
+ stats->data[i].rate_name = "Unl/s";
+ SET_COUNT;
+ break;
+ case _DRM_STAT_IRQ:
+ stats->data[i].long_name = "IRQs";
+ stats->data[i].rate_name = "IRQ/s";
+ SET_COUNT;
+ break;
+ case _DRM_STAT_PRIMARY:
+ stats->data[i].long_name = "Primary Bytes";
+ stats->data[i].rate_name = "PB/s";
+ SET_BYTE;
+ break;
+ case _DRM_STAT_SECONDARY:
+ stats->data[i].long_name = "Secondary Bytes";
+ stats->data[i].rate_name = "SB/s";
+ SET_BYTE;
+ break;
+ case _DRM_STAT_DMA:
+ stats->data[i].long_name = "DMA";
+ stats->data[i].rate_name = "DMA/s";
+ SET_COUNT;
+ break;
+ case _DRM_STAT_SPECIAL:
+ stats->data[i].long_name = "Special DMA";
+ stats->data[i].rate_name = "dma/s";
+ SET_COUNT;
+ break;
+ case _DRM_STAT_MISSED:
+ stats->data[i].long_name = "Miss";
+ stats->data[i].rate_name = "Ms/s";
+ SET_COUNT;
+ break;
+ case _DRM_STAT_VALUE:
+ stats->data[i].long_name = "Value";
+ stats->data[i].rate_name = "Value";
+ SET_VALUE;
+ break;
+ case _DRM_STAT_BYTE:
+ stats->data[i].long_name = "Bytes";
+ stats->data[i].rate_name = "B/s";
+ SET_BYTE;
+ break;
+ case _DRM_STAT_COUNT:
+ default:
+ stats->data[i].long_name = "Count";
+ stats->data[i].rate_name = "Cnt/s";
+ SET_COUNT;
+ break;
+ }
+ }
+ return 0;
+}
+
#if defined(XFree86Server) || defined(DRM_USE_MALLOC)
static void drmSIGIOHandler(int interrupt, void *closure)
{
@@ -1108,7 +1303,7 @@ static void drmSIGIOHandler(int interrupt, void *closure)
#if 0
fprintf(stderr, "Got %s\n", buf);
#endif
-
+
for (pt = buf; *pt != ' '; ++pt); /* Find first space */
++pt;
old = strtol(pt, &pt, 0);
@@ -1141,7 +1336,7 @@ int drmRemoveSIGIOHandler(int fd)
drmHashEntry *entry = drmGetEntry(fd);
entry->f = NULL;
-
+
return xf86RemoveSIGIOHandler(fd);
}
#endif
diff --git a/libdrm/xf86drmHash.c b/libdrm/xf86drmHash.c
index 24b698cc..1f1a05b3 100644
--- a/libdrm/xf86drmHash.c
+++ b/libdrm/xf86drmHash.c
@@ -10,11 +10,11 @@
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
- *
+ *
* The above copyright notice and this permission notice (including the next
* paragraph) shall be included in all copies or substantial portions of the
* Software.
- *
+ *
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
@@ -22,10 +22,10 @@
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
* DEALINGS IN THE SOFTWARE.
- *
+ *
* Authors: Rickard E. (Rik) Faith <faith@valinux.com>
*
- * $XFree86: xc/programs/Xserver/hw/xfree86/os-support/linux/drm/xf86drmHash.c,v 1.3 2000/06/17 00:03:34 martin Exp $
+ * $XFree86: xc/programs/Xserver/hw/xfree86/os-support/linux/drm/xf86drmHash.c,v 1.4 2001/03/21 18:08:54 dawes Exp $
*
* DESCRIPTION
*
@@ -187,7 +187,7 @@ int N(HashDestroy)(void *t)
int i;
if (table->magic != HASH_MAGIC) return -1; /* Bad magic */
-
+
for (i = 0; i < HASH_SIZE; i++) {
for (bucket = table->buckets[i]; bucket;) {
next = bucket->next;
@@ -235,8 +235,8 @@ int N(HashLookup)(void *t, unsigned long key, void **value)
HashTablePtr table = (HashTablePtr)t;
HashBucketPtr bucket;
- if (table->magic != HASH_MAGIC) return -1; /* Bad magic */
-
+ if (!table || table->magic != HASH_MAGIC) return -1; /* Bad magic */
+
bucket = HashFind(table, key, NULL);
if (!bucket) return 1; /* Not found */
*value = bucket->value;
@@ -250,7 +250,7 @@ int N(HashInsert)(void *t, unsigned long key, void *value)
unsigned long hash;
if (table->magic != HASH_MAGIC) return -1; /* Bad magic */
-
+
if (HashFind(table, key, &hash)) return 1; /* Already in table */
bucket = HASH_ALLOC(sizeof(*bucket));
@@ -272,7 +272,7 @@ int N(HashDelete)(void *t, unsigned long key)
HashBucketPtr bucket;
if (table->magic != HASH_MAGIC) return -1; /* Bad magic */
-
+
bucket = HashFind(table, key, &hash);
if (!bucket) return 1; /* Not found */
@@ -285,7 +285,7 @@ int N(HashDelete)(void *t, unsigned long key)
int N(HashNext)(void *t, unsigned long *key, void **value)
{
HashTablePtr table = (HashTablePtr)t;
-
+
for (; table->p0 < HASH_SIZE;
++table->p0, table->p1 = table->buckets[table->p0]) {
if (table->p1) {
@@ -301,7 +301,7 @@ int N(HashNext)(void *t, unsigned long *key, void **value)
int N(HashFirst)(void *t, unsigned long *key, void **value)
{
HashTablePtr table = (HashTablePtr)t;
-
+
if (table->magic != HASH_MAGIC) return -1; /* Bad magic */
table->p0 = 0;
@@ -337,7 +337,7 @@ static void compute_dist(HashTablePtr table)
{
int i;
HashBucketPtr bucket;
-
+
printf("Entries = %ld, hits = %ld, partials = %ld, misses = %ld\n",
table->entries, table->hits, table->partials, table->misses);
clear_dist();
@@ -356,7 +356,7 @@ static void check_table(HashTablePtr table,
{
unsigned long retval = 0;
int retcode = N(HashLookup)(table, key, &retval);
-
+
switch (retcode) {
case -1:
printf("Bad magic = 0x%08lx:"
@@ -391,7 +391,7 @@ int main(void)
for (i = 256; i >= 0; i--) check_table(table, i, i);
compute_dist(table);
N(HashDestroy)(table);
-
+
printf("\n***** 1024 consecutive integers ****\n");
table = N(HashCreate)();
for (i = 0; i < 1024; i++) N(HashInsert)(table, i, i);
@@ -399,7 +399,7 @@ int main(void)
for (i = 1024; i >= 0; i--) check_table(table, i, i);
compute_dist(table);
N(HashDestroy)(table);
-
+
printf("\n***** 1024 consecutive page addresses (4k pages) ****\n");
table = N(HashCreate)();
for (i = 0; i < 1024; i++) N(HashInsert)(table, i*4096, i);
@@ -407,7 +407,7 @@ int main(void)
for (i = 1024; i >= 0; i--) check_table(table, i*4096, i);
compute_dist(table);
N(HashDestroy)(table);
-
+
printf("\n***** 1024 random integers ****\n");
table = N(HashCreate)();
srandom(0xbeefbeef);
@@ -429,7 +429,7 @@ int main(void)
for (i = 0; i < 5000; i++) check_table(table, random(), i);
compute_dist(table);
N(HashDestroy)(table);
-
+
return 0;
}
#endif
diff --git a/linux-core/Makefile.kernel b/linux-core/Makefile.kernel
index 9fe0038f..a39b3cc5 100644
--- a/linux-core/Makefile.kernel
+++ b/linux-core/Makefile.kernel
@@ -62,7 +62,7 @@ obj-$(CONFIG_DRM_MGA) += mga.o
obj-$(CONFIG_DRM_I810) += i810.o
-# When linking into the kernel, link the library just once.
+# When linking into the kernel, link the library just once.
# If making modules, we include the library into each module
lib-objs-mod := $(patsubst %.o,%-mod.o,$(lib-objs))
@@ -75,7 +75,7 @@ endif
include $(TOPDIR)/Rules.make
-$(patsubst %.o,%.c,$(lib-objs-mod)):
+$(patsubst %.o,%.c,$(lib-objs-mod)):
@ln -sf $(subst -mod,,$@) $@
drmlib-mod.a: $(lib-objs-mod)
diff --git a/linux-core/drmP.h b/linux-core/drmP.h
index affeae70..274e318a 100644
--- a/linux-core/drmP.h
+++ b/linux-core/drmP.h
@@ -11,22 +11,22 @@
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
- *
+ *
* The above copyright notice and this permission notice (including the next
* paragraph) shall be included in all copies or substantial portions of the
* Software.
- *
+ *
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
- * DEALINGS IN THE SOFTWARE.
- *
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
* Authors:
* Rickard E. (Rik) Faith <faith@valinux.com>
- *
+ * Gareth Hughes <gareth@valinux.com>
*/
#ifndef _DRM_P_H_
@@ -73,11 +73,46 @@
#if LINUX_VERSION_CODE < 0x020400
#include "compat-pre24.h"
#endif
+#include <asm/pgalloc.h>
#include "drm.h"
+/* DRM template customization defaults
+ */
+#ifndef __HAVE_AGP
+#define __HAVE_AGP 0
+#endif
+#ifndef __HAVE_MTRR
+#define __HAVE_MTRR 0
+#endif
+#ifndef __HAVE_CTX_BITMAP
+#define __HAVE_CTX_BITMAP 0
+#endif
+#ifndef __HAVE_DMA
+#define __HAVE_DMA 0
+#endif
+#ifndef __HAVE_DMA_IRQ
+#define __HAVE_DMA_IRQ 0
+#endif
+#ifndef __HAVE_DMA_WAITLIST
+#define __HAVE_DMA_WAITLIST 0
+#endif
+#ifndef __HAVE_DMA_FREELIST
+#define __HAVE_DMA_FREELIST 0
+#endif
+#ifndef __HAVE_DMA_HISTOGRAM
+#define __HAVE_DMA_HISTOGRAM 0
+#endif
+
+#define __REALLY_HAVE_AGP (__HAVE_AGP && (defined(CONFIG_AGP) || \
+ defined(CONFIG_AGP_MODULE)))
+#define __REALLY_HAVE_MTRR (__HAVE_MTRR && defined(CONFIG_MTRR))
+
+
+/* Begin the DRM...
+ */
+
#define DRM_DEBUG_CODE 2 /* Include debugging code (if > 1, then
also include looping detection. */
-#define DRM_DMA_HISTOGRAM 1 /* Make histogram of DMA latency. */
#define DRM_HASH_SIZE 16 /* Size of key hash table */
#define DRM_KERNEL_CONTEXT 0 /* Change drm_resctx if changed */
@@ -109,6 +144,7 @@
#define DRM_MEM_TOTALAGP 16
#define DRM_MEM_BOUNDAGP 17
#define DRM_MEM_CTXBITMAP 18
+#define DRM_MEM_STUB 19
#define DRM_MAX_CTXBITMAP (PAGE_SIZE * 8)
@@ -259,16 +295,16 @@ static inline unsigned long __cmpxchg(volatile void *ptr, unsigned long old,
printk(KERN_ERR "[" DRM_NAME ":" __FUNCTION__ "] *ERROR* " fmt , ##arg)
#define DRM_MEM_ERROR(area, fmt, arg...) \
printk(KERN_ERR "[" DRM_NAME ":" __FUNCTION__ ":%s] *ERROR* " fmt , \
- drm_mem_stats[area].name , ##arg)
+ DRM(mem_stats)[area].name , ##arg)
#define DRM_INFO(fmt, arg...) printk(KERN_INFO "[" DRM_NAME "] " fmt , ##arg)
#if DRM_DEBUG_CODE
-#define DRM_DEBUG(fmt, arg...) \
- do { \
- if (drm_flags&DRM_FLAG_DEBUG) \
- printk(KERN_DEBUG \
- "[" DRM_NAME ":" __FUNCTION__ "] " fmt , \
- ##arg); \
+#define DRM_DEBUG(fmt, arg...) \
+ do { \
+ if ( DRM(flags) & DRM_FLAG_DEBUG ) \
+ printk(KERN_DEBUG \
+ "[" DRM_NAME ":" __FUNCTION__ "] " fmt , \
+ ##arg); \
} while (0)
#else
#define DRM_DEBUG(fmt, arg...) do { } while (0)
@@ -276,13 +312,36 @@ static inline unsigned long __cmpxchg(volatile void *ptr, unsigned long old,
#define DRM_PROC_LIMIT (PAGE_SIZE-80)
-#define DRM_PROC_PRINT(fmt, arg...) \
- len += sprintf(&buf[len], fmt , ##arg); \
- if (len > DRM_PROC_LIMIT) return len;
+#define DRM_PROC_PRINT(fmt, arg...) \
+ len += sprintf(&buf[len], fmt , ##arg); \
+ if (len > DRM_PROC_LIMIT) { *eof = 1; return len - offset; }
+
+#define DRM_PROC_PRINT_RET(ret, fmt, arg...) \
+ len += sprintf(&buf[len], fmt , ##arg); \
+ if (len > DRM_PROC_LIMIT) { ret; *eof = 1; return len - offset; }
+
+ /* Mapping helper macros */
+#define DRM_IOREMAP(map) \
+ (map)->handle = DRM(ioremap)( (map)->offset, (map)->size )
+
+#define DRM_IOREMAPFREE(map) \
+ do { \
+ if ( (map)->handle && (map)->size ) \
+ DRM(ioremapfree)( (map)->handle, (map)->size ); \
+ } while (0)
-#define DRM_PROC_PRINT_RET(ret, fmt, arg...) \
- len += sprintf(&buf[len], fmt , ##arg); \
- if (len > DRM_PROC_LIMIT) { ret; return len; }
+#define DRM_FIND_MAP(_map, _o) \
+do { \
+ struct list_head *_list; \
+ list_for_each( _list, &dev->maplist->head ) { \
+ drm_map_list_t *_entry = (drm_map_list_t *)_list; \
+ if ( _entry->map && \
+ _entry->map->offset == (_o) ) { \
+ (_map) = _entry->map; \
+ break; \
+ } \
+ } \
+} while(0)
/* Internal types and structures */
#define DRM_ARRAY_SIZE(x) (sizeof(x)/sizeof(x[0]))
@@ -293,8 +352,12 @@ static inline unsigned long __cmpxchg(volatile void *ptr, unsigned long old,
#define DRM_BUFCOUNT(x) ((x)->count - DRM_LEFTCOUNT(x))
#define DRM_WAITCOUNT(dev,idx) DRM_BUFCOUNT(&dev->queuelist[idx]->waitlist)
-typedef int drm_ioctl_t(struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg);
+#define DRM_GET_PRIV_SAREA(_dev, _ctx, _map) do { \
+ (_map) = (_dev)->context_sareas[_ctx]; \
+} while(0)
+
+typedef int drm_ioctl_t( struct inode *inode, struct file *filp,
+ unsigned int cmd, unsigned long arg );
typedef struct drm_ioctl_desc {
drm_ioctl_t *func;
@@ -304,7 +367,7 @@ typedef struct drm_ioctl_desc {
typedef struct drm_devstate {
pid_t owner; /* X server pid holding x_lock */
-
+
} drm_devstate_t;
typedef struct drm_magic_entry {
@@ -365,14 +428,14 @@ typedef struct drm_buf {
#define DRM_DMA_HISTOGRAM_NEXT(current) ((current)*10)
typedef struct drm_histogram {
atomic_t total;
-
+
atomic_t queued_to_dispatched[DRM_DMA_HISTOGRAM_SLOTS];
atomic_t dispatched_to_completed[DRM_DMA_HISTOGRAM_SLOTS];
atomic_t completed_to_freed[DRM_DMA_HISTOGRAM_SLOTS];
-
+
atomic_t queued_to_completed[DRM_DMA_HISTOGRAM_SLOTS];
atomic_t queued_to_freed[DRM_DMA_HISTOGRAM_SLOTS];
-
+
atomic_t dma[DRM_DMA_HISTOGRAM_SLOTS];
atomic_t schedule[DRM_DMA_HISTOGRAM_SLOTS];
atomic_t ctx[DRM_DMA_HISTOGRAM_SLOTS];
@@ -396,7 +459,7 @@ typedef struct drm_freelist {
int initialized; /* Freelist in use */
atomic_t count; /* Number of free buffers */
drm_buf_t *next; /* End pointer */
-
+
wait_queue_head_t waiting; /* Processes waiting on free bufs */
int low_mark; /* Low water mark */
int high_mark; /* High water mark */
@@ -442,9 +505,11 @@ typedef struct drm_queue {
wait_queue_head_t read_queue; /* Processes waiting on block_read */
atomic_t block_write; /* Queue blocked for writes */
wait_queue_head_t write_queue; /* Processes waiting on block_write */
+#if 1
atomic_t total_queued; /* Total queued statistic */
atomic_t total_flushed;/* Total flushes statistic */
atomic_t total_locks; /* Total locks statistics */
+#endif
drm_ctx_flags_t flags; /* Context preserving and 2D-only */
drm_waitlist_t waitlist; /* Pending buffers */
wait_queue_head_t flush_queue; /* Processes waiting until flush */
@@ -458,11 +523,12 @@ typedef struct drm_lock_data {
} drm_lock_data_t;
typedef struct drm_device_dma {
+#if 0
/* Performance Counters */
atomic_t total_prio; /* Total DRM_DMA_PRIORITY */
atomic_t total_bytes; /* Total bytes DMA'd */
atomic_t total_dmas; /* Total DMA buffers dispatched */
-
+
atomic_t total_missed_dma; /* Missed drm_do_dma */
atomic_t total_missed_lock; /* Missed lock in drm_do_dma */
atomic_t total_missed_free; /* Missed drm_free_this_buffer */
@@ -471,16 +537,17 @@ typedef struct drm_device_dma {
atomic_t total_tried; /* Tried next_buffer */
atomic_t total_hit; /* Sent next_buffer */
atomic_t total_lost; /* Lost interrupt */
+#endif
drm_buf_entry_t bufs[DRM_MAX_ORDER+1];
int buf_count;
drm_buf_t **buflist; /* Vector of pointers info bufs */
- int seg_count;
+ int seg_count;
int page_count;
unsigned long *pagelist;
unsigned long byte_count;
enum {
- _DRM_DMA_USE_AGP = 0x01
+ _DRM_DMA_USE_AGP = 0x01
} flags;
/* DMA support */
@@ -490,7 +557,7 @@ typedef struct drm_device_dma {
wait_queue_head_t waiting; /* Processes waiting on free bufs */
} drm_device_dma_t;
-#if defined(CONFIG_AGP) || defined(CONFIG_AGP_MODULE)
+#if __REALLY_HAVE_AGP
typedef struct drm_agp_mem {
unsigned long handle;
agp_memory *memory;
@@ -517,13 +584,18 @@ typedef struct drm_sigdata {
drm_hw_lock_t *lock;
} drm_sigdata_t;
+typedef struct drm_map_list {
+ struct list_head head;
+ drm_map_t *map;
+} drm_map_list_t;
+
typedef struct drm_device {
const char *name; /* Simple driver name */
char *unique; /* Unique identifier: e.g., busid */
int unique_len; /* Length of unique field */
dev_t device; /* Device number for mknod */
char *devname; /* For /proc/interrupts */
-
+
int blocked; /* Blocked due to VC switch? */
struct proc_dir_entry *root; /* Root for this device's entries */
@@ -538,17 +610,10 @@ typedef struct drm_device {
int buf_use; /* Buffers in use -- cannot alloc */
atomic_t buf_alloc; /* Buffer allocation in progress */
- /* Performance Counters */
- atomic_t total_open;
- atomic_t total_close;
- atomic_t total_ioctl;
- atomic_t total_irq; /* Total interruptions */
- atomic_t total_ctx; /* Total context switches */
-
- atomic_t total_locks;
- atomic_t total_unlocks;
- atomic_t total_contends;
- atomic_t total_sleeps;
+ /* Performance counters */
+ unsigned long counters;
+ drm_stat_type_t types[15];
+ atomic_t counts[15];
/* Authentication */
drm_file_t *file_first;
@@ -556,9 +621,12 @@ typedef struct drm_device {
drm_magic_head_t magiclist[DRM_HASH_SIZE];
/* Memory management */
- drm_map_t **maplist; /* Vector of pointers to regions */
+ drm_map_list_t *maplist; /* Linked list of regions */
int map_count; /* Number of mappable regions */
+ drm_map_t **context_sareas;
+ int max_context;
+
drm_vma_entry_t *vmalist; /* List of vmas (for debugging) */
drm_lock_data_t lock; /* Information on hardware lock */
@@ -582,10 +650,10 @@ typedef struct drm_device {
struct tq_struct tq;
cycles_t ctx_start;
cycles_t lck_start;
-#if DRM_DMA_HISTOGRAM
+#if __HAVE_DMA_HISTOGRAM
drm_histogram_t histo;
#endif
-
+
/* Callback to X server for context switch
and for heavy-handed reset. */
char buf[DRM_BSZ]; /* Output buffer */
@@ -595,8 +663,8 @@ typedef struct drm_device {
struct fasync_struct *buf_async;/* Processes waiting for SIGIO */
wait_queue_head_t buf_readers; /* Processes waiting to read */
wait_queue_head_t buf_writers; /* Processes waiting to ctx switch */
-
-#if defined(CONFIG_AGP) || defined(CONFIG_AGP_MODULE)
+
+#if __REALLY_HAVE_AGP
drm_agp_head_t *agp;
#endif
unsigned long *ctx_bitmap;
@@ -606,230 +674,278 @@ typedef struct drm_device {
} drm_device_t;
- /* Internal function definitions */
-
- /* Misc. support (init.c) */
-extern int drm_flags;
-extern void drm_parse_options(char *s);
-extern int drm_cpu_valid(void);
+/* ================================================================
+ * Internal function definitions
+ */
+ /* Misc. support (drm_init.h) */
+extern int DRM(flags);
+extern void DRM(parse_options)( char *s );
+extern int DRM(cpu_valid)( void );
- /* Device support (fops.c) */
-extern int drm_open_helper(struct inode *inode, struct file *filp,
- drm_device_t *dev);
-extern int drm_flush(struct file *filp);
-extern int drm_release(struct inode *inode, struct file *filp);
-extern int drm_fasync(int fd, struct file *filp, int on);
-extern ssize_t drm_read(struct file *filp, char *buf, size_t count,
- loff_t *off);
-extern int drm_write_string(drm_device_t *dev, const char *s);
-extern unsigned int drm_poll(struct file *filp, struct poll_table_struct *wait);
+ /* Driver support (drm_drv.h) */
+extern int DRM(version)(struct inode *inode, struct file *filp,
+ unsigned int cmd, unsigned long arg);
+extern int DRM(open)(struct inode *inode, struct file *filp);
+extern int DRM(release)(struct inode *inode, struct file *filp);
+extern int DRM(ioctl)(struct inode *inode, struct file *filp,
+ unsigned int cmd, unsigned long arg);
+extern int DRM(lock)(struct inode *inode, struct file *filp,
+ unsigned int cmd, unsigned long arg);
+extern int DRM(unlock)(struct inode *inode, struct file *filp,
+ unsigned int cmd, unsigned long arg);
- /* Mapping support (vm.c) */
+ /* Device support (drm_fops.h) */
+extern int DRM(open_helper)(struct inode *inode, struct file *filp,
+ drm_device_t *dev);
+extern int DRM(flush)(struct file *filp);
+extern int DRM(release_fuck)(struct inode *inode, struct file *filp);
+extern int DRM(fasync)(int fd, struct file *filp, int on);
+extern ssize_t DRM(read)(struct file *filp, char *buf, size_t count,
+ loff_t *off);
+extern int DRM(write_string)(drm_device_t *dev, const char *s);
+extern unsigned int DRM(poll)(struct file *filp,
+ struct poll_table_struct *wait);
+
+ /* Mapping support (drm_vm.h) */
#if LINUX_VERSION_CODE < 0x020317
-extern unsigned long drm_vm_nopage(struct vm_area_struct *vma,
+extern unsigned long DRM(vm_nopage)(struct vm_area_struct *vma,
+ unsigned long address,
+ int write_access);
+extern unsigned long DRM(vm_shm_nopage)(struct vm_area_struct *vma,
+ unsigned long address,
+ int write_access);
+extern unsigned long DRM(vm_dma_nopage)(struct vm_area_struct *vma,
+ unsigned long address,
+ int write_access);
+#else
+ /* Return type changed in 2.3.23 */
+extern struct page *DRM(vm_nopage)(struct vm_area_struct *vma,
unsigned long address,
int write_access);
-extern unsigned long drm_vm_shm_nopage(struct vm_area_struct *vma,
+extern struct page *DRM(vm_shm_nopage)(struct vm_area_struct *vma,
unsigned long address,
int write_access);
-extern unsigned long drm_vm_shm_nopage_lock(struct vm_area_struct *vma,
- unsigned long address,
- int write_access);
-extern unsigned long drm_vm_dma_nopage(struct vm_area_struct *vma,
+extern struct page *DRM(vm_dma_nopage)(struct vm_area_struct *vma,
unsigned long address,
int write_access);
-#else
- /* Return type changed in 2.3.23 */
-extern struct page *drm_vm_nopage(struct vm_area_struct *vma,
- unsigned long address,
- int write_access);
-extern struct page *drm_vm_shm_nopage(struct vm_area_struct *vma,
- unsigned long address,
- int write_access);
-extern struct page *drm_vm_shm_nopage_lock(struct vm_area_struct *vma,
- unsigned long address,
- int write_access);
-extern struct page *drm_vm_dma_nopage(struct vm_area_struct *vma,
- unsigned long address,
- int write_access);
-#endif
-extern void drm_vm_open(struct vm_area_struct *vma);
-extern void drm_vm_close(struct vm_area_struct *vma);
-extern int drm_mmap_dma(struct file *filp,
- struct vm_area_struct *vma);
-extern int drm_mmap(struct file *filp, struct vm_area_struct *vma);
-
-
- /* Proc support (proc.c) */
-extern int drm_proc_init(drm_device_t *dev);
-extern int drm_proc_cleanup(void);
-
- /* Memory management support (memory.c) */
-extern void drm_mem_init(void);
-extern int drm_mem_info(char *buf, char **start, off_t offset,
- int len, int *eof, void *data);
-extern void *drm_alloc(size_t size, int area);
-extern void *drm_realloc(void *oldpt, size_t oldsize, size_t size,
- int area);
-extern char *drm_strdup(const char *s, int area);
-extern void drm_strfree(const char *s, int area);
-extern void drm_free(void *pt, size_t size, int area);
-extern unsigned long drm_alloc_pages(int order, int area);
-extern void drm_free_pages(unsigned long address, int order,
- int area);
-extern void *drm_ioremap(unsigned long offset, unsigned long size);
-extern void drm_ioremapfree(void *pt, unsigned long size);
-
-#if defined(CONFIG_AGP) || defined(CONFIG_AGP_MODULE)
-extern agp_memory *drm_alloc_agp(int pages, u32 type);
-extern int drm_free_agp(agp_memory *handle, int pages);
-extern int drm_bind_agp(agp_memory *handle, unsigned int start);
-extern int drm_unbind_agp(agp_memory *handle);
+#endif
+extern void DRM(vm_open)(struct vm_area_struct *vma);
+extern void DRM(vm_close)(struct vm_area_struct *vma);
+extern void DRM(vm_shm_close)(struct vm_area_struct *vma);
+extern int DRM(mmap_dma)(struct file *filp,
+ struct vm_area_struct *vma);
+extern int DRM(mmap)(struct file *filp, struct vm_area_struct *vma);
+
+ /* Memory management support (drm_memory.h) */
+extern void DRM(mem_init)(void);
+extern int DRM(mem_info)(char *buf, char **start, off_t offset,
+ int request, int *eof, void *data);
+extern void *DRM(alloc)(size_t size, int area);
+extern void *DRM(realloc)(void *oldpt, size_t oldsize, size_t size,
+ int area);
+extern char *DRM(strdup)(const char *s, int area);
+extern void DRM(strfree)(const char *s, int area);
+extern void DRM(free)(void *pt, size_t size, int area);
+extern unsigned long DRM(alloc_pages)(int order, int area);
+extern void DRM(free_pages)(unsigned long address, int order,
+ int area);
+extern void *DRM(ioremap)(unsigned long offset, unsigned long size);
+extern void DRM(ioremapfree)(void *pt, unsigned long size);
+
+#if __REALLY_HAVE_AGP
+extern agp_memory *DRM(alloc_agp)(int pages, u32 type);
+extern int DRM(free_agp)(agp_memory *handle, int pages);
+extern int DRM(bind_agp)(agp_memory *handle, unsigned int start);
+extern int DRM(unbind_agp)(agp_memory *handle);
#endif
-
- /* Buffer management support (bufs.c) */
-extern int drm_order(unsigned long size);
-extern int drm_addmap(struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg);
-extern int drm_addbufs(struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg);
-extern int drm_infobufs(struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg);
-extern int drm_markbufs(struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg);
-extern int drm_freebufs(struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg);
-extern int drm_mapbufs(struct inode *inode, struct file *filp,
+ /* Misc. IOCTL support (drm_ioctl.h) */
+extern int DRM(irq_busid)(struct inode *inode, struct file *filp,
+ unsigned int cmd, unsigned long arg);
+extern int DRM(getunique)(struct inode *inode, struct file *filp,
+ unsigned int cmd, unsigned long arg);
+extern int DRM(setunique)(struct inode *inode, struct file *filp,
+ unsigned int cmd, unsigned long arg);
+extern int DRM(getmap)(struct inode *inode, struct file *filp,
unsigned int cmd, unsigned long arg);
+extern int DRM(getclient)(struct inode *inode, struct file *filp,
+ unsigned int cmd, unsigned long arg);
+extern int DRM(getstats)(struct inode *inode, struct file *filp,
+ unsigned int cmd, unsigned long arg);
-
- /* Buffer list management support (lists.c) */
-extern int drm_waitlist_create(drm_waitlist_t *bl, int count);
-extern int drm_waitlist_destroy(drm_waitlist_t *bl);
-extern int drm_waitlist_put(drm_waitlist_t *bl, drm_buf_t *buf);
-extern drm_buf_t *drm_waitlist_get(drm_waitlist_t *bl);
-
-extern int drm_freelist_create(drm_freelist_t *bl, int count);
-extern int drm_freelist_destroy(drm_freelist_t *bl);
-extern int drm_freelist_put(drm_device_t *dev, drm_freelist_t *bl,
- drm_buf_t *buf);
-extern drm_buf_t *drm_freelist_get(drm_freelist_t *bl, int block);
-
- /* DMA support (gen_dma.c) */
-extern void drm_dma_setup(drm_device_t *dev);
-extern void drm_dma_takedown(drm_device_t *dev);
-extern void drm_free_buffer(drm_device_t *dev, drm_buf_t *buf);
-extern void drm_reclaim_buffers(drm_device_t *dev, pid_t pid);
-extern int drm_context_switch(drm_device_t *dev, int old, int new);
-extern int drm_context_switch_complete(drm_device_t *dev, int new);
-extern void drm_clear_next_buffer(drm_device_t *dev);
-extern int drm_select_queue(drm_device_t *dev,
- void (*wrapper)(unsigned long));
-extern int drm_dma_enqueue(drm_device_t *dev, drm_dma_t *dma);
-extern int drm_dma_get_buffers(drm_device_t *dev, drm_dma_t *dma);
-#if DRM_DMA_HISTOGRAM
-extern int drm_histogram_slot(unsigned long count);
-extern void drm_histogram_compute(drm_device_t *dev, drm_buf_t *buf);
+ /* Context IOCTL support (drm_context.h) */
+extern int DRM(resctx)( struct inode *inode, struct file *filp,
+ unsigned int cmd, unsigned long arg );
+extern int DRM(addctx)( struct inode *inode, struct file *filp,
+ unsigned int cmd, unsigned long arg );
+extern int DRM(modctx)( struct inode *inode, struct file *filp,
+ unsigned int cmd, unsigned long arg );
+extern int DRM(getctx)( struct inode *inode, struct file *filp,
+ unsigned int cmd, unsigned long arg );
+extern int DRM(switchctx)( struct inode *inode, struct file *filp,
+ unsigned int cmd, unsigned long arg );
+extern int DRM(newctx)( struct inode *inode, struct file *filp,
+ unsigned int cmd, unsigned long arg );
+extern int DRM(rmctx)( struct inode *inode, struct file *filp,
+ unsigned int cmd, unsigned long arg );
+
+extern int DRM(context_switch)(drm_device_t *dev, int old, int new);
+extern int DRM(context_switch_complete)(drm_device_t *dev, int new);
+
+#if __HAVE_CTX_BITMAP
+extern int DRM(ctxbitmap_init)( drm_device_t *dev );
+extern void DRM(ctxbitmap_cleanup)( drm_device_t *dev );
#endif
+extern int DRM(setsareactx)( struct inode *inode, struct file *filp,
+ unsigned int cmd, unsigned long arg );
+extern int DRM(getsareactx)( struct inode *inode, struct file *filp,
+ unsigned int cmd, unsigned long arg );
- /* Misc. IOCTL support (ioctl.c) */
-extern int drm_irq_busid(struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg);
-extern int drm_getunique(struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg);
-extern int drm_setunique(struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg);
+ /* Drawable IOCTL support (drm_drawable.h) */
+extern int DRM(adddraw)(struct inode *inode, struct file *filp,
+ unsigned int cmd, unsigned long arg);
+extern int DRM(rmdraw)(struct inode *inode, struct file *filp,
+ unsigned int cmd, unsigned long arg);
- /* Context IOCTL support (context.c) */
-extern int drm_resctx(struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg);
-extern int drm_addctx(struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg);
-extern int drm_modctx(struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg);
-extern int drm_getctx(struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg);
-extern int drm_switchctx(struct inode *inode, struct file *filp,
+ /* Authentication IOCTL support (drm_auth.h) */
+extern int DRM(add_magic)(drm_device_t *dev, drm_file_t *priv,
+ drm_magic_t magic);
+extern int DRM(remove_magic)(drm_device_t *dev, drm_magic_t magic);
+extern int DRM(getmagic)(struct inode *inode, struct file *filp,
unsigned int cmd, unsigned long arg);
-extern int drm_newctx(struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg);
-extern int drm_rmctx(struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg);
+extern int DRM(authmagic)(struct inode *inode, struct file *filp,
+ unsigned int cmd, unsigned long arg);
- /* Drawable IOCTL support (drawable.c) */
-extern int drm_adddraw(struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg);
-extern int drm_rmdraw(struct inode *inode, struct file *filp,
+ /* Locking IOCTL support (drm_lock.h) */
+extern int DRM(block)(struct inode *inode, struct file *filp,
unsigned int cmd, unsigned long arg);
-
-
- /* Authentication IOCTL support (auth.c) */
-extern int drm_add_magic(drm_device_t *dev, drm_file_t *priv,
- drm_magic_t magic);
-extern int drm_remove_magic(drm_device_t *dev, drm_magic_t magic);
-extern int drm_getmagic(struct inode *inode, struct file *filp,
+extern int DRM(unblock)(struct inode *inode, struct file *filp,
unsigned int cmd, unsigned long arg);
-extern int drm_authmagic(struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg);
-
-
- /* Locking IOCTL support (lock.c) */
-extern int drm_block(struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg);
-extern int drm_unblock(struct inode *inode, struct file *filp,
+extern int DRM(lock_take)(__volatile__ unsigned int *lock,
+ unsigned int context);
+extern int DRM(lock_transfer)(drm_device_t *dev,
+ __volatile__ unsigned int *lock,
+ unsigned int context);
+extern int DRM(lock_free)(drm_device_t *dev,
+ __volatile__ unsigned int *lock,
+ unsigned int context);
+extern int DRM(finish)(struct inode *inode, struct file *filp,
unsigned int cmd, unsigned long arg);
-extern int drm_lock_take(__volatile__ unsigned int *lock,
- unsigned int context);
-extern int drm_lock_transfer(drm_device_t *dev,
- __volatile__ unsigned int *lock,
- unsigned int context);
-extern int drm_lock_free(drm_device_t *dev,
- __volatile__ unsigned int *lock,
- unsigned int context);
-extern int drm_finish(struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg);
-extern int drm_flush_unblock(drm_device_t *dev, int context,
- drm_lock_flags_t flags);
-extern int drm_flush_block_and_flush(drm_device_t *dev, int context,
- drm_lock_flags_t flags);
-extern int drm_notifier(void *priv);
-
- /* Context Bitmap support (ctxbitmap.c) */
-extern int drm_ctxbitmap_init(drm_device_t *dev);
-extern void drm_ctxbitmap_cleanup(drm_device_t *dev);
-extern int drm_ctxbitmap_next(drm_device_t *dev);
-extern void drm_ctxbitmap_free(drm_device_t *dev, int ctx_handle);
+extern int DRM(flush_unblock)(drm_device_t *dev, int context,
+ drm_lock_flags_t flags);
+extern int DRM(flush_block_and_flush)(drm_device_t *dev, int context,
+ drm_lock_flags_t flags);
+extern int DRM(notifier)(void *priv);
+
+ /* Buffer management support (drm_bufs.h) */
+extern int DRM(order)( unsigned long size );
+extern int DRM(addmap)( struct inode *inode, struct file *filp,
+ unsigned int cmd, unsigned long arg );
+extern int DRM(rmmap)( struct inode *inode, struct file *filp,
+ unsigned int cmd, unsigned long arg );
+#if __HAVE_DMA
+extern int DRM(addbufs)( struct inode *inode, struct file *filp,
+ unsigned int cmd, unsigned long arg );
+extern int DRM(infobufs)( struct inode *inode, struct file *filp,
+ unsigned int cmd, unsigned long arg );
+extern int DRM(markbufs)( struct inode *inode, struct file *filp,
+ unsigned int cmd, unsigned long arg );
+extern int DRM(freebufs)( struct inode *inode, struct file *filp,
+ unsigned int cmd, unsigned long arg );
+extern int DRM(mapbufs)( struct inode *inode, struct file *filp,
+ unsigned int cmd, unsigned long arg );
+
+ /* DMA support (drm_dma.h) */
+extern int DRM(dma_setup)(drm_device_t *dev);
+extern void DRM(dma_takedown)(drm_device_t *dev);
+extern void DRM(free_buffer)(drm_device_t *dev, drm_buf_t *buf);
+extern void DRM(reclaim_buffers)(drm_device_t *dev, pid_t pid);
+#if __HAVE_OLD_DMA
+/* GH: This is a dirty hack for now...
+ */
+extern void DRM(clear_next_buffer)(drm_device_t *dev);
+extern int DRM(select_queue)(drm_device_t *dev,
+ void (*wrapper)(unsigned long));
+extern int DRM(dma_enqueue)(drm_device_t *dev, drm_dma_t *dma);
+extern int DRM(dma_get_buffers)(drm_device_t *dev, drm_dma_t *dma);
+#endif
+#if __HAVE_DMA_IRQ
+extern int DRM(control)( struct inode *inode, struct file *filp,
+ unsigned int cmd, unsigned long arg );
+extern int DRM(irq_install)( drm_device_t *dev, int irq );
+extern int DRM(irq_uninstall)( drm_device_t *dev );
+extern void DRM(dma_service)( int irq, void *device,
+ struct pt_regs *regs );
+#if __HAVE_DMA_IRQ_BH
+extern void DRM(dma_immediate_bh)( void *dev );
+#endif
+#endif
+#if DRM_DMA_HISTOGRAM
+extern int DRM(histogram_slot)(unsigned long count);
+extern void DRM(histogram_compute)(drm_device_t *dev, drm_buf_t *buf);
+#endif
-#if defined(CONFIG_AGP) || defined(CONFIG_AGP_MODULE)
- /* AGP/GART support (agpsupport.c) */
-extern drm_agp_head_t *drm_agp_init(void);
-extern void drm_agp_uninit(void);
-extern int drm_agp_acquire(struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg);
-extern void _drm_agp_release(void);
-extern int drm_agp_release(struct inode *inode, struct file *filp,
+ /* Buffer list support (drm_lists.h) */
+#if __HAVE_DMA_WAITLIST
+extern int DRM(waitlist_create)(drm_waitlist_t *bl, int count);
+extern int DRM(waitlist_destroy)(drm_waitlist_t *bl);
+extern int DRM(waitlist_put)(drm_waitlist_t *bl, drm_buf_t *buf);
+extern drm_buf_t *DRM(waitlist_get)(drm_waitlist_t *bl);
+#endif
+#if __HAVE_DMA_FREELIST
+extern int DRM(freelist_create)(drm_freelist_t *bl, int count);
+extern int DRM(freelist_destroy)(drm_freelist_t *bl);
+extern int DRM(freelist_put)(drm_device_t *dev, drm_freelist_t *bl,
+ drm_buf_t *buf);
+extern drm_buf_t *DRM(freelist_get)(drm_freelist_t *bl, int block);
+#endif
+#endif /* __HAVE_DMA */
+
+#if __REALLY_HAVE_AGP
+ /* AGP/GART support (drm_agpsupport.h) */
+extern drm_agp_head_t *DRM(agp_init)(void);
+extern void DRM(agp_uninit)(void);
+extern int DRM(agp_acquire)(struct inode *inode, struct file *filp,
+ unsigned int cmd, unsigned long arg);
+extern void DRM(agp_do_release)(void);
+extern int DRM(agp_release)(struct inode *inode, struct file *filp,
+ unsigned int cmd, unsigned long arg);
+extern int DRM(agp_enable)(struct inode *inode, struct file *filp,
unsigned int cmd, unsigned long arg);
-extern int drm_agp_enable(struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg);
-extern int drm_agp_info(struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg);
-extern int drm_agp_alloc(struct inode *inode, struct file *filp,
+extern int DRM(agp_info)(struct inode *inode, struct file *filp,
unsigned int cmd, unsigned long arg);
-extern int drm_agp_free(struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg);
-extern int drm_agp_unbind(struct inode *inode, struct file *filp,
+extern int DRM(agp_alloc)(struct inode *inode, struct file *filp,
unsigned int cmd, unsigned long arg);
-extern int drm_agp_bind(struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg);
-extern agp_memory *drm_agp_allocate_memory(size_t pages, u32 type);
-extern int drm_agp_free_memory(agp_memory *handle);
-extern int drm_agp_bind_memory(agp_memory *handle, off_t start);
-extern int drm_agp_unbind_memory(agp_memory *handle);
-#endif
+extern int DRM(agp_free)(struct inode *inode, struct file *filp,
+ unsigned int cmd, unsigned long arg);
+extern int DRM(agp_unbind)(struct inode *inode, struct file *filp,
+ unsigned int cmd, unsigned long arg);
+extern int DRM(agp_bind)(struct inode *inode, struct file *filp,
+ unsigned int cmd, unsigned long arg);
+extern agp_memory *DRM(agp_allocate_memory)(size_t pages, u32 type);
+extern int DRM(agp_free_memory)(agp_memory *handle);
+extern int DRM(agp_bind_memory)(agp_memory *handle, off_t start);
+extern int DRM(agp_unbind_memory)(agp_memory *handle);
#endif
+
+ /* Stub support (drm_stub.h) */
+int DRM(stub_register)(const char *name,
+ struct file_operations *fops,
+ drm_device_t *dev);
+int DRM(stub_unregister)(int minor);
+
+ /* Proc support (drm_proc.h) */
+extern struct proc_dir_entry *DRM(proc_init)(drm_device_t *dev,
+ int minor,
+ struct proc_dir_entry *root,
+ struct proc_dir_entry **dev_root);
+extern int DRM(proc_cleanup)(int minor,
+ struct proc_dir_entry *root,
+ struct proc_dir_entry *dev_root);
+
+#endif /* __KERNEL__ */
#endif
diff --git a/linux-core/drm_auth.c b/linux-core/drm_auth.c
new file mode 100644
index 00000000..2636e617
--- /dev/null
+++ b/linux-core/drm_auth.c
@@ -0,0 +1,162 @@
+/* drm_auth.h -- IOCTLs for authentication -*- linux-c -*-
+ * Created: Tue Feb 2 08:37:54 1999 by faith@valinux.com
+ *
+ * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
+ * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Authors:
+ * Rickard E. (Rik) Faith <faith@valinux.com>
+ * Gareth Hughes <gareth@valinux.com>
+ */
+
+#define __NO_VERSION__
+#include "drmP.h"
+
+static int DRM(hash_magic)(drm_magic_t magic)
+{
+ return magic & (DRM_HASH_SIZE-1);
+}
+
+static drm_file_t *DRM(find_file)(drm_device_t *dev, drm_magic_t magic)
+{
+ drm_file_t *retval = NULL;
+ drm_magic_entry_t *pt;
+ int hash = DRM(hash_magic)(magic);
+
+ down(&dev->struct_sem);
+ for (pt = dev->magiclist[hash].head; pt; pt = pt->next) {
+ if (pt->magic == magic) {
+ retval = pt->priv;
+ break;
+ }
+ }
+ up(&dev->struct_sem);
+ return retval;
+}
+
+int DRM(add_magic)(drm_device_t *dev, drm_file_t *priv, drm_magic_t magic)
+{
+ int hash;
+ drm_magic_entry_t *entry;
+
+ DRM_DEBUG("%d\n", magic);
+
+ hash = DRM(hash_magic)(magic);
+ entry = DRM(alloc)(sizeof(*entry), DRM_MEM_MAGIC);
+ if (!entry) return -ENOMEM;
+ entry->magic = magic;
+ entry->priv = priv;
+ entry->next = NULL;
+
+ down(&dev->struct_sem);
+ if (dev->magiclist[hash].tail) {
+ dev->magiclist[hash].tail->next = entry;
+ dev->magiclist[hash].tail = entry;
+ } else {
+ dev->magiclist[hash].head = entry;
+ dev->magiclist[hash].tail = entry;
+ }
+ up(&dev->struct_sem);
+
+ return 0;
+}
+
+int DRM(remove_magic)(drm_device_t *dev, drm_magic_t magic)
+{
+ drm_magic_entry_t *prev = NULL;
+ drm_magic_entry_t *pt;
+ int hash;
+
+ DRM_DEBUG("%d\n", magic);
+ hash = DRM(hash_magic)(magic);
+
+ down(&dev->struct_sem);
+ for (pt = dev->magiclist[hash].head; pt; prev = pt, pt = pt->next) {
+ if (pt->magic == magic) {
+ if (dev->magiclist[hash].head == pt) {
+ dev->magiclist[hash].head = pt->next;
+ }
+ if (dev->magiclist[hash].tail == pt) {
+ dev->magiclist[hash].tail = prev;
+ }
+ if (prev) {
+ prev->next = pt->next;
+ }
+ up(&dev->struct_sem);
+ return 0;
+ }
+ }
+ up(&dev->struct_sem);
+
+ DRM(free)(pt, sizeof(*pt), DRM_MEM_MAGIC);
+
+ return -EINVAL;
+}
+
+int DRM(getmagic)(struct inode *inode, struct file *filp,
+ unsigned int cmd, unsigned long arg)
+{
+ static drm_magic_t sequence = 0;
+ static spinlock_t lock = SPIN_LOCK_UNLOCKED;
+ drm_file_t *priv = filp->private_data;
+ drm_device_t *dev = priv->dev;
+ drm_auth_t auth;
+
+ /* Find unique magic */
+ if (priv->magic) {
+ auth.magic = priv->magic;
+ } else {
+ do {
+ spin_lock(&lock);
+ if (!sequence) ++sequence; /* reserve 0 */
+ auth.magic = sequence++;
+ spin_unlock(&lock);
+ } while (DRM(find_file)(dev, auth.magic));
+ priv->magic = auth.magic;
+ DRM(add_magic)(dev, priv, auth.magic);
+ }
+
+ DRM_DEBUG("%u\n", auth.magic);
+ if (copy_to_user((drm_auth_t *)arg, &auth, sizeof(auth)))
+ return -EFAULT;
+ return 0;
+}
+
+int DRM(authmagic)(struct inode *inode, struct file *filp,
+ unsigned int cmd, unsigned long arg)
+{
+ drm_file_t *priv = filp->private_data;
+ drm_device_t *dev = priv->dev;
+ drm_auth_t auth;
+ drm_file_t *file;
+
+ if (copy_from_user(&auth, (drm_auth_t *)arg, sizeof(auth)))
+ return -EFAULT;
+ DRM_DEBUG("%u\n", auth.magic);
+ if ((file = DRM(find_file)(dev, auth.magic))) {
+ file->authenticated = 1;
+ DRM(remove_magic)(dev, auth.magic);
+ return 0;
+ }
+ return -EINVAL;
+}
diff --git a/linux-core/drm_context.c b/linux-core/drm_context.c
new file mode 100644
index 00000000..4ac896ef
--- /dev/null
+++ b/linux-core/drm_context.c
@@ -0,0 +1,760 @@
+/* drm_context.h -- IOCTLs for generic contexts -*- linux-c -*-
+ * Created: Fri Nov 24 18:31:37 2000 by gareth@valinux.com
+ *
+ * Copyright 1999, 2000 Precision Insight, Inc., Cedar Park, Texas.
+ * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Authors:
+ * Rickard E. (Rik) Faith <faith@valinux.com>
+ * Gareth Hughes <gareth@valinux.com>
+ */
+
+#define __NO_VERSION__
+#include "drmP.h"
+
+#if __HAVE_CTX_BITMAP
+
+/* ================================================================
+ * Context bitmap support
+ */
+
+void DRM(ctxbitmap_free)( drm_device_t *dev, int ctx_handle )
+{
+ if ( ctx_handle < 0 ) goto failed;
+ if ( !dev->ctx_bitmap ) goto failed;
+
+ if ( ctx_handle < DRM_MAX_CTXBITMAP ) {
+ down(&dev->struct_sem);
+ clear_bit( ctx_handle, dev->ctx_bitmap );
+ dev->context_sareas[ctx_handle] = NULL;
+ up(&dev->struct_sem);
+ return;
+ }
+failed:
+ DRM_ERROR( "Attempt to free invalid context handle: %d\n",
+ ctx_handle );
+ return;
+}
+
+int DRM(ctxbitmap_next)( drm_device_t *dev )
+{
+ int bit;
+
+ if(!dev->ctx_bitmap) return -1;
+
+ down(&dev->struct_sem);
+ bit = find_first_zero_bit( dev->ctx_bitmap, DRM_MAX_CTXBITMAP );
+ if ( bit < DRM_MAX_CTXBITMAP ) {
+ set_bit( bit, dev->ctx_bitmap );
+ DRM_DEBUG( "drm_ctxbitmap_next bit : %d\n", bit );
+ if((bit+1) > dev->max_context) {
+ dev->max_context = (bit+1);
+ if(dev->context_sareas) {
+ dev->context_sareas = DRM(realloc)(
+ dev->context_sareas,
+ (dev->max_context - 1) *
+ sizeof(*dev->context_sareas),
+ dev->max_context *
+ sizeof(*dev->context_sareas),
+ DRM_MEM_MAPS);
+ dev->context_sareas[bit] = NULL;
+ } else {
+ /* max_context == 1 at this point */
+ dev->context_sareas = DRM(alloc)(
+ dev->max_context *
+ sizeof(*dev->context_sareas),
+ DRM_MEM_MAPS);
+ dev->context_sareas[bit] = NULL;
+ }
+ }
+ up(&dev->struct_sem);
+ return bit;
+ }
+ up(&dev->struct_sem);
+ return -1;
+}
+
+int DRM(ctxbitmap_init)( drm_device_t *dev )
+{
+ int i;
+ int temp;
+
+ down(&dev->struct_sem);
+ dev->ctx_bitmap = (unsigned long *) DRM(alloc)( PAGE_SIZE,
+ DRM_MEM_CTXBITMAP );
+ if ( dev->ctx_bitmap == NULL ) {
+ up(&dev->struct_sem);
+ return -ENOMEM;
+ }
+ memset( (void *)dev->ctx_bitmap, 0, PAGE_SIZE );
+ dev->context_sareas = NULL;
+ dev->max_context = -1;
+ up(&dev->struct_sem);
+
+ for ( i = 0 ; i < DRM_RESERVED_CONTEXTS ; i++ ) {
+ temp = DRM(ctxbitmap_next)( dev );
+ DRM_DEBUG( "drm_ctxbitmap_init : %d\n", temp );
+ }
+
+ return 0;
+}
+
+void DRM(ctxbitmap_cleanup)( drm_device_t *dev )
+{
+ down(&dev->struct_sem);
+ if( dev->context_sareas ) DRM(free)( dev->context_sareas,
+ sizeof(*dev->context_sareas) *
+ dev->max_context,
+ DRM_MEM_MAPS );
+ DRM(free)( (void *)dev->ctx_bitmap, PAGE_SIZE, DRM_MEM_CTXBITMAP );
+ up(&dev->struct_sem);
+}
+
+/* ================================================================
+ * Per Context SAREA Support
+ */
+
+int DRM(getsareactx)(struct inode *inode, struct file *filp,
+ unsigned int cmd, unsigned long arg)
+{
+ drm_file_t *priv = filp->private_data;
+ drm_device_t *dev = priv->dev;
+ drm_ctx_priv_map_t request;
+ drm_map_t *map;
+
+ if (copy_from_user(&request,
+ (drm_ctx_priv_map_t *)arg,
+ sizeof(request)))
+ return -EFAULT;
+
+ down(&dev->struct_sem);
+ if ((int)request.ctx_id >= dev->max_context) {
+ up(&dev->struct_sem);
+ return -EINVAL;
+ }
+
+ map = dev->context_sareas[request.ctx_id];
+ up(&dev->struct_sem);
+
+ request.handle = map->handle;
+ if (copy_to_user((drm_ctx_priv_map_t *)arg, &request, sizeof(request)))
+ return -EFAULT;
+ return 0;
+}
+
+int DRM(setsareactx)(struct inode *inode, struct file *filp,
+ unsigned int cmd, unsigned long arg)
+{
+ drm_file_t *priv = filp->private_data;
+ drm_device_t *dev = priv->dev;
+ drm_ctx_priv_map_t request;
+ drm_map_t *map = NULL;
+ drm_map_list_t *r_list;
+ struct list_head *list;
+
+ if (copy_from_user(&request,
+ (drm_ctx_priv_map_t *)arg,
+ sizeof(request)))
+ return -EFAULT;
+
+ down(&dev->struct_sem);
+ list_for_each(list, &dev->maplist->head) {
+ r_list = (drm_map_list_t *)list;
+ if(r_list->map &&
+ r_list->map->handle == request.handle) break;
+ }
+ if (list == &(dev->maplist->head)) {
+ up(&dev->struct_sem);
+ return -EINVAL;
+ }
+ map = r_list->map;
+ up(&dev->struct_sem);
+
+ if (!map) return -EINVAL;
+
+ down(&dev->struct_sem);
+ if ((int)request.ctx_id >= dev->max_context) {
+ up(&dev->struct_sem);
+ return -EINVAL;
+ }
+ dev->context_sareas[request.ctx_id] = map;
+ up(&dev->struct_sem);
+ return 0;
+}
+
+/* ================================================================
+ * The actual DRM context handling routines
+ */
+
+int DRM(context_switch)( drm_device_t *dev, int old, int new )
+{
+ char buf[64];
+
+ if ( test_and_set_bit( 0, &dev->context_flag ) ) {
+ DRM_ERROR( "Reentering -- FIXME\n" );
+ return -EBUSY;
+ }
+
+#if __HAVE_DMA_HISTOGRAM
+ dev->ctx_start = get_cycles();
+#endif
+
+ DRM_DEBUG( "Context switch from %d to %d\n", old, new );
+
+ if ( new == dev->last_context ) {
+ clear_bit( 0, &dev->context_flag );
+ return 0;
+ }
+
+ if ( DRM(flags) & DRM_FLAG_NOCTX ) {
+ DRM(context_switch_complete)( dev, new );
+ } else {
+ sprintf( buf, "C %d %d\n", old, new );
+ DRM(write_string)( dev, buf );
+ }
+
+ return 0;
+}
+
+int DRM(context_switch_complete)( drm_device_t *dev, int new )
+{
+ dev->last_context = new; /* PRE/POST: This is the _only_ writer. */
+ dev->last_switch = jiffies;
+
+ if ( !_DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock) ) {
+ DRM_ERROR( "Lock isn't held after context switch\n" );
+ }
+
+ /* If a context switch is ever initiated
+ when the kernel holds the lock, release
+ that lock here. */
+#if __HAVE_DMA_HISTOGRAM
+ atomic_inc( &dev->histo.ctx[DRM(histogram_slot)(get_cycles()
+ - dev->ctx_start)] );
+
+#endif
+ clear_bit( 0, &dev->context_flag );
+ wake_up( &dev->context_wait );
+
+ return 0;
+}
+
+int DRM(resctx)( struct inode *inode, struct file *filp,
+ unsigned int cmd, unsigned long arg )
+{
+ drm_ctx_res_t res;
+ drm_ctx_t ctx;
+ int i;
+
+ if ( copy_from_user( &res, (drm_ctx_res_t *)arg, sizeof(res) ) )
+ return -EFAULT;
+
+ if ( res.count >= DRM_RESERVED_CONTEXTS ) {
+ memset( &ctx, 0, sizeof(ctx) );
+ for ( i = 0 ; i < DRM_RESERVED_CONTEXTS ; i++ ) {
+ ctx.handle = i;
+ if ( copy_to_user( &res.contexts[i],
+ &i, sizeof(i) ) )
+ return -EFAULT;
+ }
+ }
+ res.count = DRM_RESERVED_CONTEXTS;
+
+ if ( copy_to_user( (drm_ctx_res_t *)arg, &res, sizeof(res) ) )
+ return -EFAULT;
+ return 0;
+}
+
+int DRM(addctx)( struct inode *inode, struct file *filp,
+ unsigned int cmd, unsigned long arg )
+{
+ drm_file_t *priv = filp->private_data;
+ drm_device_t *dev = priv->dev;
+ drm_ctx_t ctx;
+
+ if ( copy_from_user( &ctx, (drm_ctx_t *)arg, sizeof(ctx) ) )
+ return -EFAULT;
+
+ ctx.handle = DRM(ctxbitmap_next)( dev );
+ if ( ctx.handle == DRM_KERNEL_CONTEXT ) {
+ /* Skip kernel's context and get a new one. */
+ ctx.handle = DRM(ctxbitmap_next)( dev );
+ }
+ DRM_DEBUG( "%d\n", ctx.handle );
+ if ( ctx.handle == -1 ) {
+ DRM_DEBUG( "Not enough free contexts.\n" );
+ /* Should this return -EBUSY instead? */
+ return -ENOMEM;
+ }
+
+ if ( copy_to_user( (drm_ctx_t *)arg, &ctx, sizeof(ctx) ) )
+ return -EFAULT;
+ return 0;
+}
+
+int DRM(modctx)( struct inode *inode, struct file *filp,
+ unsigned int cmd, unsigned long arg )
+{
+ /* This does nothing */
+ return 0;
+}
+
+int DRM(getctx)( struct inode *inode, struct file *filp,
+ unsigned int cmd, unsigned long arg )
+{
+ drm_ctx_t ctx;
+
+ if ( copy_from_user( &ctx, (drm_ctx_t*)arg, sizeof(ctx) ) )
+ return -EFAULT;
+
+ /* This is 0, because we don't handle any context flags */
+ ctx.flags = 0;
+
+ if ( copy_to_user( (drm_ctx_t*)arg, &ctx, sizeof(ctx) ) )
+ return -EFAULT;
+ return 0;
+}
+
+int DRM(switchctx)( struct inode *inode, struct file *filp,
+ unsigned int cmd, unsigned long arg )
+{
+ drm_file_t *priv = filp->private_data;
+ drm_device_t *dev = priv->dev;
+ drm_ctx_t ctx;
+
+ if ( copy_from_user( &ctx, (drm_ctx_t *)arg, sizeof(ctx) ) )
+ return -EFAULT;
+
+ DRM_DEBUG( "%d\n", ctx.handle );
+ return DRM(context_switch)( dev, dev->last_context, ctx.handle );
+}
+
+int DRM(newctx)( struct inode *inode, struct file *filp,
+ unsigned int cmd, unsigned long arg )
+{
+ drm_file_t *priv = filp->private_data;
+ drm_device_t *dev = priv->dev;
+ drm_ctx_t ctx;
+
+ if ( copy_from_user( &ctx, (drm_ctx_t *)arg, sizeof(ctx) ) )
+ return -EFAULT;
+
+ DRM_DEBUG( "%d\n", ctx.handle );
+ DRM(context_switch_complete)( dev, ctx.handle );
+
+ return 0;
+}
+
+int DRM(rmctx)( struct inode *inode, struct file *filp,
+ unsigned int cmd, unsigned long arg )
+{
+ drm_file_t *priv = filp->private_data;
+ drm_device_t *dev = priv->dev;
+ drm_ctx_t ctx;
+
+ if ( copy_from_user( &ctx, (drm_ctx_t *)arg, sizeof(ctx) ) )
+ return -EFAULT;
+
+ DRM_DEBUG( "%d\n", ctx.handle );
+ if ( ctx.handle == DRM_KERNEL_CONTEXT + 1 ) {
+ priv->remove_auth_on_close = 1;
+ }
+ if ( ctx.handle != DRM_KERNEL_CONTEXT ) {
+ DRM(ctxbitmap_free)( dev, ctx.handle );
+ }
+
+ return 0;
+}
+
+
+#else /* __HAVE_CTX_BITMAP */
+
+/* ================================================================
+ * Old-style context support
+ */
+
+
+int DRM(context_switch)(drm_device_t *dev, int old, int new)
+{
+ char buf[64];
+ drm_queue_t *q;
+
+#if 0
+ atomic_inc(&dev->total_ctx);
+#endif
+
+ if (test_and_set_bit(0, &dev->context_flag)) {
+ DRM_ERROR("Reentering -- FIXME\n");
+ return -EBUSY;
+ }
+
+#if __HAVE_DMA_HISTOGRAM
+ dev->ctx_start = get_cycles();
+#endif
+
+ DRM_DEBUG("Context switch from %d to %d\n", old, new);
+
+ if (new >= dev->queue_count) {
+ clear_bit(0, &dev->context_flag);
+ return -EINVAL;
+ }
+
+ if (new == dev->last_context) {
+ clear_bit(0, &dev->context_flag);
+ return 0;
+ }
+
+ q = dev->queuelist[new];
+ atomic_inc(&q->use_count);
+ if (atomic_read(&q->use_count) == 1) {
+ atomic_dec(&q->use_count);
+ clear_bit(0, &dev->context_flag);
+ return -EINVAL;
+ }
+
+ if (DRM(flags) & DRM_FLAG_NOCTX) {
+ DRM(context_switch_complete)(dev, new);
+ } else {
+ sprintf(buf, "C %d %d\n", old, new);
+ DRM(write_string)(dev, buf);
+ }
+
+ atomic_dec(&q->use_count);
+
+ return 0;
+}
+
+int DRM(context_switch_complete)(drm_device_t *dev, int new)
+{
+ drm_device_dma_t *dma = dev->dma;
+
+ dev->last_context = new; /* PRE/POST: This is the _only_ writer. */
+ dev->last_switch = jiffies;
+
+ if (!_DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock)) {
+ DRM_ERROR("Lock isn't held after context switch\n");
+ }
+
+ if (!dma || !(dma->next_buffer && dma->next_buffer->while_locked)) {
+ if (DRM(lock_free)(dev, &dev->lock.hw_lock->lock,
+ DRM_KERNEL_CONTEXT)) {
+ DRM_ERROR("Cannot free lock\n");
+ }
+ }
+
+#if __HAVE_DMA_HISTOGRAM
+ atomic_inc(&dev->histo.ctx[DRM(histogram_slot)(get_cycles()
+ - dev->ctx_start)]);
+
+#endif
+ clear_bit(0, &dev->context_flag);
+ wake_up_interruptible(&dev->context_wait);
+
+ return 0;
+}
+
+static int DRM(init_queue)(drm_device_t *dev, drm_queue_t *q, drm_ctx_t *ctx)
+{
+ DRM_DEBUG("\n");
+
+ if (atomic_read(&q->use_count) != 1
+ || atomic_read(&q->finalization)
+ || atomic_read(&q->block_count)) {
+ DRM_ERROR("New queue is already in use: u%d f%d b%d\n",
+ atomic_read(&q->use_count),
+ atomic_read(&q->finalization),
+ atomic_read(&q->block_count));
+ }
+
+ atomic_set(&q->finalization, 0);
+ atomic_set(&q->block_count, 0);
+ atomic_set(&q->block_read, 0);
+ atomic_set(&q->block_write, 0);
+ atomic_set(&q->total_queued, 0);
+ atomic_set(&q->total_flushed, 0);
+ atomic_set(&q->total_locks, 0);
+
+ init_waitqueue_head(&q->write_queue);
+ init_waitqueue_head(&q->read_queue);
+ init_waitqueue_head(&q->flush_queue);
+
+ q->flags = ctx->flags;
+
+ DRM(waitlist_create)(&q->waitlist, dev->dma->buf_count);
+
+ return 0;
+}
+
+
+/* drm_alloc_queue:
+PRE: 1) dev->queuelist[0..dev->queue_count] is allocated and will not
+ disappear (so all deallocation must be done after IOCTLs are off)
+ 2) dev->queue_count < dev->queue_slots
+ 3) dev->queuelist[i].use_count == 0 and
+ dev->queuelist[i].finalization == 0 if i not in use
+POST: 1) dev->queuelist[i].use_count == 1
+ 2) dev->queue_count < dev->queue_slots */
+
+static int DRM(alloc_queue)(drm_device_t *dev)
+{
+ int i;
+ drm_queue_t *queue;
+ int oldslots;
+ int newslots;
+ /* Check for a free queue */
+ for (i = 0; i < dev->queue_count; i++) {
+ atomic_inc(&dev->queuelist[i]->use_count);
+ if (atomic_read(&dev->queuelist[i]->use_count) == 1
+ && !atomic_read(&dev->queuelist[i]->finalization)) {
+ DRM_DEBUG("%d (free)\n", i);
+ return i;
+ }
+ atomic_dec(&dev->queuelist[i]->use_count);
+ }
+ /* Allocate a new queue */
+ down(&dev->struct_sem);
+
+ queue = gamma_alloc(sizeof(*queue), DRM_MEM_QUEUES);
+ memset(queue, 0, sizeof(*queue));
+ atomic_set(&queue->use_count, 1);
+
+ ++dev->queue_count;
+ if (dev->queue_count >= dev->queue_slots) {
+ oldslots = dev->queue_slots * sizeof(*dev->queuelist);
+ if (!dev->queue_slots) dev->queue_slots = 1;
+ dev->queue_slots *= 2;
+ newslots = dev->queue_slots * sizeof(*dev->queuelist);
+
+ dev->queuelist = DRM(realloc)(dev->queuelist,
+ oldslots,
+ newslots,
+ DRM_MEM_QUEUES);
+ if (!dev->queuelist) {
+ up(&dev->struct_sem);
+ DRM_DEBUG("out of memory\n");
+ return -ENOMEM;
+ }
+ }
+ dev->queuelist[dev->queue_count-1] = queue;
+
+ up(&dev->struct_sem);
+ DRM_DEBUG("%d (new)\n", dev->queue_count - 1);
+ return dev->queue_count - 1;
+}
+
+int DRM(resctx)(struct inode *inode, struct file *filp,
+ unsigned int cmd, unsigned long arg)
+{
+ drm_ctx_res_t res;
+ drm_ctx_t ctx;
+ int i;
+
+ DRM_DEBUG("%d\n", DRM_RESERVED_CONTEXTS);
+ if (copy_from_user(&res, (drm_ctx_res_t *)arg, sizeof(res)))
+ return -EFAULT;
+ if (res.count >= DRM_RESERVED_CONTEXTS) {
+ memset(&ctx, 0, sizeof(ctx));
+ for (i = 0; i < DRM_RESERVED_CONTEXTS; i++) {
+ ctx.handle = i;
+ if (copy_to_user(&res.contexts[i],
+ &i,
+ sizeof(i)))
+ return -EFAULT;
+ }
+ }
+ res.count = DRM_RESERVED_CONTEXTS;
+ if (copy_to_user((drm_ctx_res_t *)arg, &res, sizeof(res)))
+ return -EFAULT;
+ return 0;
+}
+
+int DRM(addctx)(struct inode *inode, struct file *filp,
+ unsigned int cmd, unsigned long arg)
+{
+ drm_file_t *priv = filp->private_data;
+ drm_device_t *dev = priv->dev;
+ drm_ctx_t ctx;
+
+ if (copy_from_user(&ctx, (drm_ctx_t *)arg, sizeof(ctx)))
+ return -EFAULT;
+ if ((ctx.handle = DRM(alloc_queue)(dev)) == DRM_KERNEL_CONTEXT) {
+ /* Init kernel's context and get a new one. */
+ DRM(init_queue)(dev, dev->queuelist[ctx.handle], &ctx);
+ ctx.handle = DRM(alloc_queue)(dev);
+ }
+ DRM(init_queue)(dev, dev->queuelist[ctx.handle], &ctx);
+ DRM_DEBUG("%d\n", ctx.handle);
+ if (copy_to_user((drm_ctx_t *)arg, &ctx, sizeof(ctx)))
+ return -EFAULT;
+ return 0;
+}
+
+int DRM(modctx)(struct inode *inode, struct file *filp,
+ unsigned int cmd, unsigned long arg)
+{
+ drm_file_t *priv = filp->private_data;
+ drm_device_t *dev = priv->dev;
+ drm_ctx_t ctx;
+ drm_queue_t *q;
+
+ if (copy_from_user(&ctx, (drm_ctx_t *)arg, sizeof(ctx)))
+ return -EFAULT;
+
+ DRM_DEBUG("%d\n", ctx.handle);
+
+ if (ctx.handle < 0 || ctx.handle >= dev->queue_count) return -EINVAL;
+ q = dev->queuelist[ctx.handle];
+
+ atomic_inc(&q->use_count);
+ if (atomic_read(&q->use_count) == 1) {
+ /* No longer in use */
+ atomic_dec(&q->use_count);
+ return -EINVAL;
+ }
+
+ if (DRM_BUFCOUNT(&q->waitlist)) {
+ atomic_dec(&q->use_count);
+ return -EBUSY;
+ }
+
+ q->flags = ctx.flags;
+
+ atomic_dec(&q->use_count);
+ return 0;
+}
+
+int DRM(getctx)(struct inode *inode, struct file *filp,
+ unsigned int cmd, unsigned long arg)
+{
+ drm_file_t *priv = filp->private_data;
+ drm_device_t *dev = priv->dev;
+ drm_ctx_t ctx;
+ drm_queue_t *q;
+
+ if (copy_from_user(&ctx, (drm_ctx_t *)arg, sizeof(ctx)))
+ return -EFAULT;
+
+ DRM_DEBUG("%d\n", ctx.handle);
+
+ if (ctx.handle >= dev->queue_count) return -EINVAL;
+ q = dev->queuelist[ctx.handle];
+
+ atomic_inc(&q->use_count);
+ if (atomic_read(&q->use_count) == 1) {
+ /* No longer in use */
+ atomic_dec(&q->use_count);
+ return -EINVAL;
+ }
+
+ ctx.flags = q->flags;
+ atomic_dec(&q->use_count);
+
+ if (copy_to_user((drm_ctx_t *)arg, &ctx, sizeof(ctx)))
+ return -EFAULT;
+
+ return 0;
+}
+
+int DRM(switchctx)(struct inode *inode, struct file *filp,
+ unsigned int cmd, unsigned long arg)
+{
+ drm_file_t *priv = filp->private_data;
+ drm_device_t *dev = priv->dev;
+ drm_ctx_t ctx;
+
+ if (copy_from_user(&ctx, (drm_ctx_t *)arg, sizeof(ctx)))
+ return -EFAULT;
+ DRM_DEBUG("%d\n", ctx.handle);
+ return DRM(context_switch)(dev, dev->last_context, ctx.handle);
+}
+
+int DRM(newctx)(struct inode *inode, struct file *filp,
+ unsigned int cmd, unsigned long arg)
+{
+ drm_file_t *priv = filp->private_data;
+ drm_device_t *dev = priv->dev;
+ drm_ctx_t ctx;
+
+ if (copy_from_user(&ctx, (drm_ctx_t *)arg, sizeof(ctx)))
+ return -EFAULT;
+ DRM_DEBUG("%d\n", ctx.handle);
+ DRM(context_switch_complete)(dev, ctx.handle);
+
+ return 0;
+}
+
+int DRM(rmctx)(struct inode *inode, struct file *filp,
+ unsigned int cmd, unsigned long arg)
+{
+ drm_file_t *priv = filp->private_data;
+ drm_device_t *dev = priv->dev;
+ drm_ctx_t ctx;
+ drm_queue_t *q;
+ drm_buf_t *buf;
+
+ if (copy_from_user(&ctx, (drm_ctx_t *)arg, sizeof(ctx)))
+ return -EFAULT;
+ DRM_DEBUG("%d\n", ctx.handle);
+
+ if (ctx.handle >= dev->queue_count) return -EINVAL;
+ q = dev->queuelist[ctx.handle];
+
+ atomic_inc(&q->use_count);
+ if (atomic_read(&q->use_count) == 1) {
+ /* No longer in use */
+ atomic_dec(&q->use_count);
+ return -EINVAL;
+ }
+
+ atomic_inc(&q->finalization); /* Mark queue in finalization state */
+ atomic_sub(2, &q->use_count); /* Mark queue as unused (pending
+ finalization) */
+
+ while (test_and_set_bit(0, &dev->interrupt_flag)) {
+ schedule();
+ if (signal_pending(current)) {
+ clear_bit(0, &dev->interrupt_flag);
+ return -EINTR;
+ }
+ }
+ /* Remove queued buffers */
+ while ((buf = DRM(waitlist_get)(&q->waitlist))) {
+ DRM(free_buffer)(dev, buf);
+ }
+ clear_bit(0, &dev->interrupt_flag);
+
+ /* Wakeup blocked processes */
+ wake_up_interruptible(&q->read_queue);
+ wake_up_interruptible(&q->write_queue);
+ wake_up_interruptible(&q->flush_queue);
+
+ /* Finalization over. Queue is made
+ available when both use_count and
+ finalization become 0, which won't
+ happen until all the waiting processes
+ stop waiting. */
+ atomic_dec(&q->finalization);
+ return 0;
+}
+
+#endif /* __HAVE_CTX_BITMAP */
diff --git a/linux-core/drm_dma.c b/linux-core/drm_dma.c
new file mode 100644
index 00000000..e715bd41
--- /dev/null
+++ b/linux-core/drm_dma.c
@@ -0,0 +1,594 @@
+/* drm_dma.c -- DMA IOCTL and function support -*- linux-c -*-
+ * Created: Fri Mar 19 14:30:16 1999 by faith@valinux.com
+ *
+ * Copyright 1999, 2000 Precision Insight, Inc., Cedar Park, Texas.
+ * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Authors:
+ * Rickard E. (Rik) Faith <faith@valinux.com>
+ * Gareth Hughes <gareth@valinux.com>
+ */
+
+#define __NO_VERSION__
+#include "drmP.h"
+
+#include <linux/interrupt.h> /* For task queue support */
+
+#ifndef __HAVE_DMA_WAITQUEUE
+#define __HAVE_DMA_WAITQUEUE 0
+#endif
+#ifndef __HAVE_DMA_RECLAIM
+#define __HAVE_DMA_RECLAIM 0
+#endif
+
+#if __HAVE_DMA
+
+int DRM(dma_setup)( drm_device_t *dev )
+{
+ int i;
+
+ dev->dma = DRM(alloc)( sizeof(*dev->dma), DRM_MEM_DRIVER );
+ if ( !dev->dma )
+ return -ENOMEM;
+
+ memset( dev->dma, 0, sizeof(*dev->dma) );
+
+ for ( i = 0 ; i <= DRM_MAX_ORDER ; i++ )
+ memset(&dev->dma->bufs[i], 0, sizeof(dev->dma->bufs[0]));
+
+ return 0;
+}
+
+void DRM(dma_takedown)(drm_device_t *dev)
+{
+ drm_device_dma_t *dma = dev->dma;
+ int i, j;
+
+ if (!dma) return;
+
+ /* Clear dma buffers */
+ for (i = 0; i <= DRM_MAX_ORDER; i++) {
+ if (dma->bufs[i].seg_count) {
+ DRM_DEBUG("order %d: buf_count = %d,"
+ " seg_count = %d\n",
+ i,
+ dma->bufs[i].buf_count,
+ dma->bufs[i].seg_count);
+ for (j = 0; j < dma->bufs[i].seg_count; j++) {
+ DRM(free_pages)(dma->bufs[i].seglist[j],
+ dma->bufs[i].page_order,
+ DRM_MEM_DMA);
+ }
+ DRM(free)(dma->bufs[i].seglist,
+ dma->bufs[i].seg_count
+ * sizeof(*dma->bufs[0].seglist),
+ DRM_MEM_SEGS);
+ }
+ if(dma->bufs[i].buf_count) {
+ for(j = 0; j < dma->bufs[i].buf_count; j++) {
+ if(dma->bufs[i].buflist[j].dev_private) {
+ DRM(free)(dma->bufs[i].buflist[j].dev_private,
+ dma->bufs[i].buflist[j].dev_priv_size,
+ DRM_MEM_BUFS);
+ }
+ }
+ DRM(free)(dma->bufs[i].buflist,
+ dma->bufs[i].buf_count *
+ sizeof(*dma->bufs[0].buflist),
+ DRM_MEM_BUFS);
+#if __HAVE_DMA_FREELIST
+ DRM(freelist_destroy)(&dma->bufs[i].freelist);
+#endif
+ }
+ }
+
+ if (dma->buflist) {
+ DRM(free)(dma->buflist,
+ dma->buf_count * sizeof(*dma->buflist),
+ DRM_MEM_BUFS);
+ }
+
+ if (dma->pagelist) {
+ DRM(free)(dma->pagelist,
+ dma->page_count * sizeof(*dma->pagelist),
+ DRM_MEM_PAGES);
+ }
+ DRM(free)(dev->dma, sizeof(*dev->dma), DRM_MEM_DRIVER);
+ dev->dma = NULL;
+}
+
+
+#if __HAVE_DMA_HISTOGRAM
+/* This is slow, but is useful for debugging. */
+int DRM(histogram_slot)(unsigned long count)
+{
+ int value = DRM_DMA_HISTOGRAM_INITIAL;
+ int slot;
+
+ for (slot = 0;
+ slot < DRM_DMA_HISTOGRAM_SLOTS;
+ ++slot, value = DRM_DMA_HISTOGRAM_NEXT(value)) {
+ if (count < value) return slot;
+ }
+ return DRM_DMA_HISTOGRAM_SLOTS - 1;
+}
+
+void DRM(histogram_compute)(drm_device_t *dev, drm_buf_t *buf)
+{
+ cycles_t queued_to_dispatched;
+ cycles_t dispatched_to_completed;
+ cycles_t completed_to_freed;
+ int q2d, d2c, c2f, q2c, q2f;
+
+ if (buf->time_queued) {
+ queued_to_dispatched = (buf->time_dispatched
+ - buf->time_queued);
+ dispatched_to_completed = (buf->time_completed
+ - buf->time_dispatched);
+ completed_to_freed = (buf->time_freed
+ - buf->time_completed);
+
+ q2d = DRM(histogram_slot)(queued_to_dispatched);
+ d2c = DRM(histogram_slot)(dispatched_to_completed);
+ c2f = DRM(histogram_slot)(completed_to_freed);
+
+ q2c = DRM(histogram_slot)(queued_to_dispatched
+ + dispatched_to_completed);
+ q2f = DRM(histogram_slot)(queued_to_dispatched
+ + dispatched_to_completed
+ + completed_to_freed);
+
+ atomic_inc(&dev->histo.total);
+ atomic_inc(&dev->histo.queued_to_dispatched[q2d]);
+ atomic_inc(&dev->histo.dispatched_to_completed[d2c]);
+ atomic_inc(&dev->histo.completed_to_freed[c2f]);
+
+ atomic_inc(&dev->histo.queued_to_completed[q2c]);
+ atomic_inc(&dev->histo.queued_to_freed[q2f]);
+
+ }
+ buf->time_queued = 0;
+ buf->time_dispatched = 0;
+ buf->time_completed = 0;
+ buf->time_freed = 0;
+}
+#endif
+
+void DRM(free_buffer)(drm_device_t *dev, drm_buf_t *buf)
+{
+ if (!buf) return;
+
+ buf->waiting = 0;
+ buf->pending = 0;
+ buf->pid = 0;
+ buf->used = 0;
+#if __HAVE_DMA_HISTOGRAM
+ buf->time_completed = get_cycles();
+#endif
+
+ if ( __HAVE_DMA_WAITQUEUE && waitqueue_active(&buf->dma_wait)) {
+ wake_up_interruptible(&buf->dma_wait);
+ }
+#if __HAVE_DMA_FREELIST
+ else {
+ drm_device_dma_t *dma = dev->dma;
+ /* If processes are waiting, the last one
+ to wake will put the buffer on the free
+ list. If no processes are waiting, we
+ put the buffer on the freelist here. */
+ DRM(freelist_put)(dev, &dma->bufs[buf->order].freelist, buf);
+ }
+#endif
+}
+
+#if !__HAVE_DMA_RECLAIM
+void DRM(reclaim_buffers)(drm_device_t *dev, pid_t pid)
+{
+ drm_device_dma_t *dma = dev->dma;
+ int i;
+
+ if (!dma) return;
+ for (i = 0; i < dma->buf_count; i++) {
+ if (dma->buflist[i]->pid == pid) {
+ switch (dma->buflist[i]->list) {
+ case DRM_LIST_NONE:
+ DRM(free_buffer)(dev, dma->buflist[i]);
+ break;
+ case DRM_LIST_WAIT:
+ dma->buflist[i]->list = DRM_LIST_RECLAIM;
+ break;
+ default:
+ /* Buffer already on hardware. */
+ break;
+ }
+ }
+ }
+}
+#endif
+
+
+/* GH: This is a big hack for now...
+ */
+#if __HAVE_OLD_DMA
+
+void DRM(clear_next_buffer)(drm_device_t *dev)
+{
+ drm_device_dma_t *dma = dev->dma;
+
+ dma->next_buffer = NULL;
+ if (dma->next_queue && !DRM_BUFCOUNT(&dma->next_queue->waitlist)) {
+ wake_up_interruptible(&dma->next_queue->flush_queue);
+ }
+ dma->next_queue = NULL;
+}
+
+int DRM(select_queue)(drm_device_t *dev, void (*wrapper)(unsigned long))
+{
+ int i;
+ int candidate = -1;
+ int j = jiffies;
+
+ if (!dev) {
+ DRM_ERROR("No device\n");
+ return -1;
+ }
+ if (!dev->queuelist || !dev->queuelist[DRM_KERNEL_CONTEXT]) {
+ /* This only happens between the time the
+ interrupt is initialized and the time
+ the queues are initialized. */
+ return -1;
+ }
+
+ /* Doing "while locked" DMA? */
+ if (DRM_WAITCOUNT(dev, DRM_KERNEL_CONTEXT)) {
+ return DRM_KERNEL_CONTEXT;
+ }
+
+ /* If there are buffers on the last_context
+ queue, and we have not been executing
+ this context very long, continue to
+ execute this context. */
+ if (dev->last_switch <= j
+ && dev->last_switch + DRM_TIME_SLICE > j
+ && DRM_WAITCOUNT(dev, dev->last_context)) {
+ return dev->last_context;
+ }
+
+ /* Otherwise, find a candidate */
+ for (i = dev->last_checked + 1; i < dev->queue_count; i++) {
+ if (DRM_WAITCOUNT(dev, i)) {
+ candidate = dev->last_checked = i;
+ break;
+ }
+ }
+
+ if (candidate < 0) {
+ for (i = 0; i < dev->queue_count; i++) {
+ if (DRM_WAITCOUNT(dev, i)) {
+ candidate = dev->last_checked = i;
+ break;
+ }
+ }
+ }
+
+ if (wrapper
+ && candidate >= 0
+ && candidate != dev->last_context
+ && dev->last_switch <= j
+ && dev->last_switch + DRM_TIME_SLICE > j) {
+ if (dev->timer.expires != dev->last_switch + DRM_TIME_SLICE) {
+ del_timer(&dev->timer);
+ dev->timer.function = wrapper;
+ dev->timer.data = (unsigned long)dev;
+ dev->timer.expires = dev->last_switch+DRM_TIME_SLICE;
+ add_timer(&dev->timer);
+ }
+ return -1;
+ }
+
+ return candidate;
+}
+
+
+int DRM(dma_enqueue)(drm_device_t *dev, drm_dma_t *d)
+{
+ int i;
+ drm_queue_t *q;
+ drm_buf_t *buf;
+ int idx;
+ int while_locked = 0;
+ drm_device_dma_t *dma = dev->dma;
+ DECLARE_WAITQUEUE(entry, current);
+
+ DRM_DEBUG("%d\n", d->send_count);
+
+ if (d->flags & _DRM_DMA_WHILE_LOCKED) {
+ int context = dev->lock.hw_lock->lock;
+
+ if (!_DRM_LOCK_IS_HELD(context)) {
+ DRM_ERROR("No lock held during \"while locked\""
+ " request\n");
+ return -EINVAL;
+ }
+ if (d->context != _DRM_LOCKING_CONTEXT(context)
+ && _DRM_LOCKING_CONTEXT(context) != DRM_KERNEL_CONTEXT) {
+ DRM_ERROR("Lock held by %d while %d makes"
+ " \"while locked\" request\n",
+ _DRM_LOCKING_CONTEXT(context),
+ d->context);
+ return -EINVAL;
+ }
+ q = dev->queuelist[DRM_KERNEL_CONTEXT];
+ while_locked = 1;
+ } else {
+ q = dev->queuelist[d->context];
+ }
+
+
+ atomic_inc(&q->use_count);
+ if (atomic_read(&q->block_write)) {
+ add_wait_queue(&q->write_queue, &entry);
+ atomic_inc(&q->block_count);
+ for (;;) {
+ current->state = TASK_INTERRUPTIBLE;
+ if (!atomic_read(&q->block_write)) break;
+ schedule();
+ if (signal_pending(current)) {
+ atomic_dec(&q->use_count);
+ remove_wait_queue(&q->write_queue, &entry);
+ return -EINTR;
+ }
+ }
+ atomic_dec(&q->block_count);
+ current->state = TASK_RUNNING;
+ remove_wait_queue(&q->write_queue, &entry);
+ }
+
+ for (i = 0; i < d->send_count; i++) {
+ idx = d->send_indices[i];
+ if (idx < 0 || idx >= dma->buf_count) {
+ atomic_dec(&q->use_count);
+ DRM_ERROR("Index %d (of %d max)\n",
+ d->send_indices[i], dma->buf_count - 1);
+ return -EINVAL;
+ }
+ buf = dma->buflist[ idx ];
+ if (buf->pid != current->pid) {
+ atomic_dec(&q->use_count);
+ DRM_ERROR("Process %d using buffer owned by %d\n",
+ current->pid, buf->pid);
+ return -EINVAL;
+ }
+ if (buf->list != DRM_LIST_NONE) {
+ atomic_dec(&q->use_count);
+ DRM_ERROR("Process %d using buffer %d on list %d\n",
+ current->pid, buf->idx, buf->list);
+ }
+ buf->used = d->send_sizes[i];
+ buf->while_locked = while_locked;
+ buf->context = d->context;
+ if (!buf->used) {
+ DRM_ERROR("Queueing 0 length buffer\n");
+ }
+ if (buf->pending) {
+ atomic_dec(&q->use_count);
+ DRM_ERROR("Queueing pending buffer:"
+ " buffer %d, offset %d\n",
+ d->send_indices[i], i);
+ return -EINVAL;
+ }
+ if (buf->waiting) {
+ atomic_dec(&q->use_count);
+ DRM_ERROR("Queueing waiting buffer:"
+ " buffer %d, offset %d\n",
+ d->send_indices[i], i);
+ return -EINVAL;
+ }
+ buf->waiting = 1;
+ if (atomic_read(&q->use_count) == 1
+ || atomic_read(&q->finalization)) {
+ DRM(free_buffer)(dev, buf);
+ } else {
+ DRM(waitlist_put)(&q->waitlist, buf);
+ atomic_inc(&q->total_queued);
+ }
+ }
+ atomic_dec(&q->use_count);
+
+ return 0;
+}
+
+static int DRM(dma_get_buffers_of_order)(drm_device_t *dev, drm_dma_t *d,
+ int order)
+{
+ int i;
+ drm_buf_t *buf;
+ drm_device_dma_t *dma = dev->dma;
+
+ for (i = d->granted_count; i < d->request_count; i++) {
+ buf = DRM(freelist_get)(&dma->bufs[order].freelist,
+ d->flags & _DRM_DMA_WAIT);
+ if (!buf) break;
+ if (buf->pending || buf->waiting) {
+ DRM_ERROR("Free buffer %d in use by %d (w%d, p%d)\n",
+ buf->idx,
+ buf->pid,
+ buf->waiting,
+ buf->pending);
+ }
+ buf->pid = current->pid;
+ if (copy_to_user(&d->request_indices[i],
+ &buf->idx,
+ sizeof(buf->idx)))
+ return -EFAULT;
+
+ if (copy_to_user(&d->request_sizes[i],
+ &buf->total,
+ sizeof(buf->total)))
+ return -EFAULT;
+
+ ++d->granted_count;
+ }
+ return 0;
+}
+
+
+int DRM(dma_get_buffers)(drm_device_t *dev, drm_dma_t *dma)
+{
+ int order;
+ int retcode = 0;
+ int tmp_order;
+
+ order = DRM(order)(dma->request_size);
+
+ dma->granted_count = 0;
+ retcode = DRM(dma_get_buffers_of_order)(dev, dma, order);
+
+ if (dma->granted_count < dma->request_count
+ && (dma->flags & _DRM_DMA_SMALLER_OK)) {
+ for (tmp_order = order - 1;
+ !retcode
+ && dma->granted_count < dma->request_count
+ && tmp_order >= DRM_MIN_ORDER;
+ --tmp_order) {
+
+ retcode = DRM(dma_get_buffers_of_order)(dev, dma,
+ tmp_order);
+ }
+ }
+
+ if (dma->granted_count < dma->request_count
+ && (dma->flags & _DRM_DMA_LARGER_OK)) {
+ for (tmp_order = order + 1;
+ !retcode
+ && dma->granted_count < dma->request_count
+ && tmp_order <= DRM_MAX_ORDER;
+ ++tmp_order) {
+
+ retcode = DRM(dma_get_buffers_of_order)(dev, dma,
+ tmp_order);
+ }
+ }
+ return 0;
+}
+
+#endif /* __HAVE_OLD_DMA */
+
+
+#if __HAVE_DMA_IRQ
+
+int DRM(irq_install)( drm_device_t *dev, int irq )
+{
+ int ret;
+
+ if ( !irq )
+ return -EINVAL;
+
+ down( &dev->struct_sem );
+ if ( dev->irq ) {
+ up( &dev->struct_sem );
+ return -EBUSY;
+ }
+ dev->irq = irq;
+ up( &dev->struct_sem );
+
+ DRM_DEBUG( "%s: irq=%d\n", __FUNCTION__, irq );
+
+ dev->context_flag = 0;
+ dev->interrupt_flag = 0;
+ dev->dma_flag = 0;
+
+ dev->dma->next_buffer = NULL;
+ dev->dma->next_queue = NULL;
+ dev->dma->this_buffer = NULL;
+
+#if __HAVE_DMA_IRQ_BH
+ INIT_LIST_HEAD( &dev->tq.list );
+ dev->tq.sync = 0;
+ dev->tq.routine = DRM(dma_immediate_bh);
+ dev->tq.data = dev;
+#endif
+
+ /* Before installing handler */
+ DRIVER_PREINSTALL();
+
+ /* Install handler */
+ ret = request_irq( dev->irq, DRM(dma_service),
+ 0, dev->devname, dev );
+ if ( ret < 0 ) {
+ down( &dev->struct_sem );
+ dev->irq = 0;
+ up( &dev->struct_sem );
+ return ret;
+ }
+
+ /* After installing handler */
+ DRIVER_POSTINSTALL();
+
+ return 0;
+}
+
+int DRM(irq_uninstall)( drm_device_t *dev )
+{
+ int irq;
+
+ down( &dev->struct_sem );
+ irq = dev->irq;
+ dev->irq = 0;
+ up( &dev->struct_sem );
+
+ if ( !irq )
+ return -EINVAL;
+
+ DRM_DEBUG( "%s: irq=%d\n", __FUNCTION__, irq );
+
+ DRIVER_UNINSTALL();
+
+ free_irq( irq, dev );
+
+ return 0;
+}
+
+int DRM(control)( struct inode *inode, struct file *filp,
+ unsigned int cmd, unsigned long arg )
+{
+ drm_file_t *priv = filp->private_data;
+ drm_device_t *dev = priv->dev;
+ drm_control_t ctl;
+
+ if ( copy_from_user( &ctl, (drm_control_t *)arg, sizeof(ctl) ) )
+ return -EFAULT;
+
+ switch ( ctl.func ) {
+ case DRM_INST_HANDLER:
+ return DRM(irq_install)( dev, ctl.irq );
+ case DRM_UNINST_HANDLER:
+ return DRM(irq_uninstall)( dev );
+ default:
+ return -EINVAL;
+ }
+}
+
+#endif /* __HAVE_DMA_IRQ */
+
+#endif /* __HAVE_DMA */
diff --git a/linux-core/drm_drv.c b/linux-core/drm_drv.c
new file mode 100644
index 00000000..7447ca6d
--- /dev/null
+++ b/linux-core/drm_drv.c
@@ -0,0 +1,938 @@
+/* drm_drv.h -- Generic driver template -*- linux-c -*-
+ * Created: Thu Nov 23 03:10:50 2000 by gareth@valinux.com
+ *
+ * Copyright 1999, 2000 Precision Insight, Inc., Cedar Park, Texas.
+ * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Authors:
+ * Rickard E. (Rik) Faith <faith@valinux.com>
+ * Gareth Hughes <gareth@valinux.com>
+ */
+
+/*
+ * To use this template, you must at least define the following (samples
+ * given for the MGA driver):
+ *
+ * #define DRIVER_AUTHOR "VA Linux Systems, Inc."
+ *
+ * #define DRIVER_NAME "mga"
+ * #define DRIVER_DESC "Matrox G200/G400"
+ * #define DRIVER_DATE "20001127"
+ *
+ * #define DRIVER_MAJOR 2
+ * #define DRIVER_MINOR 0
+ * #define DRIVER_PATCHLEVEL 2
+ *
+ * #define DRIVER_IOCTL_COUNT DRM_ARRAY_SIZE( mga_ioctls )
+ *
+ * #define DRM(x) mga_##x
+ */
+
+#ifndef __MUST_HAVE_AGP
+#define __MUST_HAVE_AGP 0
+#endif
+#ifndef __HAVE_CTX_BITMAP
+#define __HAVE_CTX_BITMAP 0
+#endif
+#ifndef __HAVE_DMA_IRQ
+#define __HAVE_DMA_IRQ 0
+#endif
+#ifndef __HAVE_DMA_QUEUE
+#define __HAVE_DMA_QUEUE 0
+#endif
+#ifndef __HAVE_MULTIPLE_DMA_QUEUES
+#define __HAVE_MULTIPLE_DMA_QUEUES 0
+#endif
+#ifndef __HAVE_DMA_SCHEDULE
+#define __HAVE_DMA_SCHEDULE 0
+#endif
+#ifndef __HAVE_DMA_FLUSH
+#define __HAVE_DMA_FLUSH 0
+#endif
+#ifndef __HAVE_DMA_READY
+#define __HAVE_DMA_READY 0
+#endif
+#ifndef __HAVE_DMA_QUIESCENT
+#define __HAVE_DMA_QUIESCENT 0
+#endif
+#ifndef __HAVE_RELEASE
+#define __HAVE_RELEASE 0
+#endif
+#ifndef __HAVE_COUNTERS
+#define __HAVE_COUNTERS 0
+#endif
+
+#ifndef DRIVER_PREINIT
+#define DRIVER_PREINIT()
+#endif
+#ifndef DRIVER_POSTINIT
+#define DRIVER_POSTINIT()
+#endif
+#ifndef DRIVER_PRERELEASE
+#define DRIVER_PRERELEASE()
+#endif
+#ifndef DRIVER_PRETAKEDOWN
+#define DRIVER_PRETAKEDOWN()
+#endif
+#ifndef DRIVER_IOCTLS
+#define DRIVER_IOCTLS
+#endif
+
+
+static drm_device_t DRM(device);
+static int DRM(minor);
+
+static struct file_operations DRM(fops) = {
+#if LINUX_VERSION_CODE >= 0x020400
+ /* This started being used during 2.4.0-test */
+ owner: THIS_MODULE,
+#endif
+ open: DRM(open),
+ flush: DRM(flush),
+ release: DRM(release),
+ ioctl: DRM(ioctl),
+ mmap: DRM(mmap),
+ read: DRM(read),
+ fasync: DRM(fasync),
+ poll: DRM(poll),
+};
+
+
+static drm_ioctl_desc_t DRM(ioctls)[] = {
+ [DRM_IOCTL_NR(DRM_IOCTL_VERSION)] = { DRM(version), 0, 0 },
+ [DRM_IOCTL_NR(DRM_IOCTL_GET_UNIQUE)] = { DRM(getunique), 0, 0 },
+ [DRM_IOCTL_NR(DRM_IOCTL_GET_MAGIC)] = { DRM(getmagic), 0, 0 },
+ [DRM_IOCTL_NR(DRM_IOCTL_IRQ_BUSID)] = { DRM(irq_busid), 0, 1 },
+ [DRM_IOCTL_NR(DRM_IOCTL_GET_MAP)] = { DRM(getmap), 0, 0 },
+ [DRM_IOCTL_NR(DRM_IOCTL_GET_CLIENT)] = { DRM(getclient), 0, 0 },
+ [DRM_IOCTL_NR(DRM_IOCTL_GET_STATS)] = { DRM(getstats), 0, 0 },
+
+ [DRM_IOCTL_NR(DRM_IOCTL_SET_UNIQUE)] = { DRM(setunique), 1, 1 },
+ [DRM_IOCTL_NR(DRM_IOCTL_BLOCK)] = { DRM(block), 1, 1 },
+ [DRM_IOCTL_NR(DRM_IOCTL_UNBLOCK)] = { DRM(unblock), 1, 1 },
+ [DRM_IOCTL_NR(DRM_IOCTL_AUTH_MAGIC)] = { DRM(authmagic), 1, 1 },
+
+ [DRM_IOCTL_NR(DRM_IOCTL_ADD_MAP)] = { DRM(addmap), 1, 1 },
+ [DRM_IOCTL_NR(DRM_IOCTL_RM_MAP)] = { DRM(rmmap), 1, 0 },
+
+ [DRM_IOCTL_NR(DRM_IOCTL_SET_SAREA_CTX)] = { DRM(setsareactx), 1, 1 },
+ [DRM_IOCTL_NR(DRM_IOCTL_GET_SAREA_CTX)] = { DRM(getsareactx), 1, 0 },
+
+ [DRM_IOCTL_NR(DRM_IOCTL_ADD_CTX)] = { DRM(addctx), 1, 1 },
+ [DRM_IOCTL_NR(DRM_IOCTL_RM_CTX)] = { DRM(rmctx), 1, 1 },
+ [DRM_IOCTL_NR(DRM_IOCTL_MOD_CTX)] = { DRM(modctx), 1, 1 },
+ [DRM_IOCTL_NR(DRM_IOCTL_GET_CTX)] = { DRM(getctx), 1, 0 },
+ [DRM_IOCTL_NR(DRM_IOCTL_SWITCH_CTX)] = { DRM(switchctx), 1, 1 },
+ [DRM_IOCTL_NR(DRM_IOCTL_NEW_CTX)] = { DRM(newctx), 1, 1 },
+ [DRM_IOCTL_NR(DRM_IOCTL_RES_CTX)] = { DRM(resctx), 1, 0 },
+
+ [DRM_IOCTL_NR(DRM_IOCTL_ADD_DRAW)] = { DRM(adddraw), 1, 1 },
+ [DRM_IOCTL_NR(DRM_IOCTL_RM_DRAW)] = { DRM(rmdraw), 1, 1 },
+
+ [DRM_IOCTL_NR(DRM_IOCTL_LOCK)] = { DRM(lock), 1, 0 },
+ [DRM_IOCTL_NR(DRM_IOCTL_UNLOCK)] = { DRM(unlock), 1, 0 },
+ [DRM_IOCTL_NR(DRM_IOCTL_FINISH)] = { DRM(finish), 1, 0 },
+
+#if __HAVE_DMA
+ [DRM_IOCTL_NR(DRM_IOCTL_ADD_BUFS)] = { DRM(addbufs), 1, 1 },
+ [DRM_IOCTL_NR(DRM_IOCTL_MARK_BUFS)] = { DRM(markbufs), 1, 1 },
+ [DRM_IOCTL_NR(DRM_IOCTL_INFO_BUFS)] = { DRM(infobufs), 1, 0 },
+ [DRM_IOCTL_NR(DRM_IOCTL_MAP_BUFS)] = { DRM(mapbufs), 1, 0 },
+ [DRM_IOCTL_NR(DRM_IOCTL_FREE_BUFS)] = { DRM(freebufs), 1, 0 },
+
+ /* The DRM_IOCTL_DMA ioctl should be defined by the driver.
+ */
+#if __HAVE_DMA_IRQ
+ [DRM_IOCTL_NR(DRM_IOCTL_CONTROL)] = { DRM(control), 1, 1 },
+#endif
+#endif
+
+#if __REALLY_HAVE_AGP
+ [DRM_IOCTL_NR(DRM_IOCTL_AGP_ACQUIRE)] = { DRM(agp_acquire), 1, 1 },
+ [DRM_IOCTL_NR(DRM_IOCTL_AGP_RELEASE)] = { DRM(agp_release), 1, 1 },
+ [DRM_IOCTL_NR(DRM_IOCTL_AGP_ENABLE)] = { DRM(agp_enable), 1, 1 },
+ [DRM_IOCTL_NR(DRM_IOCTL_AGP_INFO)] = { DRM(agp_info), 1, 0 },
+ [DRM_IOCTL_NR(DRM_IOCTL_AGP_ALLOC)] = { DRM(agp_alloc), 1, 1 },
+ [DRM_IOCTL_NR(DRM_IOCTL_AGP_FREE)] = { DRM(agp_free), 1, 1 },
+ [DRM_IOCTL_NR(DRM_IOCTL_AGP_BIND)] = { DRM(agp_bind), 1, 1 },
+ [DRM_IOCTL_NR(DRM_IOCTL_AGP_UNBIND)] = { DRM(agp_unbind), 1, 1 },
+#endif
+
+ DRIVER_IOCTLS
+};
+
+#define DRIVER_IOCTL_COUNT DRM_ARRAY_SIZE( DRM(ioctls) )
+
+#ifdef MODULE
+static char *drm_opts = NULL;
+#endif
+
+MODULE_AUTHOR( DRIVER_AUTHOR );
+MODULE_DESCRIPTION( DRIVER_DESC );
+MODULE_PARM( drm_opts, "s" );
+
+#ifndef MODULE
+/* DRM(options) is called by the kernel to parse command-line options
+ * passed via the boot-loader (e.g., LILO). It calls the insmod option
+ * routine, drm_parse_drm.
+ */
+
+static int __init DRM(options)( char *str )
+{
+ DRM(parse_options)( str );
+ return 1;
+}
+
+__setup( DRIVER_NAME "=", DRM(options) );
+#endif
+
+static int DRM(setup)( drm_device_t *dev )
+{
+ int i;
+
+ atomic_set( &dev->ioctl_count, 0 );
+ atomic_set( &dev->vma_count, 0 );
+ dev->buf_use = 0;
+ atomic_set( &dev->buf_alloc, 0 );
+
+#if __HAVE_DMA
+ i = DRM(dma_setup)( dev );
+ if ( i < 0 )
+ return i;
+#endif
+
+ dev->counters = 6 + __HAVE_COUNTERS;
+ dev->types[0] = _DRM_STAT_LOCK;
+ dev->types[1] = _DRM_STAT_OPENS;
+ dev->types[2] = _DRM_STAT_CLOSES;
+ dev->types[3] = _DRM_STAT_IOCTLS;
+ dev->types[4] = _DRM_STAT_LOCKS;
+ dev->types[5] = _DRM_STAT_UNLOCKS;
+#ifdef __HAVE_COUNTER6
+ dev->types[6] = __HAVE_COUNTER6;
+#endif
+#ifdef __HAVE_COUNTER7
+ dev->types[7] = __HAVE_COUNTER7;
+#endif
+#ifdef __HAVE_COUNTER8
+ dev->types[8] = __HAVE_COUNTER8;
+#endif
+#ifdef __HAVE_COUNTER9
+ dev->types[9] = __HAVE_COUNTER9;
+#endif
+#ifdef __HAVE_COUNTER10
+ dev->types[10] = __HAVE_COUNTER10;
+#endif
+#ifdef __HAVE_COUNTER11
+ dev->types[11] = __HAVE_COUNTER11;
+#endif
+#ifdef __HAVE_COUNTER12
+ dev->types[12] = __HAVE_COUNTER12;
+#endif
+#ifdef __HAVE_COUNTER13
+ dev->types[13] = __HAVE_COUNTER13;
+#endif
+#ifdef __HAVE_COUNTER14
+ dev->types[14] = __HAVE_COUNTER14;
+#endif
+#ifdef __HAVE_COUNTER15
+ dev->types[14] = __HAVE_COUNTER14;
+#endif
+
+ for ( i = 0 ; i < DRM_ARRAY_SIZE(dev->counts) ; i++ )
+ atomic_set( &dev->counts[i], 0 );
+
+ for ( i = 0 ; i < DRM_HASH_SIZE ; i++ ) {
+ dev->magiclist[i].head = NULL;
+ dev->magiclist[i].tail = NULL;
+ }
+
+ dev->maplist = DRM(alloc)(sizeof(*dev->maplist),
+ DRM_MEM_MAPS);
+ if(dev->maplist == NULL) return -ENOMEM;
+ memset(dev->maplist, 0, sizeof(*dev->maplist));
+ INIT_LIST_HEAD(&dev->maplist->head);
+ dev->map_count = 0;
+
+ dev->vmalist = NULL;
+ dev->lock.hw_lock = NULL;
+ init_waitqueue_head( &dev->lock.lock_queue );
+ dev->queue_count = 0;
+ dev->queue_reserved = 0;
+ dev->queue_slots = 0;
+ dev->queuelist = NULL;
+ dev->irq = 0;
+ dev->context_flag = 0;
+ dev->interrupt_flag = 0;
+ dev->dma_flag = 0;
+ dev->last_context = 0;
+ dev->last_switch = 0;
+ dev->last_checked = 0;
+ init_timer( &dev->timer );
+ init_waitqueue_head( &dev->context_wait );
+
+ dev->ctx_start = 0;
+ dev->lck_start = 0;
+
+ dev->buf_rp = dev->buf;
+ dev->buf_wp = dev->buf;
+ dev->buf_end = dev->buf + DRM_BSZ;
+ dev->buf_async = NULL;
+ init_waitqueue_head( &dev->buf_readers );
+ init_waitqueue_head( &dev->buf_writers );
+
+ DRM_DEBUG( "\n" );
+
+ /* The kernel's context could be created here, but is now created
+ * in drm_dma_enqueue. This is more resource-efficient for
+ * hardware that does not do DMA, but may mean that
+ * drm_select_queue fails between the time the interrupt is
+ * initialized and the time the queues are initialized.
+ */
+ return 0;
+}
+
+
+static int DRM(takedown)( drm_device_t *dev )
+{
+ drm_magic_entry_t *pt, *next;
+ drm_map_t *map;
+ drm_map_list_t *r_list;
+ struct list_head *list;
+ drm_vma_entry_t *vma, *vma_next;
+ int i;
+
+ DRM_DEBUG( "\n" );
+
+ DRIVER_PRETAKEDOWN();
+#if __HAVE_DMA_IRQ
+ if ( dev->irq ) DRM(irq_uninstall)( dev );
+#endif
+
+ down( &dev->struct_sem );
+ del_timer( &dev->timer );
+
+ if ( dev->devname ) {
+ DRM(free)( dev->devname, strlen( dev->devname ) + 1,
+ DRM_MEM_DRIVER );
+ dev->devname = NULL;
+ }
+
+ if ( dev->unique ) {
+ DRM(free)( dev->unique, strlen( dev->unique ) + 1,
+ DRM_MEM_DRIVER );
+ dev->unique = NULL;
+ dev->unique_len = 0;
+ }
+ /* Clear pid list */
+ for ( i = 0 ; i < DRM_HASH_SIZE ; i++ ) {
+ for ( pt = dev->magiclist[i].head ; pt ; pt = next ) {
+ next = pt->next;
+ DRM(free)( pt, sizeof(*pt), DRM_MEM_MAGIC );
+ }
+ dev->magiclist[i].head = dev->magiclist[i].tail = NULL;
+ }
+
+#if __REALLY_HAVE_AGP
+ /* Clear AGP information */
+ if ( dev->agp ) {
+ drm_agp_mem_t *entry;
+ drm_agp_mem_t *nexte;
+
+ /* Remove AGP resources, but leave dev->agp
+ intact until drv_cleanup is called. */
+ for ( entry = dev->agp->memory ; entry ; entry = nexte ) {
+ nexte = entry->next;
+ if ( entry->bound ) DRM(unbind_agp)( entry->memory );
+ DRM(free_agp)( entry->memory, entry->pages );
+ DRM(free)( entry, sizeof(*entry), DRM_MEM_AGPLISTS );
+ }
+ dev->agp->memory = NULL;
+
+ if ( dev->agp->acquired ) DRM(agp_do_release)();
+
+ dev->agp->acquired = 0;
+ dev->agp->enabled = 0;
+ }
+#endif
+
+ /* Clear vma list (only built for debugging) */
+ if ( dev->vmalist ) {
+ for ( vma = dev->vmalist ; vma ; vma = vma_next ) {
+ vma_next = vma->next;
+ DRM(free)( vma, sizeof(*vma), DRM_MEM_VMAS );
+ }
+ dev->vmalist = NULL;
+ }
+
+ if( dev->maplist ) {
+ list_for_each(list, &dev->maplist->head) {
+ r_list = (drm_map_list_t *)list;
+ map = r_list->map;
+ DRM(free)(r_list, sizeof(*r_list), DRM_MEM_MAPS);
+ if(!map) continue;
+
+ switch ( map->type ) {
+ case _DRM_REGISTERS:
+ case _DRM_FRAME_BUFFER:
+#if __REALLY_HAVE_MTRR
+ if ( map->mtrr >= 0 ) {
+ int retcode;
+ retcode = mtrr_del( map->mtrr,
+ map->offset,
+ map->size );
+ DRM_DEBUG( "mtrr_del=%d\n", retcode );
+ }
+#endif
+ DRM(ioremapfree)( map->handle, map->size );
+ break;
+ case _DRM_SHM:
+ vfree(map->handle);
+ break;
+
+ case _DRM_AGP:
+ /* Do nothing here, because this is all
+ * handled in the AGP/GART driver.
+ */
+ break;
+ }
+ DRM(free)(map, sizeof(*map), DRM_MEM_MAPS);
+ }
+ DRM(free)(dev->maplist, sizeof(*dev->maplist), DRM_MEM_MAPS);
+ dev->maplist = NULL;
+ }
+
+#if __HAVE_DMA_QUEUE || __HAVE_MULTIPLE_DMA_QUEUES
+ if ( dev->queuelist ) {
+ for ( i = 0 ; i < dev->queue_count ; i++ ) {
+ DRM(waitlist_destroy)( &dev->queuelist[i]->waitlist );
+ if ( dev->queuelist[i] ) {
+ DRM(free)( dev->queuelist[i],
+ sizeof(*dev->queuelist[0]),
+ DRM_MEM_QUEUES );
+ dev->queuelist[i] = NULL;
+ }
+ }
+ DRM(free)( dev->queuelist,
+ dev->queue_slots * sizeof(*dev->queuelist),
+ DRM_MEM_QUEUES );
+ dev->queuelist = NULL;
+ }
+ dev->queue_count = 0;
+#endif
+
+#if __HAVE_DMA
+ DRM(dma_takedown)( dev );
+#endif
+ if ( dev->lock.hw_lock ) {
+ dev->lock.hw_lock = NULL; /* SHM removed */
+ dev->lock.pid = 0;
+ wake_up_interruptible( &dev->lock.lock_queue );
+ }
+ up( &dev->struct_sem );
+
+ return 0;
+}
+
+/* drm_init is called via init_module at module load time, or via
+ * linux/init/main.c (this is not currently supported).
+ */
+static int __init drm_init( void )
+{
+ drm_device_t *dev = &DRM(device);
+#if __HAVE_CTX_BITMAP
+ int retcode;
+#endif
+ DRM_DEBUG( "\n" );
+
+ memset( (void *)dev, 0, sizeof(*dev) );
+ dev->count_lock = SPIN_LOCK_UNLOCKED;
+ sema_init( &dev->struct_sem, 1 );
+
+#ifdef MODULE
+ DRM(parse_options)( drm_opts );
+#endif
+ DRIVER_PREINIT();
+
+ DRM(mem_init)();
+
+ if ((DRM(minor) = DRM(stub_register)(DRIVER_NAME, &DRM(fops),dev)) < 0)
+ return -EPERM;
+ dev->device = MKDEV(DRM_MAJOR, DRM(minor) );
+ dev->name = DRIVER_NAME;
+
+#if __REALLY_HAVE_AGP
+ dev->agp = DRM(agp_init)();
+#if __MUST_HAVE_AGP
+ if ( dev->agp == NULL ) {
+ DRM_ERROR( "Cannot initialize the agpgart module.\n" );
+ DRM(stub_unregister)(DRM(minor));
+ DRM(takedown)( dev );
+ return -ENOMEM;
+ }
+#endif
+#if __REALLY_HAVE_MTRR
+ if (dev->agp)
+ dev->agp->agp_mtrr = mtrr_add( dev->agp->agp_info.aper_base,
+ dev->agp->agp_info.aper_size*1024*1024,
+ MTRR_TYPE_WRCOMB,
+ 1 );
+#endif
+#endif
+
+#if __HAVE_CTX_BITMAP
+ retcode = DRM(ctxbitmap_init)( dev );
+ if( retcode ) {
+ DRM_ERROR( "Cannot allocate memory for context bitmap.\n" );
+ DRM(stub_unregister)(DRM(minor));
+ DRM(takedown)( dev );
+ return retcode;
+ }
+#endif
+
+ DRIVER_POSTINIT();
+
+ DRM_INFO( "Initialized %s %d.%d.%d %s on minor %d\n",
+ DRIVER_NAME,
+ DRIVER_MAJOR,
+ DRIVER_MINOR,
+ DRIVER_PATCHLEVEL,
+ DRIVER_DATE,
+ DRM(minor) );
+
+ return 0;
+}
+
+/* drm_cleanup is called via cleanup_module at module unload time.
+ */
+static void __exit drm_cleanup( void )
+{
+ drm_device_t *dev = &DRM(device);
+
+ DRM_DEBUG( "\n" );
+
+ if ( DRM(stub_unregister)(DRM(minor)) ) {
+ DRM_ERROR( "Cannot unload module\n" );
+ } else {
+ DRM_INFO( "Module unloaded\n" );
+ }
+#if __HAVE_CTX_BITMAP
+ DRM(ctxbitmap_cleanup)( dev );
+#endif
+
+#if __REALLY_HAVE_AGP && __REALLY_HAVE_MTRR
+ if ( dev->agp && dev->agp->agp_mtrr ) {
+ int retval;
+ retval = mtrr_del( dev->agp->agp_mtrr,
+ dev->agp->agp_info.aper_base,
+ dev->agp->agp_info.aper_size*1024*1024 );
+ DRM_DEBUG( "mtrr_del=%d\n", retval );
+ }
+#endif
+
+ DRM(takedown)( dev );
+
+#if __REALLY_HAVE_AGP
+ if ( dev->agp ) {
+ DRM(agp_uninit)();
+ DRM(free)( dev->agp, sizeof(*dev->agp), DRM_MEM_AGPLISTS );
+ dev->agp = NULL;
+ }
+#endif
+}
+
+module_init( drm_init );
+module_exit( drm_cleanup );
+
+
+int DRM(version)( struct inode *inode, struct file *filp,
+ unsigned int cmd, unsigned long arg )
+{
+ drm_version_t version;
+ int len;
+
+ if ( copy_from_user( &version,
+ (drm_version_t *)arg,
+ sizeof(version) ) )
+ return -EFAULT;
+
+#define DRM_COPY( name, value ) \
+ len = strlen( value ); \
+ if ( len > name##_len ) len = name##_len; \
+ name##_len = strlen( value ); \
+ if ( len && name ) { \
+ if ( copy_to_user( name, value, len ) ) \
+ return -EFAULT; \
+ }
+
+ version.version_major = DRIVER_MAJOR;
+ version.version_minor = DRIVER_MINOR;
+ version.version_patchlevel = DRIVER_PATCHLEVEL;
+
+ DRM_COPY( version.name, DRIVER_NAME );
+ DRM_COPY( version.date, DRIVER_DATE );
+ DRM_COPY( version.desc, DRIVER_DESC );
+
+ if ( copy_to_user( (drm_version_t *)arg,
+ &version,
+ sizeof(version) ) )
+ return -EFAULT;
+ return 0;
+}
+
+int DRM(open)( struct inode *inode, struct file *filp )
+{
+ drm_device_t *dev = &DRM(device);
+ int retcode = 0;
+
+ DRM_DEBUG( "open_count = %d\n", dev->open_count );
+
+ retcode = DRM(open_helper)( inode, filp, dev );
+ if ( !retcode ) {
+#if LINUX_VERSION_CODE < 0x020333
+ MOD_INC_USE_COUNT; /* Needed before Linux 2.3.51 */
+#endif
+ atomic_inc( &dev->counts[_DRM_STAT_OPENS] );
+ spin_lock( &dev->count_lock );
+ if ( !dev->open_count++ ) {
+ spin_unlock( &dev->count_lock );
+ return DRM(setup)( dev );
+ }
+ spin_unlock( &dev->count_lock );
+ }
+
+ return retcode;
+}
+
+int DRM(release)( struct inode *inode, struct file *filp )
+{
+ drm_file_t *priv = filp->private_data;
+ drm_device_t *dev;
+ int retcode = 0;
+
+ lock_kernel();
+ dev = priv->dev;
+
+ DRM_DEBUG( "open_count = %d\n", dev->open_count );
+
+ DRIVER_PRERELEASE();
+
+ /* ========================================================
+ * Begin inline drm_release
+ */
+
+ DRM_DEBUG( "pid = %d, device = 0x%x, open_count = %d\n",
+ current->pid, dev->device, dev->open_count );
+
+ if ( dev->lock.hw_lock &&
+ _DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock) &&
+ dev->lock.pid == current->pid ) {
+ DRM_DEBUG( "Process %d dead, freeing lock for context %d\n",
+ current->pid,
+ _DRM_LOCKING_CONTEXT(dev->lock.hw_lock->lock) );
+#if __HAVE_RELEASE
+ DRIVER_RELEASE();
+#endif
+ DRM(lock_free)( dev, &dev->lock.hw_lock->lock,
+ _DRM_LOCKING_CONTEXT(dev->lock.hw_lock->lock) );
+
+ /* FIXME: may require heavy-handed reset of
+ hardware at this point, possibly
+ processed via a callback to the X
+ server. */
+ }
+#if __HAVE_RELEASE
+ else if ( dev->lock.hw_lock ) {
+ /* The lock is required to reclaim buffers */
+ DECLARE_WAITQUEUE( entry, current );
+ add_wait_queue( &dev->lock.lock_queue, &entry );
+ for (;;) {
+ current->state = TASK_INTERRUPTIBLE;
+ if ( !dev->lock.hw_lock ) {
+ /* Device has been unregistered */
+ retcode = -EINTR;
+ break;
+ }
+ if ( DRM(lock_take)( &dev->lock.hw_lock->lock,
+ DRM_KERNEL_CONTEXT ) ) {
+ dev->lock.pid = priv->pid;
+ dev->lock.lock_time = jiffies;
+ atomic_inc( &dev->counts[_DRM_STAT_LOCKS] );
+ break; /* Got lock */
+ }
+ /* Contention */
+#if 0
+ atomic_inc( &dev->total_sleeps );
+#endif
+ schedule();
+ if ( signal_pending( current ) ) {
+ retcode = -ERESTARTSYS;
+ break;
+ }
+ }
+ current->state = TASK_RUNNING;
+ remove_wait_queue( &dev->lock.lock_queue, &entry );
+ if( !retcode ) {
+ DRIVER_RELEASE();
+ DRM(lock_free)( dev, &dev->lock.hw_lock->lock,
+ DRM_KERNEL_CONTEXT );
+ }
+ }
+#elif __HAVE_DMA
+ DRM(reclaim_buffers)( dev, priv->pid );
+#endif
+
+ DRM(fasync)( -1, filp, 0 );
+
+ down( &dev->struct_sem );
+ if ( priv->remove_auth_on_close == 1 ) {
+ drm_file_t *temp = dev->file_first;
+ while ( temp ) {
+ temp->authenticated = 0;
+ temp = temp->next;
+ }
+ }
+ if ( priv->prev ) {
+ priv->prev->next = priv->next;
+ } else {
+ dev->file_first = priv->next;
+ }
+ if ( priv->next ) {
+ priv->next->prev = priv->prev;
+ } else {
+ dev->file_last = priv->prev;
+ }
+ up( &dev->struct_sem );
+
+ DRM(free)( priv, sizeof(*priv), DRM_MEM_FILES );
+
+ /* ========================================================
+ * End inline drm_release
+ */
+
+#if LINUX_VERSION_CODE < 0x020333
+ MOD_DEC_USE_COUNT; /* Needed before Linux 2.3.51 */
+#endif
+ atomic_inc( &dev->counts[_DRM_STAT_CLOSES] );
+ spin_lock( &dev->count_lock );
+ if ( !--dev->open_count ) {
+ if ( atomic_read( &dev->ioctl_count ) || dev->blocked ) {
+ DRM_ERROR( "Device busy: %d %d\n",
+ atomic_read( &dev->ioctl_count ),
+ dev->blocked );
+ spin_unlock( &dev->count_lock );
+ unlock_kernel();
+ return -EBUSY;
+ }
+ spin_unlock( &dev->count_lock );
+ unlock_kernel();
+ return DRM(takedown)( dev );
+ }
+ spin_unlock( &dev->count_lock );
+
+ unlock_kernel();
+ return retcode;
+}
+
+/* DRM(ioctl) is called whenever a process performs an ioctl on /dev/drm.
+ */
+int DRM(ioctl)( struct inode *inode, struct file *filp,
+ unsigned int cmd, unsigned long arg )
+{
+ drm_file_t *priv = filp->private_data;
+ drm_device_t *dev = priv->dev;
+ drm_ioctl_desc_t *ioctl;
+ drm_ioctl_t *func;
+ int nr = DRM_IOCTL_NR(cmd);
+ int retcode = 0;
+
+ atomic_inc( &dev->ioctl_count );
+ atomic_inc( &dev->counts[_DRM_STAT_IOCTLS] );
+ ++priv->ioctl_count;
+
+ DRM_DEBUG( "pid=%d, cmd=0x%02x, nr=0x%02x, dev 0x%x, auth=%d\n",
+ current->pid, cmd, nr, dev->device, priv->authenticated );
+
+ if ( nr >= DRIVER_IOCTL_COUNT ) {
+ retcode = -EINVAL;
+ } else {
+ ioctl = &DRM(ioctls)[nr];
+ func = ioctl->func;
+
+ if ( !func ) {
+ DRM_DEBUG( "no function\n" );
+ retcode = -EINVAL;
+ } else if ( ( ioctl->root_only && !capable( CAP_SYS_ADMIN ) )||
+ ( ioctl->auth_needed && !priv->authenticated ) ) {
+ retcode = -EACCES;
+ } else {
+ retcode = func( inode, filp, cmd, arg );
+ }
+ }
+
+ atomic_dec( &dev->ioctl_count );
+ return retcode;
+}
+
+int DRM(lock)( struct inode *inode, struct file *filp,
+ unsigned int cmd, unsigned long arg )
+{
+ drm_file_t *priv = filp->private_data;
+ drm_device_t *dev = priv->dev;
+ DECLARE_WAITQUEUE( entry, current );
+ drm_lock_t lock;
+ int ret = 0;
+#if __HAVE_MULTIPLE_DMA_QUEUES
+ drm_queue_t *q;
+#endif
+#if __HAVE_DMA_HISTOGRAM
+ cycles_t start;
+
+ dev->lck_start = start = get_cycles();
+#endif
+
+ if ( copy_from_user( &lock, (drm_lock_t *)arg, sizeof(lock) ) )
+ return -EFAULT;
+
+ if ( lock.context == DRM_KERNEL_CONTEXT ) {
+ DRM_ERROR( "Process %d using kernel context %d\n",
+ current->pid, lock.context );
+ return -EINVAL;
+ }
+
+ DRM_DEBUG( "%d (pid %d) requests lock (0x%08x), flags = 0x%08x\n",
+ lock.context, current->pid,
+ dev->lock.hw_lock->lock, lock.flags );
+
+#if __HAVE_DMA_QUEUE
+ if ( lock.context < 0 )
+ return -EINVAL;
+#elif __HAVE_MULTIPLE_DMA_QUEUES
+ if ( lock.context < 0 || lock.context >= dev->queue_count )
+ return -EINVAL;
+ q = dev->queuelist[lock.context];
+#endif
+
+#if __HAVE_DMA_FLUSH
+ ret = DRM(flush_block_and_flush)( dev, lock.context, lock.flags );
+#endif
+ if ( !ret ) {
+ add_wait_queue( &dev->lock.lock_queue, &entry );
+ for (;;) {
+ current->state = TASK_INTERRUPTIBLE;
+ if ( !dev->lock.hw_lock ) {
+ /* Device has been unregistered */
+ ret = -EINTR;
+ break;
+ }
+ if ( DRM(lock_take)( &dev->lock.hw_lock->lock,
+ lock.context ) ) {
+ dev->lock.pid = current->pid;
+ dev->lock.lock_time = jiffies;
+ atomic_inc( &dev->counts[_DRM_STAT_LOCKS] );
+ break; /* Got lock */
+ }
+
+ /* Contention */
+ schedule();
+ if ( signal_pending( current ) ) {
+ ret = -ERESTARTSYS;
+ break;
+ }
+ }
+ current->state = TASK_RUNNING;
+ remove_wait_queue( &dev->lock.lock_queue, &entry );
+ }
+
+#if __HAVE_DMA_FLUSH
+ DRM(flush_unblock)( dev, lock.context, lock.flags ); /* cleanup phase */
+#endif
+
+ if ( !ret ) {
+ sigemptyset( &dev->sigmask );
+ sigaddset( &dev->sigmask, SIGSTOP );
+ sigaddset( &dev->sigmask, SIGTSTP );
+ sigaddset( &dev->sigmask, SIGTTIN );
+ sigaddset( &dev->sigmask, SIGTTOU );
+ dev->sigdata.context = lock.context;
+ dev->sigdata.lock = dev->lock.hw_lock;
+ block_all_signals( DRM(notifier),
+ &dev->sigdata, &dev->sigmask );
+
+#if __HAVE_DMA_READY
+ if ( lock.flags & _DRM_LOCK_READY ) {
+ DRIVER_DMA_READY();
+ }
+#endif
+#if __HAVE_DMA_QUIESCENT
+ if ( lock.flags & _DRM_LOCK_QUIESCENT ) {
+ DRIVER_DMA_QUIESCENT();
+ }
+#endif
+ }
+
+ DRM_DEBUG( "%d %s\n", lock.context, ret ? "interrupted" : "has lock" );
+
+#if __HAVE_DMA_HISTOGRAM
+ atomic_inc(&dev->histo.lacq[DRM(histogram_slot)(get_cycles()-start)]);
+#endif
+ return ret;
+}
+
+
+int DRM(unlock)( struct inode *inode, struct file *filp,
+ unsigned int cmd, unsigned long arg )
+{
+ drm_file_t *priv = filp->private_data;
+ drm_device_t *dev = priv->dev;
+ drm_lock_t lock;
+
+ if ( copy_from_user( &lock, (drm_lock_t *)arg, sizeof(lock) ) )
+ return -EFAULT;
+
+ if ( lock.context == DRM_KERNEL_CONTEXT ) {
+ DRM_ERROR( "Process %d using kernel context %d\n",
+ current->pid, lock.context );
+ return -EINVAL;
+ }
+
+ atomic_inc( &dev->counts[_DRM_STAT_UNLOCKS] );
+
+ DRM(lock_transfer)( dev, &dev->lock.hw_lock->lock,
+ DRM_KERNEL_CONTEXT );
+#if __HAVE_DMA_SCHEDULE
+ DRM(dma_schedule)( dev, 1 );
+#endif
+
+ /* FIXME: Do we ever really need to check this???
+ */
+ if ( 1 /* !dev->context_flag */ ) {
+ if ( DRM(lock_free)( dev, &dev->lock.hw_lock->lock,
+ DRM_KERNEL_CONTEXT ) ) {
+ DRM_ERROR( "\n" );
+ }
+ }
+
+ unblock_all_signals();
+ return 0;
+}
diff --git a/linux-core/drm_lock.c b/linux-core/drm_lock.c
new file mode 100644
index 00000000..c10cfe2c
--- /dev/null
+++ b/linux-core/drm_lock.c
@@ -0,0 +1,251 @@
+/* lock.c -- IOCTLs for locking -*- linux-c -*-
+ * Created: Tue Feb 2 08:37:54 1999 by faith@valinux.com
+ *
+ * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
+ * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Authors:
+ * Rickard E. (Rik) Faith <faith@valinux.com>
+ * Gareth Hughes <gareth@valinux.com>
+ */
+
+#define __NO_VERSION__
+#include "drmP.h"
+
+int DRM(block)(struct inode *inode, struct file *filp, unsigned int cmd,
+ unsigned long arg)
+{
+ DRM_DEBUG("\n");
+ return 0;
+}
+
+int DRM(unblock)(struct inode *inode, struct file *filp, unsigned int cmd,
+ unsigned long arg)
+{
+ DRM_DEBUG("\n");
+ return 0;
+}
+
+int DRM(lock_take)(__volatile__ unsigned int *lock, unsigned int context)
+{
+ unsigned int old, new, prev;
+
+ do {
+ old = *lock;
+ if (old & _DRM_LOCK_HELD) new = old | _DRM_LOCK_CONT;
+ else new = context | _DRM_LOCK_HELD;
+ prev = cmpxchg(lock, old, new);
+ } while (prev != old);
+ if (_DRM_LOCKING_CONTEXT(old) == context) {
+ if (old & _DRM_LOCK_HELD) {
+ if (context != DRM_KERNEL_CONTEXT) {
+ DRM_ERROR("%d holds heavyweight lock\n",
+ context);
+ }
+ return 0;
+ }
+ }
+ if (new == (context | _DRM_LOCK_HELD)) {
+ /* Have lock */
+ return 1;
+ }
+ return 0;
+}
+
+/* This takes a lock forcibly and hands it to context. Should ONLY be used
+ inside *_unlock to give lock to kernel before calling *_dma_schedule. */
+int DRM(lock_transfer)(drm_device_t *dev,
+ __volatile__ unsigned int *lock, unsigned int context)
+{
+ unsigned int old, new, prev;
+
+ dev->lock.pid = 0;
+ do {
+ old = *lock;
+ new = context | _DRM_LOCK_HELD;
+ prev = cmpxchg(lock, old, new);
+ } while (prev != old);
+ return 1;
+}
+
+int DRM(lock_free)(drm_device_t *dev,
+ __volatile__ unsigned int *lock, unsigned int context)
+{
+ unsigned int old, new, prev;
+ pid_t pid = dev->lock.pid;
+
+ dev->lock.pid = 0;
+ do {
+ old = *lock;
+ new = 0;
+ prev = cmpxchg(lock, old, new);
+ } while (prev != old);
+ if (_DRM_LOCK_IS_HELD(old) && _DRM_LOCKING_CONTEXT(old) != context) {
+ DRM_ERROR("%d freed heavyweight lock held by %d (pid %d)\n",
+ context,
+ _DRM_LOCKING_CONTEXT(old),
+ pid);
+ return 1;
+ }
+ wake_up_interruptible(&dev->lock.lock_queue);
+ return 0;
+}
+
+static int DRM(flush_queue)(drm_device_t *dev, int context)
+{
+ DECLARE_WAITQUEUE(entry, current);
+ int ret = 0;
+ drm_queue_t *q = dev->queuelist[context];
+
+ DRM_DEBUG("\n");
+
+ atomic_inc(&q->use_count);
+ if (atomic_read(&q->use_count) > 1) {
+ atomic_inc(&q->block_write);
+ add_wait_queue(&q->flush_queue, &entry);
+ atomic_inc(&q->block_count);
+ for (;;) {
+ current->state = TASK_INTERRUPTIBLE;
+ if (!DRM_BUFCOUNT(&q->waitlist)) break;
+ schedule();
+ if (signal_pending(current)) {
+ ret = -EINTR; /* Can't restart */
+ break;
+ }
+ }
+ atomic_dec(&q->block_count);
+ current->state = TASK_RUNNING;
+ remove_wait_queue(&q->flush_queue, &entry);
+ }
+ atomic_dec(&q->use_count);
+
+ /* NOTE: block_write is still incremented!
+ Use drm_flush_unlock_queue to decrement. */
+ return ret;
+}
+
+static int DRM(flush_unblock_queue)(drm_device_t *dev, int context)
+{
+ drm_queue_t *q = dev->queuelist[context];
+
+ DRM_DEBUG("\n");
+
+ atomic_inc(&q->use_count);
+ if (atomic_read(&q->use_count) > 1) {
+ if (atomic_read(&q->block_write)) {
+ atomic_dec(&q->block_write);
+ wake_up_interruptible(&q->write_queue);
+ }
+ }
+ atomic_dec(&q->use_count);
+ return 0;
+}
+
+int DRM(flush_block_and_flush)(drm_device_t *dev, int context,
+ drm_lock_flags_t flags)
+{
+ int ret = 0;
+ int i;
+
+ DRM_DEBUG("\n");
+
+ if (flags & _DRM_LOCK_FLUSH) {
+ ret = DRM(flush_queue)(dev, DRM_KERNEL_CONTEXT);
+ if (!ret) ret = DRM(flush_queue)(dev, context);
+ }
+ if (flags & _DRM_LOCK_FLUSH_ALL) {
+ for (i = 0; !ret && i < dev->queue_count; i++) {
+ ret = DRM(flush_queue)(dev, i);
+ }
+ }
+ return ret;
+}
+
+int DRM(flush_unblock)(drm_device_t *dev, int context, drm_lock_flags_t flags)
+{
+ int ret = 0;
+ int i;
+
+ DRM_DEBUG("\n");
+
+ if (flags & _DRM_LOCK_FLUSH) {
+ ret = DRM(flush_unblock_queue)(dev, DRM_KERNEL_CONTEXT);
+ if (!ret) ret = DRM(flush_unblock_queue)(dev, context);
+ }
+ if (flags & _DRM_LOCK_FLUSH_ALL) {
+ for (i = 0; !ret && i < dev->queue_count; i++) {
+ ret = DRM(flush_unblock_queue)(dev, i);
+ }
+ }
+
+ return ret;
+}
+
+int DRM(finish)(struct inode *inode, struct file *filp, unsigned int cmd,
+ unsigned long arg)
+{
+ drm_file_t *priv = filp->private_data;
+ drm_device_t *dev = priv->dev;
+ int ret = 0;
+ drm_lock_t lock;
+
+ DRM_DEBUG("\n");
+
+ if (copy_from_user(&lock, (drm_lock_t *)arg, sizeof(lock)))
+ return -EFAULT;
+ ret = DRM(flush_block_and_flush)(dev, lock.context, lock.flags);
+ DRM(flush_unblock)(dev, lock.context, lock.flags);
+ return ret;
+}
+
+/* If we get here, it means that the process has called DRM_IOCTL_LOCK
+ without calling DRM_IOCTL_UNLOCK.
+
+ If the lock is not held, then let the signal proceed as usual.
+
+ If the lock is held, then set the contended flag and keep the signal
+ blocked.
+
+
+ Return 1 if the signal should be delivered normally.
+ Return 0 if the signal should be blocked. */
+
+int DRM(notifier)(void *priv)
+{
+ drm_sigdata_t *s = (drm_sigdata_t *)priv;
+ unsigned int old, new, prev;
+
+
+ /* Allow signal delivery if lock isn't held */
+ if (!_DRM_LOCK_IS_HELD(s->lock->lock)
+ || _DRM_LOCKING_CONTEXT(s->lock->lock) != s->context) return 1;
+
+ /* Otherwise, set flag to force call to
+ drmUnlock */
+ do {
+ old = s->lock->lock;
+ new = old | _DRM_LOCK_CONT;
+ prev = cmpxchg(&s->lock->lock, old, new);
+ } while (prev != old);
+ return 0;
+}
diff --git a/linux-core/drm_proc.c b/linux-core/drm_proc.c
new file mode 100644
index 00000000..f65f42b7
--- /dev/null
+++ b/linux-core/drm_proc.c
@@ -0,0 +1,630 @@
+/* drm_proc.h -- /proc support for DRM -*- linux-c -*-
+ * Created: Mon Jan 11 09:48:47 1999 by faith@valinux.com
+ *
+ * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
+ * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Authors:
+ * Rickard E. (Rik) Faith <faith@valinux.com>
+ * Gareth Hughes <gareth@valinux.com>
+ *
+ * Acknowledgements:
+ * Matthew J Sottek <matthew.j.sottek@intel.com> sent in a patch to fix
+ * the problem with the proc files not outputting all their information.
+ */
+
+#define __NO_VERSION__
+#include "drmP.h"
+
+static int DRM(name_info)(char *buf, char **start, off_t offset,
+ int request, int *eof, void *data);
+static int DRM(vm_info)(char *buf, char **start, off_t offset,
+ int request, int *eof, void *data);
+static int DRM(clients_info)(char *buf, char **start, off_t offset,
+ int request, int *eof, void *data);
+static int DRM(queues_info)(char *buf, char **start, off_t offset,
+ int request, int *eof, void *data);
+static int DRM(bufs_info)(char *buf, char **start, off_t offset,
+ int request, int *eof, void *data);
+#if DRM_DEBUG_CODE
+static int DRM(vma_info)(char *buf, char **start, off_t offset,
+ int request, int *eof, void *data);
+#endif
+#if __HAVE_DMA_HISTOGRAM
+static int DRM(histo_info)(char *buf, char **start, off_t offset,
+ int request, int *eof, void *data);
+#endif
+
+struct drm_proc_list {
+ const char *name;
+ int (*f)(char *, char **, off_t, int, int *, void *);
+} DRM(proc_list)[] = {
+ { "name", DRM(name_info) },
+ { "mem", DRM(mem_info) },
+ { "vm", DRM(vm_info) },
+ { "clients", DRM(clients_info) },
+ { "queues", DRM(queues_info) },
+ { "bufs", DRM(bufs_info) },
+#if DRM_DEBUG_CODE
+ { "vma", DRM(vma_info) },
+#endif
+#if __HAVE_DMA_HISTOGRAM
+ { "histo", DRM(histo_info) },
+#endif
+};
+#define DRM_PROC_ENTRIES (sizeof(DRM(proc_list))/sizeof(DRM(proc_list)[0]))
+
+struct proc_dir_entry *DRM(proc_init)(drm_device_t *dev, int minor,
+ struct proc_dir_entry *root,
+ struct proc_dir_entry **dev_root)
+{
+ struct proc_dir_entry *ent;
+ int i, j;
+ char name[64];
+
+ if (!minor) root = create_proc_entry("dri", S_IFDIR, NULL);
+ if (!root) {
+ DRM_ERROR("Cannot create /proc/dri\n");
+ return NULL;
+ }
+
+ sprintf(name, "%d", minor);
+ *dev_root = create_proc_entry(name, S_IFDIR, root);
+ if (!*dev_root) {
+ DRM_ERROR("Cannot create /proc/%s\n", name);
+ return NULL;
+ }
+
+ for (i = 0; i < DRM_PROC_ENTRIES; i++) {
+ ent = create_proc_entry(DRM(proc_list)[i].name,
+ S_IFREG|S_IRUGO, *dev_root);
+ if (!ent) {
+ DRM_ERROR("Cannot create /proc/dri/%s/%s\n",
+ name, DRM(proc_list)[i].name);
+ for (j = 0; j < i; j++)
+ remove_proc_entry(DRM(proc_list)[i].name,
+ *dev_root);
+ remove_proc_entry(name, root);
+ if (!minor) remove_proc_entry("dri", NULL);
+ return NULL;
+ }
+ ent->read_proc = DRM(proc_list)[i].f;
+ ent->data = dev;
+ }
+
+ return root;
+}
+
+
+int DRM(proc_cleanup)(int minor, struct proc_dir_entry *root,
+ struct proc_dir_entry *dev_root)
+{
+ int i;
+ char name[64];
+
+ if (!root || !dev_root) return 0;
+
+ for (i = 0; i < DRM_PROC_ENTRIES; i++)
+ remove_proc_entry(DRM(proc_list)[i].name, dev_root);
+ sprintf(name, "%d", minor);
+ remove_proc_entry(name, root);
+ if (!minor) remove_proc_entry("dri", NULL);
+
+ return 0;
+}
+
+static int DRM(name_info)(char *buf, char **start, off_t offset, int request,
+ int *eof, void *data)
+{
+ drm_device_t *dev = (drm_device_t *)data;
+ int len = 0;
+
+ if (offset > DRM_PROC_LIMIT) {
+ *eof = 1;
+ return 0;
+ }
+
+ *start = &buf[offset];
+ *eof = 0;
+
+ if (dev->unique) {
+ DRM_PROC_PRINT("%s 0x%x %s\n",
+ dev->name, dev->device, dev->unique);
+ } else {
+ DRM_PROC_PRINT("%s 0x%x\n", dev->name, dev->device);
+ }
+
+ if (len > request + offset) return request;
+ *eof = 1;
+ return len - offset;
+}
+
+static int DRM(_vm_info)(char *buf, char **start, off_t offset, int request,
+ int *eof, void *data)
+{
+ drm_device_t *dev = (drm_device_t *)data;
+ int len = 0;
+ drm_map_t *map;
+ drm_map_list_t *r_list;
+ struct list_head *list;
+
+ /* Hardcoded from _DRM_FRAME_BUFFER,
+ _DRM_REGISTERS, _DRM_SHM, and
+ _DRM_AGP. */
+ const char *types[] = { "FB", "REG", "SHM", "AGP" };
+ const char *type;
+ int i;
+
+ if (offset > DRM_PROC_LIMIT) {
+ *eof = 1;
+ return 0;
+ }
+
+ *start = &buf[offset];
+ *eof = 0;
+
+ DRM_PROC_PRINT("slot offset size type flags "
+ "address mtrr\n\n");
+ i = 0;
+ list_for_each(list, &dev->maplist->head) {
+ r_list = (drm_map_list_t *)list;
+ map = r_list->map;
+ if(!map) continue;
+ if (map->type < 0 || map->type > 3) type = "??";
+ else type = types[map->type];
+ DRM_PROC_PRINT("%4d 0x%08lx 0x%08lx %4.4s 0x%02x 0x%08lx ",
+ i,
+ map->offset,
+ map->size,
+ type,
+ map->flags,
+ (unsigned long)map->handle);
+ if (map->mtrr < 0) {
+ DRM_PROC_PRINT("none\n");
+ } else {
+ DRM_PROC_PRINT("%4d\n", map->mtrr);
+ }
+ i++;
+ }
+
+ if (len > request + offset) return request;
+ *eof = 1;
+ return len - offset;
+}
+
+static int DRM(vm_info)(char *buf, char **start, off_t offset, int request,
+ int *eof, void *data)
+{
+ drm_device_t *dev = (drm_device_t *)data;
+ int ret;
+
+ down(&dev->struct_sem);
+ ret = DRM(_vm_info)(buf, start, offset, request, eof, data);
+ up(&dev->struct_sem);
+ return ret;
+}
+
+
+static int DRM(_queues_info)(char *buf, char **start, off_t offset,
+ int request, int *eof, void *data)
+{
+ drm_device_t *dev = (drm_device_t *)data;
+ int len = 0;
+ int i;
+ drm_queue_t *q;
+
+ if (offset > DRM_PROC_LIMIT) {
+ *eof = 1;
+ return 0;
+ }
+
+ *start = &buf[offset];
+ *eof = 0;
+
+ DRM_PROC_PRINT(" ctx/flags use fin"
+ " blk/rw/rwf wait flushed queued"
+ " locks\n\n");
+ for (i = 0; i < dev->queue_count; i++) {
+ q = dev->queuelist[i];
+ atomic_inc(&q->use_count);
+ DRM_PROC_PRINT_RET(atomic_dec(&q->use_count),
+ "%5d/0x%03x %5d %5d"
+ " %5d/%c%c/%c%c%c %5Zd\n",
+ i,
+ q->flags,
+ atomic_read(&q->use_count),
+ atomic_read(&q->finalization),
+ atomic_read(&q->block_count),
+ atomic_read(&q->block_read) ? 'r' : '-',
+ atomic_read(&q->block_write) ? 'w' : '-',
+ waitqueue_active(&q->read_queue) ? 'r':'-',
+ waitqueue_active(&q->write_queue) ? 'w':'-',
+ waitqueue_active(&q->flush_queue) ? 'f':'-',
+ DRM_BUFCOUNT(&q->waitlist));
+ atomic_dec(&q->use_count);
+ }
+
+ if (len > request + offset) return request;
+ *eof = 1;
+ return len - offset;
+}
+
+static int DRM(queues_info)(char *buf, char **start, off_t offset, int request,
+ int *eof, void *data)
+{
+ drm_device_t *dev = (drm_device_t *)data;
+ int ret;
+
+ down(&dev->struct_sem);
+ ret = DRM(_queues_info)(buf, start, offset, request, eof, data);
+ up(&dev->struct_sem);
+ return ret;
+}
+
+/* drm_bufs_info is called whenever a process reads
+ /dev/dri/<dev>/bufs. */
+
+static int DRM(_bufs_info)(char *buf, char **start, off_t offset, int request,
+ int *eof, void *data)
+{
+ drm_device_t *dev = (drm_device_t *)data;
+ int len = 0;
+ drm_device_dma_t *dma = dev->dma;
+ int i;
+
+ if (!dma || offset > DRM_PROC_LIMIT) {
+ *eof = 1;
+ return 0;
+ }
+
+ *start = &buf[offset];
+ *eof = 0;
+
+ DRM_PROC_PRINT(" o size count free segs pages kB\n\n");
+ for (i = 0; i <= DRM_MAX_ORDER; i++) {
+ if (dma->bufs[i].buf_count)
+ DRM_PROC_PRINT("%2d %8d %5d %5d %5d %5d %5ld\n",
+ i,
+ dma->bufs[i].buf_size,
+ dma->bufs[i].buf_count,
+ atomic_read(&dma->bufs[i]
+ .freelist.count),
+ dma->bufs[i].seg_count,
+ dma->bufs[i].seg_count
+ *(1 << dma->bufs[i].page_order),
+ (dma->bufs[i].seg_count
+ * (1 << dma->bufs[i].page_order))
+ * PAGE_SIZE / 1024);
+ }
+ DRM_PROC_PRINT("\n");
+ for (i = 0; i < dma->buf_count; i++) {
+ if (i && !(i%32)) DRM_PROC_PRINT("\n");
+ DRM_PROC_PRINT(" %d", dma->buflist[i]->list);
+ }
+ DRM_PROC_PRINT("\n");
+
+ if (len > request + offset) return request;
+ *eof = 1;
+ return len - offset;
+}
+
+static int DRM(bufs_info)(char *buf, char **start, off_t offset, int request,
+ int *eof, void *data)
+{
+ drm_device_t *dev = (drm_device_t *)data;
+ int ret;
+
+ down(&dev->struct_sem);
+ ret = DRM(_bufs_info)(buf, start, offset, request, eof, data);
+ up(&dev->struct_sem);
+ return ret;
+}
+
+
+static int DRM(_clients_info)(char *buf, char **start, off_t offset,
+ int request, int *eof, void *data)
+{
+ drm_device_t *dev = (drm_device_t *)data;
+ int len = 0;
+ drm_file_t *priv;
+
+ if (offset > DRM_PROC_LIMIT) {
+ *eof = 1;
+ return 0;
+ }
+
+ *start = &buf[offset];
+ *eof = 0;
+
+ DRM_PROC_PRINT("a dev pid uid magic ioctls\n\n");
+ for (priv = dev->file_first; priv; priv = priv->next) {
+ DRM_PROC_PRINT("%c %3d %5d %5d %10u %10lu\n",
+ priv->authenticated ? 'y' : 'n',
+ priv->minor,
+ priv->pid,
+ priv->uid,
+ priv->magic,
+ priv->ioctl_count);
+ }
+
+ if (len > request + offset) return request;
+ *eof = 1;
+ return len - offset;
+}
+
+static int DRM(clients_info)(char *buf, char **start, off_t offset,
+ int request, int *eof, void *data)
+{
+ drm_device_t *dev = (drm_device_t *)data;
+ int ret;
+
+ down(&dev->struct_sem);
+ ret = DRM(_clients_info)(buf, start, offset, request, eof, data);
+ up(&dev->struct_sem);
+ return ret;
+}
+
+#if DRM_DEBUG_CODE
+
+#define DRM_VMA_VERBOSE 0
+
+static int DRM(_vma_info)(char *buf, char **start, off_t offset, int request,
+ int *eof, void *data)
+{
+ drm_device_t *dev = (drm_device_t *)data;
+ int len = 0;
+ drm_vma_entry_t *pt;
+ struct vm_area_struct *vma;
+#if DRM_VMA_VERBOSE
+ unsigned long i;
+ unsigned long address;
+ pgd_t *pgd;
+ pmd_t *pmd;
+ pte_t *pte;
+#endif
+#if defined(__i386__)
+ unsigned int pgprot;
+#endif
+
+ if (offset > DRM_PROC_LIMIT) {
+ *eof = 1;
+ return 0;
+ }
+
+ *start = &buf[offset];
+ *eof = 0;
+
+ DRM_PROC_PRINT("vma use count: %d, high_memory = %p, 0x%08lx\n",
+ atomic_read(&dev->vma_count),
+ high_memory, virt_to_phys(high_memory));
+ for (pt = dev->vmalist; pt; pt = pt->next) {
+ if (!(vma = pt->vma)) continue;
+ DRM_PROC_PRINT("\n%5d 0x%08lx-0x%08lx %c%c%c%c%c%c 0x%08lx",
+ pt->pid,
+ vma->vm_start,
+ vma->vm_end,
+ vma->vm_flags & VM_READ ? 'r' : '-',
+ vma->vm_flags & VM_WRITE ? 'w' : '-',
+ vma->vm_flags & VM_EXEC ? 'x' : '-',
+ vma->vm_flags & VM_MAYSHARE ? 's' : 'p',
+ vma->vm_flags & VM_LOCKED ? 'l' : '-',
+ vma->vm_flags & VM_IO ? 'i' : '-',
+ VM_OFFSET(vma));
+
+#if defined(__i386__)
+ pgprot = pgprot_val(vma->vm_page_prot);
+ DRM_PROC_PRINT(" %c%c%c%c%c%c%c%c%c",
+ pgprot & _PAGE_PRESENT ? 'p' : '-',
+ pgprot & _PAGE_RW ? 'w' : 'r',
+ pgprot & _PAGE_USER ? 'u' : 's',
+ pgprot & _PAGE_PWT ? 't' : 'b',
+ pgprot & _PAGE_PCD ? 'u' : 'c',
+ pgprot & _PAGE_ACCESSED ? 'a' : '-',
+ pgprot & _PAGE_DIRTY ? 'd' : '-',
+ pgprot & _PAGE_PSE ? 'm' : 'k',
+ pgprot & _PAGE_GLOBAL ? 'g' : 'l' );
+#endif
+ DRM_PROC_PRINT("\n");
+#if 0
+ for (i = vma->vm_start; i < vma->vm_end; i += PAGE_SIZE) {
+ pgd = pgd_offset(vma->vm_mm, i);
+ pmd = pmd_offset(pgd, i);
+ pte = pte_offset(pmd, i);
+ if (pte_present(*pte)) {
+ address = __pa(pte_page(*pte))
+ + (i & (PAGE_SIZE-1));
+ DRM_PROC_PRINT(" 0x%08lx -> 0x%08lx"
+ " %c%c%c%c%c\n",
+ i,
+ address,
+ pte_read(*pte) ? 'r' : '-',
+ pte_write(*pte) ? 'w' : '-',
+ pte_exec(*pte) ? 'x' : '-',
+ pte_dirty(*pte) ? 'd' : '-',
+ pte_young(*pte) ? 'a' : '-' );
+ } else {
+ DRM_PROC_PRINT(" 0x%08lx\n", i);
+ }
+ }
+#endif
+ }
+
+ if (len > request + offset) return request;
+ *eof = 1;
+ return len - offset;
+}
+
+static int DRM(vma_info)(char *buf, char **start, off_t offset, int request,
+ int *eof, void *data)
+{
+ drm_device_t *dev = (drm_device_t *)data;
+ int ret;
+
+ down(&dev->struct_sem);
+ ret = DRM(_vma_info)(buf, start, offset, request, eof, data);
+ up(&dev->struct_sem);
+ return ret;
+}
+#endif
+
+
+#if __HAVE_DMA_HISTOGRAM
+static int DRM(_histo_info)(char *buf, char **start, off_t offset, int request,
+ int *eof, void *data)
+{
+ drm_device_t *dev = (drm_device_t *)data;
+ int len = 0;
+ drm_device_dma_t *dma = dev->dma;
+ int i;
+ unsigned long slot_value = DRM_DMA_HISTOGRAM_INITIAL;
+ unsigned long prev_value = 0;
+ drm_buf_t *buffer;
+
+ if (offset > DRM_PROC_LIMIT) {
+ *eof = 1;
+ return 0;
+ }
+
+ *start = &buf[offset];
+ *eof = 0;
+
+ DRM_PROC_PRINT("general statistics:\n");
+ DRM_PROC_PRINT("total %10u\n", atomic_read(&dev->histo.total));
+ DRM_PROC_PRINT("open %10u\n",
+ atomic_read(&dev->counts[_DRM_STAT_OPENS]));
+ DRM_PROC_PRINT("close %10u\n",
+ atomic_read(&dev->counts[_DRM_STAT_CLOSES]));
+ DRM_PROC_PRINT("ioctl %10u\n",
+ atomic_read(&dev->counts[_DRM_STAT_IOCTLS]));
+
+ DRM_PROC_PRINT("\nlock statistics:\n");
+ DRM_PROC_PRINT("locks %10u\n",
+ atomic_read(&dev->counts[_DRM_STAT_LOCKS]));
+ DRM_PROC_PRINT("unlocks %10u\n",
+ atomic_read(&dev->counts[_DRM_STAT_UNLOCKS]));
+
+ if (dma) {
+#if 0
+ DRM_PROC_PRINT("\ndma statistics:\n");
+ DRM_PROC_PRINT("prio %10u\n",
+ atomic_read(&dma->total_prio));
+ DRM_PROC_PRINT("bytes %10u\n",
+ atomic_read(&dma->total_bytes));
+ DRM_PROC_PRINT("dmas %10u\n",
+ atomic_read(&dma->total_dmas));
+ DRM_PROC_PRINT("missed:\n");
+ DRM_PROC_PRINT(" dma %10u\n",
+ atomic_read(&dma->total_missed_dma));
+ DRM_PROC_PRINT(" lock %10u\n",
+ atomic_read(&dma->total_missed_lock));
+ DRM_PROC_PRINT(" free %10u\n",
+ atomic_read(&dma->total_missed_free));
+ DRM_PROC_PRINT(" sched %10u\n",
+ atomic_read(&dma->total_missed_sched));
+ DRM_PROC_PRINT("tried %10u\n",
+ atomic_read(&dma->total_tried));
+ DRM_PROC_PRINT("hit %10u\n",
+ atomic_read(&dma->total_hit));
+ DRM_PROC_PRINT("lost %10u\n",
+ atomic_read(&dma->total_lost));
+#endif
+
+ buffer = dma->next_buffer;
+ if (buffer) {
+ DRM_PROC_PRINT("next_buffer %7d\n", buffer->idx);
+ } else {
+ DRM_PROC_PRINT("next_buffer none\n");
+ }
+ buffer = dma->this_buffer;
+ if (buffer) {
+ DRM_PROC_PRINT("this_buffer %7d\n", buffer->idx);
+ } else {
+ DRM_PROC_PRINT("this_buffer none\n");
+ }
+ }
+
+
+ DRM_PROC_PRINT("\nvalues:\n");
+ if (dev->lock.hw_lock) {
+ DRM_PROC_PRINT("lock 0x%08x\n",
+ dev->lock.hw_lock->lock);
+ } else {
+ DRM_PROC_PRINT("lock none\n");
+ }
+ DRM_PROC_PRINT("context_flag 0x%08lx\n", dev->context_flag);
+ DRM_PROC_PRINT("interrupt_flag 0x%08lx\n", dev->interrupt_flag);
+ DRM_PROC_PRINT("dma_flag 0x%08lx\n", dev->dma_flag);
+
+ DRM_PROC_PRINT("queue_count %10d\n", dev->queue_count);
+ DRM_PROC_PRINT("last_context %10d\n", dev->last_context);
+ DRM_PROC_PRINT("last_switch %10lu\n", dev->last_switch);
+ DRM_PROC_PRINT("last_checked %10d\n", dev->last_checked);
+
+
+ DRM_PROC_PRINT("\n q2d d2c c2f"
+ " q2c q2f dma sch"
+ " ctx lacq lhld\n\n");
+ for (i = 0; i < DRM_DMA_HISTOGRAM_SLOTS; i++) {
+ DRM_PROC_PRINT("%s %10lu %10u %10u %10u %10u %10u"
+ " %10u %10u %10u %10u %10u\n",
+ i == DRM_DMA_HISTOGRAM_SLOTS - 1 ? ">=" : "< ",
+ i == DRM_DMA_HISTOGRAM_SLOTS - 1
+ ? prev_value : slot_value ,
+
+ atomic_read(&dev->histo
+ .queued_to_dispatched[i]),
+ atomic_read(&dev->histo
+ .dispatched_to_completed[i]),
+ atomic_read(&dev->histo
+ .completed_to_freed[i]),
+
+ atomic_read(&dev->histo
+ .queued_to_completed[i]),
+ atomic_read(&dev->histo
+ .queued_to_freed[i]),
+ atomic_read(&dev->histo.dma[i]),
+ atomic_read(&dev->histo.schedule[i]),
+ atomic_read(&dev->histo.ctx[i]),
+ atomic_read(&dev->histo.lacq[i]),
+ atomic_read(&dev->histo.lhld[i]));
+ prev_value = slot_value;
+ slot_value = DRM_DMA_HISTOGRAM_NEXT(slot_value);
+ }
+
+ if (len > request + offset) return request;
+ *eof = 1;
+ return len - offset;
+}
+
+static int DRM(histo_info)(char *buf, char **start, off_t offset, int request,
+ int *eof, void *data)
+{
+ drm_device_t *dev = (drm_device_t *)data;
+ int ret;
+
+ down(&dev->struct_sem);
+ ret = DRM(_histo_info)(buf, start, offset, request, eof, data);
+ up(&dev->struct_sem);
+ return ret;
+}
+#endif
diff --git a/linux-core/drm_stub.c b/linux-core/drm_stub.c
new file mode 100644
index 00000000..bc958796
--- /dev/null
+++ b/linux-core/drm_stub.c
@@ -0,0 +1,152 @@
+/* drm_stub.h -- -*- linux-c -*-
+ * Created: Fri Jan 19 10:48:35 2001 by faith@acm.org
+ *
+ * Copyright 2001 VA Linux Systems, Inc., Sunnyvale, California.
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ *
+ * Authors:
+ * Rickard E. (Rik) Faith <faith@valinux.com>
+ *
+ */
+
+#define __NO_VERSION__
+#include "drmP.h"
+
+#if LINUX_VERSION_CODE < 0x020400
+#include "stubsupport-pre24.h"
+#endif
+
+#define DRM_STUB_MAXCARDS 16 /* Enough for one machine */
+
+static struct drm_stub_list {
+ const char *name;
+ struct file_operations *fops;
+ struct proc_dir_entry *dev_root;
+} *DRM(stub_list);
+
+static struct proc_dir_entry *DRM(stub_root);
+
+static struct drm_stub_info {
+ int (*info_register)(const char *name, struct file_operations *fops,
+ drm_device_t *dev);
+ int (*info_unregister)(int minor);
+} DRM(stub_info);
+
+static int DRM(stub_open)(struct inode *inode, struct file *filp)
+{
+ int minor = MINOR(inode->i_rdev);
+ int err = -ENODEV;
+ struct file_operations *old_fops;
+
+ if (!DRM(stub_list) || !DRM(stub_list)[minor].fops) return -ENODEV;
+ old_fops = filp->f_op;
+ filp->f_op = fops_get(DRM(stub_list)[minor].fops);
+ if (filp->f_op->open && (err = filp->f_op->open(inode, filp))) {
+ fops_put(filp->f_op);
+ filp->f_op = fops_get(old_fops);
+ }
+ fops_put(old_fops);
+
+ return err;
+}
+
+static struct file_operations DRM(stub_fops) = {
+#if LINUX_VERSION_CODE >= 0x020400
+ owner: THIS_MODULE,
+#endif
+ open: DRM(stub_open)
+};
+
+static int DRM(stub_getminor)(const char *name, struct file_operations *fops,
+ drm_device_t *dev)
+{
+ int i;
+
+ if (!DRM(stub_list)) {
+ DRM(stub_list) = DRM(alloc)(sizeof(*DRM(stub_list))
+ * DRM_STUB_MAXCARDS, DRM_MEM_STUB);
+ for (i = 0; i < DRM_STUB_MAXCARDS; i++) {
+ DRM(stub_list)[i].name = NULL;
+ DRM(stub_list)[i].fops = NULL;
+ }
+ }
+ for (i = 0; i < DRM_STUB_MAXCARDS; i++) {
+ if (!DRM(stub_list)[i].fops) {
+ DRM(stub_list)[i].name = name;
+ DRM(stub_list)[i].fops = fops;
+ DRM(stub_root) = DRM(proc_init)(dev, i, DRM(stub_root),
+ &DRM(stub_list)[i]
+ .dev_root);
+ return i;
+ }
+ }
+ return -1;
+}
+
+static int DRM(stub_putminor)(int minor)
+{
+ if (minor < 0 || minor >= DRM_STUB_MAXCARDS) return -1;
+ DRM(stub_list)[minor].name = NULL;
+ DRM(stub_list)[minor].fops = NULL;
+ DRM(proc_cleanup)(minor, DRM(stub_root),
+ DRM(stub_list)[minor].dev_root);
+ if (minor) {
+ inter_module_put("drm");
+ } else {
+ inter_module_unregister("drm");
+ DRM(free)(DRM(stub_list),
+ sizeof(*DRM(stub_list)) * DRM_STUB_MAXCARDS,
+ DRM_MEM_STUB);
+ unregister_chrdev(DRM_MAJOR, "drm");
+ }
+ return 0;
+}
+
+int DRM(stub_register)(const char *name, struct file_operations *fops,
+ drm_device_t *dev)
+{
+ struct drm_stub_info *i = NULL;
+
+ if (register_chrdev(DRM_MAJOR, "drm", &DRM(stub_fops)))
+ i = (struct drm_stub_info *)inter_module_get("drm");
+
+ if (i) {
+ /* Already registered */
+ DRM(stub_info).info_register = i->info_register;
+ DRM(stub_info).info_unregister = i->info_unregister;
+ } else {
+ DRM(stub_info).info_register = DRM(stub_getminor);
+ DRM(stub_info).info_unregister = DRM(stub_putminor);
+ inter_module_register("drm", THIS_MODULE, &DRM(stub_info));
+ }
+ if (DRM(stub_info).info_register)
+ return DRM(stub_info).info_register(name, fops, dev);
+ return -1;
+}
+
+int DRM(stub_unregister)(int minor)
+{
+ DRM_DEBUG("%d\n", minor);
+ if (DRM(stub_info).info_unregister)
+ return DRM(stub_info).info_unregister(minor);
+ return -1;
+}
diff --git a/linux-core/i810_dma.c b/linux-core/i810_dma.c
index aa824a79..4c90496a 100644
--- a/linux-core/i810_dma.c
+++ b/linux-core/i810_dma.c
@@ -11,11 +11,11 @@
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
- *
+ *
* The above copyright notice and this permission notice (including the next
* paragraph) shall be included in all copies or substantial portions of the
* Software.
- *
+ *
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
@@ -31,6 +31,7 @@
*/
#define __NO_VERSION__
+#include "i810.h"
#include "drmP.h"
#include "i810_drv.h"
#include <linux/interrupt.h> /* For task queue support */
@@ -47,17 +48,6 @@
#define I810_BUF_UNMAPPED 0
#define I810_BUF_MAPPED 1
-#define I810_REG(reg) 2
-#define I810_BASE(reg) ((unsigned long) \
- dev->maplist[I810_REG(reg)]->handle)
-#define I810_ADDR(reg) (I810_BASE(reg) + reg)
-#define I810_DEREF(reg) *(__volatile__ int *)I810_ADDR(reg)
-#define I810_READ(reg) I810_DEREF(reg)
-#define I810_WRITE(reg,val) do { I810_DEREF(reg) = val; } while (0)
-#define I810_DEREF16(reg) *(__volatile__ u16 *)I810_ADDR(reg)
-#define I810_READ16(reg) I810_DEREF16(reg)
-#define I810_WRITE16(reg,val) do { I810_DEREF16(reg) = val; } while (0)
-
#define RING_LOCALS unsigned int outring, ringmask; volatile char *virt;
#define BEGIN_LP_RING(n) do { \
@@ -107,14 +97,14 @@ static drm_buf_t *i810_freelist_get(drm_device_t *dev)
drm_device_dma_t *dma = dev->dma;
int i;
int used;
-
+
/* Linear search might not be the best solution */
for (i = 0; i < dma->buf_count; i++) {
drm_buf_t *buf = dma->buflist[ i ];
drm_i810_buf_priv_t *buf_priv = buf->dev_private;
/* In use is already a pointer */
- used = cmpxchg(buf_priv->in_use, I810_BUF_FREE,
+ used = cmpxchg(buf_priv->in_use, I810_BUF_FREE,
I810_BUF_CLIENT);
if(used == I810_BUF_FREE) {
return buf;
@@ -131,26 +121,26 @@ static int i810_freelist_put(drm_device_t *dev, drm_buf_t *buf)
{
drm_i810_buf_priv_t *buf_priv = buf->dev_private;
int used;
-
+
/* In use is already a pointer */
used = cmpxchg(buf_priv->in_use, I810_BUF_CLIENT, I810_BUF_FREE);
if(used != I810_BUF_CLIENT) {
DRM_ERROR("Freeing buffer thats not in use : %d\n", buf->idx);
return -EINVAL;
}
-
+
return 0;
}
static struct file_operations i810_buffer_fops = {
- open: i810_open,
- flush: drm_flush,
- release: i810_release,
- ioctl: i810_ioctl,
+ open: DRM(open),
+ flush: DRM(flush),
+ release: DRM(release),
+ ioctl: DRM(ioctl),
mmap: i810_mmap_buffers,
- read: drm_read,
- fasync: drm_fasync,
- poll: drm_poll,
+ read: DRM(read),
+ fasync: DRM(fasync),
+ poll: DRM(poll),
};
int i810_mmap_buffers(struct file *filp, struct vm_area_struct *vma)
@@ -166,10 +156,10 @@ int i810_mmap_buffers(struct file *filp, struct vm_area_struct *vma)
dev_priv = dev->dev_private;
buf = dev_priv->mmap_buffer;
buf_priv = buf->dev_private;
-
+
vma->vm_flags |= (VM_IO | VM_DONTCOPY);
vma->vm_file = filp;
-
+
buf_priv->currently_mapped = I810_BUF_MAPPED;
unlock_kernel();
@@ -196,9 +186,9 @@ static int i810_map_buffer(drm_buf_t *buf, struct file *filp)
old_fops = filp->f_op;
filp->f_op = &i810_buffer_fops;
dev_priv->mmap_buffer = buf;
- buf_priv->virtual = (void *)do_mmap(filp, 0, buf->total,
+ buf_priv->virtual = (void *)do_mmap(filp, 0, buf->total,
PROT_READ|PROT_WRITE,
- MAP_SHARED,
+ MAP_SHARED,
buf->bus_address);
dev_priv->mmap_buffer = NULL;
filp->f_op = old_fops;
@@ -222,15 +212,15 @@ static int i810_unmap_buffer(drm_buf_t *buf)
int retcode = 0;
if(VM_DONTCOPY != 0) {
- if(buf_priv->currently_mapped != I810_BUF_MAPPED)
+ if(buf_priv->currently_mapped != I810_BUF_MAPPED)
return -EINVAL;
down(&current->mm->mmap_sem);
#if LINUX_VERSION_CODE < 0x020399
- retcode = do_munmap((unsigned long)buf_priv->virtual,
+ retcode = do_munmap((unsigned long)buf_priv->virtual,
(size_t) buf->total);
#else
- retcode = do_munmap(current->mm,
- (unsigned long)buf_priv->virtual,
+ retcode = do_munmap(current->mm,
+ (unsigned long)buf_priv->virtual,
(size_t) buf->total);
#endif
up(&current->mm->mmap_sem);
@@ -241,7 +231,7 @@ static int i810_unmap_buffer(drm_buf_t *buf)
return retcode;
}
-static int i810_dma_get_buffer(drm_device_t *dev, drm_i810_dma_t *d,
+static int i810_dma_get_buffer(drm_device_t *dev, drm_i810_dma_t *d,
struct file *filp)
{
drm_file_t *priv = filp->private_data;
@@ -255,7 +245,7 @@ static int i810_dma_get_buffer(drm_device_t *dev, drm_i810_dma_t *d,
DRM_DEBUG("retcode=%d\n", retcode);
return retcode;
}
-
+
retcode = i810_map_buffer(buf, filp);
if(retcode) {
i810_freelist_put(dev, buf);
@@ -263,7 +253,7 @@ static int i810_dma_get_buffer(drm_device_t *dev, drm_i810_dma_t *d,
return retcode;
}
buf->pid = priv->pid;
- buf_priv = buf->dev_private;
+ buf_priv = buf->dev_private;
d->granted = 1;
d->request_idx = buf->idx;
d->request_size = buf->total;
@@ -275,22 +265,22 @@ static int i810_dma_get_buffer(drm_device_t *dev, drm_i810_dma_t *d,
static unsigned long i810_alloc_page(drm_device_t *dev)
{
unsigned long address;
-
+
address = __get_free_page(GFP_KERNEL);
- if(address == 0UL)
+ if(address == 0UL)
return 0;
-
+
atomic_inc(&virt_to_page(address)->count);
set_bit(PG_locked, &virt_to_page(address)->flags);
-
+
return address;
}
static void i810_free_page(drm_device_t *dev, unsigned long page)
{
- if(page == 0UL)
+ if(page == 0UL)
return;
-
+
atomic_dec(&virt_to_page(page)->count);
clear_bit(PG_locked, &virt_to_page(page)->flags);
wake_up(&virt_to_page(page)->wait);
@@ -304,26 +294,26 @@ static int i810_dma_cleanup(drm_device_t *dev)
if(dev->dev_private) {
int i;
- drm_i810_private_t *dev_priv =
+ drm_i810_private_t *dev_priv =
(drm_i810_private_t *) dev->dev_private;
-
+
if(dev_priv->ring.virtual_start) {
- drm_ioremapfree((void *) dev_priv->ring.virtual_start,
- dev_priv->ring.Size);
+ DRM(ioremapfree)((void *) dev_priv->ring.virtual_start,
+ dev_priv->ring.Size);
}
if(dev_priv->hw_status_page != 0UL) {
i810_free_page(dev, dev_priv->hw_status_page);
/* Need to rewrite hardware status page */
I810_WRITE(0x02080, 0x1ffff000);
}
- drm_free(dev->dev_private, sizeof(drm_i810_private_t),
+ DRM(free)(dev->dev_private, sizeof(drm_i810_private_t),
DRM_MEM_DRIVER);
dev->dev_private = NULL;
for (i = 0; i < dma->buf_count; i++) {
drm_buf_t *buf = dma->buflist[ i ];
drm_i810_buf_priv_t *buf_priv = buf->dev_private;
- drm_ioremapfree(buf_priv->kernel_virtual, buf->total);
+ DRM(ioremapfree)(buf_priv->kernel_virtual, buf->total);
}
}
return 0;
@@ -340,14 +330,14 @@ static int i810_wait_ring(drm_device_t *dev, int n)
end = jiffies + (HZ*3);
while (ring->space < n) {
int i;
-
+
ring->head = I810_READ(LP_RING + RING_HEAD) & HEAD_ADDR;
ring->space = ring->head - (ring->tail+8);
if (ring->space < 0) ring->space += ring->Size;
-
+
if (ring->head != last_head)
end = jiffies + (HZ*3);
-
+
iters++;
if((signed)(end - jiffies) <= 0) {
DRM_ERROR("space: %d wanted %d\n", ring->space, n);
@@ -358,7 +348,7 @@ static int i810_wait_ring(drm_device_t *dev, int n)
for (i = 0 ; i < 2000 ; i++) ;
}
-out_wait_ring:
+out_wait_ring:
return iters;
}
@@ -366,7 +356,7 @@ static void i810_kernel_lost_context(drm_device_t *dev)
{
drm_i810_private_t *dev_priv = dev->dev_private;
drm_i810_ring_buffer_t *ring = &(dev_priv->ring);
-
+
ring->head = I810_READ(LP_RING + RING_HEAD) & HEAD_ADDR;
ring->tail = I810_READ(LP_RING + RING_TAIL);
ring->space = ring->head - (ring->tail+8);
@@ -380,7 +370,7 @@ static int i810_freelist_init(drm_device_t *dev)
int my_idx = 24;
u32 *hw_status = (u32 *)(dev_priv->hw_status_page + my_idx);
int i;
-
+
if(dma->buf_count > 1019) {
/* Not enough space in the status page for the freelist */
return -EINVAL;
@@ -389,55 +379,58 @@ static int i810_freelist_init(drm_device_t *dev)
for (i = 0; i < dma->buf_count; i++) {
drm_buf_t *buf = dma->buflist[ i ];
drm_i810_buf_priv_t *buf_priv = buf->dev_private;
-
+
buf_priv->in_use = hw_status++;
buf_priv->my_use_idx = my_idx;
my_idx += 4;
*buf_priv->in_use = I810_BUF_FREE;
- buf_priv->kernel_virtual = drm_ioremap(buf->bus_address,
- buf->total);
+ buf_priv->kernel_virtual = DRM(ioremap)(buf->bus_address,
+ buf->total);
}
return 0;
}
-static int i810_dma_initialize(drm_device_t *dev,
+static int i810_dma_initialize(drm_device_t *dev,
drm_i810_private_t *dev_priv,
drm_i810_init_t *init)
{
- drm_map_t *sarea_map;
+ struct list_head *list;
dev->dev_private = (void *) dev_priv;
memset(dev_priv, 0, sizeof(drm_i810_private_t));
- if (init->ring_map_idx >= dev->map_count ||
- init->buffer_map_idx >= dev->map_count) {
- i810_dma_cleanup(dev);
- DRM_ERROR("ring_map or buffer_map are invalid\n");
- return -EINVAL;
- }
-
- dev_priv->ring_map_idx = init->ring_map_idx;
- dev_priv->buffer_map_idx = init->buffer_map_idx;
- sarea_map = dev->maplist[0];
- dev_priv->sarea_priv = (drm_i810_sarea_t *)
- ((u8 *)sarea_map->handle +
+ list_for_each(list, &dev->maplist->head) {
+ drm_map_list_t *r_list = (drm_map_list_t *)list;
+ if( r_list->map &&
+ r_list->map->type == _DRM_SHM &&
+ r_list->map->flags & _DRM_CONTAINS_LOCK ) {
+ dev_priv->sarea_map = r_list->map;
+ break;
+ }
+ }
+
+ DRM_FIND_MAP( dev_priv->mmio_map, init->mmio_offset );
+ DRM_FIND_MAP( dev_priv->buffer_map, init->buffers_offset );
+
+ dev_priv->sarea_priv = (drm_i810_sarea_t *)
+ ((u8 *)dev_priv->sarea_map->handle +
init->sarea_priv_offset);
atomic_set(&dev_priv->flush_done, 0);
init_waitqueue_head(&dev_priv->flush_queue);
-
+
dev_priv->ring.Start = init->ring_start;
dev_priv->ring.End = init->ring_end;
dev_priv->ring.Size = init->ring_size;
- dev_priv->ring.virtual_start = drm_ioremap(dev->agp->base +
- init->ring_start,
- init->ring_size);
+ dev_priv->ring.virtual_start = DRM(ioremap)(dev->agp->base +
+ init->ring_start,
+ init->ring_size);
dev_priv->ring.tail_mask = dev_priv->ring.Size - 1;
-
+
if (dev_priv->ring.virtual_start == NULL) {
i810_dma_cleanup(dev);
DRM_ERROR("can not ioremap virtual address for"
@@ -454,8 +447,8 @@ static int i810_dma_initialize(drm_device_t *dev,
dev_priv->front_di1 = init->front_offset | init->pitch_bits;
dev_priv->back_di1 = init->back_offset | init->pitch_bits;
dev_priv->zi1 = init->depth_offset | init->pitch_bits;
-
-
+
+
/* Program Hardware Status Page */
dev_priv->hw_status_page = i810_alloc_page(dev);
memset((void *) dev_priv->hw_status_page, 0, PAGE_SIZE);
@@ -465,10 +458,10 @@ static int i810_dma_initialize(drm_device_t *dev,
return -ENOMEM;
}
DRM_DEBUG("hw status page @ %lx\n", dev_priv->hw_status_page);
-
+
I810_WRITE(0x02080, virt_to_bus((void *)dev_priv->hw_status_page));
DRM_DEBUG("Enabled hardware status page\n");
-
+
/* Now we need to init our freelist */
if(i810_freelist_init(dev) != 0) {
i810_dma_cleanup(dev);
@@ -487,13 +480,13 @@ int i810_dma_init(struct inode *inode, struct file *filp,
drm_i810_private_t *dev_priv;
drm_i810_init_t init;
int retcode = 0;
-
+
if (copy_from_user(&init, (drm_i810_init_t *)arg, sizeof(init)))
return -EFAULT;
-
+
switch(init.func) {
case I810_INIT_DMA:
- dev_priv = drm_alloc(sizeof(drm_i810_private_t),
+ dev_priv = DRM(alloc)(sizeof(drm_i810_private_t),
DRM_MEM_DRIVER);
if(dev_priv == NULL) return -ENOMEM;
retcode = i810_dma_initialize(dev, dev_priv, &init);
@@ -505,7 +498,7 @@ int i810_dma_init(struct inode *inode, struct file *filp,
retcode = -EINVAL;
break;
}
-
+
return retcode;
}
@@ -517,9 +510,9 @@ int i810_dma_init(struct inode *inode, struct file *filp,
* Use 'volatile' & local var tmp to force the emitted values to be
* identical to the verified ones.
*/
-static void i810EmitContextVerified( drm_device_t *dev,
- volatile unsigned int *code )
-{
+static void i810EmitContextVerified( drm_device_t *dev,
+ volatile unsigned int *code )
+{
drm_i810_private_t *dev_priv = dev->dev_private;
int i, j = 0;
unsigned int tmp;
@@ -537,22 +530,22 @@ static void i810EmitContextVerified( drm_device_t *dev,
tmp = code[i];
if ((tmp & (7<<29)) == (3<<29) &&
- (tmp & (0x1f<<24)) < (0x1d<<24))
+ (tmp & (0x1f<<24)) < (0x1d<<24))
{
- OUT_RING( tmp );
+ OUT_RING( tmp );
j++;
- }
+ }
}
- if (j & 1)
- OUT_RING( 0 );
+ if (j & 1)
+ OUT_RING( 0 );
ADVANCE_LP_RING();
}
-static void i810EmitTexVerified( drm_device_t *dev,
- volatile unsigned int *code )
-{
+static void i810EmitTexVerified( drm_device_t *dev,
+ volatile unsigned int *code )
+{
drm_i810_private_t *dev_priv = dev->dev_private;
int i, j = 0;
unsigned int tmp;
@@ -569,15 +562,15 @@ static void i810EmitTexVerified( drm_device_t *dev,
tmp = code[i];
if ((tmp & (7<<29)) == (3<<29) &&
- (tmp & (0x1f<<24)) < (0x1d<<24))
+ (tmp & (0x1f<<24)) < (0x1d<<24))
{
- OUT_RING( tmp );
+ OUT_RING( tmp );
j++;
}
- }
-
- if (j & 1)
- OUT_RING( 0 );
+ }
+
+ if (j & 1)
+ OUT_RING( 0 );
ADVANCE_LP_RING();
}
@@ -585,9 +578,9 @@ static void i810EmitTexVerified( drm_device_t *dev,
/* Need to do some additional checking when setting the dest buffer.
*/
-static void i810EmitDestVerified( drm_device_t *dev,
- volatile unsigned int *code )
-{
+static void i810EmitDestVerified( drm_device_t *dev,
+ volatile unsigned int *code )
+{
drm_i810_private_t *dev_priv = dev->dev_private;
unsigned int tmp;
RING_LOCALS;
@@ -651,9 +644,9 @@ static void i810EmitState( drm_device_t *dev )
-/* need to verify
+/* need to verify
*/
-static void i810_dma_dispatch_clear( drm_device_t *dev, int flags,
+static void i810_dma_dispatch_clear( drm_device_t *dev, int flags,
unsigned int clear_color,
unsigned int clear_zval )
{
@@ -684,10 +677,10 @@ static void i810_dma_dispatch_clear( drm_device_t *dev, int flags,
pbox->y2 > dev_priv->h)
continue;
- if ( flags & I810_FRONT ) {
+ if ( flags & I810_FRONT ) {
DRM_DEBUG("clear front\n");
- BEGIN_LP_RING( 6 );
- OUT_RING( BR00_BITBLT_CLIENT |
+ BEGIN_LP_RING( 6 );
+ OUT_RING( BR00_BITBLT_CLIENT |
BR00_OP_COLOR_BLT | 0x3 );
OUT_RING( BR13_SOLID_PATTERN | (0xF0 << 16) | pitch );
OUT_RING( (height << 16) | width );
@@ -699,8 +692,8 @@ static void i810_dma_dispatch_clear( drm_device_t *dev, int flags,
if ( flags & I810_BACK ) {
DRM_DEBUG("clear back\n");
- BEGIN_LP_RING( 6 );
- OUT_RING( BR00_BITBLT_CLIENT |
+ BEGIN_LP_RING( 6 );
+ OUT_RING( BR00_BITBLT_CLIENT |
BR00_OP_COLOR_BLT | 0x3 );
OUT_RING( BR13_SOLID_PATTERN | (0xF0 << 16) | pitch );
OUT_RING( (height << 16) | width );
@@ -712,8 +705,8 @@ static void i810_dma_dispatch_clear( drm_device_t *dev, int flags,
if ( flags & I810_DEPTH ) {
DRM_DEBUG("clear depth\n");
- BEGIN_LP_RING( 6 );
- OUT_RING( BR00_BITBLT_CLIENT |
+ BEGIN_LP_RING( 6 );
+ OUT_RING( BR00_BITBLT_CLIENT |
BR00_OP_COLOR_BLT | 0x3 );
OUT_RING( BR13_SOLID_PATTERN | (0xF0 << 16) | pitch );
OUT_RING( (height << 16) | width );
@@ -744,7 +737,7 @@ static void i810_dma_dispatch_swap( drm_device_t *dev )
if (nbox > I810_NR_SAREA_CLIPRECTS)
nbox = I810_NR_SAREA_CLIPRECTS;
- for (i = 0 ; i < nbox; i++, pbox++)
+ for (i = 0 ; i < nbox; i++, pbox++)
{
unsigned int w = pbox->x2 - pbox->x1;
unsigned int h = pbox->y2 - pbox->y1;
@@ -756,7 +749,7 @@ static void i810_dma_dispatch_swap( drm_device_t *dev )
pbox->x2 > dev_priv->w ||
pbox->y2 > dev_priv->h)
continue;
-
+
DRM_DEBUG("dispatch swap %d,%d-%d,%d!\n",
pbox[i].x1, pbox[i].y1,
pbox[i].x2, pbox[i].y2);
@@ -766,14 +759,14 @@ static void i810_dma_dispatch_swap( drm_device_t *dev )
OUT_RING( pitch | (0xCC << 16));
OUT_RING( (h << 16) | (w * cpp));
OUT_RING( dst );
- OUT_RING( pitch );
+ OUT_RING( pitch );
OUT_RING( start );
ADVANCE_LP_RING();
}
}
-static void i810_dma_dispatch_vertex(drm_device_t *dev,
+static void i810_dma_dispatch_vertex(drm_device_t *dev,
drm_buf_t *buf,
int discard,
int used)
@@ -784,30 +777,30 @@ static void i810_dma_dispatch_vertex(drm_device_t *dev,
drm_clip_rect_t *box = sarea_priv->boxes;
int nbox = sarea_priv->nbox;
unsigned long address = (unsigned long)buf->bus_address;
- unsigned long start = address - dev->agp->base;
+ unsigned long start = address - dev->agp->base;
int i = 0, u;
RING_LOCALS;
i810_kernel_lost_context(dev);
- if (nbox > I810_NR_SAREA_CLIPRECTS)
+ if (nbox > I810_NR_SAREA_CLIPRECTS)
nbox = I810_NR_SAREA_CLIPRECTS;
if (discard) {
- u = cmpxchg(buf_priv->in_use, I810_BUF_CLIENT,
+ u = cmpxchg(buf_priv->in_use, I810_BUF_CLIENT,
I810_BUF_HARDWARE);
if(u != I810_BUF_CLIENT) {
DRM_DEBUG("xxxx 2\n");
}
}
- if (used > 4*1024)
+ if (used > 4*1024)
used = 0;
if (sarea_priv->dirty)
i810EmitState( dev );
- DRM_DEBUG("dispatch vertex addr 0x%lx, used 0x%x nbox %d\n",
+ DRM_DEBUG("dispatch vertex addr 0x%lx, used 0x%x nbox %d\n",
address, used, nbox);
dev_priv->counter++;
@@ -821,7 +814,7 @@ static void i810_dma_dispatch_vertex(drm_device_t *dev,
*(u32 *)buf_priv->virtual = (GFX_OP_PRIMITIVE |
sarea_priv->vertex_prim |
((used/4)-2));
-
+
if (used & 4) {
*(u32 *)((u32)buf_priv->virtual + used) = 0;
used += 4;
@@ -829,26 +822,26 @@ static void i810_dma_dispatch_vertex(drm_device_t *dev,
i810_unmap_buffer(buf);
}
-
+
if (used) {
do {
if (i < nbox) {
BEGIN_LP_RING(4);
- OUT_RING( GFX_OP_SCISSOR | SC_UPDATE_SCISSOR |
+ OUT_RING( GFX_OP_SCISSOR | SC_UPDATE_SCISSOR |
SC_ENABLE );
OUT_RING( GFX_OP_SCISSOR_INFO );
OUT_RING( box[i].x1 | (box[i].y1<<16) );
OUT_RING( (box[i].x2-1) | ((box[i].y2-1)<<16) );
ADVANCE_LP_RING();
}
-
+
BEGIN_LP_RING(4);
OUT_RING( CMD_OP_BATCH_BUFFER );
OUT_RING( start | BB1_PROTECTED );
OUT_RING( start + used - 4 );
OUT_RING( 0 );
ADVANCE_LP_RING();
-
+
} while (++i < nbox);
}
@@ -872,24 +865,25 @@ static void i810_dma_dispatch_vertex(drm_device_t *dev,
/* Interrupts are only for flushing */
-static void i810_dma_service(int irq, void *device, struct pt_regs *regs)
+void i810_dma_service(int irq, void *device, struct pt_regs *regs)
{
drm_device_t *dev = (drm_device_t *)device;
+ drm_i810_private_t *dev_priv = (drm_i810_private_t *)dev->dev_private;
u16 temp;
-
- atomic_inc(&dev->total_irq);
+
+ atomic_inc(&dev->counts[_DRM_STAT_IRQ]);
temp = I810_READ16(I810REG_INT_IDENTITY_R);
temp = temp & ~(0x6000);
- if(temp != 0) I810_WRITE16(I810REG_INT_IDENTITY_R,
+ if(temp != 0) I810_WRITE16(I810REG_INT_IDENTITY_R,
temp); /* Clear all interrupts */
else
return;
-
+
queue_task(&dev->tq, &tq_immediate);
mark_bh(IMMEDIATE_BH);
}
-static void i810_dma_task_queue(void *device)
+void i810_dma_immediate_bh(void *device)
{
drm_device_t *dev = (drm_device_t *) device;
drm_i810_private_t *dev_priv = (drm_i810_private_t *)dev->dev_private;
@@ -898,129 +892,6 @@ static void i810_dma_task_queue(void *device)
wake_up_interruptible(&dev_priv->flush_queue);
}
-int i810_irq_install(drm_device_t *dev, int irq)
-{
- int retcode;
- u16 temp;
-
- if (!irq) return -EINVAL;
-
- down(&dev->struct_sem);
- if (dev->irq) {
- up(&dev->struct_sem);
- return -EBUSY;
- }
- dev->irq = irq;
- up(&dev->struct_sem);
-
- DRM_DEBUG( "Interrupt Install : %d\n", irq);
- DRM_DEBUG("%d\n", irq);
-
- dev->context_flag = 0;
- dev->interrupt_flag = 0;
- dev->dma_flag = 0;
-
- dev->dma->next_buffer = NULL;
- dev->dma->next_queue = NULL;
- dev->dma->this_buffer = NULL;
-
- INIT_LIST_HEAD(&dev->tq.list);
- dev->tq.sync = 0;
- dev->tq.routine = i810_dma_task_queue;
- dev->tq.data = dev;
-
- /* Before installing handler */
- temp = I810_READ16(I810REG_HWSTAM);
- temp = temp & 0x6000;
- I810_WRITE16(I810REG_HWSTAM, temp);
-
- temp = I810_READ16(I810REG_INT_MASK_R);
- temp = temp & 0x6000;
- I810_WRITE16(I810REG_INT_MASK_R, temp); /* Unmask interrupts */
- temp = I810_READ16(I810REG_INT_ENABLE_R);
- temp = temp & 0x6000;
- I810_WRITE16(I810REG_INT_ENABLE_R, temp); /* Disable all interrupts */
-
- /* Install handler */
- if ((retcode = request_irq(dev->irq,
- i810_dma_service,
- SA_SHIRQ,
- dev->devname,
- dev))) {
- down(&dev->struct_sem);
- dev->irq = 0;
- up(&dev->struct_sem);
- return retcode;
- }
- temp = I810_READ16(I810REG_INT_ENABLE_R);
- temp = temp & 0x6000;
- temp = temp | 0x0003;
- I810_WRITE16(I810REG_INT_ENABLE_R,
- temp); /* Enable bp & user interrupts */
- return 0;
-}
-
-int i810_irq_uninstall(drm_device_t *dev)
-{
- int irq;
- u16 temp;
-
-
-/* return 0; */
-
- down(&dev->struct_sem);
- irq = dev->irq;
- dev->irq = 0;
- up(&dev->struct_sem);
-
- if (!irq) return -EINVAL;
-
- DRM_DEBUG( "Interrupt UnInstall: %d\n", irq);
- DRM_DEBUG("%d\n", irq);
-
- temp = I810_READ16(I810REG_INT_IDENTITY_R);
- temp = temp & ~(0x6000);
- if(temp != 0) I810_WRITE16(I810REG_INT_IDENTITY_R,
- temp); /* Clear all interrupts */
-
- temp = I810_READ16(I810REG_INT_ENABLE_R);
- temp = temp & 0x6000;
- I810_WRITE16(I810REG_INT_ENABLE_R,
- temp); /* Disable all interrupts */
-
- free_irq(irq, dev);
-
- return 0;
-}
-
-int i810_control(struct inode *inode, struct file *filp, unsigned int cmd,
- unsigned long arg)
-{
- drm_file_t *priv = filp->private_data;
- drm_device_t *dev = priv->dev;
- drm_control_t ctl;
- int retcode;
-
- DRM_DEBUG( "i810_control\n");
-
- if (copy_from_user(&ctl, (drm_control_t *)arg, sizeof(ctl)))
- return -EFAULT;
-
- switch (ctl.func) {
- case DRM_INST_HANDLER:
- if ((retcode = i810_irq_install(dev, ctl.irq)))
- return retcode;
- break;
- case DRM_UNINST_HANDLER:
- if ((retcode = i810_irq_uninstall(dev)))
- return retcode;
- break;
- default:
- return -EINVAL;
- }
- return 0;
-}
-
static inline void i810_dma_emit_flush(drm_device_t *dev)
{
drm_i810_private_t *dev_priv = dev->dev_private;
@@ -1057,11 +928,11 @@ static inline void i810_dma_quiescent_emit(drm_device_t *dev)
/* wake_up_interruptible(&dev_priv->flush_queue); */
}
-static void i810_dma_quiescent(drm_device_t *dev)
+void i810_dma_quiescent(drm_device_t *dev)
{
DECLARE_WAITQUEUE(entry, current);
drm_i810_private_t *dev_priv = (drm_i810_private_t *)dev->dev_private;
- unsigned long end;
+ unsigned long end;
if(dev_priv == NULL) {
return;
@@ -1069,7 +940,7 @@ static void i810_dma_quiescent(drm_device_t *dev)
atomic_set(&dev_priv->flush_done, 0);
add_wait_queue(&dev_priv->flush_queue, &entry);
end = jiffies + (HZ*3);
-
+
for (;;) {
current->state = TASK_INTERRUPTIBLE;
i810_dma_quiescent_emit(dev);
@@ -1077,16 +948,16 @@ static void i810_dma_quiescent(drm_device_t *dev)
if((signed)(end - jiffies) <= 0) {
DRM_ERROR("lockup\n");
break;
- }
+ }
schedule_timeout(HZ*3);
if (signal_pending(current)) {
break;
}
}
-
+
current->state = TASK_RUNNING;
remove_wait_queue(&dev_priv->flush_queue, &entry);
-
+
return;
}
@@ -1096,7 +967,7 @@ static int i810_flush_queue(drm_device_t *dev)
drm_i810_private_t *dev_priv = (drm_i810_private_t *)dev->dev_private;
drm_device_dma_t *dma = dev->dma;
unsigned long end;
- int i, ret = 0;
+ int i, ret = 0;
if(dev_priv == NULL) {
return 0;
@@ -1111,14 +982,14 @@ static int i810_flush_queue(drm_device_t *dev)
if((signed)(end - jiffies) <= 0) {
DRM_ERROR("lockup\n");
break;
- }
+ }
schedule_timeout(HZ*3);
if (signal_pending(current)) {
ret = -EINTR; /* Can't restart */
break;
}
}
-
+
current->state = TASK_RUNNING;
remove_wait_queue(&dev_priv->flush_queue, &entry);
@@ -1126,8 +997,8 @@ static int i810_flush_queue(drm_device_t *dev)
for (i = 0; i < dma->buf_count; i++) {
drm_buf_t *buf = dma->buflist[ i ];
drm_i810_buf_priv_t *buf_priv = buf->dev_private;
-
- int used = cmpxchg(buf_priv->in_use, I810_BUF_HARDWARE,
+
+ int used = cmpxchg(buf_priv->in_use, I810_BUF_HARDWARE,
I810_BUF_FREE);
if (used == I810_BUF_HARDWARE)
@@ -1154,9 +1025,9 @@ void i810_reclaim_buffers(drm_device_t *dev, pid_t pid)
for (i = 0; i < dma->buf_count; i++) {
drm_buf_t *buf = dma->buflist[ i ];
drm_i810_buf_priv_t *buf_priv = buf->dev_private;
-
+
if (buf->pid == pid && buf_priv) {
- int used = cmpxchg(buf_priv->in_use, I810_BUF_CLIENT,
+ int used = cmpxchg(buf_priv->in_use, I810_BUF_CLIENT,
I810_BUF_FREE);
if (used == I810_BUF_CLIENT)
@@ -1167,91 +1038,12 @@ void i810_reclaim_buffers(drm_device_t *dev, pid_t pid)
}
}
-int i810_lock(struct inode *inode, struct file *filp, unsigned int cmd,
- unsigned long arg)
-{
- drm_file_t *priv = filp->private_data;
- drm_device_t *dev = priv->dev;
-
- DECLARE_WAITQUEUE(entry, current);
- int ret = 0;
- drm_lock_t lock;
-
- if (copy_from_user(&lock, (drm_lock_t *)arg, sizeof(lock)))
- return -EFAULT;
-
- if (lock.context == DRM_KERNEL_CONTEXT) {
- DRM_ERROR("Process %d using kernel context %d\n",
- current->pid, lock.context);
- return -EINVAL;
- }
-
- DRM_DEBUG("%d (pid %d) requests lock (0x%08x), flags = 0x%08x\n",
- lock.context, current->pid, dev->lock.hw_lock->lock,
- lock.flags);
-
- if (lock.context < 0) {
- return -EINVAL;
- }
- /* Only one queue:
- */
-
- if (!ret) {
- add_wait_queue(&dev->lock.lock_queue, &entry);
- for (;;) {
- current->state = TASK_INTERRUPTIBLE;
- if (!dev->lock.hw_lock) {
- /* Device has been unregistered */
- ret = -EINTR;
- break;
- }
- if (drm_lock_take(&dev->lock.hw_lock->lock,
- lock.context)) {
- dev->lock.pid = current->pid;
- dev->lock.lock_time = jiffies;
- atomic_inc(&dev->total_locks);
- break; /* Got lock */
- }
-
- /* Contention */
- atomic_inc(&dev->total_sleeps);
- DRM_DEBUG("Calling lock schedule\n");
- schedule();
- if (signal_pending(current)) {
- ret = -ERESTARTSYS;
- break;
- }
- }
- current->state = TASK_RUNNING;
- remove_wait_queue(&dev->lock.lock_queue, &entry);
- }
-
- if (!ret) {
- sigemptyset(&dev->sigmask);
- sigaddset(&dev->sigmask, SIGSTOP);
- sigaddset(&dev->sigmask, SIGTSTP);
- sigaddset(&dev->sigmask, SIGTTIN);
- sigaddset(&dev->sigmask, SIGTTOU);
- dev->sigdata.context = lock.context;
- dev->sigdata.lock = dev->lock.hw_lock;
- block_all_signals(drm_notifier, &dev->sigdata, &dev->sigmask);
-
- if (lock.flags & _DRM_LOCK_QUIESCENT) {
- DRM_DEBUG("_DRM_LOCK_QUIESCENT\n");
- DRM_DEBUG("fred\n");
- i810_dma_quiescent(dev);
- }
- }
- DRM_DEBUG("%d %s\n", lock.context, ret ? "interrupted" : "has lock");
- return ret;
-}
-
-int i810_flush_ioctl(struct inode *inode, struct file *filp,
+int i810_flush_ioctl(struct inode *inode, struct file *filp,
unsigned int cmd, unsigned long arg)
{
drm_file_t *priv = filp->private_data;
drm_device_t *dev = priv->dev;
-
+
DRM_DEBUG("i810_flush_ioctl\n");
if(!_DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock)) {
DRM_ERROR("i810_flush_ioctl called without lock held\n");
@@ -1271,8 +1063,8 @@ int i810_dma_vertex(struct inode *inode, struct file *filp,
drm_device_dma_t *dma = dev->dma;
drm_i810_private_t *dev_priv = (drm_i810_private_t *)dev->dev_private;
u32 *hw_status = (u32 *)dev_priv->hw_status_page;
- drm_i810_sarea_t *sarea_priv = (drm_i810_sarea_t *)
- dev_priv->sarea_priv;
+ drm_i810_sarea_t *sarea_priv = (drm_i810_sarea_t *)
+ dev_priv->sarea_priv;
drm_i810_vertex_t vertex;
if (copy_from_user(&vertex, (drm_i810_vertex_t *)arg, sizeof(vertex)))
@@ -1286,15 +1078,15 @@ int i810_dma_vertex(struct inode *inode, struct file *filp,
DRM_DEBUG("i810 dma vertex, idx %d used %d discard %d\n",
vertex.idx, vertex.used, vertex.discard);
- i810_dma_dispatch_vertex( dev,
- dma->buflist[ vertex.idx ],
+ i810_dma_dispatch_vertex( dev,
+ dma->buflist[ vertex.idx ],
vertex.discard, vertex.used );
- atomic_add(vertex.used, &dma->total_bytes);
- atomic_inc(&dma->total_dmas);
+ atomic_add(vertex.used, &dev->counts[_DRM_STAT_SECONDARY]);
+ atomic_inc(&dev->counts[_DRM_STAT_DMA]);
sarea_priv->last_enqueue = dev_priv->counter-1;
sarea_priv->last_dispatch = (int) hw_status[5];
-
+
return 0;
}
@@ -1309,14 +1101,14 @@ int i810_clear_bufs(struct inode *inode, struct file *filp,
if (copy_from_user(&clear, (drm_i810_clear_t *)arg, sizeof(clear)))
return -EFAULT;
-
+
if(!_DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock)) {
DRM_ERROR("i810_clear_bufs called without lock held\n");
return -EINVAL;
}
- i810_dma_dispatch_clear( dev, clear.flags,
- clear.clear_color,
+ i810_dma_dispatch_clear( dev, clear.flags,
+ clear.clear_color,
clear.clear_depth );
return 0;
}
@@ -1326,7 +1118,7 @@ int i810_swap_bufs(struct inode *inode, struct file *filp,
{
drm_file_t *priv = filp->private_data;
drm_device_t *dev = priv->dev;
-
+
DRM_DEBUG("i810_swap_bufs\n");
if(!_DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock)) {
@@ -1345,8 +1137,8 @@ int i810_getage(struct inode *inode, struct file *filp, unsigned int cmd,
drm_device_t *dev = priv->dev;
drm_i810_private_t *dev_priv = (drm_i810_private_t *)dev->dev_private;
u32 *hw_status = (u32 *)dev_priv->hw_status_page;
- drm_i810_sarea_t *sarea_priv = (drm_i810_sarea_t *)
- dev_priv->sarea_priv;
+ drm_i810_sarea_t *sarea_priv = (drm_i810_sarea_t *)
+ dev_priv->sarea_priv;
sarea_priv->last_dispatch = (int) hw_status[5];
return 0;
@@ -1361,18 +1153,18 @@ int i810_getbuf(struct inode *inode, struct file *filp, unsigned int cmd,
drm_i810_dma_t d;
drm_i810_private_t *dev_priv = (drm_i810_private_t *)dev->dev_private;
u32 *hw_status = (u32 *)dev_priv->hw_status_page;
- drm_i810_sarea_t *sarea_priv = (drm_i810_sarea_t *)
- dev_priv->sarea_priv;
+ drm_i810_sarea_t *sarea_priv = (drm_i810_sarea_t *)
+ dev_priv->sarea_priv;
DRM_DEBUG("getbuf\n");
if (copy_from_user(&d, (drm_i810_dma_t *)arg, sizeof(d)))
return -EFAULT;
-
+
if(!_DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock)) {
DRM_ERROR("i810_dma called without lock held\n");
return -EINVAL;
}
-
+
d.granted = 0;
retcode = i810_dma_get_buffer(dev, &d, filp);
@@ -1395,8 +1187,8 @@ int i810_copybuf(struct inode *inode, struct file *filp, unsigned int cmd,
drm_i810_copy_t d;
drm_i810_private_t *dev_priv = (drm_i810_private_t *)dev->dev_private;
u32 *hw_status = (u32 *)dev_priv->hw_status_page;
- drm_i810_sarea_t *sarea_priv = (drm_i810_sarea_t *)
- dev_priv->sarea_priv;
+ drm_i810_sarea_t *sarea_priv = (drm_i810_sarea_t *)
+ dev_priv->sarea_priv;
drm_buf_t *buf;
drm_i810_buf_priv_t *buf_priv;
drm_device_dma_t *dma = dev->dma;
@@ -1405,7 +1197,7 @@ int i810_copybuf(struct inode *inode, struct file *filp, unsigned int cmd,
DRM_ERROR("i810_dma called without lock held\n");
return -EINVAL;
}
-
+
if (copy_from_user(&d, (drm_i810_copy_t *)arg, sizeof(d)))
return -EFAULT;
diff --git a/linux-core/i810_drm.h b/linux-core/i810_drm.h
index c5f51c9a..cee189b7 100644
--- a/linux-core/i810_drm.h
+++ b/linux-core/i810_drm.h
@@ -98,8 +98,8 @@ typedef struct _drm_i810_init {
I810_INIT_DMA = 0x01,
I810_CLEANUP_DMA = 0x02
} func;
- int ring_map_idx;
- int buffer_map_idx;
+ unsigned int mmio_offset;
+ unsigned int buffers_offset;
int sarea_priv_offset;
unsigned int ring_start;
unsigned int ring_end;
diff --git a/linux-core/i810_drv.c b/linux-core/i810_drv.c
index 7152eac3..12a59dbf 100644
--- a/linux-core/i810_drv.c
+++ b/linux-core/i810_drv.c
@@ -19,630 +19,64 @@
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
- * DEALINGS IN THE SOFTWARE.
- *
- * Authors: Rickard E. (Rik) Faith <faith@valinux.com>
- * Jeff Hartmann <jhartmann@valinux.com>
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
*
+ * Authors:
+ * Rickard E. (Rik) Faith <faith@valinux.com>
+ * Jeff Hartmann <jhartmann@valinux.com>
+ * Gareth Hughes <gareth@valinux.com>
*/
#include <linux/config.h>
+#include "i810.h"
#include "drmP.h"
#include "i810_drv.h"
-#define I810_NAME "i810"
-#define I810_DESC "Intel I810"
-#define I810_DATE "20000928"
-#define I810_MAJOR 1
-#define I810_MINOR 1
-#define I810_PATCHLEVEL 0
-
-static drm_device_t i810_device;
-drm_ctx_t i810_res_ctx;
-
-static struct file_operations i810_fops = {
-#if LINUX_VERSION_CODE >= 0x020400
- /* This started being used during 2.4.0-test */
- owner: THIS_MODULE,
-#endif
- open: i810_open,
- flush: drm_flush,
- release: i810_release,
- ioctl: i810_ioctl,
- mmap: drm_mmap,
- read: drm_read,
- fasync: drm_fasync,
- poll: drm_poll,
-};
-
-static struct miscdevice i810_misc = {
- minor: MISC_DYNAMIC_MINOR,
- name: I810_NAME,
- fops: &i810_fops,
-};
-
-static drm_ioctl_desc_t i810_ioctls[] = {
- [DRM_IOCTL_NR(DRM_IOCTL_VERSION)] = { i810_version, 0, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_GET_UNIQUE)] = { drm_getunique, 0, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_GET_MAGIC)] = { drm_getmagic, 0, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_IRQ_BUSID)] = { drm_irq_busid, 0, 1 },
-
- [DRM_IOCTL_NR(DRM_IOCTL_SET_UNIQUE)] = { drm_setunique, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_BLOCK)] = { drm_block, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_UNBLOCK)] = { drm_unblock, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_CONTROL)] = { i810_control, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_AUTH_MAGIC)] = { drm_authmagic, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_ADD_MAP)] = { drm_addmap, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_ADD_BUFS)] = { i810_addbufs, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_MARK_BUFS)] = { i810_markbufs, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_INFO_BUFS)] = { i810_infobufs, 1, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_FREE_BUFS)] = { i810_freebufs, 1, 0 },
-
- [DRM_IOCTL_NR(DRM_IOCTL_ADD_CTX)] = { i810_addctx, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_RM_CTX)] = { i810_rmctx, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_MOD_CTX)] = { i810_modctx, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_GET_CTX)] = { i810_getctx, 1, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_SWITCH_CTX)] = { i810_switchctx, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_NEW_CTX)] = { i810_newctx, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_RES_CTX)] = { i810_resctx, 1, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_ADD_DRAW)] = { drm_adddraw, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_RM_DRAW)] = { drm_rmdraw, 1, 1 },
-
- [DRM_IOCTL_NR(DRM_IOCTL_LOCK)] = { i810_lock, 1, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_UNLOCK)] = { i810_unlock, 1, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_FINISH)] = { drm_finish, 1, 0 },
-
- [DRM_IOCTL_NR(DRM_IOCTL_AGP_ACQUIRE)] = { drm_agp_acquire, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_AGP_RELEASE)] = { drm_agp_release, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_AGP_ENABLE)] = { drm_agp_enable, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_AGP_INFO)] = { drm_agp_info, 1, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_AGP_ALLOC)] = { drm_agp_alloc, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_AGP_FREE)] = { drm_agp_free, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_AGP_BIND)] = { drm_agp_bind, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_AGP_UNBIND)] = { drm_agp_unbind, 1, 1 },
-
- [DRM_IOCTL_NR(DRM_IOCTL_I810_INIT)] = { i810_dma_init, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_I810_VERTEX)] = { i810_dma_vertex, 1, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_I810_CLEAR)] = { i810_clear_bufs, 1, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_I810_FLUSH)] = { i810_flush_ioctl,1, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_I810_GETAGE)] = { i810_getage, 1, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_I810_GETBUF)] = { i810_getbuf, 1, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_I810_SWAP)] = { i810_swap_bufs, 1, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_I810_COPY)] = { i810_copybuf, 1, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_I810_DOCOPY)] = { i810_docopy, 1, 0 },
-};
-
-#define I810_IOCTL_COUNT DRM_ARRAY_SIZE(i810_ioctls)
-
-#ifdef MODULE
-static char *i810 = NULL;
-#endif
-
-MODULE_AUTHOR("VA Linux Systems, Inc.");
-MODULE_DESCRIPTION("Intel I810");
-MODULE_PARM(i810, "s");
-
-#ifndef MODULE
-/* i810_options is called by the kernel to parse command-line options
- * passed via the boot-loader (e.g., LILO). It calls the insmod option
- * routine, drm_parse_drm.
- */
-
-static int __init i810_options(char *str)
-{
- drm_parse_options(str);
- return 1;
-}
-
-__setup("i810=", i810_options);
-#endif
-
-static int i810_setup(drm_device_t *dev)
-{
- int i;
-
- atomic_set(&dev->ioctl_count, 0);
- atomic_set(&dev->vma_count, 0);
- dev->buf_use = 0;
- atomic_set(&dev->buf_alloc, 0);
-
- drm_dma_setup(dev);
-
- atomic_set(&dev->total_open, 0);
- atomic_set(&dev->total_close, 0);
- atomic_set(&dev->total_ioctl, 0);
- atomic_set(&dev->total_irq, 0);
- atomic_set(&dev->total_ctx, 0);
- atomic_set(&dev->total_locks, 0);
- atomic_set(&dev->total_unlocks, 0);
- atomic_set(&dev->total_contends, 0);
- atomic_set(&dev->total_sleeps, 0);
-
- for (i = 0; i < DRM_HASH_SIZE; i++) {
- dev->magiclist[i].head = NULL;
- dev->magiclist[i].tail = NULL;
- }
- dev->maplist = NULL;
- dev->map_count = 0;
- dev->vmalist = NULL;
- dev->lock.hw_lock = NULL;
- init_waitqueue_head(&dev->lock.lock_queue);
- dev->queue_count = 0;
- dev->queue_reserved = 0;
- dev->queue_slots = 0;
- dev->queuelist = NULL;
- dev->irq = 0;
- dev->context_flag = 0;
- dev->interrupt_flag = 0;
- dev->dma_flag = 0;
- dev->last_context = 0;
- dev->last_switch = 0;
- dev->last_checked = 0;
- init_timer(&dev->timer);
- init_waitqueue_head(&dev->context_wait);
-#if DRM_DMA_HISTO
- memset(&dev->histo, 0, sizeof(dev->histo));
-#endif
- dev->ctx_start = 0;
- dev->lck_start = 0;
-
- dev->buf_rp = dev->buf;
- dev->buf_wp = dev->buf;
- dev->buf_end = dev->buf + DRM_BSZ;
- dev->buf_async = NULL;
- init_waitqueue_head(&dev->buf_readers);
- init_waitqueue_head(&dev->buf_writers);
-
- DRM_DEBUG("\n");
-
- /* The kernel's context could be created here, but is now created
- in drm_dma_enqueue. This is more resource-efficient for
- hardware that does not do DMA, but may mean that
- drm_select_queue fails between the time the interrupt is
- initialized and the time the queues are initialized. */
-
- return 0;
-}
-
-
-static int i810_takedown(drm_device_t *dev)
-{
- int i;
- drm_magic_entry_t *pt, *next;
- drm_map_t *map;
- drm_vma_entry_t *vma, *vma_next;
-
- DRM_DEBUG("\n");
-
- if (dev->irq) i810_irq_uninstall(dev);
-
- down(&dev->struct_sem);
- del_timer(&dev->timer);
-
- if (dev->devname) {
- drm_free(dev->devname, strlen(dev->devname)+1, DRM_MEM_DRIVER);
- dev->devname = NULL;
- }
-
- if (dev->unique) {
- drm_free(dev->unique, strlen(dev->unique)+1, DRM_MEM_DRIVER);
- dev->unique = NULL;
- dev->unique_len = 0;
- }
- /* Clear pid list */
- for (i = 0; i < DRM_HASH_SIZE; i++) {
- for (pt = dev->magiclist[i].head; pt; pt = next) {
- next = pt->next;
- drm_free(pt, sizeof(*pt), DRM_MEM_MAGIC);
- }
- dev->magiclist[i].head = dev->magiclist[i].tail = NULL;
- }
- /* Clear AGP information */
- if (dev->agp) {
- drm_agp_mem_t *entry;
- drm_agp_mem_t *nexte;
-
- /* Remove AGP resources, but leave dev->agp
- intact until r128_cleanup is called. */
- for (entry = dev->agp->memory; entry; entry = nexte) {
- nexte = entry->next;
- if (entry->bound) drm_unbind_agp(entry->memory);
- drm_free_agp(entry->memory, entry->pages);
- drm_free(entry, sizeof(*entry), DRM_MEM_AGPLISTS);
- }
- dev->agp->memory = NULL;
-
- if (dev->agp->acquired) _drm_agp_release();
-
- dev->agp->acquired = 0;
- dev->agp->enabled = 0;
- }
- /* Clear vma list (only built for debugging) */
- if (dev->vmalist) {
- for (vma = dev->vmalist; vma; vma = vma_next) {
- vma_next = vma->next;
- drm_free(vma, sizeof(*vma), DRM_MEM_VMAS);
- }
- dev->vmalist = NULL;
- }
-
- /* Clear map area and mtrr information */
- if (dev->maplist) {
- for (i = 0; i < dev->map_count; i++) {
- map = dev->maplist[i];
- switch (map->type) {
- case _DRM_REGISTERS:
- case _DRM_FRAME_BUFFER:
-#ifdef CONFIG_MTRR
- if (map->mtrr >= 0) {
- int retcode;
- retcode = mtrr_del(map->mtrr,
- map->offset,
- map->size);
- DRM_DEBUG("mtrr_del = %d\n", retcode);
- }
-#endif
- drm_ioremapfree(map->handle, map->size);
- break;
- case _DRM_SHM:
- drm_free_pages((unsigned long)map->handle,
- drm_order(map->size)
- - PAGE_SHIFT,
- DRM_MEM_SAREA);
- break;
- case _DRM_AGP:
- break;
- }
- drm_free(map, sizeof(*map), DRM_MEM_MAPS);
- }
- drm_free(dev->maplist,
- dev->map_count * sizeof(*dev->maplist),
- DRM_MEM_MAPS);
- dev->maplist = NULL;
- dev->map_count = 0;
- }
-
- if (dev->queuelist) {
- for (i = 0; i < dev->queue_count; i++) {
- drm_waitlist_destroy(&dev->queuelist[i]->waitlist);
- if (dev->queuelist[i]) {
- drm_free(dev->queuelist[i],
- sizeof(*dev->queuelist[0]),
- DRM_MEM_QUEUES);
- dev->queuelist[i] = NULL;
- }
- }
- drm_free(dev->queuelist,
- dev->queue_slots * sizeof(*dev->queuelist),
- DRM_MEM_QUEUES);
- dev->queuelist = NULL;
- }
-
- drm_dma_takedown(dev);
-
- dev->queue_count = 0;
- if (dev->lock.hw_lock) {
- dev->lock.hw_lock = NULL; /* SHM removed */
- dev->lock.pid = 0;
- wake_up_interruptible(&dev->lock.lock_queue);
- }
- up(&dev->struct_sem);
-
- return 0;
-}
-
-/* i810_init is called via init_module at module load time, or via
- * linux/init/main.c (this is not currently supported). */
-
-static int __init i810_init(void)
-{
- int retcode;
- drm_device_t *dev = &i810_device;
-
- DRM_DEBUG("\n");
-
- memset((void *)dev, 0, sizeof(*dev));
- dev->count_lock = SPIN_LOCK_UNLOCKED;
- sema_init(&dev->struct_sem, 1);
-
-#ifdef MODULE
- drm_parse_options(i810);
-#endif
- DRM_DEBUG("doing misc_register\n");
- if ((retcode = misc_register(&i810_misc))) {
- DRM_ERROR("Cannot register \"%s\"\n", I810_NAME);
- return retcode;
- }
- dev->device = MKDEV(MISC_MAJOR, i810_misc.minor);
- dev->name = I810_NAME;
-
- DRM_DEBUG("doing mem init\n");
- drm_mem_init();
- DRM_DEBUG("doing proc init\n");
- drm_proc_init(dev);
- DRM_DEBUG("doing agp init\n");
- dev->agp = drm_agp_init();
- if(dev->agp == NULL) {
- DRM_INFO("The i810 drm module requires the agpgart module"
- " to function correctly\nPlease load the agpgart"
- " module before you load the i810 module\n");
- drm_proc_cleanup();
- misc_deregister(&i810_misc);
- i810_takedown(dev);
- return -ENOMEM;
- }
- DRM_DEBUG("doing ctxbitmap init\n");
- if((retcode = drm_ctxbitmap_init(dev))) {
- DRM_ERROR("Cannot allocate memory for context bitmap.\n");
- drm_proc_cleanup();
- misc_deregister(&i810_misc);
- i810_takedown(dev);
- return retcode;
- }
-
- DRM_INFO("Initialized %s %d.%d.%d %s on minor %d\n",
- I810_NAME,
- I810_MAJOR,
- I810_MINOR,
- I810_PATCHLEVEL,
- I810_DATE,
- i810_misc.minor);
-
- return 0;
-}
-
-/* i810_cleanup is called via cleanup_module at module unload time. */
-
-static void __exit i810_cleanup(void)
-{
- drm_device_t *dev = &i810_device;
-
- DRM_DEBUG("\n");
-
- drm_proc_cleanup();
- if (misc_deregister(&i810_misc)) {
- DRM_ERROR("Cannot unload module\n");
- } else {
- DRM_INFO("Module unloaded\n");
- }
- drm_ctxbitmap_cleanup(dev);
- i810_takedown(dev);
- if (dev->agp) {
- drm_agp_uninit();
- drm_free(dev->agp, sizeof(*dev->agp), DRM_MEM_AGPLISTS);
- dev->agp = NULL;
- }
-}
-
-module_init(i810_init);
-module_exit(i810_cleanup);
-
-
-int i810_version(struct inode *inode, struct file *filp, unsigned int cmd,
- unsigned long arg)
-{
- drm_version_t version;
- int len;
-
- if (copy_from_user(&version,
- (drm_version_t *)arg,
- sizeof(version)))
- return -EFAULT;
-
-#define DRM_COPY(name,value) \
- len = strlen(value); \
- if (len > name##_len) len = name##_len; \
- name##_len = strlen(value); \
- if (len && name) { \
- if (copy_to_user(name, value, len)) \
- return -EFAULT; \
- }
-
- version.version_major = I810_MAJOR;
- version.version_minor = I810_MINOR;
- version.version_patchlevel = I810_PATCHLEVEL;
-
- DRM_COPY(version.name, I810_NAME);
- DRM_COPY(version.date, I810_DATE);
- DRM_COPY(version.desc, I810_DESC);
-
- if (copy_to_user((drm_version_t *)arg,
- &version,
- sizeof(version)))
- return -EFAULT;
- return 0;
-}
-
-int i810_open(struct inode *inode, struct file *filp)
-{
- drm_device_t *dev = &i810_device;
- int retcode = 0;
-
- DRM_DEBUG("open_count = %d\n", dev->open_count);
- if (!(retcode = drm_open_helper(inode, filp, dev))) {
-#if LINUX_VERSION_CODE < 0x020333
- MOD_INC_USE_COUNT; /* Needed before Linux 2.3.51 */
-#endif
- atomic_inc(&dev->total_open);
- spin_lock(&dev->count_lock);
- if (!dev->open_count++) {
- spin_unlock(&dev->count_lock);
- return i810_setup(dev);
- }
- spin_unlock(&dev->count_lock);
- }
- return retcode;
-}
-
-int i810_release(struct inode *inode, struct file *filp)
-{
- drm_file_t *priv = filp->private_data;
- drm_device_t *dev;
- int retcode = 0;
-
- lock_kernel();
- dev = priv->dev;
- DRM_DEBUG("pid = %d, device = 0x%x, open_count = %d\n",
- current->pid, dev->device, dev->open_count);
-
- if (dev->lock.hw_lock && _DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock)
- && dev->lock.pid == current->pid) {
- i810_reclaim_buffers(dev, priv->pid);
- DRM_ERROR("Process %d dead, freeing lock for context %d\n",
- current->pid,
- _DRM_LOCKING_CONTEXT(dev->lock.hw_lock->lock));
- drm_lock_free(dev,
- &dev->lock.hw_lock->lock,
- _DRM_LOCKING_CONTEXT(dev->lock.hw_lock->lock));
-
- /* FIXME: may require heavy-handed reset of
- hardware at this point, possibly
- processed via a callback to the X
- server. */
- } else if (dev->lock.hw_lock) {
- /* The lock is required to reclaim buffers */
- DECLARE_WAITQUEUE(entry, current);
- add_wait_queue(&dev->lock.lock_queue, &entry);
- for (;;) {
- current->state = TASK_INTERRUPTIBLE;
- if (!dev->lock.hw_lock) {
- /* Device has been unregistered */
- retcode = -EINTR;
- break;
- }
- if (drm_lock_take(&dev->lock.hw_lock->lock,
- DRM_KERNEL_CONTEXT)) {
- dev->lock.pid = priv->pid;
- dev->lock.lock_time = jiffies;
- atomic_inc(&dev->total_locks);
- break; /* Got lock */
- }
- /* Contention */
- atomic_inc(&dev->total_sleeps);
- schedule();
- if (signal_pending(current)) {
- retcode = -ERESTARTSYS;
- break;
- }
- }
- current->state = TASK_RUNNING;
- remove_wait_queue(&dev->lock.lock_queue, &entry);
- if(!retcode) {
- i810_reclaim_buffers(dev, priv->pid);
- drm_lock_free(dev, &dev->lock.hw_lock->lock,
- DRM_KERNEL_CONTEXT);
- }
- }
- drm_fasync(-1, filp, 0);
-
- down(&dev->struct_sem);
- if (priv->prev) priv->prev->next = priv->next;
- else dev->file_first = priv->next;
- if (priv->next) priv->next->prev = priv->prev;
- else dev->file_last = priv->prev;
- up(&dev->struct_sem);
-
- drm_free(priv, sizeof(*priv), DRM_MEM_FILES);
-#if LINUX_VERSION_CODE < 0x020333
- MOD_DEC_USE_COUNT; /* Needed before Linux 2.3.51 */
-#endif
- atomic_inc(&dev->total_close);
- spin_lock(&dev->count_lock);
- if (!--dev->open_count) {
- if (atomic_read(&dev->ioctl_count) || dev->blocked) {
- DRM_ERROR("Device busy: %d %d\n",
- atomic_read(&dev->ioctl_count),
- dev->blocked);
- spin_unlock(&dev->count_lock);
- unlock_kernel();
- return -EBUSY;
- }
- spin_unlock(&dev->count_lock);
- unlock_kernel();
- return i810_takedown(dev);
- }
- spin_unlock(&dev->count_lock);
- unlock_kernel();
- return retcode;
-}
-
-/* drm_ioctl is called whenever a process performs an ioctl on /dev/drm. */
-
-int i810_ioctl(struct inode *inode, struct file *filp, unsigned int cmd,
- unsigned long arg)
-{
- int nr = DRM_IOCTL_NR(cmd);
- drm_file_t *priv = filp->private_data;
- drm_device_t *dev = priv->dev;
- int retcode = 0;
- drm_ioctl_desc_t *ioctl;
- drm_ioctl_t *func;
-
- atomic_inc(&dev->ioctl_count);
- atomic_inc(&dev->total_ioctl);
- ++priv->ioctl_count;
-
- DRM_DEBUG("pid = %d, cmd = 0x%02x, nr = 0x%02x, dev 0x%x, auth = %d\n",
- current->pid, cmd, nr, dev->device, priv->authenticated);
-
- if (nr >= I810_IOCTL_COUNT) {
- retcode = -EINVAL;
- } else {
- ioctl = &i810_ioctls[nr];
- func = ioctl->func;
-
- if (!func) {
- DRM_DEBUG("no function\n");
- retcode = -EINVAL;
- } else if ((ioctl->root_only && !capable(CAP_SYS_ADMIN))
- || (ioctl->auth_needed && !priv->authenticated)) {
- retcode = -EACCES;
- } else {
- retcode = (func)(inode, filp, cmd, arg);
- }
- }
-
- atomic_dec(&dev->ioctl_count);
- return retcode;
-}
-
-int i810_unlock(struct inode *inode, struct file *filp, unsigned int cmd,
- unsigned long arg)
-{
- drm_file_t *priv = filp->private_data;
- drm_device_t *dev = priv->dev;
- drm_lock_t lock;
-
- if (copy_from_user(&lock, (drm_lock_t *)arg, sizeof(lock)))
- return -EFAULT;
-
- if (lock.context == DRM_KERNEL_CONTEXT) {
- DRM_ERROR("Process %d using kernel context %d\n",
- current->pid, lock.context);
- return -EINVAL;
- }
-
- DRM_DEBUG("%d frees lock (%d holds)\n",
- lock.context,
- _DRM_LOCKING_CONTEXT(dev->lock.hw_lock->lock));
- atomic_inc(&dev->total_unlocks);
- if (_DRM_LOCK_IS_CONT(dev->lock.hw_lock->lock))
- atomic_inc(&dev->total_contends);
- drm_lock_transfer(dev, &dev->lock.hw_lock->lock, DRM_KERNEL_CONTEXT);
- if (!dev->context_flag) {
- if (drm_lock_free(dev, &dev->lock.hw_lock->lock,
- DRM_KERNEL_CONTEXT)) {
- DRM_ERROR("\n");
- }
- }
-#if DRM_DMA_HISTOGRAM
- atomic_inc(&dev->histo.lhld[drm_histogram_slot(get_cycles()
- - dev->lck_start)]);
-#endif
-
- unblock_all_signals();
- return 0;
-}
+#define DRIVER_AUTHOR "VA Linux Systems Inc."
+
+#define DRIVER_NAME "i810"
+#define DRIVER_DESC "Intel i810"
+#define DRIVER_DATE "20010215"
+
+#define DRIVER_MAJOR 1
+#define DRIVER_MINOR 1
+#define DRIVER_PATCHLEVEL 0
+
+#define DRIVER_IOCTLS \
+ [DRM_IOCTL_NR(DRM_IOCTL_I810_INIT)] = { i810_dma_init, 1, 1 }, \
+ [DRM_IOCTL_NR(DRM_IOCTL_I810_VERTEX)] = { i810_dma_vertex, 1, 0 }, \
+ [DRM_IOCTL_NR(DRM_IOCTL_I810_CLEAR)] = { i810_clear_bufs, 1, 0 }, \
+ [DRM_IOCTL_NR(DRM_IOCTL_I810_FLUSH)] = { i810_flush_ioctl, 1, 0 }, \
+ [DRM_IOCTL_NR(DRM_IOCTL_I810_GETAGE)] = { i810_getage, 1, 0 }, \
+ [DRM_IOCTL_NR(DRM_IOCTL_I810_GETBUF)] = { i810_getbuf, 1, 0 }, \
+ [DRM_IOCTL_NR(DRM_IOCTL_I810_SWAP)] = { i810_swap_bufs, 1, 0 }, \
+ [DRM_IOCTL_NR(DRM_IOCTL_I810_COPY)] = { i810_copybuf, 1, 0 }, \
+ [DRM_IOCTL_NR(DRM_IOCTL_I810_DOCOPY)] = { i810_docopy, 1, 0 },
+
+
+#define __HAVE_COUNTERS 4
+#define __HAVE_COUNTER6 _DRM_STAT_IRQ
+#define __HAVE_COUNTER7 _DRM_STAT_PRIMARY
+#define __HAVE_COUNTER8 _DRM_STAT_SECONDARY
+#define __HAVE_COUNTER9 _DRM_STAT_DMA
+
+
+#include "drm_agpsupport.h"
+#include "drm_auth.h"
+#include "drm_bufs.h"
+#include "drm_context.h"
+#include "drm_dma.h"
+#include "drm_drawable.h"
+#include "drm_drv.h"
+#include "drm_fops.h"
+#include "drm_init.h"
+#include "drm_ioctl.h"
+#include "drm_lock.h"
+#include "drm_lists.h"
+#include "drm_memory.h"
+#include "drm_proc.h"
+#include "drm_vm.h"
+#include "drm_stub.h"
diff --git a/linux-core/i810_drv.h b/linux-core/i810_drv.h
index 1c957401..e1b17148 100644
--- a/linux-core/i810_drv.h
+++ b/linux-core/i810_drv.h
@@ -11,11 +11,11 @@
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
- *
+ *
* The above copyright notice and this permission notice (including the next
* paragraph) shall be included in all copies or substantial portions of the
* Software.
- *
+ *
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
@@ -54,11 +54,12 @@ typedef struct _drm_i810_ring_buffer{
} drm_i810_ring_buffer_t;
typedef struct drm_i810_private {
- int ring_map_idx;
- int buffer_map_idx;
+ drm_map_t *sarea_map;
+ drm_map_t *buffer_map;
+ drm_map_t *mmio_map;
- drm_i810_ring_buffer_t ring;
drm_i810_sarea_t *sarea_priv;
+ drm_i810_ring_buffer_t ring;
unsigned long hw_status_page;
unsigned long counter;
@@ -67,78 +68,33 @@ typedef struct drm_i810_private {
wait_queue_head_t flush_queue; /* Processes waiting until flush */
drm_buf_t *mmap_buffer;
-
+
u32 front_di1, back_di1, zi1;
-
+
int back_offset;
int depth_offset;
int w, h;
int pitch;
} drm_i810_private_t;
- /* i810_drv.c */
-extern int i810_version(struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg);
-extern int i810_open(struct inode *inode, struct file *filp);
-extern int i810_release(struct inode *inode, struct file *filp);
-extern int i810_ioctl(struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg);
-extern int i810_unlock(struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg);
-
/* i810_dma.c */
extern int i810_dma_schedule(drm_device_t *dev, int locked);
extern int i810_getbuf(struct inode *inode, struct file *filp,
unsigned int cmd, unsigned long arg);
-extern int i810_irq_install(drm_device_t *dev, int irq);
-extern int i810_irq_uninstall(drm_device_t *dev);
-extern int i810_control(struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg);
-extern int i810_lock(struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg);
extern int i810_dma_init(struct inode *inode, struct file *filp,
unsigned int cmd, unsigned long arg);
extern int i810_flush_ioctl(struct inode *inode, struct file *filp,
unsigned int cmd, unsigned long arg);
extern void i810_reclaim_buffers(drm_device_t *dev, pid_t pid);
-extern int i810_getage(struct inode *inode, struct file *filp, unsigned int cmd,
- unsigned long arg);
-extern int i810_mmap_buffers(struct file *filp, struct vm_area_struct *vma);
-extern int i810_copybuf(struct inode *inode, struct file *filp,
+extern int i810_getage(struct inode *inode, struct file *filp,
unsigned int cmd, unsigned long arg);
-extern int i810_docopy(struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg);
-
- /* i810_bufs.c */
-extern int i810_addbufs(struct inode *inode, struct file *filp,
+extern int i810_mmap_buffers(struct file *filp, struct vm_area_struct *vma);
+extern int i810_copybuf(struct inode *inode, struct file *filp,
unsigned int cmd, unsigned long arg);
-extern int i810_infobufs(struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg);
-extern int i810_markbufs(struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg);
-extern int i810_freebufs(struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg);
-extern int i810_addmap(struct inode *inode, struct file *filp,
+extern int i810_docopy(struct inode *inode, struct file *filp,
unsigned int cmd, unsigned long arg);
- /* i810_context.c */
-extern int i810_resctx(struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg);
-extern int i810_addctx(struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg);
-extern int i810_modctx(struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg);
-extern int i810_getctx(struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg);
-extern int i810_switchctx(struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg);
-extern int i810_newctx(struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg);
-extern int i810_rmctx(struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg);
-
-extern int i810_context_switch(drm_device_t *dev, int old, int new);
-extern int i810_context_switch_complete(drm_device_t *dev, int new);
+extern void i810_dma_quiescent(drm_device_t *dev);
#define I810_VERBOSE 0
@@ -152,6 +108,18 @@ int i810_swap_bufs(struct inode *inode, struct file *filp,
int i810_clear_bufs(struct inode *inode, struct file *filp,
unsigned int cmd, unsigned long arg);
+
+#define I810_BASE(reg) ((unsigned long) \
+ dev_priv->mmio_map->handle)
+#define I810_ADDR(reg) (I810_BASE(reg) + reg)
+#define I810_DEREF(reg) *(__volatile__ int *)I810_ADDR(reg)
+#define I810_READ(reg) I810_DEREF(reg)
+#define I810_WRITE(reg,val) do { I810_DEREF(reg) = val; } while (0)
+#define I810_DEREF16(reg) *(__volatile__ u16 *)I810_ADDR(reg)
+#define I810_READ16(reg) I810_DEREF16(reg)
+#define I810_WRITE16(reg,val) do { I810_DEREF16(reg) = val; } while (0)
+
+
#define GFX_OP_USER_INTERRUPT ((0<<29)|(2<<23))
#define GFX_OP_BREAKPOINT_INTERRUPT ((0<<29)|(1<<23))
#define CMD_REPORT_HEAD (7<<23)
@@ -184,7 +152,7 @@ int i810_clear_bufs(struct inode *inode, struct file *filp,
#define RING_START 0x08
#define START_ADDR 0x00FFFFF8
#define RING_LEN 0x0C
-#define RING_NR_PAGES 0x000FF000
+#define RING_NR_PAGES 0x000FF000
#define RING_REPORT_MASK 0x00000006
#define RING_REPORT_64K 0x00000002
#define RING_REPORT_128K 0x00000004
@@ -222,4 +190,3 @@ int i810_clear_bufs(struct inode *inode, struct file *filp,
#endif
-
diff --git a/linux-core/mga_drv.c b/linux-core/mga_drv.c
index d1c39e99..42794e82 100644
--- a/linux-core/mga_drv.c
+++ b/linux-core/mga_drv.c
@@ -1,4 +1,4 @@
-/* mga_drv.c -- Matrox g200/g400 driver -*- linux-c -*-
+/* mga_drv.c -- Matrox G200/G400 driver -*- linux-c -*-
* Created: Mon Dec 13 01:56:22 1999 by jhartmann@precisioninsight.com
*
* Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
@@ -19,648 +19,62 @@
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
- * DEALINGS IN THE SOFTWARE.
- *
- * Authors: Rickard E. (Rik) Faith <faith@valinux.com>
- * Jeff Hartmann <jhartmann@valinux.com>
- *
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
*
+ * Authors:
+ * Rickard E. (Rik) Faith <faith@valinux.com>
+ * Gareth Hughes <gareth@valinux.com>
*/
#include <linux/config.h>
+#include "mga.h"
#include "drmP.h"
#include "mga_drv.h"
-#define MGA_NAME "mga"
-#define MGA_DESC "Matrox G200/G400"
-#define MGA_DATE "20000928"
-#define MGA_MAJOR 2
-#define MGA_MINOR 1
-#define MGA_PATCHLEVEL 1
-
-static drm_device_t mga_device;
-drm_ctx_t mga_res_ctx;
-
-static struct file_operations mga_fops = {
-#if LINUX_VERSION_CODE >= 0x020400
- /* This started being used during 2.4.0-test */
- owner: THIS_MODULE,
-#endif
- open: mga_open,
- flush: drm_flush,
- release: mga_release,
- ioctl: mga_ioctl,
- mmap: drm_mmap,
- read: drm_read,
- fasync: drm_fasync,
- poll: drm_poll,
-};
-
-static struct miscdevice mga_misc = {
- minor: MISC_DYNAMIC_MINOR,
- name: MGA_NAME,
- fops: &mga_fops,
-};
-
-static drm_ioctl_desc_t mga_ioctls[] = {
- [DRM_IOCTL_NR(DRM_IOCTL_VERSION)] = { mga_version, 0, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_GET_UNIQUE)] = { drm_getunique, 0, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_GET_MAGIC)] = { drm_getmagic, 0, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_IRQ_BUSID)] = { drm_irq_busid, 0, 1 },
-
- [DRM_IOCTL_NR(DRM_IOCTL_SET_UNIQUE)] = { drm_setunique, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_BLOCK)] = { drm_block, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_UNBLOCK)] = { drm_unblock, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_CONTROL)] = { mga_control, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_AUTH_MAGIC)] = { drm_authmagic, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_ADD_MAP)] = { drm_addmap, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_ADD_BUFS)] = { mga_addbufs, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_MARK_BUFS)] = { mga_markbufs, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_INFO_BUFS)] = { mga_infobufs, 1, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_MAP_BUFS)] = { mga_mapbufs, 1, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_FREE_BUFS)] = { mga_freebufs, 1, 0 },
-
- [DRM_IOCTL_NR(DRM_IOCTL_ADD_CTX)] = { mga_addctx, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_RM_CTX)] = { mga_rmctx, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_MOD_CTX)] = { mga_modctx, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_GET_CTX)] = { mga_getctx, 1, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_SWITCH_CTX)] = { mga_switchctx, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_NEW_CTX)] = { mga_newctx, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_RES_CTX)] = { mga_resctx, 1, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_ADD_DRAW)] = { drm_adddraw, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_RM_DRAW)] = { drm_rmdraw, 1, 1 },
-
- [DRM_IOCTL_NR(DRM_IOCTL_DMA)] = { mga_dma, 1, 0 },
-
- [DRM_IOCTL_NR(DRM_IOCTL_LOCK)] = { mga_lock, 1, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_UNLOCK)] = { mga_unlock, 1, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_FINISH)] = { drm_finish, 1, 0 },
-
- [DRM_IOCTL_NR(DRM_IOCTL_AGP_ACQUIRE)] = { drm_agp_acquire, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_AGP_RELEASE)] = { drm_agp_release, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_AGP_ENABLE)] = { drm_agp_enable, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_AGP_INFO)] = { drm_agp_info, 1, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_AGP_ALLOC)] = { drm_agp_alloc, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_AGP_FREE)] = { drm_agp_free, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_AGP_BIND)] = { drm_agp_bind, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_AGP_UNBIND)] = { drm_agp_unbind, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_MGA_INIT)] = { mga_dma_init, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_MGA_SWAP)] = { mga_swap_bufs, 1, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_MGA_CLEAR)] = { mga_clear_bufs, 1, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_MGA_ILOAD)] = { mga_iload, 1, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_MGA_VERTEX)] = { mga_vertex, 1, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_MGA_FLUSH)] = { mga_flush_ioctl, 1, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_MGA_INDICES)] = { mga_indices, 1, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_MGA_BLIT)] = { mga_blit, 1, 0 },
-};
-
-#define MGA_IOCTL_COUNT DRM_ARRAY_SIZE(mga_ioctls)
-
-#ifdef MODULE
-static char *mga = NULL;
-#endif
-
-MODULE_AUTHOR("VA Linux Systems, Inc.");
-MODULE_DESCRIPTION("Matrox G200/G400");
-MODULE_PARM(mga, "s");
-
-#ifndef MODULE
-/* mga_options is called by the kernel to parse command-line options passed
- * via the boot-loader (e.g., LILO). It calls the insmod option routine,
- * drm_parse_drm.
- */
-
-static int __init mga_options(char *str)
-{
- drm_parse_options(str);
- return 1;
-}
-
-__setup("mga=", mga_options);
-#endif
-
-static int mga_setup(drm_device_t *dev)
-{
- int i;
-
- atomic_set(&dev->ioctl_count, 0);
- atomic_set(&dev->vma_count, 0);
- dev->buf_use = 0;
- atomic_set(&dev->buf_alloc, 0);
-
- drm_dma_setup(dev);
-
- atomic_set(&dev->total_open, 0);
- atomic_set(&dev->total_close, 0);
- atomic_set(&dev->total_ioctl, 0);
- atomic_set(&dev->total_irq, 0);
- atomic_set(&dev->total_ctx, 0);
- atomic_set(&dev->total_locks, 0);
- atomic_set(&dev->total_unlocks, 0);
- atomic_set(&dev->total_contends, 0);
- atomic_set(&dev->total_sleeps, 0);
-
- for (i = 0; i < DRM_HASH_SIZE; i++) {
- dev->magiclist[i].head = NULL;
- dev->magiclist[i].tail = NULL;
- }
- dev->maplist = NULL;
- dev->map_count = 0;
- dev->vmalist = NULL;
- dev->lock.hw_lock = NULL;
- init_waitqueue_head(&dev->lock.lock_queue);
- dev->queue_count = 0;
- dev->queue_reserved = 0;
- dev->queue_slots = 0;
- dev->queuelist = NULL;
- dev->irq = 0;
- dev->context_flag = 0;
- dev->interrupt_flag = 0;
- dev->dma_flag = 0;
- dev->last_context = 0;
- dev->last_switch = 0;
- dev->last_checked = 0;
- init_timer(&dev->timer);
- init_waitqueue_head(&dev->context_wait);
-
- dev->ctx_start = 0;
- dev->lck_start = 0;
-
- dev->buf_rp = dev->buf;
- dev->buf_wp = dev->buf;
- dev->buf_end = dev->buf + DRM_BSZ;
- dev->buf_async = NULL;
- init_waitqueue_head(&dev->buf_readers);
- init_waitqueue_head(&dev->buf_writers);
-
- DRM_DEBUG("\n");
-
- /* The kernel's context could be created here, but is now created
- in drm_dma_enqueue. This is more resource-efficient for
- hardware that does not do DMA, but may mean that
- drm_select_queue fails between the time the interrupt is
- initialized and the time the queues are initialized. */
-
- return 0;
-}
-
-
-static int mga_takedown(drm_device_t *dev)
-{
- int i;
- drm_magic_entry_t *pt, *next;
- drm_map_t *map;
- drm_vma_entry_t *vma, *vma_next;
-
- DRM_DEBUG("\n");
-
- if (dev->dev_private) mga_dma_cleanup(dev);
- if (dev->irq) mga_irq_uninstall(dev);
-
- down(&dev->struct_sem);
- del_timer(&dev->timer);
-
- if (dev->devname) {
- drm_free(dev->devname, strlen(dev->devname)+1, DRM_MEM_DRIVER);
- dev->devname = NULL;
- }
-
- if (dev->unique) {
- drm_free(dev->unique, strlen(dev->unique)+1, DRM_MEM_DRIVER);
- dev->unique = NULL;
- dev->unique_len = 0;
- }
- /* Clear pid list */
- for (i = 0; i < DRM_HASH_SIZE; i++) {
- for (pt = dev->magiclist[i].head; pt; pt = next) {
- next = pt->next;
- drm_free(pt, sizeof(*pt), DRM_MEM_MAGIC);
- }
- dev->magiclist[i].head = dev->magiclist[i].tail = NULL;
- }
- /* Clear AGP information */
- if (dev->agp) {
- drm_agp_mem_t *entry;
- drm_agp_mem_t *nexte;
-
- /* Remove AGP resources, but leave dev->agp
- intact until cleanup is called. */
- for (entry = dev->agp->memory; entry; entry = nexte) {
- nexte = entry->next;
- if (entry->bound) drm_unbind_agp(entry->memory);
- drm_free_agp(entry->memory, entry->pages);
- drm_free(entry, sizeof(*entry), DRM_MEM_AGPLISTS);
- }
- dev->agp->memory = NULL;
-
- if (dev->agp->acquired) _drm_agp_release();
-
- dev->agp->acquired = 0;
- dev->agp->enabled = 0;
- }
- /* Clear vma list (only built for debugging) */
- if (dev->vmalist) {
- for (vma = dev->vmalist; vma; vma = vma_next) {
- vma_next = vma->next;
- drm_free(vma, sizeof(*vma), DRM_MEM_VMAS);
- }
- dev->vmalist = NULL;
- }
-
- /* Clear map area and mtrr information */
- if (dev->maplist) {
- for (i = 0; i < dev->map_count; i++) {
- map = dev->maplist[i];
- switch (map->type) {
- case _DRM_REGISTERS:
- case _DRM_FRAME_BUFFER:
-#ifdef CONFIG_MTRR
- if (map->mtrr >= 0) {
- int retcode;
- retcode = mtrr_del(map->mtrr,
- map->offset,
- map->size);
- DRM_DEBUG("mtrr_del = %d\n", retcode);
- }
-#endif
- drm_ioremapfree(map->handle, map->size);
- break;
- case _DRM_SHM:
- drm_free_pages((unsigned long)map->handle,
- drm_order(map->size)
- - PAGE_SHIFT,
- DRM_MEM_SAREA);
- break;
- case _DRM_AGP:
- break;
- }
- drm_free(map, sizeof(*map), DRM_MEM_MAPS);
- }
- drm_free(dev->maplist,
- dev->map_count * sizeof(*dev->maplist),
- DRM_MEM_MAPS);
- dev->maplist = NULL;
- dev->map_count = 0;
- }
-
- if (dev->queuelist) {
- for (i = 0; i < dev->queue_count; i++) {
- drm_waitlist_destroy(&dev->queuelist[i]->waitlist);
- if (dev->queuelist[i]) {
- drm_free(dev->queuelist[i],
- sizeof(*dev->queuelist[0]),
- DRM_MEM_QUEUES);
- dev->queuelist[i] = NULL;
- }
- }
- drm_free(dev->queuelist,
- dev->queue_slots * sizeof(*dev->queuelist),
- DRM_MEM_QUEUES);
- dev->queuelist = NULL;
- }
-
- drm_dma_takedown(dev);
-
- dev->queue_count = 0;
- if (dev->lock.hw_lock) {
- dev->lock.hw_lock = NULL; /* SHM removed */
- dev->lock.pid = 0;
- wake_up_interruptible(&dev->lock.lock_queue);
- }
- up(&dev->struct_sem);
-
- return 0;
-}
-
-/* mga_init is called via init_module at module load time, or via
- * linux/init/main.c (this is not currently supported). */
-
-static int __init mga_init(void)
-{
- int retcode;
- drm_device_t *dev = &mga_device;
-
- DRM_DEBUG("\n");
-
- memset((void *)dev, 0, sizeof(*dev));
- dev->count_lock = SPIN_LOCK_UNLOCKED;
- sema_init(&dev->struct_sem, 1);
-
-#ifdef MODULE
- drm_parse_options(mga);
-#endif
- if ((retcode = misc_register(&mga_misc))) {
- DRM_ERROR("Cannot register \"%s\"\n", MGA_NAME);
- return retcode;
- }
- dev->device = MKDEV(MISC_MAJOR, mga_misc.minor);
- dev->name = MGA_NAME;
-
- drm_mem_init();
- drm_proc_init(dev);
- dev->agp = drm_agp_init();
- if(dev->agp == NULL) {
- DRM_INFO("The mga drm module requires the agpgart module"
- " to function correctly\nPlease load the agpgart"
- " module before you load the mga module\n");
- drm_proc_cleanup();
- misc_deregister(&mga_misc);
- mga_takedown(dev);
- return -ENOMEM;
- }
-#ifdef CONFIG_MTRR
- dev->agp->agp_mtrr = mtrr_add(dev->agp->agp_info.aper_base,
- dev->agp->agp_info.aper_size * 1024 * 1024,
- MTRR_TYPE_WRCOMB,
- 1);
-#endif
- if((retcode = drm_ctxbitmap_init(dev))) {
- DRM_ERROR("Cannot allocate memory for context bitmap.\n");
- drm_proc_cleanup();
- misc_deregister(&mga_misc);
- mga_takedown(dev);
- return retcode;
- }
-
- DRM_INFO("Initialized %s %d.%d.%d %s on minor %d\n",
- MGA_NAME,
- MGA_MAJOR,
- MGA_MINOR,
- MGA_PATCHLEVEL,
- MGA_DATE,
- mga_misc.minor);
-
- return 0;
-}
-
-/* mga_cleanup is called via cleanup_module at module unload time. */
-
-static void __exit mga_cleanup(void)
-{
- drm_device_t *dev = &mga_device;
-
- DRM_DEBUG("\n");
-
- drm_proc_cleanup();
- if (misc_deregister(&mga_misc)) {
- DRM_ERROR("Cannot unload module\n");
- } else {
- DRM_INFO("Module unloaded\n");
- }
- drm_ctxbitmap_cleanup(dev);
-#ifdef CONFIG_MTRR
- if(dev->agp && dev->agp->agp_mtrr) {
- int retval;
- retval = mtrr_del(dev->agp->agp_mtrr,
- dev->agp->agp_info.aper_base,
- dev->agp->agp_info.aper_size * 1024*1024);
- DRM_DEBUG("mtrr_del = %d\n", retval);
- }
-#endif
-
- mga_takedown(dev);
- if (dev->agp) {
- drm_agp_uninit();
- drm_free(dev->agp, sizeof(*dev->agp), DRM_MEM_AGPLISTS);
- dev->agp = NULL;
- }
-}
-
-module_init(mga_init);
-module_exit(mga_cleanup);
-
-
-int mga_version(struct inode *inode, struct file *filp, unsigned int cmd,
- unsigned long arg)
-{
- drm_version_t version;
- int len;
-
- if (copy_from_user(&version,
- (drm_version_t *)arg,
- sizeof(version)))
- return -EFAULT;
-
-#define DRM_COPY(name,value) \
- len = strlen(value); \
- if (len > name##_len) len = name##_len; \
- name##_len = strlen(value); \
- if (len && name) { \
- if (copy_to_user(name, value, len)) \
- return -EFAULT; \
- }
-
- version.version_major = MGA_MAJOR;
- version.version_minor = MGA_MINOR;
- version.version_patchlevel = MGA_PATCHLEVEL;
-
- DRM_COPY(version.name, MGA_NAME);
- DRM_COPY(version.date, MGA_DATE);
- DRM_COPY(version.desc, MGA_DESC);
-
- if (copy_to_user((drm_version_t *)arg,
- &version,
- sizeof(version)))
- return -EFAULT;
- return 0;
-}
-
-int mga_open(struct inode *inode, struct file *filp)
-{
- drm_device_t *dev = &mga_device;
- int retcode = 0;
-
- DRM_DEBUG("open_count = %d\n", dev->open_count);
- if (!(retcode = drm_open_helper(inode, filp, dev))) {
-#if LINUX_VERSION_CODE < 0x020333
- MOD_INC_USE_COUNT; /* Needed before Linux 2.3.51 */
-#endif
- atomic_inc(&dev->total_open);
- spin_lock(&dev->count_lock);
- if (!dev->open_count++) {
- spin_unlock(&dev->count_lock);
- return mga_setup(dev);
- }
- spin_unlock(&dev->count_lock);
- }
- return retcode;
-}
-
-int mga_release(struct inode *inode, struct file *filp)
-{
- drm_file_t *priv = filp->private_data;
- drm_device_t *dev;
- int retcode = 0;
-
- lock_kernel();
- dev = priv->dev;
- DRM_DEBUG("pid = %d, device = 0x%x, open_count = %d\n",
- current->pid, dev->device, dev->open_count);
-
- if (dev->lock.hw_lock && _DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock)
- && dev->lock.pid == current->pid) {
- mga_reclaim_buffers(dev, priv->pid);
- DRM_INFO("Process %d dead (ctx %d, d_s = 0x%02lx)\n",
- current->pid,
- _DRM_LOCKING_CONTEXT(dev->lock.hw_lock->lock),
- dev->dev_private ?
- ((drm_mga_private_t *)dev->dev_private)
- ->dispatch_status
- : 0);
-
- if (dev->dev_private)
- ((drm_mga_private_t *)dev->dev_private)
- ->dispatch_status &= MGA_IN_DISPATCH;
-
- drm_lock_free(dev,
- &dev->lock.hw_lock->lock,
- _DRM_LOCKING_CONTEXT(dev->lock.hw_lock->lock));
- } else if (dev->lock.hw_lock) {
- /* The lock is required to reclaim buffers */
- DECLARE_WAITQUEUE(entry, current);
- add_wait_queue(&dev->lock.lock_queue, &entry);
- for (;;) {
- current->state = TASK_INTERRUPTIBLE;
- if (!dev->lock.hw_lock) {
- /* Device has been unregistered */
- retcode = -EINTR;
- break;
- }
- if (drm_lock_take(&dev->lock.hw_lock->lock,
- DRM_KERNEL_CONTEXT)) {
- dev->lock.pid = priv->pid;
- dev->lock.lock_time = jiffies;
- atomic_inc(&dev->total_locks);
- break; /* Got lock */
- }
- /* Contention */
- atomic_inc(&dev->total_sleeps);
- schedule();
- if (signal_pending(current)) {
- retcode = -ERESTARTSYS;
- break;
- }
- }
- current->state = TASK_RUNNING;
- remove_wait_queue(&dev->lock.lock_queue, &entry);
- if(!retcode) {
- mga_reclaim_buffers(dev, priv->pid);
- if (dev->dev_private)
- ((drm_mga_private_t *)dev->dev_private)
- ->dispatch_status &= MGA_IN_DISPATCH;
- drm_lock_free(dev, &dev->lock.hw_lock->lock,
- DRM_KERNEL_CONTEXT);
- }
- }
- drm_fasync(-1, filp, 0);
-
- down(&dev->struct_sem);
- if (priv->remove_auth_on_close == 1) {
- drm_file_t *temp = dev->file_first;
- while(temp) {
- temp->authenticated = 0;
- temp = temp->next;
- }
- }
- if (priv->prev) priv->prev->next = priv->next;
- else dev->file_first = priv->next;
- if (priv->next) priv->next->prev = priv->prev;
- else dev->file_last = priv->prev;
- up(&dev->struct_sem);
-
- drm_free(priv, sizeof(*priv), DRM_MEM_FILES);
-#if LINUX_VERSION_CODE < 0x020333
- MOD_DEC_USE_COUNT; /* Needed before Linux 2.3.51 */
-#endif
- atomic_inc(&dev->total_close);
- spin_lock(&dev->count_lock);
- if (!--dev->open_count) {
- if (atomic_read(&dev->ioctl_count) || dev->blocked) {
- DRM_ERROR("Device busy: %d %d\n",
- atomic_read(&dev->ioctl_count),
- dev->blocked);
- spin_unlock(&dev->count_lock);
- unlock_kernel();
- return -EBUSY;
- }
- spin_unlock(&dev->count_lock);
- unlock_kernel();
- return mga_takedown(dev);
- }
- spin_unlock(&dev->count_lock);
- unlock_kernel();
- return retcode;
-}
-
-
-/* drm_ioctl is called whenever a process performs an ioctl on /dev/drm. */
-
-int mga_ioctl(struct inode *inode, struct file *filp, unsigned int cmd,
- unsigned long arg)
-{
- int nr = DRM_IOCTL_NR(cmd);
- drm_file_t *priv = filp->private_data;
- drm_device_t *dev = priv->dev;
- int retcode = 0;
- drm_ioctl_desc_t *ioctl;
- drm_ioctl_t *func;
-
- atomic_inc(&dev->ioctl_count);
- atomic_inc(&dev->total_ioctl);
- ++priv->ioctl_count;
-
- if (nr >= MGA_IOCTL_COUNT) {
- retcode = -EINVAL;
- } else {
- ioctl = &mga_ioctls[nr];
- func = ioctl->func;
-
- if (!func) {
- DRM_DEBUG("no function: pid = %d, cmd = 0x%02x,"
- " nr = 0x%02x, dev 0x%x, auth = %d\n",
- current->pid, cmd, nr, dev->device,
- priv->authenticated);
- retcode = -EINVAL;
- } else if ((ioctl->root_only && !capable(CAP_SYS_ADMIN))
- || (ioctl->auth_needed && !priv->authenticated)) {
- retcode = -EACCES;
- } else {
- retcode = (func)(inode, filp, cmd, arg);
- }
- }
-
- atomic_dec(&dev->ioctl_count);
- return retcode;
-}
-
-int mga_unlock(struct inode *inode, struct file *filp, unsigned int cmd,
- unsigned long arg)
-{
- drm_file_t *priv = filp->private_data;
- drm_device_t *dev = priv->dev;
- drm_lock_t lock;
-
- if (copy_from_user(&lock, (drm_lock_t *)arg, sizeof(lock)))
- return -EFAULT;
-
- if (lock.context == DRM_KERNEL_CONTEXT) {
- DRM_ERROR("Process %d using kernel context %d\n",
- current->pid, lock.context);
- return -EINVAL;
- }
-
- atomic_inc(&dev->total_unlocks);
- if (_DRM_LOCK_IS_CONT(dev->lock.hw_lock->lock))
- atomic_inc(&dev->total_contends);
- drm_lock_transfer(dev, &dev->lock.hw_lock->lock, DRM_KERNEL_CONTEXT);
- mga_dma_schedule(dev, 1);
-
- if (drm_lock_free(dev, &dev->lock.hw_lock->lock,
- DRM_KERNEL_CONTEXT)) DRM_ERROR("\n");
-
- unblock_all_signals();
- return 0;
-}
+#define DRIVER_AUTHOR "Gareth Hughes, VA Linux Systems Inc."
+
+#define DRIVER_NAME "mga"
+#define DRIVER_DESC "Matrox G200/G400"
+#define DRIVER_DATE "20010319"
+
+#define DRIVER_MAJOR 3
+#define DRIVER_MINOR 0
+#define DRIVER_PATCHLEVEL 1
+
+#define DRIVER_IOCTLS \
+ [DRM_IOCTL_NR(DRM_IOCTL_DMA)] = { mga_dma_buffers, 1, 0 }, \
+ [DRM_IOCTL_NR(DRM_IOCTL_MGA_INIT)] = { mga_dma_init, 1, 1 }, \
+ [DRM_IOCTL_NR(DRM_IOCTL_MGA_FLUSH)] = { mga_dma_flush, 1, 0 }, \
+ [DRM_IOCTL_NR(DRM_IOCTL_MGA_RESET)] = { mga_dma_reset, 1, 0 }, \
+ [DRM_IOCTL_NR(DRM_IOCTL_MGA_SWAP)] = { mga_dma_swap, 1, 0 }, \
+ [DRM_IOCTL_NR(DRM_IOCTL_MGA_CLEAR)] = { mga_dma_clear, 1, 0 }, \
+ [DRM_IOCTL_NR(DRM_IOCTL_MGA_VERTEX)] = { mga_dma_vertex, 1, 0 }, \
+ [DRM_IOCTL_NR(DRM_IOCTL_MGA_INDICES)] = { mga_dma_indices, 1, 0 }, \
+ [DRM_IOCTL_NR(DRM_IOCTL_MGA_ILOAD)] = { mga_dma_iload, 1, 0 }, \
+ [DRM_IOCTL_NR(DRM_IOCTL_MGA_BLIT)] = { mga_dma_blit, 1, 0 },
+
+
+#define __HAVE_COUNTERS 3
+#define __HAVE_COUNTER6 _DRM_STAT_IRQ
+#define __HAVE_COUNTER7 _DRM_STAT_PRIMARY
+#define __HAVE_COUNTER8 _DRM_STAT_SECONDARY
+
+
+#include "drm_agpsupport.h"
+#include "drm_auth.h"
+#include "drm_bufs.h"
+#include "drm_context.h"
+#include "drm_dma.h"
+#include "drm_drawable.h"
+#include "drm_drv.h"
+#include "drm_fops.h"
+#include "drm_init.h"
+#include "drm_ioctl.h"
+#include "drm_lock.h"
+#include "drm_memory.h"
+#include "drm_proc.h"
+#include "drm_vm.h"
+#include "drm_stub.h"
diff --git a/linux-core/r128_drv.c b/linux-core/r128_drv.c
index cf258925..daae0f87 100644
--- a/linux-core/r128_drv.c
+++ b/linux-core/r128_drv.c
@@ -1,7 +1,7 @@
/* r128_drv.c -- ATI Rage 128 driver -*- linux-c -*-
* Created: Mon Dec 13 09:47:27 1999 by faith@precisioninsight.com
*
- * Copyright 1999, 2000 Precision Insight, Inc., Cedar Park, Texas.
+ * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
* Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
* All Rights Reserved.
*
@@ -19,693 +19,72 @@
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
- * DEALINGS IN THE SOFTWARE.
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
*
* Authors:
* Rickard E. (Rik) Faith <faith@valinux.com>
- * Kevin E. Martin <martin@valinux.com>
* Gareth Hughes <gareth@valinux.com>
- *
*/
#include <linux/config.h>
+#include "r128.h"
#include "drmP.h"
#include "r128_drv.h"
-#define R128_NAME "r128"
-#define R128_DESC "ATI Rage 128"
-#define R128_DATE "20010101"
-#define R128_MAJOR 2
-#define R128_MINOR 1
-#define R128_PATCHLEVEL 4
-
-static drm_device_t r128_device;
-drm_ctx_t r128_res_ctx;
-
-static struct file_operations r128_fops = {
-#if LINUX_VERSION_CODE >= 0x020400
- /* This started being used during 2.4.0-test */
- owner: THIS_MODULE,
-#endif
- open: r128_open,
- flush: drm_flush,
- release: r128_release,
- ioctl: r128_ioctl,
- mmap: drm_mmap,
- read: drm_read,
- fasync: drm_fasync,
- poll: drm_poll,
-};
-
-static struct miscdevice r128_misc = {
- minor: MISC_DYNAMIC_MINOR,
- name: R128_NAME,
- fops: &r128_fops,
-};
-
-static drm_ioctl_desc_t r128_ioctls[] = {
- [DRM_IOCTL_NR(DRM_IOCTL_VERSION)] = { r128_version, 0, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_GET_UNIQUE)] = { drm_getunique, 0, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_GET_MAGIC)] = { drm_getmagic, 0, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_IRQ_BUSID)] = { drm_irq_busid, 0, 1 },
-
- [DRM_IOCTL_NR(DRM_IOCTL_SET_UNIQUE)] = { drm_setunique, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_BLOCK)] = { drm_block, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_UNBLOCK)] = { drm_unblock, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_AUTH_MAGIC)] = { drm_authmagic, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_ADD_MAP)] = { drm_addmap, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_ADD_BUFS)] = { r128_addbufs, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_MARK_BUFS)] = { drm_markbufs, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_INFO_BUFS)] = { drm_infobufs, 1, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_MAP_BUFS)] = { r128_mapbufs, 1, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_FREE_BUFS)] = { drm_freebufs, 1, 0 },
-
- [DRM_IOCTL_NR(DRM_IOCTL_ADD_CTX)] = { r128_addctx, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_RM_CTX)] = { r128_rmctx, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_MOD_CTX)] = { r128_modctx, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_GET_CTX)] = { r128_getctx, 1, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_SWITCH_CTX)] = { r128_switchctx, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_NEW_CTX)] = { r128_newctx, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_RES_CTX)] = { r128_resctx, 1, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_ADD_DRAW)] = { drm_adddraw, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_RM_DRAW)] = { drm_rmdraw, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_DMA)] = { r128_cce_buffers, 1, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_LOCK)] = { r128_lock, 1, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_UNLOCK)] = { r128_unlock, 1, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_FINISH)] = { drm_finish, 1, 0 },
-
-#if defined(CONFIG_AGP) || defined(CONFIG_AGP_MODULE)
- [DRM_IOCTL_NR(DRM_IOCTL_AGP_ACQUIRE)] = { drm_agp_acquire, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_AGP_RELEASE)] = { drm_agp_release, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_AGP_ENABLE)] = { drm_agp_enable, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_AGP_INFO)] = { drm_agp_info, 1, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_AGP_ALLOC)] = { drm_agp_alloc, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_AGP_FREE)] = { drm_agp_free, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_AGP_BIND)] = { drm_agp_bind, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_AGP_UNBIND)] = { drm_agp_unbind, 1, 1 },
-#endif
-
- [DRM_IOCTL_NR(DRM_IOCTL_R128_INIT)] = { r128_cce_init, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_R128_CCE_START)] = { r128_cce_start, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_R128_CCE_STOP)] = { r128_cce_stop, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_R128_CCE_RESET)] = { r128_cce_reset, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_R128_CCE_IDLE)] = { r128_cce_idle, 1, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_R128_RESET)] = { r128_engine_reset, 1, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_R128_FULLSCREEN)]= { r128_fullscreen, 1, 0 },
-
- [DRM_IOCTL_NR(DRM_IOCTL_R128_SWAP)] = { r128_cce_swap, 1, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_R128_CLEAR)] = { r128_cce_clear, 1, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_R128_VERTEX)] = { r128_cce_vertex, 1, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_R128_INDICES)] = { r128_cce_indices, 1, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_R128_BLIT)] = { r128_cce_blit, 1, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_R128_DEPTH)] = { r128_cce_depth, 1, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_R128_STIPPLE)] = { r128_cce_stipple, 1, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_R128_INDIRECT)] = { r128_cce_indirect, 1, 1 },
-};
-#define R128_IOCTL_COUNT DRM_ARRAY_SIZE(r128_ioctls)
-
-#ifdef MODULE
-static char *r128 = NULL;
-#endif
-
-MODULE_AUTHOR("VA Linux Systems, Inc.");
-MODULE_DESCRIPTION("r128");
-MODULE_PARM(r128, "s");
-
-#ifndef MODULE
-/* r128_options is called by the kernel to parse command-line options
- * passed via the boot-loader (e.g., LILO). It calls the insmod option
- * routine, drm_parse_drm.
- */
-
-static int __init r128_options(char *str)
-{
- drm_parse_options(str);
- return 1;
-}
-
-__setup("r128=", r128_options);
-#endif
-
-static int r128_setup(drm_device_t *dev)
-{
- int i;
-
- atomic_set(&dev->ioctl_count, 0);
- atomic_set(&dev->vma_count, 0);
- dev->buf_use = 0;
- atomic_set(&dev->buf_alloc, 0);
-
- drm_dma_setup(dev);
-
- atomic_set(&dev->total_open, 0);
- atomic_set(&dev->total_close, 0);
- atomic_set(&dev->total_ioctl, 0);
- atomic_set(&dev->total_irq, 0);
- atomic_set(&dev->total_ctx, 0);
- atomic_set(&dev->total_locks, 0);
- atomic_set(&dev->total_unlocks, 0);
- atomic_set(&dev->total_contends, 0);
- atomic_set(&dev->total_sleeps, 0);
-
- for (i = 0; i < DRM_HASH_SIZE; i++) {
- dev->magiclist[i].head = NULL;
- dev->magiclist[i].tail = NULL;
- }
- dev->maplist = NULL;
- dev->map_count = 0;
- dev->vmalist = NULL;
- dev->lock.hw_lock = NULL;
- init_waitqueue_head(&dev->lock.lock_queue);
- dev->queue_count = 0;
- dev->queue_reserved = 0;
- dev->queue_slots = 0;
- dev->queuelist = NULL;
- dev->irq = 0;
- dev->context_flag = 0;
- dev->interrupt_flag = 0;
- dev->dma_flag = 0;
- dev->last_context = 0;
- dev->last_switch = 0;
- dev->last_checked = 0;
- init_timer(&dev->timer);
- init_waitqueue_head(&dev->context_wait);
-
- dev->ctx_start = 0;
- dev->lck_start = 0;
-
- dev->buf_rp = dev->buf;
- dev->buf_wp = dev->buf;
- dev->buf_end = dev->buf + DRM_BSZ;
- dev->buf_async = NULL;
- init_waitqueue_head(&dev->buf_readers);
- init_waitqueue_head(&dev->buf_writers);
-
- r128_res_ctx.handle=-1;
-
- DRM_DEBUG("\n");
-
- /* The kernel's context could be created here, but is now created
- in drm_dma_enqueue. This is more resource-efficient for
- hardware that does not do DMA, but may mean that
- drm_select_queue fails between the time the interrupt is
- initialized and the time the queues are initialized. */
-
- return 0;
-}
-
-
-static int r128_takedown(drm_device_t *dev)
-{
- int i;
- drm_magic_entry_t *pt, *next;
- drm_map_t *map;
- drm_vma_entry_t *vma, *vma_next;
-
- DRM_DEBUG("\n");
-
- down(&dev->struct_sem);
- del_timer(&dev->timer);
-
- if (dev->devname) {
- drm_free(dev->devname, strlen(dev->devname)+1, DRM_MEM_DRIVER);
- dev->devname = NULL;
- }
-
- if (dev->unique) {
- drm_free(dev->unique, strlen(dev->unique)+1, DRM_MEM_DRIVER);
- dev->unique = NULL;
- dev->unique_len = 0;
- }
- /* Clear pid list */
- for (i = 0; i < DRM_HASH_SIZE; i++) {
- for (pt = dev->magiclist[i].head; pt; pt = next) {
- next = pt->next;
- drm_free(pt, sizeof(*pt), DRM_MEM_MAGIC);
- }
- dev->magiclist[i].head = dev->magiclist[i].tail = NULL;
- }
-
-#if defined(CONFIG_AGP) || defined(CONFIG_AGP_MODULE)
- /* Clear AGP information */
- if (dev->agp) {
- drm_agp_mem_t *entry;
- drm_agp_mem_t *nexte;
-
- /* Remove AGP resources, but leave dev->agp
- intact until r128_cleanup is called. */
- for (entry = dev->agp->memory; entry; entry = nexte) {
- nexte = entry->next;
- if (entry->bound) drm_unbind_agp(entry->memory);
- drm_free_agp(entry->memory, entry->pages);
- drm_free(entry, sizeof(*entry), DRM_MEM_AGPLISTS);
- }
- dev->agp->memory = NULL;
-
- if (dev->agp->acquired) _drm_agp_release();
-
- dev->agp->acquired = 0;
- dev->agp->enabled = 0;
- }
-#endif
-
- /* Clear vma list (only built for debugging) */
- if (dev->vmalist) {
- for (vma = dev->vmalist; vma; vma = vma_next) {
- vma_next = vma->next;
- drm_free(vma, sizeof(*vma), DRM_MEM_VMAS);
- }
- dev->vmalist = NULL;
- }
-
- /* Clear map area and mtrr information */
- if (dev->maplist) {
- for (i = 0; i < dev->map_count; i++) {
- map = dev->maplist[i];
- switch (map->type) {
- case _DRM_REGISTERS:
- case _DRM_FRAME_BUFFER:
-#ifdef CONFIG_MTRR
- if (map->mtrr >= 0) {
- int retcode;
- retcode = mtrr_del(map->mtrr,
- map->offset,
- map->size);
- DRM_DEBUG("mtrr_del = %d\n", retcode);
- }
-#endif
- drm_ioremapfree(map->handle, map->size);
- break;
- case _DRM_SHM:
- drm_free_pages((unsigned long)map->handle,
- drm_order(map->size)
- - PAGE_SHIFT,
- DRM_MEM_SAREA);
- break;
- case _DRM_AGP:
- /* Do nothing here, because this is all
- handled in the AGP/GART driver. */
- break;
- }
- drm_free(map, sizeof(*map), DRM_MEM_MAPS);
- }
- drm_free(dev->maplist,
- dev->map_count * sizeof(*dev->maplist),
- DRM_MEM_MAPS);
- dev->maplist = NULL;
- dev->map_count = 0;
- }
-
- drm_dma_takedown(dev);
-
- dev->queue_count = 0;
- if (dev->lock.hw_lock) {
- dev->lock.hw_lock = NULL; /* SHM removed */
- dev->lock.pid = 0;
- wake_up_interruptible(&dev->lock.lock_queue);
- }
- up(&dev->struct_sem);
-
- return 0;
-}
-
-/* r128_init is called via init_module at module load time, or via
- * linux/init/main.c (this is not currently supported). */
-
-static int __init r128_init(void)
-{
- int retcode;
- drm_device_t *dev = &r128_device;
-
- DRM_DEBUG("\n");
-
- memset((void *)dev, 0, sizeof(*dev));
- dev->count_lock = SPIN_LOCK_UNLOCKED;
- sema_init(&dev->struct_sem, 1);
-
-#ifdef MODULE
- drm_parse_options(r128);
-#endif
-
- if ((retcode = misc_register(&r128_misc))) {
- DRM_ERROR("Cannot register \"%s\"\n", R128_NAME);
- return retcode;
- }
- dev->device = MKDEV(MISC_MAJOR, r128_misc.minor);
- dev->name = R128_NAME;
-
- drm_mem_init();
- drm_proc_init(dev);
-
-#if defined(CONFIG_AGP) || defined(CONFIG_AGP_MODULE)
- dev->agp = drm_agp_init();
- if (dev->agp == NULL) {
- DRM_ERROR("Cannot initialize agpgart module.\n");
- drm_proc_cleanup();
- misc_deregister(&r128_misc);
- r128_takedown(dev);
- return -ENOMEM;
- }
-
-#ifdef CONFIG_MTRR
- dev->agp->agp_mtrr = mtrr_add(dev->agp->agp_info.aper_base,
- dev->agp->agp_info.aper_size*1024*1024,
- MTRR_TYPE_WRCOMB,
- 1);
-#endif
-#endif
-
- if((retcode = drm_ctxbitmap_init(dev))) {
- DRM_ERROR("Cannot allocate memory for context bitmap.\n");
- drm_proc_cleanup();
- misc_deregister(&r128_misc);
- r128_takedown(dev);
- return retcode;
- }
-
- DRM_INFO("Initialized %s %d.%d.%d %s on minor %d\n",
- R128_NAME,
- R128_MAJOR,
- R128_MINOR,
- R128_PATCHLEVEL,
- R128_DATE,
- r128_misc.minor);
-
- return 0;
-}
-
-/* r128_cleanup is called via cleanup_module at module unload time. */
-
-static void __exit r128_cleanup(void)
-{
- drm_device_t *dev = &r128_device;
-
- DRM_DEBUG("\n");
-
- drm_proc_cleanup();
- if (misc_deregister(&r128_misc)) {
- DRM_ERROR("Cannot unload module\n");
- } else {
- DRM_INFO("Module unloaded\n");
- }
- drm_ctxbitmap_cleanup(dev);
- r128_takedown(dev);
-#if defined(CONFIG_AGP) || defined(CONFIG_AGP_MODULE)
- if (dev->agp) {
- drm_agp_uninit();
- drm_free(dev->agp, sizeof(*dev->agp), DRM_MEM_AGPLISTS);
- dev->agp = NULL;
- }
-#endif
-}
-
-module_init(r128_init);
-module_exit(r128_cleanup);
-
-
-int r128_version(struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg)
-{
- drm_version_t version;
- int len;
-
- if (copy_from_user(&version,
- (drm_version_t *)arg,
- sizeof(version)))
- return -EFAULT;
-
-#define DRM_COPY(name,value) \
- len = strlen(value); \
- if (len > name##_len) len = name##_len; \
- name##_len = strlen(value); \
- if (len && name) { \
- if (copy_to_user(name, value, len)) \
- return -EFAULT; \
- }
-
- version.version_major = R128_MAJOR;
- version.version_minor = R128_MINOR;
- version.version_patchlevel = R128_PATCHLEVEL;
-
- DRM_COPY(version.name, R128_NAME);
- DRM_COPY(version.date, R128_DATE);
- DRM_COPY(version.desc, R128_DESC);
-
- if (copy_to_user((drm_version_t *)arg,
- &version,
- sizeof(version)))
- return -EFAULT;
- return 0;
-}
-
-int r128_open(struct inode *inode, struct file *filp)
-{
- drm_device_t *dev = &r128_device;
- int retcode = 0;
-
- DRM_DEBUG("open_count = %d\n", dev->open_count);
- if (!(retcode = drm_open_helper(inode, filp, dev))) {
-#if LINUX_VERSION_CODE < 0x020333
- MOD_INC_USE_COUNT; /* Needed before Linux 2.3.51 */
-#endif
- atomic_inc(&dev->total_open);
- spin_lock(&dev->count_lock);
- if (!dev->open_count++) {
- spin_unlock(&dev->count_lock);
- return r128_setup(dev);
- }
- spin_unlock(&dev->count_lock);
- }
-
- return retcode;
-}
-
-int r128_release(struct inode *inode, struct file *filp)
-{
- drm_file_t *priv = filp->private_data;
- drm_device_t *dev;
- int retcode = 0;
-
- lock_kernel();
- dev = priv->dev;
-
- DRM_DEBUG("open_count = %d\n", dev->open_count);
-
- /* Force the cleanup of page flipping when required */
- if ( dev->dev_private ) {
- drm_r128_private_t *dev_priv = dev->dev_private;
- if ( dev_priv->page_flipping ) {
- r128_do_cleanup_pageflip( dev );
- }
- }
-
- if (!(retcode = drm_release(inode, filp))) {
-#if LINUX_VERSION_CODE < 0x020333
- MOD_DEC_USE_COUNT; /* Needed before Linux 2.3.51 */
-#endif
- atomic_inc(&dev->total_close);
- spin_lock(&dev->count_lock);
- if (!--dev->open_count) {
- if (atomic_read(&dev->ioctl_count) || dev->blocked) {
- DRM_ERROR("Device busy: %d %d\n",
- atomic_read(&dev->ioctl_count),
- dev->blocked);
- spin_unlock(&dev->count_lock);
- unlock_kernel();
- return -EBUSY;
- }
- spin_unlock(&dev->count_lock);
- unlock_kernel();
- return r128_takedown(dev);
- }
- spin_unlock(&dev->count_lock);
- }
-
- unlock_kernel();
- return retcode;
-}
-
-/* r128_ioctl is called whenever a process performs an ioctl on /dev/drm. */
-int r128_ioctl(struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg)
-{
- int nr = DRM_IOCTL_NR(cmd);
- drm_file_t *priv = filp->private_data;
- drm_device_t *dev = priv->dev;
- int retcode = 0;
- drm_ioctl_desc_t *ioctl;
- drm_ioctl_t *func;
-
- atomic_inc(&dev->ioctl_count);
- atomic_inc(&dev->total_ioctl);
- ++priv->ioctl_count;
+#define DRIVER_AUTHOR "Gareth Hughes, VA Linux Systems Inc."
+
+#define DRIVER_NAME "r128"
+#define DRIVER_DESC "ATI Rage 128"
+#define DRIVER_DATE "20010308"
+
+#define DRIVER_MAJOR 2
+#define DRIVER_MINOR 1
+#define DRIVER_PATCHLEVEL 5
+
+#define DRIVER_IOCTLS \
+ [DRM_IOCTL_NR(DRM_IOCTL_DMA)] = { r128_cce_buffers, 1, 0 }, \
+ [DRM_IOCTL_NR(DRM_IOCTL_R128_INIT)] = { r128_cce_init, 1, 1 }, \
+ [DRM_IOCTL_NR(DRM_IOCTL_R128_CCE_START)] = { r128_cce_start, 1, 1 }, \
+ [DRM_IOCTL_NR(DRM_IOCTL_R128_CCE_STOP)] = { r128_cce_stop, 1, 1 }, \
+ [DRM_IOCTL_NR(DRM_IOCTL_R128_CCE_RESET)] = { r128_cce_reset, 1, 1 }, \
+ [DRM_IOCTL_NR(DRM_IOCTL_R128_CCE_IDLE)] = { r128_cce_idle, 1, 0 }, \
+ [DRM_IOCTL_NR(DRM_IOCTL_R128_RESET)] = { r128_engine_reset, 1, 0 }, \
+ [DRM_IOCTL_NR(DRM_IOCTL_R128_FULLSCREEN)] = { r128_fullscreen, 1, 0 }, \
+ [DRM_IOCTL_NR(DRM_IOCTL_R128_SWAP)] = { r128_cce_swap, 1, 0 }, \
+ [DRM_IOCTL_NR(DRM_IOCTL_R128_CLEAR)] = { r128_cce_clear, 1, 0 }, \
+ [DRM_IOCTL_NR(DRM_IOCTL_R128_VERTEX)] = { r128_cce_vertex, 1, 0 }, \
+ [DRM_IOCTL_NR(DRM_IOCTL_R128_INDICES)] = { r128_cce_indices, 1, 0 }, \
+ [DRM_IOCTL_NR(DRM_IOCTL_R128_BLIT)] = { r128_cce_blit, 1, 0 }, \
+ [DRM_IOCTL_NR(DRM_IOCTL_R128_DEPTH)] = { r128_cce_depth, 1, 0 }, \
+ [DRM_IOCTL_NR(DRM_IOCTL_R128_STIPPLE)] = { r128_cce_stipple, 1, 0 }, \
+ [DRM_IOCTL_NR(DRM_IOCTL_R128_INDIRECT)] = { r128_cce_indirect, 1, 1 },
- DRM_DEBUG("pid = %d, cmd = 0x%02x, nr = 0x%02x, dev 0x%x, auth = %d\n",
- current->pid, cmd, nr, dev->device, priv->authenticated);
- if (nr >= R128_IOCTL_COUNT) {
- retcode = -EINVAL;
- } else {
- ioctl = &r128_ioctls[nr];
- func = ioctl->func;
-
- if (!func) {
- DRM_DEBUG("no function\n");
- retcode = -EINVAL;
- } else if ((ioctl->root_only && !capable(CAP_SYS_ADMIN))
- || (ioctl->auth_needed && !priv->authenticated)) {
- retcode = -EACCES;
- } else {
- retcode = (func)(inode, filp, cmd, arg);
- }
- }
-
-#if 0
- if ( retcode ) {
- DRM_INFO( "%s 0x%x ret = %d\n", __FUNCTION__, nr, retcode );
- }
-#endif
-
- atomic_dec(&dev->ioctl_count);
- return retcode;
-}
-
-int r128_lock(struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg)
-{
- drm_file_t *priv = filp->private_data;
- drm_device_t *dev = priv->dev;
- DECLARE_WAITQUEUE(entry, current);
- int ret = 0;
- drm_lock_t lock;
-#if DRM_DMA_HISTOGRAM
- cycles_t start;
-
- dev->lck_start = start = get_cycles();
-#endif
-
- if (copy_from_user(&lock, (drm_lock_t *)arg, sizeof(lock)))
- return -EFAULT;
-
- if (lock.context == DRM_KERNEL_CONTEXT) {
- DRM_ERROR("Process %d using kernel context %d\n",
- current->pid, lock.context);
- return -EINVAL;
- }
-
- DRM_DEBUG("%d (pid %d) requests lock (0x%08x), flags = 0x%08x\n",
- lock.context, current->pid, dev->lock.hw_lock->lock,
- lock.flags);
-
- if (lock.context < 0)
- return -EINVAL;
-
- if (!ret) {
- add_wait_queue(&dev->lock.lock_queue, &entry);
- for (;;) {
- current->state = TASK_INTERRUPTIBLE;
- if (!dev->lock.hw_lock) {
- /* Device has been unregistered */
- ret = -EINTR;
- break;
- }
- if (drm_lock_take(&dev->lock.hw_lock->lock,
- lock.context)) {
- dev->lock.pid = current->pid;
- dev->lock.lock_time = jiffies;
- atomic_inc(&dev->total_locks);
- break; /* Got lock */
- }
-
- /* Contention */
- atomic_inc(&dev->total_sleeps);
- schedule();
- if (signal_pending(current)) {
- ret = -ERESTARTSYS;
- break;
- }
- }
- current->state = TASK_RUNNING;
- remove_wait_queue(&dev->lock.lock_queue, &entry);
- }
-
- if (!ret) {
- sigemptyset(&dev->sigmask);
- sigaddset(&dev->sigmask, SIGSTOP);
- sigaddset(&dev->sigmask, SIGTSTP);
- sigaddset(&dev->sigmask, SIGTTIN);
- sigaddset(&dev->sigmask, SIGTTOU);
- dev->sigdata.context = lock.context;
- dev->sigdata.lock = dev->lock.hw_lock;
- block_all_signals(drm_notifier, &dev->sigdata, &dev->sigmask);
- if (lock.flags & _DRM_LOCK_READY) {
- /* Wait for space in DMA/FIFO */
- }
- if (lock.flags & _DRM_LOCK_QUIESCENT) {
- /* Make hardware quiescent */
- DRM_DEBUG( "not quiescent!\n" );
#if 0
- r128_quiescent(dev);
-#endif
- }
- }
-
-#if LINUX_VERSION_CODE < 0x020400
- if (lock.context != r128_res_ctx.handle) {
- current->counter = 5;
- current->priority = DEF_PRIORITY/4;
- }
-#endif
- DRM_DEBUG("%d %s\n", lock.context, ret ? "interrupted" : "has lock");
-
-#if DRM_DMA_HISTOGRAM
- atomic_inc(&dev->histo.lacq[drm_histogram_slot(get_cycles() - start)]);
-#endif
-
- return ret;
-}
-
-
-int r128_unlock(struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg)
-{
- drm_file_t *priv = filp->private_data;
- drm_device_t *dev = priv->dev;
- drm_lock_t lock;
-
- if (copy_from_user(&lock, (drm_lock_t *)arg, sizeof(lock)))
- return -EFAULT;
-
- if (lock.context == DRM_KERNEL_CONTEXT) {
- DRM_ERROR("Process %d using kernel context %d\n",
- current->pid, lock.context);
- return -EINVAL;
- }
-
- DRM_DEBUG("%d frees lock (%d holds)\n",
- lock.context,
- _DRM_LOCKING_CONTEXT(dev->lock.hw_lock->lock));
- atomic_inc(&dev->total_unlocks);
- if (_DRM_LOCK_IS_CONT(dev->lock.hw_lock->lock))
- atomic_inc(&dev->total_contends);
- drm_lock_transfer(dev, &dev->lock.hw_lock->lock, DRM_KERNEL_CONTEXT);
- /* FIXME: Try to send data to card here */
- if (!dev->context_flag) {
- if (drm_lock_free(dev, &dev->lock.hw_lock->lock,
- DRM_KERNEL_CONTEXT)) {
- DRM_ERROR("\n");
- }
- }
-
-#if LINUX_VERSION_CODE < 0x020400
- if (lock.context != r128_res_ctx.handle) {
- current->counter = 5;
- current->priority = DEF_PRIORITY;
- }
-#endif
- unblock_all_signals();
- return 0;
-}
+/* GH: Count data sent to card via ring or vertex/indirect buffers.
+ */
+#define __HAVE_COUNTERS 3
+#define __HAVE_COUNTER6 _DRM_STAT_IRQ
+#define __HAVE_COUNTER7 _DRM_STAT_PRIMARY
+#define __HAVE_COUNTER8 _DRM_STAT_SECONDARY
+#endif
+
+
+#include "drm_agpsupport.h"
+#include "drm_auth.h"
+#include "drm_bufs.h"
+#include "drm_context.h"
+#include "drm_dma.h"
+#include "drm_drawable.h"
+#include "drm_drv.h"
+#include "drm_fops.h"
+#include "drm_init.h"
+#include "drm_ioctl.h"
+#include "drm_lock.h"
+#include "drm_memory.h"
+#include "drm_proc.h"
+#include "drm_vm.h"
+#include "drm_stub.h"
diff --git a/linux-core/radeon_drv.c b/linux-core/radeon_drv.c
index 0113ed97..dba2037f 100644
--- a/linux-core/radeon_drv.c
+++ b/linux-core/radeon_drv.c
@@ -1,7 +1,7 @@
/* radeon_drv.c -- ATI Radeon driver -*- linux-c -*-
+ * Created: Wed Feb 14 17:10:04 2001 by gareth@valinux.com
*
- * Copyright 1999, 2000 Precision Insight, Inc., Cedar Park, Texas.
- * Copyright 2000 VA Linux Systems, Inc., Fremont, California.
+ * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
* All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
@@ -18,685 +18,70 @@
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
- * DEALINGS IN THE SOFTWARE.
- *
- * Authors: Kevin E. Martin <martin@valinux.com>
- * Rickard E. (Rik) Faith <faith@valinux.com>
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
*
+ * Authors:
+ * Gareth Hughes <gareth@valinux.com>
*/
#include <linux/config.h>
+#include "radeon.h"
#include "drmP.h"
#include "radeon_drv.h"
-#define RADEON_NAME "radeon"
-#define RADEON_DESC "ATI Radeon"
-#define RADEON_DATE "20010105"
-#define RADEON_MAJOR 1
-#define RADEON_MINOR 0
-#define RADEON_PATCHLEVEL 0
-
-static drm_device_t radeon_device;
-drm_ctx_t radeon_res_ctx;
-
-static struct file_operations radeon_fops = {
-#if LINUX_VERSION_CODE >= 0x020400
- /* This started being used during 2.4.0-test */
- owner: THIS_MODULE,
-#endif
- open: radeon_open,
- flush: drm_flush,
- release: radeon_release,
- ioctl: radeon_ioctl,
- mmap: drm_mmap,
- read: drm_read,
- fasync: drm_fasync,
- poll: drm_poll,
-};
-
-static struct miscdevice radeon_misc = {
- minor: MISC_DYNAMIC_MINOR,
- name: RADEON_NAME,
- fops: &radeon_fops,
-};
-
-static drm_ioctl_desc_t radeon_ioctls[] = {
- [DRM_IOCTL_NR(DRM_IOCTL_VERSION)] = { radeon_version, 0, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_GET_UNIQUE)] = { drm_getunique, 0, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_GET_MAGIC)] = { drm_getmagic, 0, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_IRQ_BUSID)] = { drm_irq_busid, 0, 1 },
-
- [DRM_IOCTL_NR(DRM_IOCTL_SET_UNIQUE)] = { drm_setunique, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_BLOCK)] = { drm_block, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_UNBLOCK)] = { drm_unblock, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_AUTH_MAGIC)] = { drm_authmagic, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_ADD_MAP)] = { drm_addmap, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_ADD_BUFS)] = { radeon_addbufs, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_MARK_BUFS)] = { drm_markbufs, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_INFO_BUFS)] = { drm_infobufs, 1, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_MAP_BUFS)] = { radeon_mapbufs, 1, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_FREE_BUFS)] = { drm_freebufs, 1, 0 },
-
- [DRM_IOCTL_NR(DRM_IOCTL_ADD_CTX)] = { radeon_addctx, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_RM_CTX)] = { radeon_rmctx, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_MOD_CTX)] = { radeon_modctx, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_GET_CTX)] = { radeon_getctx, 1, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_SWITCH_CTX)] = { radeon_switchctx, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_NEW_CTX)] = { radeon_newctx, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_RES_CTX)] = { radeon_resctx, 1, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_ADD_DRAW)] = { drm_adddraw, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_RM_DRAW)] = { drm_rmdraw, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_DMA)] = { radeon_cp_buffers, 1, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_LOCK)] = { radeon_lock, 1, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_UNLOCK)] = { radeon_unlock, 1, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_FINISH)] = { drm_finish, 1, 0 },
-
-#if defined(CONFIG_AGP) || defined(CONFIG_AGP_MODULE)
- [DRM_IOCTL_NR(DRM_IOCTL_AGP_ACQUIRE)] = { drm_agp_acquire, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_AGP_RELEASE)] = { drm_agp_release, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_AGP_ENABLE)] = { drm_agp_enable, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_AGP_INFO)] = { drm_agp_info, 1, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_AGP_ALLOC)] = { drm_agp_alloc, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_AGP_FREE)] = { drm_agp_free, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_AGP_BIND)] = { drm_agp_bind, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_AGP_UNBIND)] = { drm_agp_unbind, 1, 1 },
-#endif
-
- [DRM_IOCTL_NR(DRM_IOCTL_RADEON_CP_INIT)] = { radeon_cp_init, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_RADEON_CP_START)] = { radeon_cp_start, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_RADEON_CP_STOP)] = { radeon_cp_stop, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_RADEON_CP_RESET)] = { radeon_cp_reset, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_RADEON_CP_IDLE)] = { radeon_cp_idle, 1, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_RADEON_RESET)] = { radeon_engine_reset, 1, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_RADEON_FULLSCREEN)] = { radeon_fullscreen, 1, 0 },
-
- [DRM_IOCTL_NR(DRM_IOCTL_RADEON_SWAP)] = { radeon_cp_swap, 1, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_RADEON_CLEAR)] = { radeon_cp_clear, 1, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_RADEON_VERTEX)] = { radeon_cp_vertex, 1, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_RADEON_INDICES)] = { radeon_cp_indices, 1, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_RADEON_BLIT)] = { radeon_cp_blit, 1, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_RADEON_STIPPLE)] = { radeon_cp_stipple, 1, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_RADEON_INDIRECT)]= { radeon_cp_indirect,1, 1 },
-};
-#define RADEON_IOCTL_COUNT DRM_ARRAY_SIZE(radeon_ioctls)
-
-#ifdef MODULE
-static char *radeon = NULL;
-#endif
-
-MODULE_AUTHOR("VA Linux Systems, Inc.");
-MODULE_DESCRIPTION("radeon");
-MODULE_PARM(radeon, "s");
-
-#ifndef MODULE
-/* radeon_options is called by the kernel to parse command-line options
- * passed via the boot-loader (e.g., LILO). It calls the insmod option
- * routine, drm_parse_drm.
- */
-
-static int __init radeon_options(char *str)
-{
- drm_parse_options(str);
- return 1;
-}
-
-__setup("radeon=", radeon_options);
-#endif
-
-static int radeon_setup(drm_device_t *dev)
-{
- int i;
-
- atomic_set(&dev->ioctl_count, 0);
- atomic_set(&dev->vma_count, 0);
- dev->buf_use = 0;
- atomic_set(&dev->buf_alloc, 0);
-
- drm_dma_setup(dev);
-
- atomic_set(&dev->total_open, 0);
- atomic_set(&dev->total_close, 0);
- atomic_set(&dev->total_ioctl, 0);
- atomic_set(&dev->total_irq, 0);
- atomic_set(&dev->total_ctx, 0);
- atomic_set(&dev->total_locks, 0);
- atomic_set(&dev->total_unlocks, 0);
- atomic_set(&dev->total_contends, 0);
- atomic_set(&dev->total_sleeps, 0);
-
- for (i = 0; i < DRM_HASH_SIZE; i++) {
- dev->magiclist[i].head = NULL;
- dev->magiclist[i].tail = NULL;
- }
- dev->maplist = NULL;
- dev->map_count = 0;
- dev->vmalist = NULL;
- dev->lock.hw_lock = NULL;
- init_waitqueue_head(&dev->lock.lock_queue);
- dev->queue_count = 0;
- dev->queue_reserved = 0;
- dev->queue_slots = 0;
- dev->queuelist = NULL;
- dev->irq = 0;
- dev->context_flag = 0;
- dev->interrupt_flag = 0;
- dev->dma_flag = 0;
- dev->last_context = 0;
- dev->last_switch = 0;
- dev->last_checked = 0;
- init_timer(&dev->timer);
- init_waitqueue_head(&dev->context_wait);
-
- dev->ctx_start = 0;
- dev->lck_start = 0;
-
- dev->buf_rp = dev->buf;
- dev->buf_wp = dev->buf;
- dev->buf_end = dev->buf + DRM_BSZ;
- dev->buf_async = NULL;
- init_waitqueue_head(&dev->buf_readers);
- init_waitqueue_head(&dev->buf_writers);
-
- radeon_res_ctx.handle = -1;
-
- DRM_DEBUG("\n");
-
- /* The kernel's context could be created here, but is now created
- in drm_dma_enqueue. This is more resource-efficient for
- hardware that does not do DMA, but may mean that
- drm_select_queue fails between the time the interrupt is
- initialized and the time the queues are initialized. */
-
- return 0;
-}
-
-
-static int radeon_takedown(drm_device_t *dev)
-{
- int i;
- drm_magic_entry_t *pt, *next;
- drm_map_t *map;
- drm_vma_entry_t *vma, *vma_next;
-
- DRM_DEBUG("\n");
-
- down(&dev->struct_sem);
- del_timer(&dev->timer);
-
- if (dev->devname) {
- drm_free(dev->devname, strlen(dev->devname)+1, DRM_MEM_DRIVER);
- dev->devname = NULL;
- }
-
- if (dev->unique) {
- drm_free(dev->unique, strlen(dev->unique)+1, DRM_MEM_DRIVER);
- dev->unique = NULL;
- dev->unique_len = 0;
- }
- /* Clear pid list */
- for (i = 0; i < DRM_HASH_SIZE; i++) {
- for (pt = dev->magiclist[i].head; pt; pt = next) {
- next = pt->next;
- drm_free(pt, sizeof(*pt), DRM_MEM_MAGIC);
- }
- dev->magiclist[i].head = dev->magiclist[i].tail = NULL;
- }
-
-#if defined(CONFIG_AGP) || defined(CONFIG_AGP_MODULE)
- /* Clear AGP information */
- if (dev->agp) {
- drm_agp_mem_t *entry;
- drm_agp_mem_t *nexte;
-
- /* Remove AGP resources, but leave dev->agp
- intact until radeon_cleanup is called. */
- for (entry = dev->agp->memory; entry; entry = nexte) {
- nexte = entry->next;
- if (entry->bound) drm_unbind_agp(entry->memory);
- drm_free_agp(entry->memory, entry->pages);
- drm_free(entry, sizeof(*entry), DRM_MEM_AGPLISTS);
- }
- dev->agp->memory = NULL;
-
- if (dev->agp->acquired) _drm_agp_release();
-
- dev->agp->acquired = 0;
- dev->agp->enabled = 0;
- }
-#endif
-
- /* Clear vma list (only built for debugging) */
- if (dev->vmalist) {
- for (vma = dev->vmalist; vma; vma = vma_next) {
- vma_next = vma->next;
- drm_free(vma, sizeof(*vma), DRM_MEM_VMAS);
- }
- dev->vmalist = NULL;
- }
-
- /* Clear map area and mtrr information */
- if (dev->maplist) {
- for (i = 0; i < dev->map_count; i++) {
- map = dev->maplist[i];
- switch (map->type) {
- case _DRM_REGISTERS:
- case _DRM_FRAME_BUFFER:
-#ifdef CONFIG_MTRR
- if (map->mtrr >= 0) {
- int retcode;
- retcode = mtrr_del(map->mtrr,
- map->offset,
- map->size);
- DRM_DEBUG("mtrr_del = %d\n", retcode);
- }
-#endif
- drm_ioremapfree(map->handle, map->size);
- break;
- case _DRM_SHM:
- drm_free_pages((unsigned long)map->handle,
- drm_order(map->size)
- - PAGE_SHIFT,
- DRM_MEM_SAREA);
- break;
- case _DRM_AGP:
- /* Do nothing here, because this is all
- handled in the AGP/GART driver. */
- break;
- }
- drm_free(map, sizeof(*map), DRM_MEM_MAPS);
- }
- drm_free(dev->maplist,
- dev->map_count * sizeof(*dev->maplist),
- DRM_MEM_MAPS);
- dev->maplist = NULL;
- dev->map_count = 0;
- }
-
- drm_dma_takedown(dev);
-
- dev->queue_count = 0;
- if (dev->lock.hw_lock) {
- dev->lock.hw_lock = NULL; /* SHM removed */
- dev->lock.pid = 0;
- wake_up_interruptible(&dev->lock.lock_queue);
- }
- up(&dev->struct_sem);
-
- return 0;
-}
-
-/* radeon_init is called via init_module at module load time, or via
- * linux/init/main.c (this is not currently supported). */
-
-static int __init radeon_init(void)
-{
- int retcode;
- drm_device_t *dev = &radeon_device;
-
- DRM_DEBUG("\n");
-
- memset((void *)dev, 0, sizeof(*dev));
- dev->count_lock = SPIN_LOCK_UNLOCKED;
- sema_init(&dev->struct_sem, 1);
-
-#ifdef MODULE
- drm_parse_options(radeon);
-#endif
-
- if ((retcode = misc_register(&radeon_misc))) {
- DRM_ERROR("Cannot register \"%s\"\n", RADEON_NAME);
- return retcode;
- }
- dev->device = MKDEV(MISC_MAJOR, radeon_misc.minor);
- dev->name = RADEON_NAME;
-
- drm_mem_init();
- drm_proc_init(dev);
-
-#if defined(CONFIG_AGP) || defined(CONFIG_AGP_MODULE)
- dev->agp = drm_agp_init();
- if (dev->agp == NULL) {
- DRM_ERROR("Cannot initialize agpgart module.\n");
- drm_proc_cleanup();
- misc_deregister(&radeon_misc);
- radeon_takedown(dev);
- return -ENOMEM;
- }
-
-#ifdef CONFIG_MTRR
- dev->agp->agp_mtrr = mtrr_add(dev->agp->agp_info.aper_base,
- dev->agp->agp_info.aper_size*1024*1024,
- MTRR_TYPE_WRCOMB,
- 1);
-#endif
-#endif
-
- if((retcode = drm_ctxbitmap_init(dev))) {
- DRM_ERROR("Cannot allocate memory for context bitmap.\n");
- drm_proc_cleanup();
- misc_deregister(&radeon_misc);
- radeon_takedown(dev);
- return retcode;
- }
-
- DRM_INFO("Initialized %s %d.%d.%d %s on minor %d\n",
- RADEON_NAME,
- RADEON_MAJOR,
- RADEON_MINOR,
- RADEON_PATCHLEVEL,
- RADEON_DATE,
- radeon_misc.minor);
-
- return 0;
-}
-
-/* radeon_cleanup is called via cleanup_module at module unload time. */
-
-static void __exit radeon_cleanup(void)
-{
- drm_device_t *dev = &radeon_device;
-
- DRM_DEBUG("\n");
-
- drm_proc_cleanup();
- if (misc_deregister(&radeon_misc)) {
- DRM_ERROR("Cannot unload module\n");
- } else {
- DRM_INFO("Module unloaded\n");
- }
- drm_ctxbitmap_cleanup(dev);
- radeon_takedown(dev);
-#if defined(CONFIG_AGP) || defined(CONFIG_AGP_MODULE)
- if (dev->agp) {
- drm_agp_uninit();
- drm_free(dev->agp, sizeof(*dev->agp), DRM_MEM_AGPLISTS);
- dev->agp = NULL;
- }
-#endif
-}
-
-module_init(radeon_init);
-module_exit(radeon_cleanup);
-
-
-int radeon_version(struct inode *inode, struct file *filp, unsigned int cmd,
- unsigned long arg)
-{
- drm_version_t version;
- int len;
-
- if (copy_from_user(&version,
- (drm_version_t *)arg,
- sizeof(version)))
- return -EFAULT;
-
-#define DRM_COPY(name,value) \
- len = strlen(value); \
- if (len > name##_len) len = name##_len; \
- name##_len = strlen(value); \
- if (len && name) { \
- if (copy_to_user(name, value, len)) \
- return -EFAULT; \
- }
-
- version.version_major = RADEON_MAJOR;
- version.version_minor = RADEON_MINOR;
- version.version_patchlevel = RADEON_PATCHLEVEL;
-
- DRM_COPY(version.name, RADEON_NAME);
- DRM_COPY(version.date, RADEON_DATE);
- DRM_COPY(version.desc, RADEON_DESC);
-
- if (copy_to_user((drm_version_t *)arg,
- &version,
- sizeof(version)))
- return -EFAULT;
- return 0;
-}
-
-int radeon_open(struct inode *inode, struct file *filp)
-{
- drm_device_t *dev = &radeon_device;
- int retcode = 0;
-
- DRM_DEBUG("open_count = %d\n", dev->open_count);
- if (!(retcode = drm_open_helper(inode, filp, dev))) {
-#if LINUX_VERSION_CODE < 0x020333
- MOD_INC_USE_COUNT; /* Needed before Linux 2.3.51 */
-#endif
- atomic_inc(&dev->total_open);
- spin_lock(&dev->count_lock);
- if (!dev->open_count++) {
- spin_unlock(&dev->count_lock);
- return radeon_setup(dev);
- }
- spin_unlock(&dev->count_lock);
- }
-
- return retcode;
-}
-
-int radeon_release(struct inode *inode, struct file *filp)
-{
- drm_file_t *priv = filp->private_data;
- drm_device_t *dev;
- int retcode = 0;
-
- lock_kernel();
- dev = priv->dev;
-
- DRM_DEBUG("open_count = %d\n", dev->open_count);
-
- /* Force the cleanup of page flipping when required */
- if ( dev->dev_private ) {
- drm_radeon_private_t *dev_priv = dev->dev_private;
- if ( dev_priv->page_flipping ) {
- radeon_do_cleanup_pageflip( dev );
- }
- }
-
- if (!(retcode = drm_release(inode, filp))) {
-#if LINUX_VERSION_CODE < 0x020333
- MOD_DEC_USE_COUNT; /* Needed before Linux 2.3.51 */
-#endif
- atomic_inc(&dev->total_close);
- spin_lock(&dev->count_lock);
- if (!--dev->open_count) {
- if (atomic_read(&dev->ioctl_count) || dev->blocked) {
- DRM_ERROR("Device busy: %d %d\n",
- atomic_read(&dev->ioctl_count),
- dev->blocked);
- spin_unlock(&dev->count_lock);
- unlock_kernel();
- return -EBUSY;
- }
- spin_unlock(&dev->count_lock);
- unlock_kernel();
- return radeon_takedown(dev);
- }
- spin_unlock(&dev->count_lock);
- }
-
- unlock_kernel();
- return retcode;
-}
+#define DRIVER_AUTHOR "Gareth Hughes, VA Linux Systems Inc."
+
+#define DRIVER_NAME "radeon"
+#define DRIVER_DESC "ATI Radeon"
+#define DRIVER_DATE "20010308"
+
+#define DRIVER_MAJOR 1
+#define DRIVER_MINOR 0
+#define DRIVER_PATCHLEVEL 1
+
+#define DRIVER_IOCTLS \
+ [DRM_IOCTL_NR(DRM_IOCTL_DMA)] = { radeon_cp_buffers, 1, 0 }, \
+ [DRM_IOCTL_NR(DRM_IOCTL_RADEON_CP_INIT)] = { radeon_cp_init, 1, 1 }, \
+ [DRM_IOCTL_NR(DRM_IOCTL_RADEON_CP_START)] = { radeon_cp_start, 1, 1 }, \
+ [DRM_IOCTL_NR(DRM_IOCTL_RADEON_CP_STOP)] = { radeon_cp_stop, 1, 1 }, \
+ [DRM_IOCTL_NR(DRM_IOCTL_RADEON_CP_RESET)] = { radeon_cp_reset, 1, 1 }, \
+ [DRM_IOCTL_NR(DRM_IOCTL_RADEON_CP_IDLE)] = { radeon_cp_idle, 1, 0 }, \
+ [DRM_IOCTL_NR(DRM_IOCTL_RADEON_RESET)] = { radeon_engine_reset, 1, 0 }, \
+ [DRM_IOCTL_NR(DRM_IOCTL_RADEON_FULLSCREEN)] = { radeon_fullscreen, 1, 0 }, \
+ [DRM_IOCTL_NR(DRM_IOCTL_RADEON_SWAP)] = { radeon_cp_swap, 1, 0 }, \
+ [DRM_IOCTL_NR(DRM_IOCTL_RADEON_CLEAR)] = { radeon_cp_clear, 1, 0 }, \
+ [DRM_IOCTL_NR(DRM_IOCTL_RADEON_VERTEX)] = { radeon_cp_vertex, 1, 0 }, \
+ [DRM_IOCTL_NR(DRM_IOCTL_RADEON_INDICES)] = { radeon_cp_indices, 1, 0 }, \
+ [DRM_IOCTL_NR(DRM_IOCTL_RADEON_TEXTURE)] = { radeon_cp_texture, 1, 0 }, \
+ [DRM_IOCTL_NR(DRM_IOCTL_RADEON_STIPPLE)] = { radeon_cp_stipple, 1, 0 }, \
+ [DRM_IOCTL_NR(DRM_IOCTL_RADEON_INDIRECT)] = { radeon_cp_indirect, 1, 1 },
-/* radeon_ioctl is called whenever a process performs an ioctl on /dev/drm. */
-int radeon_ioctl(struct inode *inode, struct file *filp, unsigned int cmd,
- unsigned long arg)
-{
- int nr = DRM_IOCTL_NR(cmd);
- drm_file_t *priv = filp->private_data;
- drm_device_t *dev = priv->dev;
- int retcode = 0;
- drm_ioctl_desc_t *ioctl;
- drm_ioctl_t *func;
-
- atomic_inc(&dev->ioctl_count);
- atomic_inc(&dev->total_ioctl);
- ++priv->ioctl_count;
-
- DRM_DEBUG("pid = %d, cmd = 0x%02x, nr = 0x%02x, dev 0x%x, auth = %d\n",
- current->pid, cmd, nr, dev->device, priv->authenticated);
-
- if (nr >= RADEON_IOCTL_COUNT) {
- retcode = -EINVAL;
- } else {
- ioctl = &radeon_ioctls[nr];
- func = ioctl->func;
-
- if (!func) {
- DRM_DEBUG("no function\n");
- retcode = -EINVAL;
- } else if ((ioctl->root_only && !capable(CAP_SYS_ADMIN))
- || (ioctl->auth_needed && !priv->authenticated)) {
- retcode = -EACCES;
- } else {
- retcode = (func)(inode, filp, cmd, arg);
- }
- }
-
- atomic_dec(&dev->ioctl_count);
- return retcode;
-}
-
-int radeon_lock(struct inode *inode, struct file *filp, unsigned int cmd,
- unsigned long arg)
-{
- drm_file_t *priv = filp->private_data;
- drm_device_t *dev = priv->dev;
- DECLARE_WAITQUEUE(entry, current);
- int ret = 0;
- drm_lock_t lock;
-#if DRM_DMA_HISTOGRAM
- cycles_t start;
-
- dev->lck_start = start = get_cycles();
-#endif
-
- if (copy_from_user(&lock, (drm_lock_t *)arg, sizeof(lock)))
- return -EFAULT;
-
- if (lock.context == DRM_KERNEL_CONTEXT) {
- DRM_ERROR("Process %d using kernel context %d\n",
- current->pid, lock.context);
- return -EINVAL;
- }
-
- DRM_DEBUG("%d (pid %d) requests lock (0x%08x), flags = 0x%08x\n",
- lock.context, current->pid, dev->lock.hw_lock->lock,
- lock.flags);
-
- if (lock.context < 0 /* || lock.context >= dev->queue_count */)
- return -EINVAL;
-
- if (!ret) {
- add_wait_queue(&dev->lock.lock_queue, &entry);
- for (;;) {
- current->state = TASK_INTERRUPTIBLE;
- if (!dev->lock.hw_lock) {
- /* Device has been unregistered */
- ret = -EINTR;
- break;
- }
- if (drm_lock_take(&dev->lock.hw_lock->lock,
- lock.context)) {
- dev->lock.pid = current->pid;
- dev->lock.lock_time = jiffies;
- atomic_inc(&dev->total_locks);
- break; /* Got lock */
- }
-
- /* Contention */
- atomic_inc(&dev->total_sleeps);
- schedule();
- if (signal_pending(current)) {
- ret = -ERESTARTSYS;
- break;
- }
- }
- current->state = TASK_RUNNING;
- remove_wait_queue(&dev->lock.lock_queue, &entry);
- }
-
- if (!ret) {
- sigemptyset(&dev->sigmask);
- sigaddset(&dev->sigmask, SIGSTOP);
- sigaddset(&dev->sigmask, SIGTSTP);
- sigaddset(&dev->sigmask, SIGTTIN);
- sigaddset(&dev->sigmask, SIGTTOU);
- dev->sigdata.context = lock.context;
- dev->sigdata.lock = dev->lock.hw_lock;
- block_all_signals(drm_notifier, &dev->sigdata, &dev->sigmask);
- if (lock.flags & _DRM_LOCK_READY) {
- /* Wait for space in DMA/FIFO */
- }
- if (lock.flags & _DRM_LOCK_QUIESCENT) {
- /* Make hardware quiescent */
- DRM_DEBUG("not quiescent!\n");
#if 0
- radeon_quiescent(dev);
-#endif
- }
- }
-
-#if LINUX_VERSION_CODE < 0x020400
- if (lock.context != radeon_res_ctx.handle) {
- current->counter = 5;
- current->priority = DEF_PRIORITY/4;
- }
-#endif
- DRM_DEBUG("%d %s\n", lock.context, ret ? "interrupted" : "has lock");
-
-#if DRM_DMA_HISTOGRAM
- atomic_inc(&dev->histo.lacq[drm_histogram_slot(get_cycles() - start)]);
-#endif
-
- return ret;
-}
-
-
-int radeon_unlock(struct inode *inode, struct file *filp, unsigned int cmd,
- unsigned long arg)
-{
- drm_file_t *priv = filp->private_data;
- drm_device_t *dev = priv->dev;
- drm_lock_t lock;
-
- if (copy_from_user(&lock, (drm_lock_t *)arg, sizeof(lock)))
- return -EFAULT;
-
- if (lock.context == DRM_KERNEL_CONTEXT) {
- DRM_ERROR("Process %d using kernel context %d\n",
- current->pid, lock.context);
- return -EINVAL;
- }
-
- DRM_DEBUG("%d frees lock (%d holds)\n",
- lock.context,
- _DRM_LOCKING_CONTEXT(dev->lock.hw_lock->lock));
- atomic_inc(&dev->total_unlocks);
- if (_DRM_LOCK_IS_CONT(dev->lock.hw_lock->lock))
- atomic_inc(&dev->total_contends);
- drm_lock_transfer(dev, &dev->lock.hw_lock->lock, DRM_KERNEL_CONTEXT);
- /* FIXME: Try to send data to card here */
- if (!dev->context_flag) {
- if (drm_lock_free(dev, &dev->lock.hw_lock->lock,
- DRM_KERNEL_CONTEXT)) {
- DRM_ERROR("\n");
- }
- }
-
-#if LINUX_VERSION_CODE < 0x020400
- if (lock.context != radeon_res_ctx.handle) {
- current->counter = 5;
- current->priority = DEF_PRIORITY;
- }
-#endif
- unblock_all_signals();
- return 0;
-}
+/* GH: Count data sent to card via ring or vertex/indirect buffers.
+ */
+#define __HAVE_COUNTERS 3
+#define __HAVE_COUNTER6 _DRM_STAT_IRQ
+#define __HAVE_COUNTER7 _DRM_STAT_PRIMARY
+#define __HAVE_COUNTER8 _DRM_STAT_SECONDARY
+#endif
+
+
+#include "drm_agpsupport.h"
+#include "drm_auth.h"
+#include "drm_bufs.h"
+#include "drm_context.h"
+#include "drm_dma.h"
+#include "drm_drawable.h"
+#include "drm_drv.h"
+#include "drm_fops.h"
+#include "drm_init.h"
+#include "drm_ioctl.h"
+#include "drm_lock.h"
+#include "drm_memory.h"
+#include "drm_proc.h"
+#include "drm_vm.h"
+#include "drm_stub.h"
diff --git a/linux-core/tdfx_drv.c b/linux-core/tdfx_drv.c
index 7d79a013..f478395f 100644
--- a/linux-core/tdfx_drv.c
+++ b/linux-core/tdfx_drv.c
@@ -27,670 +27,35 @@
* Authors:
* Rickard E. (Rik) Faith <faith@valinux.com>
* Daryll Strauss <daryll@valinux.com>
- *
+ * Gareth Hughes <gareth@valinux.com>
*/
#include <linux/config.h>
+#include "tdfx.h"
#include "drmP.h"
-#include "tdfx_drv.h"
-
-#define TDFX_NAME "tdfx"
-#define TDFX_DESC "3dfx Banshee/Voodoo3+"
-#define TDFX_DATE "20000928"
-#define TDFX_MAJOR 1
-#define TDFX_MINOR 0
-#define TDFX_PATCHLEVEL 0
-
-static drm_device_t tdfx_device;
-drm_ctx_t tdfx_res_ctx;
-
-static struct file_operations tdfx_fops = {
-#if LINUX_VERSION_CODE >= 0x020400
- /* This started being used during 2.4.0-test */
- owner: THIS_MODULE,
-#endif
- open: tdfx_open,
- flush: drm_flush,
- release: tdfx_release,
- ioctl: tdfx_ioctl,
- mmap: drm_mmap,
- read: drm_read,
- fasync: drm_fasync,
- poll: drm_poll,
-};
-
-static struct miscdevice tdfx_misc = {
- minor: MISC_DYNAMIC_MINOR,
- name: TDFX_NAME,
- fops: &tdfx_fops,
-};
-
-static drm_ioctl_desc_t tdfx_ioctls[] = {
- [DRM_IOCTL_NR(DRM_IOCTL_VERSION)] = { tdfx_version, 0, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_GET_UNIQUE)] = { drm_getunique, 0, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_GET_MAGIC)] = { drm_getmagic, 0, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_IRQ_BUSID)] = { drm_irq_busid, 0, 1 },
-
- [DRM_IOCTL_NR(DRM_IOCTL_SET_UNIQUE)] = { drm_setunique, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_BLOCK)] = { drm_block, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_UNBLOCK)] = { drm_unblock, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_AUTH_MAGIC)] = { drm_authmagic, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_ADD_MAP)] = { drm_addmap, 1, 1 },
-
- [DRM_IOCTL_NR(DRM_IOCTL_ADD_CTX)] = { tdfx_addctx, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_RM_CTX)] = { tdfx_rmctx, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_MOD_CTX)] = { tdfx_modctx, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_GET_CTX)] = { tdfx_getctx, 1, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_SWITCH_CTX)] = { tdfx_switchctx, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_NEW_CTX)] = { tdfx_newctx, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_RES_CTX)] = { tdfx_resctx, 1, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_ADD_DRAW)] = { drm_adddraw, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_RM_DRAW)] = { drm_rmdraw, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_LOCK)] = { tdfx_lock, 1, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_UNLOCK)] = { tdfx_unlock, 1, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_FINISH)] = { drm_finish, 1, 0 },
-#if defined(CONFIG_AGP) || defined(CONFIG_AGP_MODULE)
- [DRM_IOCTL_NR(DRM_IOCTL_AGP_ACQUIRE)] = {drm_agp_acquire, 1, 1},
- [DRM_IOCTL_NR(DRM_IOCTL_AGP_RELEASE)] = {drm_agp_release, 1, 1},
- [DRM_IOCTL_NR(DRM_IOCTL_AGP_ENABLE)] = {drm_agp_enable, 1, 1},
- [DRM_IOCTL_NR(DRM_IOCTL_AGP_INFO)] = {drm_agp_info, 1, 1},
- [DRM_IOCTL_NR(DRM_IOCTL_AGP_ALLOC)] = {drm_agp_alloc, 1, 1},
- [DRM_IOCTL_NR(DRM_IOCTL_AGP_FREE)] = {drm_agp_free, 1, 1},
- [DRM_IOCTL_NR(DRM_IOCTL_AGP_BIND)] = {drm_agp_unbind, 1, 1},
- [DRM_IOCTL_NR(DRM_IOCTL_AGP_UNBIND)] = {drm_agp_bind, 1, 1},
-#endif
-};
-#define TDFX_IOCTL_COUNT DRM_ARRAY_SIZE(tdfx_ioctls)
-
-#ifdef MODULE
-static char *tdfx = NULL;
-#endif
-
-MODULE_AUTHOR("VA Linux Systems, Inc.");
-MODULE_DESCRIPTION("tdfx");
-MODULE_PARM(tdfx, "s");
-
-#ifndef MODULE
-/* tdfx_options is called by the kernel to parse command-line options
- * passed via the boot-loader (e.g., LILO). It calls the insmod option
- * routine, drm_parse_drm.
- */
-
-static int __init tdfx_options(char *str)
-{
- drm_parse_options(str);
- return 1;
-}
-
-__setup("tdfx=", tdfx_options);
-#endif
-
-static int tdfx_setup(drm_device_t *dev)
-{
- int i;
-
- atomic_set(&dev->ioctl_count, 0);
- atomic_set(&dev->vma_count, 0);
- dev->buf_use = 0;
- atomic_set(&dev->buf_alloc, 0);
-
- atomic_set(&dev->total_open, 0);
- atomic_set(&dev->total_close, 0);
- atomic_set(&dev->total_ioctl, 0);
- atomic_set(&dev->total_irq, 0);
- atomic_set(&dev->total_ctx, 0);
- atomic_set(&dev->total_locks, 0);
- atomic_set(&dev->total_unlocks, 0);
- atomic_set(&dev->total_contends, 0);
- atomic_set(&dev->total_sleeps, 0);
-
- for (i = 0; i < DRM_HASH_SIZE; i++) {
- dev->magiclist[i].head = NULL;
- dev->magiclist[i].tail = NULL;
- }
- dev->maplist = NULL;
- dev->map_count = 0;
- dev->vmalist = NULL;
- dev->lock.hw_lock = NULL;
- init_waitqueue_head(&dev->lock.lock_queue);
- dev->queue_count = 0;
- dev->queue_reserved = 0;
- dev->queue_slots = 0;
- dev->queuelist = NULL;
- dev->irq = 0;
- dev->context_flag = 0;
- dev->interrupt_flag = 0;
- dev->dma = 0;
- dev->dma_flag = 0;
- dev->last_context = 0;
- dev->last_switch = 0;
- dev->last_checked = 0;
- init_timer(&dev->timer);
- init_waitqueue_head(&dev->context_wait);
-
- dev->ctx_start = 0;
- dev->lck_start = 0;
-
- dev->buf_rp = dev->buf;
- dev->buf_wp = dev->buf;
- dev->buf_end = dev->buf + DRM_BSZ;
- dev->buf_async = NULL;
- init_waitqueue_head(&dev->buf_readers);
- init_waitqueue_head(&dev->buf_writers);
-
- tdfx_res_ctx.handle=-1;
-
- DRM_DEBUG("\n");
-
- /* The kernel's context could be created here, but is now created
- in drm_dma_enqueue. This is more resource-efficient for
- hardware that does not do DMA, but may mean that
- drm_select_queue fails between the time the interrupt is
- initialized and the time the queues are initialized. */
-
- return 0;
-}
-
-
-static int tdfx_takedown(drm_device_t *dev)
-{
- int i;
- drm_magic_entry_t *pt, *next;
- drm_map_t *map;
- drm_vma_entry_t *vma, *vma_next;
-
- DRM_DEBUG("\n");
-
- down(&dev->struct_sem);
- del_timer(&dev->timer);
-
- if (dev->devname) {
- drm_free(dev->devname, strlen(dev->devname)+1, DRM_MEM_DRIVER);
- dev->devname = NULL;
- }
-
- if (dev->unique) {
- drm_free(dev->unique, strlen(dev->unique)+1, DRM_MEM_DRIVER);
- dev->unique = NULL;
- dev->unique_len = 0;
- }
- /* Clear pid list */
- for (i = 0; i < DRM_HASH_SIZE; i++) {
- for (pt = dev->magiclist[i].head; pt; pt = next) {
- next = pt->next;
- drm_free(pt, sizeof(*pt), DRM_MEM_MAGIC);
- }
- dev->magiclist[i].head = dev->magiclist[i].tail = NULL;
- }
-#if defined(CONFIG_AGP) || defined(CONFIG_AGP_MODULE)
- /* Clear AGP information */
- if (dev->agp) {
- drm_agp_mem_t *temp;
- drm_agp_mem_t *temp_next;
-
- temp = dev->agp->memory;
- while(temp != NULL) {
- temp_next = temp->next;
- drm_free_agp(temp->memory, temp->pages);
- drm_free(temp, sizeof(*temp), DRM_MEM_AGPLISTS);
- temp = temp_next;
- }
- if (dev->agp->acquired) _drm_agp_release();
- }
-#endif
- /* Clear vma list (only built for debugging) */
- if (dev->vmalist) {
- for (vma = dev->vmalist; vma; vma = vma_next) {
- vma_next = vma->next;
- drm_free(vma, sizeof(*vma), DRM_MEM_VMAS);
- }
- dev->vmalist = NULL;
- }
-
- /* Clear map area and mtrr information */
- if (dev->maplist) {
- for (i = 0; i < dev->map_count; i++) {
- map = dev->maplist[i];
- switch (map->type) {
- case _DRM_REGISTERS:
- case _DRM_FRAME_BUFFER:
-#ifdef CONFIG_MTRR
- if (map->mtrr >= 0) {
- int retcode;
- retcode = mtrr_del(map->mtrr,
- map->offset,
- map->size);
- DRM_DEBUG("mtrr_del = %d\n", retcode);
- }
-#endif
- drm_ioremapfree(map->handle, map->size);
- break;
- case _DRM_SHM:
- drm_free_pages((unsigned long)map->handle,
- drm_order(map->size)
- - PAGE_SHIFT,
- DRM_MEM_SAREA);
- break;
- case _DRM_AGP:
- /* Do nothing here, because this is all
- handled in the AGP/GART driver. */
- break;
- }
- drm_free(map, sizeof(*map), DRM_MEM_MAPS);
- }
- drm_free(dev->maplist,
- dev->map_count * sizeof(*dev->maplist),
- DRM_MEM_MAPS);
- dev->maplist = NULL;
- dev->map_count = 0;
- }
-
- if (dev->lock.hw_lock) {
- dev->lock.hw_lock = NULL; /* SHM removed */
- dev->lock.pid = 0;
- wake_up_interruptible(&dev->lock.lock_queue);
- }
- up(&dev->struct_sem);
-
- return 0;
-}
-
-/* tdfx_init is called via init_module at module load time, or via
- * linux/init/main.c (this is not currently supported). */
-
-static int __init tdfx_init(void)
-{
- int retcode;
- drm_device_t *dev = &tdfx_device;
-
- DRM_DEBUG("\n");
-
- memset((void *)dev, 0, sizeof(*dev));
- dev->count_lock = SPIN_LOCK_UNLOCKED;
- sema_init(&dev->struct_sem, 1);
-
-#ifdef MODULE
- drm_parse_options(tdfx);
-#endif
-
- if ((retcode = misc_register(&tdfx_misc))) {
- DRM_ERROR("Cannot register \"%s\"\n", TDFX_NAME);
- return retcode;
- }
- dev->device = MKDEV(MISC_MAJOR, tdfx_misc.minor);
- dev->name = TDFX_NAME;
-
- drm_mem_init();
- drm_proc_init(dev);
-#if defined(CONFIG_AGP) || defined(CONFIG_AGP_MODULE)
- dev->agp = drm_agp_init();
-#endif
- if((retcode = drm_ctxbitmap_init(dev))) {
- DRM_ERROR("Cannot allocate memory for context bitmap.\n");
- drm_proc_cleanup();
- misc_deregister(&tdfx_misc);
- tdfx_takedown(dev);
- return retcode;
- }
-
- DRM_INFO("Initialized %s %d.%d.%d %s on minor %d\n",
- TDFX_NAME,
- TDFX_MAJOR,
- TDFX_MINOR,
- TDFX_PATCHLEVEL,
- TDFX_DATE,
- tdfx_misc.minor);
-
- return 0;
-}
-
-/* tdfx_cleanup is called via cleanup_module at module unload time. */
-
-static void __exit tdfx_cleanup(void)
-{
- drm_device_t *dev = &tdfx_device;
-
- DRM_DEBUG("\n");
-
- drm_proc_cleanup();
- if (misc_deregister(&tdfx_misc)) {
- DRM_ERROR("Cannot unload module\n");
- } else {
- DRM_INFO("Module unloaded\n");
- }
- drm_ctxbitmap_cleanup(dev);
- tdfx_takedown(dev);
-#if defined(CONFIG_AGP) || defined(CONFIG_AGP_MODULE)
- if (dev->agp) {
- drm_agp_uninit();
- drm_free(dev->agp, sizeof(*dev->agp), DRM_MEM_AGPLISTS);
- dev->agp = NULL;
- }
-#endif
-}
-
-module_init(tdfx_init);
-module_exit(tdfx_cleanup);
-
-
-int tdfx_version(struct inode *inode, struct file *filp, unsigned int cmd,
- unsigned long arg)
-{
- drm_version_t version;
- int len;
-
- if (copy_from_user(&version,
- (drm_version_t *)arg,
- sizeof(version)))
- return -EFAULT;
-
-#define DRM_COPY(name,value) \
- len = strlen(value); \
- if (len > name##_len) len = name##_len; \
- name##_len = strlen(value); \
- if (len && name) { \
- if (copy_to_user(name, value, len)) \
- return -EFAULT; \
- }
-
- version.version_major = TDFX_MAJOR;
- version.version_minor = TDFX_MINOR;
- version.version_patchlevel = TDFX_PATCHLEVEL;
-
- DRM_COPY(version.name, TDFX_NAME);
- DRM_COPY(version.date, TDFX_DATE);
- DRM_COPY(version.desc, TDFX_DESC);
-
- if (copy_to_user((drm_version_t *)arg,
- &version,
- sizeof(version)))
- return -EFAULT;
- return 0;
-}
-
-int tdfx_open(struct inode *inode, struct file *filp)
-{
- drm_device_t *dev = &tdfx_device;
- int retcode = 0;
-
- DRM_DEBUG("open_count = %d\n", dev->open_count);
- if (!(retcode = drm_open_helper(inode, filp, dev))) {
-#if LINUX_VERSION_CODE < 0x020333
- MOD_INC_USE_COUNT; /* Needed before Linux 2.3.51 */
-#endif
- atomic_inc(&dev->total_open);
- spin_lock(&dev->count_lock);
- if (!dev->open_count++) {
- spin_unlock(&dev->count_lock);
- return tdfx_setup(dev);
- }
- spin_unlock(&dev->count_lock);
- }
- return retcode;
-}
-
-int tdfx_release(struct inode *inode, struct file *filp)
-{
- drm_file_t *priv = filp->private_data;
- drm_device_t *dev;
- int retcode = 0;
-
- lock_kernel();
- dev = priv->dev;
-
- DRM_DEBUG("open_count = %d\n", dev->open_count);
- if (!(retcode = drm_release(inode, filp))) {
-#if LINUX_VERSION_CODE < 0x020333
- MOD_DEC_USE_COUNT; /* Needed before Linux 2.3.51 */
-#endif
- atomic_inc(&dev->total_close);
- spin_lock(&dev->count_lock);
- if (!--dev->open_count) {
- if (atomic_read(&dev->ioctl_count) || dev->blocked) {
- DRM_ERROR("Device busy: %d %d\n",
- atomic_read(&dev->ioctl_count),
- dev->blocked);
- spin_unlock(&dev->count_lock);
- unlock_kernel();
- return -EBUSY;
- }
- spin_unlock(&dev->count_lock);
- unlock_kernel();
- return tdfx_takedown(dev);
- }
- spin_unlock(&dev->count_lock);
- }
-
- unlock_kernel();
- return retcode;
-}
-
-/* tdfx_ioctl is called whenever a process performs an ioctl on /dev/drm. */
-
-int tdfx_ioctl(struct inode *inode, struct file *filp, unsigned int cmd,
- unsigned long arg)
-{
- int nr = DRM_IOCTL_NR(cmd);
- drm_file_t *priv = filp->private_data;
- drm_device_t *dev = priv->dev;
- int retcode = 0;
- drm_ioctl_desc_t *ioctl;
- drm_ioctl_t *func;
-
- atomic_inc(&dev->ioctl_count);
- atomic_inc(&dev->total_ioctl);
- ++priv->ioctl_count;
-
- DRM_DEBUG("pid = %d, cmd = 0x%02x, nr = 0x%02x, dev 0x%x, auth = %d\n",
- current->pid, cmd, nr, dev->device, priv->authenticated);
-
- if (nr >= TDFX_IOCTL_COUNT) {
- retcode = -EINVAL;
- } else {
- ioctl = &tdfx_ioctls[nr];
- func = ioctl->func;
-
- if (!func) {
- DRM_DEBUG("no function\n");
- retcode = -EINVAL;
- } else if ((ioctl->root_only && !capable(CAP_SYS_ADMIN))
- || (ioctl->auth_needed && !priv->authenticated)) {
- retcode = -EACCES;
- } else {
- retcode = (func)(inode, filp, cmd, arg);
- }
- }
-
- atomic_dec(&dev->ioctl_count);
- return retcode;
-}
-
-int tdfx_lock(struct inode *inode, struct file *filp, unsigned int cmd,
- unsigned long arg)
-{
- drm_file_t *priv = filp->private_data;
- drm_device_t *dev = priv->dev;
- DECLARE_WAITQUEUE(entry, current);
- int ret = 0;
- drm_lock_t lock;
-#if DRM_DMA_HISTOGRAM
- cycles_t start;
-
- dev->lck_start = start = get_cycles();
-#endif
-
- if (copy_from_user(&lock, (drm_lock_t *)arg, sizeof(lock)))
- return -EFAULT;
-
- if (lock.context == DRM_KERNEL_CONTEXT) {
- DRM_ERROR("Process %d using kernel context %d\n",
- current->pid, lock.context);
- return -EINVAL;
- }
-
- DRM_DEBUG("%d (pid %d) requests lock (0x%08x), flags = 0x%08x\n",
- lock.context, current->pid, dev->lock.hw_lock->lock,
- lock.flags);
-
-#if 0
- /* dev->queue_count == 0 right now for
- tdfx. FIXME? */
- if (lock.context < 0 || lock.context >= dev->queue_count)
- return -EINVAL;
-#endif
-
- if (!ret) {
-#if 0
- if (_DRM_LOCKING_CONTEXT(dev->lock.hw_lock->lock)
- != lock.context) {
- long j = jiffies - dev->lock.lock_time;
-
- if (lock.context == tdfx_res_ctx.handle &&
- j >= 0 && j < DRM_LOCK_SLICE) {
- /* Can't take lock if we just had it and
- there is contention. */
- DRM_DEBUG("%d (pid %d) delayed j=%d dev=%d jiffies=%d\n",
- lock.context, current->pid, j,
- dev->lock.lock_time, jiffies);
- current->state = TASK_INTERRUPTIBLE;
- current->policy |= SCHED_YIELD;
- schedule_timeout(DRM_LOCK_SLICE-j);
- DRM_DEBUG("jiffies=%d\n", jiffies);
- }
- }
-#endif
- add_wait_queue(&dev->lock.lock_queue, &entry);
- for (;;) {
- current->state = TASK_INTERRUPTIBLE;
- if (!dev->lock.hw_lock) {
- /* Device has been unregistered */
- ret = -EINTR;
- break;
- }
- if (drm_lock_take(&dev->lock.hw_lock->lock,
- lock.context)) {
- dev->lock.pid = current->pid;
- dev->lock.lock_time = jiffies;
- atomic_inc(&dev->total_locks);
- break; /* Got lock */
- }
-
- /* Contention */
- atomic_inc(&dev->total_sleeps);
-#if 1
- current->policy |= SCHED_YIELD;
-#endif
- schedule();
- if (signal_pending(current)) {
- ret = -ERESTARTSYS;
- break;
- }
- }
- current->state = TASK_RUNNING;
- remove_wait_queue(&dev->lock.lock_queue, &entry);
- }
-
-#if 0
- if (!ret && dev->last_context != lock.context &&
- lock.context != tdfx_res_ctx.handle &&
- dev->last_context != tdfx_res_ctx.handle) {
- add_wait_queue(&dev->context_wait, &entry);
- current->state = TASK_INTERRUPTIBLE;
- /* PRE: dev->last_context != lock.context */
- tdfx_context_switch(dev, dev->last_context, lock.context);
- /* POST: we will wait for the context
- switch and will dispatch on a later call
- when dev->last_context == lock.context
- NOTE WE HOLD THE LOCK THROUGHOUT THIS
- TIME! */
- current->policy |= SCHED_YIELD;
- schedule();
- current->state = TASK_RUNNING;
- remove_wait_queue(&dev->context_wait, &entry);
- if (signal_pending(current)) {
- ret = -EINTR;
- } else if (dev->last_context != lock.context) {
- DRM_ERROR("Context mismatch: %d %d\n",
- dev->last_context, lock.context);
- }
- }
-#endif
-
- if (!ret) {
- sigemptyset(&dev->sigmask);
- sigaddset(&dev->sigmask, SIGSTOP);
- sigaddset(&dev->sigmask, SIGTSTP);
- sigaddset(&dev->sigmask, SIGTTIN);
- sigaddset(&dev->sigmask, SIGTTOU);
- dev->sigdata.context = lock.context;
- dev->sigdata.lock = dev->lock.hw_lock;
- block_all_signals(drm_notifier, &dev->sigdata, &dev->sigmask);
-
- if (lock.flags & _DRM_LOCK_READY) {
- /* Wait for space in DMA/FIFO */
- }
- if (lock.flags & _DRM_LOCK_QUIESCENT) {
- /* Make hardware quiescent */
-#if 0
- tdfx_quiescent(dev);
-#endif
- }
- }
-
-#if LINUX_VERSION_CODE < 0x020400
- if (lock.context != tdfx_res_ctx.handle) {
- current->counter = 5;
- current->priority = DEF_PRIORITY/4;
- }
-#endif
- DRM_DEBUG("%d %s\n", lock.context, ret ? "interrupted" : "has lock");
-
-#if DRM_DMA_HISTOGRAM
- atomic_inc(&dev->histo.lacq[drm_histogram_slot(get_cycles() - start)]);
-#endif
-
- return ret;
-}
-
-
-int tdfx_unlock(struct inode *inode, struct file *filp, unsigned int cmd,
- unsigned long arg)
-{
- drm_file_t *priv = filp->private_data;
- drm_device_t *dev = priv->dev;
- drm_lock_t lock;
-
- if (copy_from_user(&lock, (drm_lock_t *)arg, sizeof(lock)))
- return -EFAULT;
-
- if (lock.context == DRM_KERNEL_CONTEXT) {
- DRM_ERROR("Process %d using kernel context %d\n",
- current->pid, lock.context);
- return -EINVAL;
- }
-
- DRM_DEBUG("%d frees lock (%d holds)\n",
- lock.context,
- _DRM_LOCKING_CONTEXT(dev->lock.hw_lock->lock));
- atomic_inc(&dev->total_unlocks);
- if (_DRM_LOCK_IS_CONT(dev->lock.hw_lock->lock))
- atomic_inc(&dev->total_contends);
- drm_lock_transfer(dev, &dev->lock.hw_lock->lock, DRM_KERNEL_CONTEXT);
- /* FIXME: Try to send data to card here */
- if (!dev->context_flag) {
- if (drm_lock_free(dev, &dev->lock.hw_lock->lock,
- DRM_KERNEL_CONTEXT)) {
- DRM_ERROR("\n");
- }
- }
-
-#if LINUX_VERSION_CODE < 0x020400
- if (lock.context != tdfx_res_ctx.handle) {
- current->counter = 5;
- current->priority = DEF_PRIORITY;
- }
-#endif
- unblock_all_signals();
- return 0;
-}
+#define DRIVER_AUTHOR "VA Linux Systems Inc."
+
+#define DRIVER_NAME "tdfx"
+#define DRIVER_DESC "3dfx Banshee/Voodoo3+"
+#define DRIVER_DATE "20010216"
+
+#define DRIVER_MAJOR 1
+#define DRIVER_MINOR 0
+#define DRIVER_PATCHLEVEL 0
+
+
+#include "drm_auth.h"
+#include "drm_bufs.h"
+#include "drm_context.h"
+#include "drm_dma.h"
+#include "drm_drawable.h"
+#include "drm_drv.h"
+#include "drm_fops.h"
+#include "drm_init.h"
+#include "drm_ioctl.h"
+#include "drm_lock.h"
+#include "drm_memory.h"
+#include "drm_proc.h"
+#include "drm_vm.h"
+#include "drm_stub.h"
diff --git a/linux/Makefile.kernel b/linux/Makefile.kernel
index 9fe0038f..a39b3cc5 100644
--- a/linux/Makefile.kernel
+++ b/linux/Makefile.kernel
@@ -62,7 +62,7 @@ obj-$(CONFIG_DRM_MGA) += mga.o
obj-$(CONFIG_DRM_I810) += i810.o
-# When linking into the kernel, link the library just once.
+# When linking into the kernel, link the library just once.
# If making modules, we include the library into each module
lib-objs-mod := $(patsubst %.o,%-mod.o,$(lib-objs))
@@ -75,7 +75,7 @@ endif
include $(TOPDIR)/Rules.make
-$(patsubst %.o,%.c,$(lib-objs-mod)):
+$(patsubst %.o,%.c,$(lib-objs-mod)):
@ln -sf $(subst -mod,,$@) $@
drmlib-mod.a: $(lib-objs-mod)
diff --git a/linux/Makefile.linux b/linux/Makefile.linux
index 9cea44db..470c25b3 100644
--- a/linux/Makefile.linux
+++ b/linux/Makefile.linux
@@ -23,7 +23,7 @@
# OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
# ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
# DEALINGS IN THE SOFTWARE.
-#
+#
#
# ***** NOTE NOTE NOTE NOTE NOTE *****
# To override the automatic Linux source tree determination, pass the
@@ -47,32 +47,34 @@
# **** End of SMP/MODVERSIONS detection
-MODS= gamma.o tdfx.o r128.o radeon.o
-LIBS= libdrm.a
+MODS = gamma.o tdfx.o
+LIBS =
-DRMOBJS= init.o memory.o proc.o auth.o context.o drawable.o bufs.o \
- lists.o lock.o ioctl.o fops.o vm.o dma.o ctxbitmap.o
-DRMHEADERS= drm.h drmP.h compat-pre24.h
+DRMTEMPLATES = drm_auth.h drm_bufs.h drm_context.h drm_dma.h drm_drawable.h \
+ drm_drv.h drm_fops.h drm_init.h drm_ioctl.h drm_lists.h \
+ drm_lock.h drm_memory.h drm_proc.h drm_stub.h drm_vm.h
+DRMHEADERS = drm.h drmP.h compat-pre24.h
-GAMMAOBJS= gamma_drv.o gamma_dma.o
-GAMMAHEADERS= gamma_drv.h $(DRMHEADERS)
+GAMMAOBJS = gamma_drv.o gamma_dma.o
+GAMMAHEADERS = gamma_drv.h $(DRMHEADERS) $(DRMTEMPLATES)
-TDFXOBJS= tdfx_drv.o tdfx_context.o
-TDFXHEADERS= tdfx_drv.h $(DRMHEADERS)
+TDFXOBJS = tdfx_drv.o
+TDFXHEADERS = tdfx.h $(DRMHEADERS)
-INC= /usr/include
+INC = /usr/include
-CFLAGS= -O2 $(WARNINGS)
-WARNINGS= -Wall -Wwrite-strings -Wpointer-arith -Wcast-align \
+CFLAGS = -O2 $(WARNINGS)
+WARNINGS = -Wall -Wwrite-strings -Wpointer-arith -Wcast-align \
-Wstrict-prototypes -Wnested-externs \
-Wpointer-arith
# -Wshadow -Winline -- make output too noisy
-MODCFLAGS= $(CFLAGS) -D__KERNEL__ -DMODULE -fomit-frame-pointer
-PRGCFLAGS= $(CFLAGS) -g -ansi -pedantic -DPOSIX_C_SOURCE=199309L \
+MODCFLAGS = $(CFLAGS) -D__KERNEL__ -DMODULE -fomit-frame-pointer
+PRGCFLAGS = $(CFLAGS) -g -ansi -pedantic -DPOSIX_C_SOURCE=199309L \
-D_POSIX_SOURCE -D_XOPEN_SOURCE -D_BSD_SOURCE -D_SVID_SOURCE \
-I../../../../../../include -I../../../../../../../../include \
- -I../../../../../../../../programs/Xserver/hw/xfree86/common
-PRGLIBS=
+ -I../../../../../../../../programs/Xserver/hw/xfree86/common \
+ -I. -I../../.. -I../../../../../../../../lib/X11
+PRGLIBS =
# **** Start of SMP/MODVERSIONS detection
@@ -128,25 +130,29 @@ endif
ifeq ($(AGP),1)
MODCFLAGS += -DCONFIG_AGP -DCONFIG_AGP_MODULE
-DRMOBJS += agpsupport.o
-MODS += mga.o
+DRMTEMPLATES += drm_agpsupport.h
+DRMHEADERS += agpsupport-pre24.h
+MODS += mga.o r128.o radeon.o
ifeq ($(MACHINE),i386)
MODS += i810.o
endif
+ifeq ($(MACHINE),i686)
+MODS += i810.o
+endif
-MGAOBJS= mga_drv.o mga_dma.o mga_bufs.o mga_context.o mga_state.o
-MGAHEADERS= mga_drv.h $(DRMHEADERS)
+MGAOBJS = mga_drv.o mga_dma.o mga_state.o mga_warp.o
+MGAHEADERS = mga.h mga_drv.h mga_drm.h $(DRMHEADERS) $(DRMTEMPLATES)
-I810OBJS= i810_drv.o i810_dma.o i810_bufs.o i810_context.o
-I810HEADERS= i810_drv.h $(DRMHEADERS)
+I810OBJS = i810_drv.o i810_dma.o
+I810HEADERS = i810.h i810_drv.h i810_drm.h $(DRMHEADERS) $(DRMTEMPLATES)
-R128OBJS= r128_drv.o r128_cce.o r128_bufs.o r128_context.o r128_state.o
-R128HEADERS= r128_drv.h r128_drm.h $(DRMHEADERS)
+R128OBJS = r128_drv.o r128_cce.o r128_state.o
+R128HEADERS = r128.h r128_drv.h r128_drm.h $(DRMHEADERS) $(DRMTEMPLATES)
-RADEONOBJS= radeon_drv.o radeon_cp.o radeon_bufs.o radeon_context.o \
- radeon_state.o
-RADEONHEADERS= radeon_drv.h radeon_drm.h $(DRMHEADERS)
+RADEONOBJS = radeon_drv.o radeon_cp.o radeon_state.o
+RADEONHEADERS = radeon.h radeon_drv.h radeon_drm.h $(DRMHEADERS) \
+ $(DRMTEMPLATES)
endif
ifeq ($(SIS),1)
@@ -167,6 +173,9 @@ all::;@echo === KERNEL HEADERS IN $(TREE)
all::;@echo === SMP=${SMP} MODULES=${MODULES} MODVERSIONS=${MODVERSIONS} AGP=${AGP}
all::;@echo === kill_fasync has $(PARAMS) parameters
all::;@echo === Compiling for machine $(MACHINE)
+all::;@echo === WARNING
+all::;@echo === WARNING 2.4.0 kernels before 2.4.0-test11 DO NOT WORK
+all::;@echo === WARNING
ifeq ($(MODULES),0)
all::;@echo
@@ -193,13 +202,12 @@ endif
# **** End of configuration
-libdrm.a: $(DRMOBJS)
- -$(RM) -f $@
- $(AR) rcs $@ $(DRMOBJS)
+dristat: dristat.c
+ $(CC) $(PRGCFLAGS) $< -o $@
gamma_drv.o: gamma_drv.c
$(CC) $(MODCFLAGS) -DEXPORT_SYMTAB -I$(TREE) -c $< -o $@
-gamma.o: $(GAMMAOBJS) $(LIBS)
+gamma.o: $(GAMMAOBJS)
$(LD) -r $^ -o $@
tdfx_drv.o: tdfx_drv.c
@@ -213,7 +221,7 @@ sis.o: $(SISOBJS) $(LIBS)
ifeq ($(AGP),1)
mga_drv.o: mga_drv.c
$(CC) $(MODCFLAGS) -DEXPORT_SYMTAB -I$(TREE) -c $< -o $@
-mga.o: $(MGAOBJS) $(LIBS)
+mga.o: $(MGAOBJS)
$(LD) -r $^ -o $@
i810_drv.o: i810_drv.c
@@ -245,7 +253,6 @@ ChangeLog:
%.o: %.c
$(CC) $(MODCFLAGS) -I$(TREE) -c $< -o $@
-$(DRMOBJS): $(DRMHEADERS)
$(GAMMAOBJS): $(GAMMAHEADERS)
$(TDFXOBJS): $(TDFXHEADERS)
ifeq ($(AGP),1)
diff --git a/linux/compat-pre24.h b/linux/compat-pre24.h
index f6dae008..0ad96b12 100644
--- a/linux/compat-pre24.h
+++ b/linux/compat-pre24.h
@@ -45,6 +45,7 @@
/* This is a hack that only works for
this code base -- because we always
call this with dev->tq.* */
+#undef INIT_LIST_HEAD
#define INIT_LIST_HEAD(pointer) dev->tq.next = NULL
#endif
diff --git a/linux/drm.h b/linux/drm.h
index dc3d262d..f1abaabf 100644
--- a/linux/drm.h
+++ b/linux/drm.h
@@ -19,10 +19,10 @@
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
- * DEALINGS IN THE SOFTWARE.
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
*
* Authors:
* Rickard E. (Rik) Faith <faith@valinux.com>
@@ -36,6 +36,7 @@
#define _DRM_H_
#if defined(__linux__)
+#include <linux/config.h>
#include <asm/ioctl.h> /* For _IO* macros */
#define DRM_IOCTL_NR(n) _IOC_NR(n)
#elif defined(__FreeBSD__)
@@ -43,15 +44,8 @@
#define DRM_IOCTL_NR(n) ((n) & 0xff)
#endif
-#define DRM_PROC_DEVICES "/proc/devices"
-#define DRM_PROC_MISC "/proc/misc"
-#define DRM_PROC_DRM "/proc/drm"
-#define DRM_DEV_DRM "/dev/drm"
-#define DRM_DEV_MODE (S_IRUSR|S_IWUSR|S_IRGRP|S_IWGRP)
-#define DRM_DEV_UID 0
-#define DRM_DEV_GID 0
-
-
+#define DRM_MAJOR 226
+#define DRM_MAX_MINOR 15
#define DRM_NAME "drm" /* Name in kernel, /dev, and /proc */
#define DRM_MIN_ORDER 5 /* At least 2^5 bytes = 32 bytes */
#define DRM_MAX_ORDER 22 /* Up to 2^22 bytes = 4MB */
@@ -72,12 +66,20 @@ typedef unsigned int drm_magic_t;
* XF86DRIClipRectRec in the server as well */
typedef struct drm_clip_rect {
- unsigned short x1;
- unsigned short y1;
- unsigned short x2;
- unsigned short y2;
+ unsigned short x1;
+ unsigned short y1;
+ unsigned short x2;
+ unsigned short y2;
} drm_clip_rect_t;
+typedef struct drm_tex_region {
+ unsigned char next;
+ unsigned char prev;
+ unsigned char in_use;
+ unsigned char padding;
+ unsigned int age;
+} drm_tex_region_t;
+
/* Seperate include files for the i810/mga/r128 specific structures */
#include "mga_drm.h"
#include "i810_drm.h"
@@ -136,9 +138,15 @@ typedef enum drm_map_flags {
_DRM_LOCKED = 0x04, /* shared, cached, locked */
_DRM_KERNEL = 0x08, /* kernel requires access */
_DRM_WRITE_COMBINING = 0x10, /* use write-combining if available */
- _DRM_CONTAINS_LOCK = 0x20 /* SHM page that contains lock */
+ _DRM_CONTAINS_LOCK = 0x20, /* SHM page that contains lock */
+ _DRM_REMOVABLE = 0x40 /* Removable mapping */
} drm_map_flags_t;
+typedef struct drm_ctx_priv_map {
+ unsigned int ctx_id; /* Context requesting private mapping */
+ void *handle; /* Handle of map */
+} drm_ctx_priv_map_t;
+
typedef struct drm_map {
unsigned long offset; /* Requested physical address (0 for SAREA)*/
unsigned long size; /* Requested physical size (bytes) */
@@ -150,6 +158,44 @@ typedef struct drm_map {
/* Private data */
} drm_map_t;
+typedef struct drm_client {
+ int idx; /* Which client desired? */
+ int auth; /* Is client authenticated? */
+ unsigned long pid; /* Process id */
+ unsigned long uid; /* User id */
+ unsigned long magic; /* Magic */
+ unsigned long iocs; /* Ioctl count */
+} drm_client_t;
+
+typedef enum {
+ _DRM_STAT_LOCK,
+ _DRM_STAT_OPENS,
+ _DRM_STAT_CLOSES,
+ _DRM_STAT_IOCTLS,
+ _DRM_STAT_LOCKS,
+ _DRM_STAT_UNLOCKS,
+ _DRM_STAT_VALUE, /* Generic value */
+ _DRM_STAT_BYTE, /* Generic byte counter (1024bytes/K) */
+ _DRM_STAT_COUNT, /* Generic non-byte counter (1000/k) */
+
+ _DRM_STAT_IRQ, /* IRQ */
+ _DRM_STAT_PRIMARY, /* Primary DMA bytes */
+ _DRM_STAT_SECONDARY, /* Secondary DMA bytes */
+ _DRM_STAT_DMA, /* DMA */
+ _DRM_STAT_SPECIAL, /* Special DMA (e.g., priority or polled) */
+ _DRM_STAT_MISSED /* Missed DMA opportunity */
+
+ /* Add to the *END* of the list */
+} drm_stat_type_t;
+
+typedef struct drm_stats {
+ unsigned long count;
+ struct {
+ unsigned long value;
+ drm_stat_type_t type;
+ } data[15];
+} drm_stats_t;
+
typedef enum drm_lock_flags {
_DRM_LOCK_READY = 0x01, /* Wait until hardware is ready for DMA */
_DRM_LOCK_QUIESCENT = 0x02, /* Wait until hardware quiescent */
@@ -309,6 +355,9 @@ typedef struct drm_agp_info {
#define DRM_IOCTL_GET_UNIQUE DRM_IOWR(0x01, drm_unique_t)
#define DRM_IOCTL_GET_MAGIC DRM_IOR( 0x02, drm_auth_t)
#define DRM_IOCTL_IRQ_BUSID DRM_IOWR(0x03, drm_irq_busid_t)
+#define DRM_IOCTL_GET_MAP DRM_IOWR(0x04, drm_map_t)
+#define DRM_IOCTL_GET_CLIENT DRM_IOWR(0x05, drm_client_t)
+#define DRM_IOCTL_GET_STATS DRM_IOR( 0x06, drm_stats_t)
#define DRM_IOCTL_SET_UNIQUE DRM_IOW( 0x10, drm_unique_t)
#define DRM_IOCTL_AUTH_MAGIC DRM_IOW( 0x11, drm_auth_t)
@@ -322,6 +371,11 @@ typedef struct drm_agp_info {
#define DRM_IOCTL_MAP_BUFS DRM_IOWR(0x19, drm_buf_map_t)
#define DRM_IOCTL_FREE_BUFS DRM_IOW( 0x1a, drm_buf_free_t)
+#define DRM_IOCTL_RM_MAP DRM_IOW( 0x1b, drm_map_t)
+
+#define DRM_IOCTL_SET_SAREA_CTX DRM_IOW( 0x1c, drm_ctx_priv_map_t)
+#define DRM_IOCTL_GET_SAREA_CTX DRM_IOWR(0x1d, drm_ctx_priv_map_t)
+
#define DRM_IOCTL_ADD_CTX DRM_IOWR(0x20, drm_ctx_t)
#define DRM_IOCTL_RM_CTX DRM_IOWR(0x21, drm_ctx_t)
#define DRM_IOCTL_MOD_CTX DRM_IOW( 0x22, drm_ctx_t)
@@ -345,17 +399,18 @@ typedef struct drm_agp_info {
#define DRM_IOCTL_AGP_BIND DRM_IOW( 0x36, drm_agp_binding_t)
#define DRM_IOCTL_AGP_UNBIND DRM_IOW( 0x37, drm_agp_binding_t)
-/* Mga specific ioctls */
+/* MGA specific ioctls */
#define DRM_IOCTL_MGA_INIT DRM_IOW( 0x40, drm_mga_init_t)
-#define DRM_IOCTL_MGA_SWAP DRM_IOW( 0x41, drm_mga_swap_t)
-#define DRM_IOCTL_MGA_CLEAR DRM_IOW( 0x42, drm_mga_clear_t)
-#define DRM_IOCTL_MGA_ILOAD DRM_IOW( 0x43, drm_mga_iload_t)
-#define DRM_IOCTL_MGA_VERTEX DRM_IOW( 0x44, drm_mga_vertex_t)
-#define DRM_IOCTL_MGA_FLUSH DRM_IOW( 0x45, drm_lock_t )
+#define DRM_IOCTL_MGA_FLUSH DRM_IOW( 0x41, drm_lock_t)
+#define DRM_IOCTL_MGA_RESET DRM_IO( 0x42)
+#define DRM_IOCTL_MGA_SWAP DRM_IO( 0x43)
+#define DRM_IOCTL_MGA_CLEAR DRM_IOW( 0x44, drm_mga_clear_t)
+#define DRM_IOCTL_MGA_VERTEX DRM_IOW( 0x45, drm_mga_vertex_t)
#define DRM_IOCTL_MGA_INDICES DRM_IOW( 0x46, drm_mga_indices_t)
-#define DRM_IOCTL_MGA_BLIT DRM_IOW( 0x47, drm_mga_blit_t)
+#define DRM_IOCTL_MGA_ILOAD DRM_IOW( 0x47, drm_mga_iload_t)
+#define DRM_IOCTL_MGA_BLIT DRM_IOW( 0x48, drm_mga_blit_t)
-/* I810 specific ioctls */
+/* i810 specific ioctls */
#define DRM_IOCTL_I810_INIT DRM_IOW( 0x40, drm_i810_init_t)
#define DRM_IOCTL_I810_VERTEX DRM_IOW( 0x41, drm_i810_vertex_t)
#define DRM_IOCTL_I810_CLEAR DRM_IOW( 0x42, drm_i810_clear_t)
@@ -395,7 +450,7 @@ typedef struct drm_agp_info {
#define DRM_IOCTL_RADEON_CLEAR DRM_IOW( 0x48, drm_radeon_clear_t)
#define DRM_IOCTL_RADEON_VERTEX DRM_IOW( 0x49, drm_radeon_vertex_t)
#define DRM_IOCTL_RADEON_INDICES DRM_IOW( 0x4a, drm_radeon_indices_t)
-#define DRM_IOCTL_RADEON_BLIT DRM_IOW( 0x4b, drm_radeon_blit_t)
+#define DRM_IOCTL_RADEON_TEXTURE DRM_IOWR(0x4b, drm_radeon_texture_t)
#define DRM_IOCTL_RADEON_STIPPLE DRM_IOW( 0x4c, drm_radeon_stipple_t)
#define DRM_IOCTL_RADEON_INDIRECT DRM_IOWR(0x4d, drm_radeon_indirect_t)
diff --git a/linux/drmP.h b/linux/drmP.h
index affeae70..274e318a 100644
--- a/linux/drmP.h
+++ b/linux/drmP.h
@@ -11,22 +11,22 @@
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
- *
+ *
* The above copyright notice and this permission notice (including the next
* paragraph) shall be included in all copies or substantial portions of the
* Software.
- *
+ *
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
- * DEALINGS IN THE SOFTWARE.
- *
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
* Authors:
* Rickard E. (Rik) Faith <faith@valinux.com>
- *
+ * Gareth Hughes <gareth@valinux.com>
*/
#ifndef _DRM_P_H_
@@ -73,11 +73,46 @@
#if LINUX_VERSION_CODE < 0x020400
#include "compat-pre24.h"
#endif
+#include <asm/pgalloc.h>
#include "drm.h"
+/* DRM template customization defaults
+ */
+#ifndef __HAVE_AGP
+#define __HAVE_AGP 0
+#endif
+#ifndef __HAVE_MTRR
+#define __HAVE_MTRR 0
+#endif
+#ifndef __HAVE_CTX_BITMAP
+#define __HAVE_CTX_BITMAP 0
+#endif
+#ifndef __HAVE_DMA
+#define __HAVE_DMA 0
+#endif
+#ifndef __HAVE_DMA_IRQ
+#define __HAVE_DMA_IRQ 0
+#endif
+#ifndef __HAVE_DMA_WAITLIST
+#define __HAVE_DMA_WAITLIST 0
+#endif
+#ifndef __HAVE_DMA_FREELIST
+#define __HAVE_DMA_FREELIST 0
+#endif
+#ifndef __HAVE_DMA_HISTOGRAM
+#define __HAVE_DMA_HISTOGRAM 0
+#endif
+
+#define __REALLY_HAVE_AGP (__HAVE_AGP && (defined(CONFIG_AGP) || \
+ defined(CONFIG_AGP_MODULE)))
+#define __REALLY_HAVE_MTRR (__HAVE_MTRR && defined(CONFIG_MTRR))
+
+
+/* Begin the DRM...
+ */
+
#define DRM_DEBUG_CODE 2 /* Include debugging code (if > 1, then
also include looping detection. */
-#define DRM_DMA_HISTOGRAM 1 /* Make histogram of DMA latency. */
#define DRM_HASH_SIZE 16 /* Size of key hash table */
#define DRM_KERNEL_CONTEXT 0 /* Change drm_resctx if changed */
@@ -109,6 +144,7 @@
#define DRM_MEM_TOTALAGP 16
#define DRM_MEM_BOUNDAGP 17
#define DRM_MEM_CTXBITMAP 18
+#define DRM_MEM_STUB 19
#define DRM_MAX_CTXBITMAP (PAGE_SIZE * 8)
@@ -259,16 +295,16 @@ static inline unsigned long __cmpxchg(volatile void *ptr, unsigned long old,
printk(KERN_ERR "[" DRM_NAME ":" __FUNCTION__ "] *ERROR* " fmt , ##arg)
#define DRM_MEM_ERROR(area, fmt, arg...) \
printk(KERN_ERR "[" DRM_NAME ":" __FUNCTION__ ":%s] *ERROR* " fmt , \
- drm_mem_stats[area].name , ##arg)
+ DRM(mem_stats)[area].name , ##arg)
#define DRM_INFO(fmt, arg...) printk(KERN_INFO "[" DRM_NAME "] " fmt , ##arg)
#if DRM_DEBUG_CODE
-#define DRM_DEBUG(fmt, arg...) \
- do { \
- if (drm_flags&DRM_FLAG_DEBUG) \
- printk(KERN_DEBUG \
- "[" DRM_NAME ":" __FUNCTION__ "] " fmt , \
- ##arg); \
+#define DRM_DEBUG(fmt, arg...) \
+ do { \
+ if ( DRM(flags) & DRM_FLAG_DEBUG ) \
+ printk(KERN_DEBUG \
+ "[" DRM_NAME ":" __FUNCTION__ "] " fmt , \
+ ##arg); \
} while (0)
#else
#define DRM_DEBUG(fmt, arg...) do { } while (0)
@@ -276,13 +312,36 @@ static inline unsigned long __cmpxchg(volatile void *ptr, unsigned long old,
#define DRM_PROC_LIMIT (PAGE_SIZE-80)
-#define DRM_PROC_PRINT(fmt, arg...) \
- len += sprintf(&buf[len], fmt , ##arg); \
- if (len > DRM_PROC_LIMIT) return len;
+#define DRM_PROC_PRINT(fmt, arg...) \
+ len += sprintf(&buf[len], fmt , ##arg); \
+ if (len > DRM_PROC_LIMIT) { *eof = 1; return len - offset; }
+
+#define DRM_PROC_PRINT_RET(ret, fmt, arg...) \
+ len += sprintf(&buf[len], fmt , ##arg); \
+ if (len > DRM_PROC_LIMIT) { ret; *eof = 1; return len - offset; }
+
+ /* Mapping helper macros */
+#define DRM_IOREMAP(map) \
+ (map)->handle = DRM(ioremap)( (map)->offset, (map)->size )
+
+#define DRM_IOREMAPFREE(map) \
+ do { \
+ if ( (map)->handle && (map)->size ) \
+ DRM(ioremapfree)( (map)->handle, (map)->size ); \
+ } while (0)
-#define DRM_PROC_PRINT_RET(ret, fmt, arg...) \
- len += sprintf(&buf[len], fmt , ##arg); \
- if (len > DRM_PROC_LIMIT) { ret; return len; }
+#define DRM_FIND_MAP(_map, _o) \
+do { \
+ struct list_head *_list; \
+ list_for_each( _list, &dev->maplist->head ) { \
+ drm_map_list_t *_entry = (drm_map_list_t *)_list; \
+ if ( _entry->map && \
+ _entry->map->offset == (_o) ) { \
+ (_map) = _entry->map; \
+ break; \
+ } \
+ } \
+} while(0)
/* Internal types and structures */
#define DRM_ARRAY_SIZE(x) (sizeof(x)/sizeof(x[0]))
@@ -293,8 +352,12 @@ static inline unsigned long __cmpxchg(volatile void *ptr, unsigned long old,
#define DRM_BUFCOUNT(x) ((x)->count - DRM_LEFTCOUNT(x))
#define DRM_WAITCOUNT(dev,idx) DRM_BUFCOUNT(&dev->queuelist[idx]->waitlist)
-typedef int drm_ioctl_t(struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg);
+#define DRM_GET_PRIV_SAREA(_dev, _ctx, _map) do { \
+ (_map) = (_dev)->context_sareas[_ctx]; \
+} while(0)
+
+typedef int drm_ioctl_t( struct inode *inode, struct file *filp,
+ unsigned int cmd, unsigned long arg );
typedef struct drm_ioctl_desc {
drm_ioctl_t *func;
@@ -304,7 +367,7 @@ typedef struct drm_ioctl_desc {
typedef struct drm_devstate {
pid_t owner; /* X server pid holding x_lock */
-
+
} drm_devstate_t;
typedef struct drm_magic_entry {
@@ -365,14 +428,14 @@ typedef struct drm_buf {
#define DRM_DMA_HISTOGRAM_NEXT(current) ((current)*10)
typedef struct drm_histogram {
atomic_t total;
-
+
atomic_t queued_to_dispatched[DRM_DMA_HISTOGRAM_SLOTS];
atomic_t dispatched_to_completed[DRM_DMA_HISTOGRAM_SLOTS];
atomic_t completed_to_freed[DRM_DMA_HISTOGRAM_SLOTS];
-
+
atomic_t queued_to_completed[DRM_DMA_HISTOGRAM_SLOTS];
atomic_t queued_to_freed[DRM_DMA_HISTOGRAM_SLOTS];
-
+
atomic_t dma[DRM_DMA_HISTOGRAM_SLOTS];
atomic_t schedule[DRM_DMA_HISTOGRAM_SLOTS];
atomic_t ctx[DRM_DMA_HISTOGRAM_SLOTS];
@@ -396,7 +459,7 @@ typedef struct drm_freelist {
int initialized; /* Freelist in use */
atomic_t count; /* Number of free buffers */
drm_buf_t *next; /* End pointer */
-
+
wait_queue_head_t waiting; /* Processes waiting on free bufs */
int low_mark; /* Low water mark */
int high_mark; /* High water mark */
@@ -442,9 +505,11 @@ typedef struct drm_queue {
wait_queue_head_t read_queue; /* Processes waiting on block_read */
atomic_t block_write; /* Queue blocked for writes */
wait_queue_head_t write_queue; /* Processes waiting on block_write */
+#if 1
atomic_t total_queued; /* Total queued statistic */
atomic_t total_flushed;/* Total flushes statistic */
atomic_t total_locks; /* Total locks statistics */
+#endif
drm_ctx_flags_t flags; /* Context preserving and 2D-only */
drm_waitlist_t waitlist; /* Pending buffers */
wait_queue_head_t flush_queue; /* Processes waiting until flush */
@@ -458,11 +523,12 @@ typedef struct drm_lock_data {
} drm_lock_data_t;
typedef struct drm_device_dma {
+#if 0
/* Performance Counters */
atomic_t total_prio; /* Total DRM_DMA_PRIORITY */
atomic_t total_bytes; /* Total bytes DMA'd */
atomic_t total_dmas; /* Total DMA buffers dispatched */
-
+
atomic_t total_missed_dma; /* Missed drm_do_dma */
atomic_t total_missed_lock; /* Missed lock in drm_do_dma */
atomic_t total_missed_free; /* Missed drm_free_this_buffer */
@@ -471,16 +537,17 @@ typedef struct drm_device_dma {
atomic_t total_tried; /* Tried next_buffer */
atomic_t total_hit; /* Sent next_buffer */
atomic_t total_lost; /* Lost interrupt */
+#endif
drm_buf_entry_t bufs[DRM_MAX_ORDER+1];
int buf_count;
drm_buf_t **buflist; /* Vector of pointers info bufs */
- int seg_count;
+ int seg_count;
int page_count;
unsigned long *pagelist;
unsigned long byte_count;
enum {
- _DRM_DMA_USE_AGP = 0x01
+ _DRM_DMA_USE_AGP = 0x01
} flags;
/* DMA support */
@@ -490,7 +557,7 @@ typedef struct drm_device_dma {
wait_queue_head_t waiting; /* Processes waiting on free bufs */
} drm_device_dma_t;
-#if defined(CONFIG_AGP) || defined(CONFIG_AGP_MODULE)
+#if __REALLY_HAVE_AGP
typedef struct drm_agp_mem {
unsigned long handle;
agp_memory *memory;
@@ -517,13 +584,18 @@ typedef struct drm_sigdata {
drm_hw_lock_t *lock;
} drm_sigdata_t;
+typedef struct drm_map_list {
+ struct list_head head;
+ drm_map_t *map;
+} drm_map_list_t;
+
typedef struct drm_device {
const char *name; /* Simple driver name */
char *unique; /* Unique identifier: e.g., busid */
int unique_len; /* Length of unique field */
dev_t device; /* Device number for mknod */
char *devname; /* For /proc/interrupts */
-
+
int blocked; /* Blocked due to VC switch? */
struct proc_dir_entry *root; /* Root for this device's entries */
@@ -538,17 +610,10 @@ typedef struct drm_device {
int buf_use; /* Buffers in use -- cannot alloc */
atomic_t buf_alloc; /* Buffer allocation in progress */
- /* Performance Counters */
- atomic_t total_open;
- atomic_t total_close;
- atomic_t total_ioctl;
- atomic_t total_irq; /* Total interruptions */
- atomic_t total_ctx; /* Total context switches */
-
- atomic_t total_locks;
- atomic_t total_unlocks;
- atomic_t total_contends;
- atomic_t total_sleeps;
+ /* Performance counters */
+ unsigned long counters;
+ drm_stat_type_t types[15];
+ atomic_t counts[15];
/* Authentication */
drm_file_t *file_first;
@@ -556,9 +621,12 @@ typedef struct drm_device {
drm_magic_head_t magiclist[DRM_HASH_SIZE];
/* Memory management */
- drm_map_t **maplist; /* Vector of pointers to regions */
+ drm_map_list_t *maplist; /* Linked list of regions */
int map_count; /* Number of mappable regions */
+ drm_map_t **context_sareas;
+ int max_context;
+
drm_vma_entry_t *vmalist; /* List of vmas (for debugging) */
drm_lock_data_t lock; /* Information on hardware lock */
@@ -582,10 +650,10 @@ typedef struct drm_device {
struct tq_struct tq;
cycles_t ctx_start;
cycles_t lck_start;
-#if DRM_DMA_HISTOGRAM
+#if __HAVE_DMA_HISTOGRAM
drm_histogram_t histo;
#endif
-
+
/* Callback to X server for context switch
and for heavy-handed reset. */
char buf[DRM_BSZ]; /* Output buffer */
@@ -595,8 +663,8 @@ typedef struct drm_device {
struct fasync_struct *buf_async;/* Processes waiting for SIGIO */
wait_queue_head_t buf_readers; /* Processes waiting to read */
wait_queue_head_t buf_writers; /* Processes waiting to ctx switch */
-
-#if defined(CONFIG_AGP) || defined(CONFIG_AGP_MODULE)
+
+#if __REALLY_HAVE_AGP
drm_agp_head_t *agp;
#endif
unsigned long *ctx_bitmap;
@@ -606,230 +674,278 @@ typedef struct drm_device {
} drm_device_t;
- /* Internal function definitions */
-
- /* Misc. support (init.c) */
-extern int drm_flags;
-extern void drm_parse_options(char *s);
-extern int drm_cpu_valid(void);
+/* ================================================================
+ * Internal function definitions
+ */
+ /* Misc. support (drm_init.h) */
+extern int DRM(flags);
+extern void DRM(parse_options)( char *s );
+extern int DRM(cpu_valid)( void );
- /* Device support (fops.c) */
-extern int drm_open_helper(struct inode *inode, struct file *filp,
- drm_device_t *dev);
-extern int drm_flush(struct file *filp);
-extern int drm_release(struct inode *inode, struct file *filp);
-extern int drm_fasync(int fd, struct file *filp, int on);
-extern ssize_t drm_read(struct file *filp, char *buf, size_t count,
- loff_t *off);
-extern int drm_write_string(drm_device_t *dev, const char *s);
-extern unsigned int drm_poll(struct file *filp, struct poll_table_struct *wait);
+ /* Driver support (drm_drv.h) */
+extern int DRM(version)(struct inode *inode, struct file *filp,
+ unsigned int cmd, unsigned long arg);
+extern int DRM(open)(struct inode *inode, struct file *filp);
+extern int DRM(release)(struct inode *inode, struct file *filp);
+extern int DRM(ioctl)(struct inode *inode, struct file *filp,
+ unsigned int cmd, unsigned long arg);
+extern int DRM(lock)(struct inode *inode, struct file *filp,
+ unsigned int cmd, unsigned long arg);
+extern int DRM(unlock)(struct inode *inode, struct file *filp,
+ unsigned int cmd, unsigned long arg);
- /* Mapping support (vm.c) */
+ /* Device support (drm_fops.h) */
+extern int DRM(open_helper)(struct inode *inode, struct file *filp,
+ drm_device_t *dev);
+extern int DRM(flush)(struct file *filp);
+extern int DRM(release_fuck)(struct inode *inode, struct file *filp);
+extern int DRM(fasync)(int fd, struct file *filp, int on);
+extern ssize_t DRM(read)(struct file *filp, char *buf, size_t count,
+ loff_t *off);
+extern int DRM(write_string)(drm_device_t *dev, const char *s);
+extern unsigned int DRM(poll)(struct file *filp,
+ struct poll_table_struct *wait);
+
+ /* Mapping support (drm_vm.h) */
#if LINUX_VERSION_CODE < 0x020317
-extern unsigned long drm_vm_nopage(struct vm_area_struct *vma,
+extern unsigned long DRM(vm_nopage)(struct vm_area_struct *vma,
+ unsigned long address,
+ int write_access);
+extern unsigned long DRM(vm_shm_nopage)(struct vm_area_struct *vma,
+ unsigned long address,
+ int write_access);
+extern unsigned long DRM(vm_dma_nopage)(struct vm_area_struct *vma,
+ unsigned long address,
+ int write_access);
+#else
+ /* Return type changed in 2.3.23 */
+extern struct page *DRM(vm_nopage)(struct vm_area_struct *vma,
unsigned long address,
int write_access);
-extern unsigned long drm_vm_shm_nopage(struct vm_area_struct *vma,
+extern struct page *DRM(vm_shm_nopage)(struct vm_area_struct *vma,
unsigned long address,
int write_access);
-extern unsigned long drm_vm_shm_nopage_lock(struct vm_area_struct *vma,
- unsigned long address,
- int write_access);
-extern unsigned long drm_vm_dma_nopage(struct vm_area_struct *vma,
+extern struct page *DRM(vm_dma_nopage)(struct vm_area_struct *vma,
unsigned long address,
int write_access);
-#else
- /* Return type changed in 2.3.23 */
-extern struct page *drm_vm_nopage(struct vm_area_struct *vma,
- unsigned long address,
- int write_access);
-extern struct page *drm_vm_shm_nopage(struct vm_area_struct *vma,
- unsigned long address,
- int write_access);
-extern struct page *drm_vm_shm_nopage_lock(struct vm_area_struct *vma,
- unsigned long address,
- int write_access);
-extern struct page *drm_vm_dma_nopage(struct vm_area_struct *vma,
- unsigned long address,
- int write_access);
-#endif
-extern void drm_vm_open(struct vm_area_struct *vma);
-extern void drm_vm_close(struct vm_area_struct *vma);
-extern int drm_mmap_dma(struct file *filp,
- struct vm_area_struct *vma);
-extern int drm_mmap(struct file *filp, struct vm_area_struct *vma);
-
-
- /* Proc support (proc.c) */
-extern int drm_proc_init(drm_device_t *dev);
-extern int drm_proc_cleanup(void);
-
- /* Memory management support (memory.c) */
-extern void drm_mem_init(void);
-extern int drm_mem_info(char *buf, char **start, off_t offset,
- int len, int *eof, void *data);
-extern void *drm_alloc(size_t size, int area);
-extern void *drm_realloc(void *oldpt, size_t oldsize, size_t size,
- int area);
-extern char *drm_strdup(const char *s, int area);
-extern void drm_strfree(const char *s, int area);
-extern void drm_free(void *pt, size_t size, int area);
-extern unsigned long drm_alloc_pages(int order, int area);
-extern void drm_free_pages(unsigned long address, int order,
- int area);
-extern void *drm_ioremap(unsigned long offset, unsigned long size);
-extern void drm_ioremapfree(void *pt, unsigned long size);
-
-#if defined(CONFIG_AGP) || defined(CONFIG_AGP_MODULE)
-extern agp_memory *drm_alloc_agp(int pages, u32 type);
-extern int drm_free_agp(agp_memory *handle, int pages);
-extern int drm_bind_agp(agp_memory *handle, unsigned int start);
-extern int drm_unbind_agp(agp_memory *handle);
+#endif
+extern void DRM(vm_open)(struct vm_area_struct *vma);
+extern void DRM(vm_close)(struct vm_area_struct *vma);
+extern void DRM(vm_shm_close)(struct vm_area_struct *vma);
+extern int DRM(mmap_dma)(struct file *filp,
+ struct vm_area_struct *vma);
+extern int DRM(mmap)(struct file *filp, struct vm_area_struct *vma);
+
+ /* Memory management support (drm_memory.h) */
+extern void DRM(mem_init)(void);
+extern int DRM(mem_info)(char *buf, char **start, off_t offset,
+ int request, int *eof, void *data);
+extern void *DRM(alloc)(size_t size, int area);
+extern void *DRM(realloc)(void *oldpt, size_t oldsize, size_t size,
+ int area);
+extern char *DRM(strdup)(const char *s, int area);
+extern void DRM(strfree)(const char *s, int area);
+extern void DRM(free)(void *pt, size_t size, int area);
+extern unsigned long DRM(alloc_pages)(int order, int area);
+extern void DRM(free_pages)(unsigned long address, int order,
+ int area);
+extern void *DRM(ioremap)(unsigned long offset, unsigned long size);
+extern void DRM(ioremapfree)(void *pt, unsigned long size);
+
+#if __REALLY_HAVE_AGP
+extern agp_memory *DRM(alloc_agp)(int pages, u32 type);
+extern int DRM(free_agp)(agp_memory *handle, int pages);
+extern int DRM(bind_agp)(agp_memory *handle, unsigned int start);
+extern int DRM(unbind_agp)(agp_memory *handle);
#endif
-
- /* Buffer management support (bufs.c) */
-extern int drm_order(unsigned long size);
-extern int drm_addmap(struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg);
-extern int drm_addbufs(struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg);
-extern int drm_infobufs(struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg);
-extern int drm_markbufs(struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg);
-extern int drm_freebufs(struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg);
-extern int drm_mapbufs(struct inode *inode, struct file *filp,
+ /* Misc. IOCTL support (drm_ioctl.h) */
+extern int DRM(irq_busid)(struct inode *inode, struct file *filp,
+ unsigned int cmd, unsigned long arg);
+extern int DRM(getunique)(struct inode *inode, struct file *filp,
+ unsigned int cmd, unsigned long arg);
+extern int DRM(setunique)(struct inode *inode, struct file *filp,
+ unsigned int cmd, unsigned long arg);
+extern int DRM(getmap)(struct inode *inode, struct file *filp,
unsigned int cmd, unsigned long arg);
+extern int DRM(getclient)(struct inode *inode, struct file *filp,
+ unsigned int cmd, unsigned long arg);
+extern int DRM(getstats)(struct inode *inode, struct file *filp,
+ unsigned int cmd, unsigned long arg);
-
- /* Buffer list management support (lists.c) */
-extern int drm_waitlist_create(drm_waitlist_t *bl, int count);
-extern int drm_waitlist_destroy(drm_waitlist_t *bl);
-extern int drm_waitlist_put(drm_waitlist_t *bl, drm_buf_t *buf);
-extern drm_buf_t *drm_waitlist_get(drm_waitlist_t *bl);
-
-extern int drm_freelist_create(drm_freelist_t *bl, int count);
-extern int drm_freelist_destroy(drm_freelist_t *bl);
-extern int drm_freelist_put(drm_device_t *dev, drm_freelist_t *bl,
- drm_buf_t *buf);
-extern drm_buf_t *drm_freelist_get(drm_freelist_t *bl, int block);
-
- /* DMA support (gen_dma.c) */
-extern void drm_dma_setup(drm_device_t *dev);
-extern void drm_dma_takedown(drm_device_t *dev);
-extern void drm_free_buffer(drm_device_t *dev, drm_buf_t *buf);
-extern void drm_reclaim_buffers(drm_device_t *dev, pid_t pid);
-extern int drm_context_switch(drm_device_t *dev, int old, int new);
-extern int drm_context_switch_complete(drm_device_t *dev, int new);
-extern void drm_clear_next_buffer(drm_device_t *dev);
-extern int drm_select_queue(drm_device_t *dev,
- void (*wrapper)(unsigned long));
-extern int drm_dma_enqueue(drm_device_t *dev, drm_dma_t *dma);
-extern int drm_dma_get_buffers(drm_device_t *dev, drm_dma_t *dma);
-#if DRM_DMA_HISTOGRAM
-extern int drm_histogram_slot(unsigned long count);
-extern void drm_histogram_compute(drm_device_t *dev, drm_buf_t *buf);
+ /* Context IOCTL support (drm_context.h) */
+extern int DRM(resctx)( struct inode *inode, struct file *filp,
+ unsigned int cmd, unsigned long arg );
+extern int DRM(addctx)( struct inode *inode, struct file *filp,
+ unsigned int cmd, unsigned long arg );
+extern int DRM(modctx)( struct inode *inode, struct file *filp,
+ unsigned int cmd, unsigned long arg );
+extern int DRM(getctx)( struct inode *inode, struct file *filp,
+ unsigned int cmd, unsigned long arg );
+extern int DRM(switchctx)( struct inode *inode, struct file *filp,
+ unsigned int cmd, unsigned long arg );
+extern int DRM(newctx)( struct inode *inode, struct file *filp,
+ unsigned int cmd, unsigned long arg );
+extern int DRM(rmctx)( struct inode *inode, struct file *filp,
+ unsigned int cmd, unsigned long arg );
+
+extern int DRM(context_switch)(drm_device_t *dev, int old, int new);
+extern int DRM(context_switch_complete)(drm_device_t *dev, int new);
+
+#if __HAVE_CTX_BITMAP
+extern int DRM(ctxbitmap_init)( drm_device_t *dev );
+extern void DRM(ctxbitmap_cleanup)( drm_device_t *dev );
#endif
+extern int DRM(setsareactx)( struct inode *inode, struct file *filp,
+ unsigned int cmd, unsigned long arg );
+extern int DRM(getsareactx)( struct inode *inode, struct file *filp,
+ unsigned int cmd, unsigned long arg );
- /* Misc. IOCTL support (ioctl.c) */
-extern int drm_irq_busid(struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg);
-extern int drm_getunique(struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg);
-extern int drm_setunique(struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg);
+ /* Drawable IOCTL support (drm_drawable.h) */
+extern int DRM(adddraw)(struct inode *inode, struct file *filp,
+ unsigned int cmd, unsigned long arg);
+extern int DRM(rmdraw)(struct inode *inode, struct file *filp,
+ unsigned int cmd, unsigned long arg);
- /* Context IOCTL support (context.c) */
-extern int drm_resctx(struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg);
-extern int drm_addctx(struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg);
-extern int drm_modctx(struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg);
-extern int drm_getctx(struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg);
-extern int drm_switchctx(struct inode *inode, struct file *filp,
+ /* Authentication IOCTL support (drm_auth.h) */
+extern int DRM(add_magic)(drm_device_t *dev, drm_file_t *priv,
+ drm_magic_t magic);
+extern int DRM(remove_magic)(drm_device_t *dev, drm_magic_t magic);
+extern int DRM(getmagic)(struct inode *inode, struct file *filp,
unsigned int cmd, unsigned long arg);
-extern int drm_newctx(struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg);
-extern int drm_rmctx(struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg);
+extern int DRM(authmagic)(struct inode *inode, struct file *filp,
+ unsigned int cmd, unsigned long arg);
- /* Drawable IOCTL support (drawable.c) */
-extern int drm_adddraw(struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg);
-extern int drm_rmdraw(struct inode *inode, struct file *filp,
+ /* Locking IOCTL support (drm_lock.h) */
+extern int DRM(block)(struct inode *inode, struct file *filp,
unsigned int cmd, unsigned long arg);
-
-
- /* Authentication IOCTL support (auth.c) */
-extern int drm_add_magic(drm_device_t *dev, drm_file_t *priv,
- drm_magic_t magic);
-extern int drm_remove_magic(drm_device_t *dev, drm_magic_t magic);
-extern int drm_getmagic(struct inode *inode, struct file *filp,
+extern int DRM(unblock)(struct inode *inode, struct file *filp,
unsigned int cmd, unsigned long arg);
-extern int drm_authmagic(struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg);
-
-
- /* Locking IOCTL support (lock.c) */
-extern int drm_block(struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg);
-extern int drm_unblock(struct inode *inode, struct file *filp,
+extern int DRM(lock_take)(__volatile__ unsigned int *lock,
+ unsigned int context);
+extern int DRM(lock_transfer)(drm_device_t *dev,
+ __volatile__ unsigned int *lock,
+ unsigned int context);
+extern int DRM(lock_free)(drm_device_t *dev,
+ __volatile__ unsigned int *lock,
+ unsigned int context);
+extern int DRM(finish)(struct inode *inode, struct file *filp,
unsigned int cmd, unsigned long arg);
-extern int drm_lock_take(__volatile__ unsigned int *lock,
- unsigned int context);
-extern int drm_lock_transfer(drm_device_t *dev,
- __volatile__ unsigned int *lock,
- unsigned int context);
-extern int drm_lock_free(drm_device_t *dev,
- __volatile__ unsigned int *lock,
- unsigned int context);
-extern int drm_finish(struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg);
-extern int drm_flush_unblock(drm_device_t *dev, int context,
- drm_lock_flags_t flags);
-extern int drm_flush_block_and_flush(drm_device_t *dev, int context,
- drm_lock_flags_t flags);
-extern int drm_notifier(void *priv);
-
- /* Context Bitmap support (ctxbitmap.c) */
-extern int drm_ctxbitmap_init(drm_device_t *dev);
-extern void drm_ctxbitmap_cleanup(drm_device_t *dev);
-extern int drm_ctxbitmap_next(drm_device_t *dev);
-extern void drm_ctxbitmap_free(drm_device_t *dev, int ctx_handle);
+extern int DRM(flush_unblock)(drm_device_t *dev, int context,
+ drm_lock_flags_t flags);
+extern int DRM(flush_block_and_flush)(drm_device_t *dev, int context,
+ drm_lock_flags_t flags);
+extern int DRM(notifier)(void *priv);
+
+ /* Buffer management support (drm_bufs.h) */
+extern int DRM(order)( unsigned long size );
+extern int DRM(addmap)( struct inode *inode, struct file *filp,
+ unsigned int cmd, unsigned long arg );
+extern int DRM(rmmap)( struct inode *inode, struct file *filp,
+ unsigned int cmd, unsigned long arg );
+#if __HAVE_DMA
+extern int DRM(addbufs)( struct inode *inode, struct file *filp,
+ unsigned int cmd, unsigned long arg );
+extern int DRM(infobufs)( struct inode *inode, struct file *filp,
+ unsigned int cmd, unsigned long arg );
+extern int DRM(markbufs)( struct inode *inode, struct file *filp,
+ unsigned int cmd, unsigned long arg );
+extern int DRM(freebufs)( struct inode *inode, struct file *filp,
+ unsigned int cmd, unsigned long arg );
+extern int DRM(mapbufs)( struct inode *inode, struct file *filp,
+ unsigned int cmd, unsigned long arg );
+
+ /* DMA support (drm_dma.h) */
+extern int DRM(dma_setup)(drm_device_t *dev);
+extern void DRM(dma_takedown)(drm_device_t *dev);
+extern void DRM(free_buffer)(drm_device_t *dev, drm_buf_t *buf);
+extern void DRM(reclaim_buffers)(drm_device_t *dev, pid_t pid);
+#if __HAVE_OLD_DMA
+/* GH: This is a dirty hack for now...
+ */
+extern void DRM(clear_next_buffer)(drm_device_t *dev);
+extern int DRM(select_queue)(drm_device_t *dev,
+ void (*wrapper)(unsigned long));
+extern int DRM(dma_enqueue)(drm_device_t *dev, drm_dma_t *dma);
+extern int DRM(dma_get_buffers)(drm_device_t *dev, drm_dma_t *dma);
+#endif
+#if __HAVE_DMA_IRQ
+extern int DRM(control)( struct inode *inode, struct file *filp,
+ unsigned int cmd, unsigned long arg );
+extern int DRM(irq_install)( drm_device_t *dev, int irq );
+extern int DRM(irq_uninstall)( drm_device_t *dev );
+extern void DRM(dma_service)( int irq, void *device,
+ struct pt_regs *regs );
+#if __HAVE_DMA_IRQ_BH
+extern void DRM(dma_immediate_bh)( void *dev );
+#endif
+#endif
+#if DRM_DMA_HISTOGRAM
+extern int DRM(histogram_slot)(unsigned long count);
+extern void DRM(histogram_compute)(drm_device_t *dev, drm_buf_t *buf);
+#endif
-#if defined(CONFIG_AGP) || defined(CONFIG_AGP_MODULE)
- /* AGP/GART support (agpsupport.c) */
-extern drm_agp_head_t *drm_agp_init(void);
-extern void drm_agp_uninit(void);
-extern int drm_agp_acquire(struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg);
-extern void _drm_agp_release(void);
-extern int drm_agp_release(struct inode *inode, struct file *filp,
+ /* Buffer list support (drm_lists.h) */
+#if __HAVE_DMA_WAITLIST
+extern int DRM(waitlist_create)(drm_waitlist_t *bl, int count);
+extern int DRM(waitlist_destroy)(drm_waitlist_t *bl);
+extern int DRM(waitlist_put)(drm_waitlist_t *bl, drm_buf_t *buf);
+extern drm_buf_t *DRM(waitlist_get)(drm_waitlist_t *bl);
+#endif
+#if __HAVE_DMA_FREELIST
+extern int DRM(freelist_create)(drm_freelist_t *bl, int count);
+extern int DRM(freelist_destroy)(drm_freelist_t *bl);
+extern int DRM(freelist_put)(drm_device_t *dev, drm_freelist_t *bl,
+ drm_buf_t *buf);
+extern drm_buf_t *DRM(freelist_get)(drm_freelist_t *bl, int block);
+#endif
+#endif /* __HAVE_DMA */
+
+#if __REALLY_HAVE_AGP
+ /* AGP/GART support (drm_agpsupport.h) */
+extern drm_agp_head_t *DRM(agp_init)(void);
+extern void DRM(agp_uninit)(void);
+extern int DRM(agp_acquire)(struct inode *inode, struct file *filp,
+ unsigned int cmd, unsigned long arg);
+extern void DRM(agp_do_release)(void);
+extern int DRM(agp_release)(struct inode *inode, struct file *filp,
+ unsigned int cmd, unsigned long arg);
+extern int DRM(agp_enable)(struct inode *inode, struct file *filp,
unsigned int cmd, unsigned long arg);
-extern int drm_agp_enable(struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg);
-extern int drm_agp_info(struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg);
-extern int drm_agp_alloc(struct inode *inode, struct file *filp,
+extern int DRM(agp_info)(struct inode *inode, struct file *filp,
unsigned int cmd, unsigned long arg);
-extern int drm_agp_free(struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg);
-extern int drm_agp_unbind(struct inode *inode, struct file *filp,
+extern int DRM(agp_alloc)(struct inode *inode, struct file *filp,
unsigned int cmd, unsigned long arg);
-extern int drm_agp_bind(struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg);
-extern agp_memory *drm_agp_allocate_memory(size_t pages, u32 type);
-extern int drm_agp_free_memory(agp_memory *handle);
-extern int drm_agp_bind_memory(agp_memory *handle, off_t start);
-extern int drm_agp_unbind_memory(agp_memory *handle);
-#endif
+extern int DRM(agp_free)(struct inode *inode, struct file *filp,
+ unsigned int cmd, unsigned long arg);
+extern int DRM(agp_unbind)(struct inode *inode, struct file *filp,
+ unsigned int cmd, unsigned long arg);
+extern int DRM(agp_bind)(struct inode *inode, struct file *filp,
+ unsigned int cmd, unsigned long arg);
+extern agp_memory *DRM(agp_allocate_memory)(size_t pages, u32 type);
+extern int DRM(agp_free_memory)(agp_memory *handle);
+extern int DRM(agp_bind_memory)(agp_memory *handle, off_t start);
+extern int DRM(agp_unbind_memory)(agp_memory *handle);
#endif
+
+ /* Stub support (drm_stub.h) */
+int DRM(stub_register)(const char *name,
+ struct file_operations *fops,
+ drm_device_t *dev);
+int DRM(stub_unregister)(int minor);
+
+ /* Proc support (drm_proc.h) */
+extern struct proc_dir_entry *DRM(proc_init)(drm_device_t *dev,
+ int minor,
+ struct proc_dir_entry *root,
+ struct proc_dir_entry **dev_root);
+extern int DRM(proc_cleanup)(int minor,
+ struct proc_dir_entry *root,
+ struct proc_dir_entry *dev_root);
+
+#endif /* __KERNEL__ */
#endif
diff --git a/linux/drm_auth.h b/linux/drm_auth.h
new file mode 100644
index 00000000..2636e617
--- /dev/null
+++ b/linux/drm_auth.h
@@ -0,0 +1,162 @@
+/* drm_auth.h -- IOCTLs for authentication -*- linux-c -*-
+ * Created: Tue Feb 2 08:37:54 1999 by faith@valinux.com
+ *
+ * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
+ * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Authors:
+ * Rickard E. (Rik) Faith <faith@valinux.com>
+ * Gareth Hughes <gareth@valinux.com>
+ */
+
+#define __NO_VERSION__
+#include "drmP.h"
+
+static int DRM(hash_magic)(drm_magic_t magic)
+{
+ return magic & (DRM_HASH_SIZE-1);
+}
+
+static drm_file_t *DRM(find_file)(drm_device_t *dev, drm_magic_t magic)
+{
+ drm_file_t *retval = NULL;
+ drm_magic_entry_t *pt;
+ int hash = DRM(hash_magic)(magic);
+
+ down(&dev->struct_sem);
+ for (pt = dev->magiclist[hash].head; pt; pt = pt->next) {
+ if (pt->magic == magic) {
+ retval = pt->priv;
+ break;
+ }
+ }
+ up(&dev->struct_sem);
+ return retval;
+}
+
+int DRM(add_magic)(drm_device_t *dev, drm_file_t *priv, drm_magic_t magic)
+{
+ int hash;
+ drm_magic_entry_t *entry;
+
+ DRM_DEBUG("%d\n", magic);
+
+ hash = DRM(hash_magic)(magic);
+ entry = DRM(alloc)(sizeof(*entry), DRM_MEM_MAGIC);
+ if (!entry) return -ENOMEM;
+ entry->magic = magic;
+ entry->priv = priv;
+ entry->next = NULL;
+
+ down(&dev->struct_sem);
+ if (dev->magiclist[hash].tail) {
+ dev->magiclist[hash].tail->next = entry;
+ dev->magiclist[hash].tail = entry;
+ } else {
+ dev->magiclist[hash].head = entry;
+ dev->magiclist[hash].tail = entry;
+ }
+ up(&dev->struct_sem);
+
+ return 0;
+}
+
+int DRM(remove_magic)(drm_device_t *dev, drm_magic_t magic)
+{
+ drm_magic_entry_t *prev = NULL;
+ drm_magic_entry_t *pt;
+ int hash;
+
+ DRM_DEBUG("%d\n", magic);
+ hash = DRM(hash_magic)(magic);
+
+ down(&dev->struct_sem);
+ for (pt = dev->magiclist[hash].head; pt; prev = pt, pt = pt->next) {
+ if (pt->magic == magic) {
+ if (dev->magiclist[hash].head == pt) {
+ dev->magiclist[hash].head = pt->next;
+ }
+ if (dev->magiclist[hash].tail == pt) {
+ dev->magiclist[hash].tail = prev;
+ }
+ if (prev) {
+ prev->next = pt->next;
+ }
+ up(&dev->struct_sem);
+ return 0;
+ }
+ }
+ up(&dev->struct_sem);
+
+ DRM(free)(pt, sizeof(*pt), DRM_MEM_MAGIC);
+
+ return -EINVAL;
+}
+
+int DRM(getmagic)(struct inode *inode, struct file *filp,
+ unsigned int cmd, unsigned long arg)
+{
+ static drm_magic_t sequence = 0;
+ static spinlock_t lock = SPIN_LOCK_UNLOCKED;
+ drm_file_t *priv = filp->private_data;
+ drm_device_t *dev = priv->dev;
+ drm_auth_t auth;
+
+ /* Find unique magic */
+ if (priv->magic) {
+ auth.magic = priv->magic;
+ } else {
+ do {
+ spin_lock(&lock);
+ if (!sequence) ++sequence; /* reserve 0 */
+ auth.magic = sequence++;
+ spin_unlock(&lock);
+ } while (DRM(find_file)(dev, auth.magic));
+ priv->magic = auth.magic;
+ DRM(add_magic)(dev, priv, auth.magic);
+ }
+
+ DRM_DEBUG("%u\n", auth.magic);
+ if (copy_to_user((drm_auth_t *)arg, &auth, sizeof(auth)))
+ return -EFAULT;
+ return 0;
+}
+
+int DRM(authmagic)(struct inode *inode, struct file *filp,
+ unsigned int cmd, unsigned long arg)
+{
+ drm_file_t *priv = filp->private_data;
+ drm_device_t *dev = priv->dev;
+ drm_auth_t auth;
+ drm_file_t *file;
+
+ if (copy_from_user(&auth, (drm_auth_t *)arg, sizeof(auth)))
+ return -EFAULT;
+ DRM_DEBUG("%u\n", auth.magic);
+ if ((file = DRM(find_file)(dev, auth.magic))) {
+ file->authenticated = 1;
+ DRM(remove_magic)(dev, auth.magic);
+ return 0;
+ }
+ return -EINVAL;
+}
diff --git a/linux/drm_context.h b/linux/drm_context.h
new file mode 100644
index 00000000..4ac896ef
--- /dev/null
+++ b/linux/drm_context.h
@@ -0,0 +1,760 @@
+/* drm_context.h -- IOCTLs for generic contexts -*- linux-c -*-
+ * Created: Fri Nov 24 18:31:37 2000 by gareth@valinux.com
+ *
+ * Copyright 1999, 2000 Precision Insight, Inc., Cedar Park, Texas.
+ * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Authors:
+ * Rickard E. (Rik) Faith <faith@valinux.com>
+ * Gareth Hughes <gareth@valinux.com>
+ */
+
+#define __NO_VERSION__
+#include "drmP.h"
+
+#if __HAVE_CTX_BITMAP
+
+/* ================================================================
+ * Context bitmap support
+ */
+
+void DRM(ctxbitmap_free)( drm_device_t *dev, int ctx_handle )
+{
+ if ( ctx_handle < 0 ) goto failed;
+ if ( !dev->ctx_bitmap ) goto failed;
+
+ if ( ctx_handle < DRM_MAX_CTXBITMAP ) {
+ down(&dev->struct_sem);
+ clear_bit( ctx_handle, dev->ctx_bitmap );
+ dev->context_sareas[ctx_handle] = NULL;
+ up(&dev->struct_sem);
+ return;
+ }
+failed:
+ DRM_ERROR( "Attempt to free invalid context handle: %d\n",
+ ctx_handle );
+ return;
+}
+
+int DRM(ctxbitmap_next)( drm_device_t *dev )
+{
+ int bit;
+
+ if(!dev->ctx_bitmap) return -1;
+
+ down(&dev->struct_sem);
+ bit = find_first_zero_bit( dev->ctx_bitmap, DRM_MAX_CTXBITMAP );
+ if ( bit < DRM_MAX_CTXBITMAP ) {
+ set_bit( bit, dev->ctx_bitmap );
+ DRM_DEBUG( "drm_ctxbitmap_next bit : %d\n", bit );
+ if((bit+1) > dev->max_context) {
+ dev->max_context = (bit+1);
+ if(dev->context_sareas) {
+ dev->context_sareas = DRM(realloc)(
+ dev->context_sareas,
+ (dev->max_context - 1) *
+ sizeof(*dev->context_sareas),
+ dev->max_context *
+ sizeof(*dev->context_sareas),
+ DRM_MEM_MAPS);
+ dev->context_sareas[bit] = NULL;
+ } else {
+ /* max_context == 1 at this point */
+ dev->context_sareas = DRM(alloc)(
+ dev->max_context *
+ sizeof(*dev->context_sareas),
+ DRM_MEM_MAPS);
+ dev->context_sareas[bit] = NULL;
+ }
+ }
+ up(&dev->struct_sem);
+ return bit;
+ }
+ up(&dev->struct_sem);
+ return -1;
+}
+
+int DRM(ctxbitmap_init)( drm_device_t *dev )
+{
+ int i;
+ int temp;
+
+ down(&dev->struct_sem);
+ dev->ctx_bitmap = (unsigned long *) DRM(alloc)( PAGE_SIZE,
+ DRM_MEM_CTXBITMAP );
+ if ( dev->ctx_bitmap == NULL ) {
+ up(&dev->struct_sem);
+ return -ENOMEM;
+ }
+ memset( (void *)dev->ctx_bitmap, 0, PAGE_SIZE );
+ dev->context_sareas = NULL;
+ dev->max_context = -1;
+ up(&dev->struct_sem);
+
+ for ( i = 0 ; i < DRM_RESERVED_CONTEXTS ; i++ ) {
+ temp = DRM(ctxbitmap_next)( dev );
+ DRM_DEBUG( "drm_ctxbitmap_init : %d\n", temp );
+ }
+
+ return 0;
+}
+
+void DRM(ctxbitmap_cleanup)( drm_device_t *dev )
+{
+ down(&dev->struct_sem);
+ if( dev->context_sareas ) DRM(free)( dev->context_sareas,
+ sizeof(*dev->context_sareas) *
+ dev->max_context,
+ DRM_MEM_MAPS );
+ DRM(free)( (void *)dev->ctx_bitmap, PAGE_SIZE, DRM_MEM_CTXBITMAP );
+ up(&dev->struct_sem);
+}
+
+/* ================================================================
+ * Per Context SAREA Support
+ */
+
+int DRM(getsareactx)(struct inode *inode, struct file *filp,
+ unsigned int cmd, unsigned long arg)
+{
+ drm_file_t *priv = filp->private_data;
+ drm_device_t *dev = priv->dev;
+ drm_ctx_priv_map_t request;
+ drm_map_t *map;
+
+ if (copy_from_user(&request,
+ (drm_ctx_priv_map_t *)arg,
+ sizeof(request)))
+ return -EFAULT;
+
+ down(&dev->struct_sem);
+ if ((int)request.ctx_id >= dev->max_context) {
+ up(&dev->struct_sem);
+ return -EINVAL;
+ }
+
+ map = dev->context_sareas[request.ctx_id];
+ up(&dev->struct_sem);
+
+ request.handle = map->handle;
+ if (copy_to_user((drm_ctx_priv_map_t *)arg, &request, sizeof(request)))
+ return -EFAULT;
+ return 0;
+}
+
+int DRM(setsareactx)(struct inode *inode, struct file *filp,
+ unsigned int cmd, unsigned long arg)
+{
+ drm_file_t *priv = filp->private_data;
+ drm_device_t *dev = priv->dev;
+ drm_ctx_priv_map_t request;
+ drm_map_t *map = NULL;
+ drm_map_list_t *r_list;
+ struct list_head *list;
+
+ if (copy_from_user(&request,
+ (drm_ctx_priv_map_t *)arg,
+ sizeof(request)))
+ return -EFAULT;
+
+ down(&dev->struct_sem);
+ list_for_each(list, &dev->maplist->head) {
+ r_list = (drm_map_list_t *)list;
+ if(r_list->map &&
+ r_list->map->handle == request.handle) break;
+ }
+ if (list == &(dev->maplist->head)) {
+ up(&dev->struct_sem);
+ return -EINVAL;
+ }
+ map = r_list->map;
+ up(&dev->struct_sem);
+
+ if (!map) return -EINVAL;
+
+ down(&dev->struct_sem);
+ if ((int)request.ctx_id >= dev->max_context) {
+ up(&dev->struct_sem);
+ return -EINVAL;
+ }
+ dev->context_sareas[request.ctx_id] = map;
+ up(&dev->struct_sem);
+ return 0;
+}
+
+/* ================================================================
+ * The actual DRM context handling routines
+ */
+
+int DRM(context_switch)( drm_device_t *dev, int old, int new )
+{
+ char buf[64];
+
+ if ( test_and_set_bit( 0, &dev->context_flag ) ) {
+ DRM_ERROR( "Reentering -- FIXME\n" );
+ return -EBUSY;
+ }
+
+#if __HAVE_DMA_HISTOGRAM
+ dev->ctx_start = get_cycles();
+#endif
+
+ DRM_DEBUG( "Context switch from %d to %d\n", old, new );
+
+ if ( new == dev->last_context ) {
+ clear_bit( 0, &dev->context_flag );
+ return 0;
+ }
+
+ if ( DRM(flags) & DRM_FLAG_NOCTX ) {
+ DRM(context_switch_complete)( dev, new );
+ } else {
+ sprintf( buf, "C %d %d\n", old, new );
+ DRM(write_string)( dev, buf );
+ }
+
+ return 0;
+}
+
+int DRM(context_switch_complete)( drm_device_t *dev, int new )
+{
+ dev->last_context = new; /* PRE/POST: This is the _only_ writer. */
+ dev->last_switch = jiffies;
+
+ if ( !_DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock) ) {
+ DRM_ERROR( "Lock isn't held after context switch\n" );
+ }
+
+ /* If a context switch is ever initiated
+ when the kernel holds the lock, release
+ that lock here. */
+#if __HAVE_DMA_HISTOGRAM
+ atomic_inc( &dev->histo.ctx[DRM(histogram_slot)(get_cycles()
+ - dev->ctx_start)] );
+
+#endif
+ clear_bit( 0, &dev->context_flag );
+ wake_up( &dev->context_wait );
+
+ return 0;
+}
+
+int DRM(resctx)( struct inode *inode, struct file *filp,
+ unsigned int cmd, unsigned long arg )
+{
+ drm_ctx_res_t res;
+ drm_ctx_t ctx;
+ int i;
+
+ if ( copy_from_user( &res, (drm_ctx_res_t *)arg, sizeof(res) ) )
+ return -EFAULT;
+
+ if ( res.count >= DRM_RESERVED_CONTEXTS ) {
+ memset( &ctx, 0, sizeof(ctx) );
+ for ( i = 0 ; i < DRM_RESERVED_CONTEXTS ; i++ ) {
+ ctx.handle = i;
+ if ( copy_to_user( &res.contexts[i],
+ &i, sizeof(i) ) )
+ return -EFAULT;
+ }
+ }
+ res.count = DRM_RESERVED_CONTEXTS;
+
+ if ( copy_to_user( (drm_ctx_res_t *)arg, &res, sizeof(res) ) )
+ return -EFAULT;
+ return 0;
+}
+
+int DRM(addctx)( struct inode *inode, struct file *filp,
+ unsigned int cmd, unsigned long arg )
+{
+ drm_file_t *priv = filp->private_data;
+ drm_device_t *dev = priv->dev;
+ drm_ctx_t ctx;
+
+ if ( copy_from_user( &ctx, (drm_ctx_t *)arg, sizeof(ctx) ) )
+ return -EFAULT;
+
+ ctx.handle = DRM(ctxbitmap_next)( dev );
+ if ( ctx.handle == DRM_KERNEL_CONTEXT ) {
+ /* Skip kernel's context and get a new one. */
+ ctx.handle = DRM(ctxbitmap_next)( dev );
+ }
+ DRM_DEBUG( "%d\n", ctx.handle );
+ if ( ctx.handle == -1 ) {
+ DRM_DEBUG( "Not enough free contexts.\n" );
+ /* Should this return -EBUSY instead? */
+ return -ENOMEM;
+ }
+
+ if ( copy_to_user( (drm_ctx_t *)arg, &ctx, sizeof(ctx) ) )
+ return -EFAULT;
+ return 0;
+}
+
+int DRM(modctx)( struct inode *inode, struct file *filp,
+ unsigned int cmd, unsigned long arg )
+{
+ /* This does nothing */
+ return 0;
+}
+
+int DRM(getctx)( struct inode *inode, struct file *filp,
+ unsigned int cmd, unsigned long arg )
+{
+ drm_ctx_t ctx;
+
+ if ( copy_from_user( &ctx, (drm_ctx_t*)arg, sizeof(ctx) ) )
+ return -EFAULT;
+
+ /* This is 0, because we don't handle any context flags */
+ ctx.flags = 0;
+
+ if ( copy_to_user( (drm_ctx_t*)arg, &ctx, sizeof(ctx) ) )
+ return -EFAULT;
+ return 0;
+}
+
+int DRM(switchctx)( struct inode *inode, struct file *filp,
+ unsigned int cmd, unsigned long arg )
+{
+ drm_file_t *priv = filp->private_data;
+ drm_device_t *dev = priv->dev;
+ drm_ctx_t ctx;
+
+ if ( copy_from_user( &ctx, (drm_ctx_t *)arg, sizeof(ctx) ) )
+ return -EFAULT;
+
+ DRM_DEBUG( "%d\n", ctx.handle );
+ return DRM(context_switch)( dev, dev->last_context, ctx.handle );
+}
+
+int DRM(newctx)( struct inode *inode, struct file *filp,
+ unsigned int cmd, unsigned long arg )
+{
+ drm_file_t *priv = filp->private_data;
+ drm_device_t *dev = priv->dev;
+ drm_ctx_t ctx;
+
+ if ( copy_from_user( &ctx, (drm_ctx_t *)arg, sizeof(ctx) ) )
+ return -EFAULT;
+
+ DRM_DEBUG( "%d\n", ctx.handle );
+ DRM(context_switch_complete)( dev, ctx.handle );
+
+ return 0;
+}
+
+int DRM(rmctx)( struct inode *inode, struct file *filp,
+ unsigned int cmd, unsigned long arg )
+{
+ drm_file_t *priv = filp->private_data;
+ drm_device_t *dev = priv->dev;
+ drm_ctx_t ctx;
+
+ if ( copy_from_user( &ctx, (drm_ctx_t *)arg, sizeof(ctx) ) )
+ return -EFAULT;
+
+ DRM_DEBUG( "%d\n", ctx.handle );
+ if ( ctx.handle == DRM_KERNEL_CONTEXT + 1 ) {
+ priv->remove_auth_on_close = 1;
+ }
+ if ( ctx.handle != DRM_KERNEL_CONTEXT ) {
+ DRM(ctxbitmap_free)( dev, ctx.handle );
+ }
+
+ return 0;
+}
+
+
+#else /* __HAVE_CTX_BITMAP */
+
+/* ================================================================
+ * Old-style context support
+ */
+
+
+int DRM(context_switch)(drm_device_t *dev, int old, int new)
+{
+ char buf[64];
+ drm_queue_t *q;
+
+#if 0
+ atomic_inc(&dev->total_ctx);
+#endif
+
+ if (test_and_set_bit(0, &dev->context_flag)) {
+ DRM_ERROR("Reentering -- FIXME\n");
+ return -EBUSY;
+ }
+
+#if __HAVE_DMA_HISTOGRAM
+ dev->ctx_start = get_cycles();
+#endif
+
+ DRM_DEBUG("Context switch from %d to %d\n", old, new);
+
+ if (new >= dev->queue_count) {
+ clear_bit(0, &dev->context_flag);
+ return -EINVAL;
+ }
+
+ if (new == dev->last_context) {
+ clear_bit(0, &dev->context_flag);
+ return 0;
+ }
+
+ q = dev->queuelist[new];
+ atomic_inc(&q->use_count);
+ if (atomic_read(&q->use_count) == 1) {
+ atomic_dec(&q->use_count);
+ clear_bit(0, &dev->context_flag);
+ return -EINVAL;
+ }
+
+ if (DRM(flags) & DRM_FLAG_NOCTX) {
+ DRM(context_switch_complete)(dev, new);
+ } else {
+ sprintf(buf, "C %d %d\n", old, new);
+ DRM(write_string)(dev, buf);
+ }
+
+ atomic_dec(&q->use_count);
+
+ return 0;
+}
+
+int DRM(context_switch_complete)(drm_device_t *dev, int new)
+{
+ drm_device_dma_t *dma = dev->dma;
+
+ dev->last_context = new; /* PRE/POST: This is the _only_ writer. */
+ dev->last_switch = jiffies;
+
+ if (!_DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock)) {
+ DRM_ERROR("Lock isn't held after context switch\n");
+ }
+
+ if (!dma || !(dma->next_buffer && dma->next_buffer->while_locked)) {
+ if (DRM(lock_free)(dev, &dev->lock.hw_lock->lock,
+ DRM_KERNEL_CONTEXT)) {
+ DRM_ERROR("Cannot free lock\n");
+ }
+ }
+
+#if __HAVE_DMA_HISTOGRAM
+ atomic_inc(&dev->histo.ctx[DRM(histogram_slot)(get_cycles()
+ - dev->ctx_start)]);
+
+#endif
+ clear_bit(0, &dev->context_flag);
+ wake_up_interruptible(&dev->context_wait);
+
+ return 0;
+}
+
+static int DRM(init_queue)(drm_device_t *dev, drm_queue_t *q, drm_ctx_t *ctx)
+{
+ DRM_DEBUG("\n");
+
+ if (atomic_read(&q->use_count) != 1
+ || atomic_read(&q->finalization)
+ || atomic_read(&q->block_count)) {
+ DRM_ERROR("New queue is already in use: u%d f%d b%d\n",
+ atomic_read(&q->use_count),
+ atomic_read(&q->finalization),
+ atomic_read(&q->block_count));
+ }
+
+ atomic_set(&q->finalization, 0);
+ atomic_set(&q->block_count, 0);
+ atomic_set(&q->block_read, 0);
+ atomic_set(&q->block_write, 0);
+ atomic_set(&q->total_queued, 0);
+ atomic_set(&q->total_flushed, 0);
+ atomic_set(&q->total_locks, 0);
+
+ init_waitqueue_head(&q->write_queue);
+ init_waitqueue_head(&q->read_queue);
+ init_waitqueue_head(&q->flush_queue);
+
+ q->flags = ctx->flags;
+
+ DRM(waitlist_create)(&q->waitlist, dev->dma->buf_count);
+
+ return 0;
+}
+
+
+/* drm_alloc_queue:
+PRE: 1) dev->queuelist[0..dev->queue_count] is allocated and will not
+ disappear (so all deallocation must be done after IOCTLs are off)
+ 2) dev->queue_count < dev->queue_slots
+ 3) dev->queuelist[i].use_count == 0 and
+ dev->queuelist[i].finalization == 0 if i not in use
+POST: 1) dev->queuelist[i].use_count == 1
+ 2) dev->queue_count < dev->queue_slots */
+
+static int DRM(alloc_queue)(drm_device_t *dev)
+{
+ int i;
+ drm_queue_t *queue;
+ int oldslots;
+ int newslots;
+ /* Check for a free queue */
+ for (i = 0; i < dev->queue_count; i++) {
+ atomic_inc(&dev->queuelist[i]->use_count);
+ if (atomic_read(&dev->queuelist[i]->use_count) == 1
+ && !atomic_read(&dev->queuelist[i]->finalization)) {
+ DRM_DEBUG("%d (free)\n", i);
+ return i;
+ }
+ atomic_dec(&dev->queuelist[i]->use_count);
+ }
+ /* Allocate a new queue */
+ down(&dev->struct_sem);
+
+ queue = gamma_alloc(sizeof(*queue), DRM_MEM_QUEUES);
+ memset(queue, 0, sizeof(*queue));
+ atomic_set(&queue->use_count, 1);
+
+ ++dev->queue_count;
+ if (dev->queue_count >= dev->queue_slots) {
+ oldslots = dev->queue_slots * sizeof(*dev->queuelist);
+ if (!dev->queue_slots) dev->queue_slots = 1;
+ dev->queue_slots *= 2;
+ newslots = dev->queue_slots * sizeof(*dev->queuelist);
+
+ dev->queuelist = DRM(realloc)(dev->queuelist,
+ oldslots,
+ newslots,
+ DRM_MEM_QUEUES);
+ if (!dev->queuelist) {
+ up(&dev->struct_sem);
+ DRM_DEBUG("out of memory\n");
+ return -ENOMEM;
+ }
+ }
+ dev->queuelist[dev->queue_count-1] = queue;
+
+ up(&dev->struct_sem);
+ DRM_DEBUG("%d (new)\n", dev->queue_count - 1);
+ return dev->queue_count - 1;
+}
+
+int DRM(resctx)(struct inode *inode, struct file *filp,
+ unsigned int cmd, unsigned long arg)
+{
+ drm_ctx_res_t res;
+ drm_ctx_t ctx;
+ int i;
+
+ DRM_DEBUG("%d\n", DRM_RESERVED_CONTEXTS);
+ if (copy_from_user(&res, (drm_ctx_res_t *)arg, sizeof(res)))
+ return -EFAULT;
+ if (res.count >= DRM_RESERVED_CONTEXTS) {
+ memset(&ctx, 0, sizeof(ctx));
+ for (i = 0; i < DRM_RESERVED_CONTEXTS; i++) {
+ ctx.handle = i;
+ if (copy_to_user(&res.contexts[i],
+ &i,
+ sizeof(i)))
+ return -EFAULT;
+ }
+ }
+ res.count = DRM_RESERVED_CONTEXTS;
+ if (copy_to_user((drm_ctx_res_t *)arg, &res, sizeof(res)))
+ return -EFAULT;
+ return 0;
+}
+
+int DRM(addctx)(struct inode *inode, struct file *filp,
+ unsigned int cmd, unsigned long arg)
+{
+ drm_file_t *priv = filp->private_data;
+ drm_device_t *dev = priv->dev;
+ drm_ctx_t ctx;
+
+ if (copy_from_user(&ctx, (drm_ctx_t *)arg, sizeof(ctx)))
+ return -EFAULT;
+ if ((ctx.handle = DRM(alloc_queue)(dev)) == DRM_KERNEL_CONTEXT) {
+ /* Init kernel's context and get a new one. */
+ DRM(init_queue)(dev, dev->queuelist[ctx.handle], &ctx);
+ ctx.handle = DRM(alloc_queue)(dev);
+ }
+ DRM(init_queue)(dev, dev->queuelist[ctx.handle], &ctx);
+ DRM_DEBUG("%d\n", ctx.handle);
+ if (copy_to_user((drm_ctx_t *)arg, &ctx, sizeof(ctx)))
+ return -EFAULT;
+ return 0;
+}
+
+int DRM(modctx)(struct inode *inode, struct file *filp,
+ unsigned int cmd, unsigned long arg)
+{
+ drm_file_t *priv = filp->private_data;
+ drm_device_t *dev = priv->dev;
+ drm_ctx_t ctx;
+ drm_queue_t *q;
+
+ if (copy_from_user(&ctx, (drm_ctx_t *)arg, sizeof(ctx)))
+ return -EFAULT;
+
+ DRM_DEBUG("%d\n", ctx.handle);
+
+ if (ctx.handle < 0 || ctx.handle >= dev->queue_count) return -EINVAL;
+ q = dev->queuelist[ctx.handle];
+
+ atomic_inc(&q->use_count);
+ if (atomic_read(&q->use_count) == 1) {
+ /* No longer in use */
+ atomic_dec(&q->use_count);
+ return -EINVAL;
+ }
+
+ if (DRM_BUFCOUNT(&q->waitlist)) {
+ atomic_dec(&q->use_count);
+ return -EBUSY;
+ }
+
+ q->flags = ctx.flags;
+
+ atomic_dec(&q->use_count);
+ return 0;
+}
+
+int DRM(getctx)(struct inode *inode, struct file *filp,
+ unsigned int cmd, unsigned long arg)
+{
+ drm_file_t *priv = filp->private_data;
+ drm_device_t *dev = priv->dev;
+ drm_ctx_t ctx;
+ drm_queue_t *q;
+
+ if (copy_from_user(&ctx, (drm_ctx_t *)arg, sizeof(ctx)))
+ return -EFAULT;
+
+ DRM_DEBUG("%d\n", ctx.handle);
+
+ if (ctx.handle >= dev->queue_count) return -EINVAL;
+ q = dev->queuelist[ctx.handle];
+
+ atomic_inc(&q->use_count);
+ if (atomic_read(&q->use_count) == 1) {
+ /* No longer in use */
+ atomic_dec(&q->use_count);
+ return -EINVAL;
+ }
+
+ ctx.flags = q->flags;
+ atomic_dec(&q->use_count);
+
+ if (copy_to_user((drm_ctx_t *)arg, &ctx, sizeof(ctx)))
+ return -EFAULT;
+
+ return 0;
+}
+
+int DRM(switchctx)(struct inode *inode, struct file *filp,
+ unsigned int cmd, unsigned long arg)
+{
+ drm_file_t *priv = filp->private_data;
+ drm_device_t *dev = priv->dev;
+ drm_ctx_t ctx;
+
+ if (copy_from_user(&ctx, (drm_ctx_t *)arg, sizeof(ctx)))
+ return -EFAULT;
+ DRM_DEBUG("%d\n", ctx.handle);
+ return DRM(context_switch)(dev, dev->last_context, ctx.handle);
+}
+
+int DRM(newctx)(struct inode *inode, struct file *filp,
+ unsigned int cmd, unsigned long arg)
+{
+ drm_file_t *priv = filp->private_data;
+ drm_device_t *dev = priv->dev;
+ drm_ctx_t ctx;
+
+ if (copy_from_user(&ctx, (drm_ctx_t *)arg, sizeof(ctx)))
+ return -EFAULT;
+ DRM_DEBUG("%d\n", ctx.handle);
+ DRM(context_switch_complete)(dev, ctx.handle);
+
+ return 0;
+}
+
+int DRM(rmctx)(struct inode *inode, struct file *filp,
+ unsigned int cmd, unsigned long arg)
+{
+ drm_file_t *priv = filp->private_data;
+ drm_device_t *dev = priv->dev;
+ drm_ctx_t ctx;
+ drm_queue_t *q;
+ drm_buf_t *buf;
+
+ if (copy_from_user(&ctx, (drm_ctx_t *)arg, sizeof(ctx)))
+ return -EFAULT;
+ DRM_DEBUG("%d\n", ctx.handle);
+
+ if (ctx.handle >= dev->queue_count) return -EINVAL;
+ q = dev->queuelist[ctx.handle];
+
+ atomic_inc(&q->use_count);
+ if (atomic_read(&q->use_count) == 1) {
+ /* No longer in use */
+ atomic_dec(&q->use_count);
+ return -EINVAL;
+ }
+
+ atomic_inc(&q->finalization); /* Mark queue in finalization state */
+ atomic_sub(2, &q->use_count); /* Mark queue as unused (pending
+ finalization) */
+
+ while (test_and_set_bit(0, &dev->interrupt_flag)) {
+ schedule();
+ if (signal_pending(current)) {
+ clear_bit(0, &dev->interrupt_flag);
+ return -EINTR;
+ }
+ }
+ /* Remove queued buffers */
+ while ((buf = DRM(waitlist_get)(&q->waitlist))) {
+ DRM(free_buffer)(dev, buf);
+ }
+ clear_bit(0, &dev->interrupt_flag);
+
+ /* Wakeup blocked processes */
+ wake_up_interruptible(&q->read_queue);
+ wake_up_interruptible(&q->write_queue);
+ wake_up_interruptible(&q->flush_queue);
+
+ /* Finalization over. Queue is made
+ available when both use_count and
+ finalization become 0, which won't
+ happen until all the waiting processes
+ stop waiting. */
+ atomic_dec(&q->finalization);
+ return 0;
+}
+
+#endif /* __HAVE_CTX_BITMAP */
diff --git a/linux/drm_dma.h b/linux/drm_dma.h
new file mode 100644
index 00000000..e715bd41
--- /dev/null
+++ b/linux/drm_dma.h
@@ -0,0 +1,594 @@
+/* drm_dma.c -- DMA IOCTL and function support -*- linux-c -*-
+ * Created: Fri Mar 19 14:30:16 1999 by faith@valinux.com
+ *
+ * Copyright 1999, 2000 Precision Insight, Inc., Cedar Park, Texas.
+ * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Authors:
+ * Rickard E. (Rik) Faith <faith@valinux.com>
+ * Gareth Hughes <gareth@valinux.com>
+ */
+
+#define __NO_VERSION__
+#include "drmP.h"
+
+#include <linux/interrupt.h> /* For task queue support */
+
+#ifndef __HAVE_DMA_WAITQUEUE
+#define __HAVE_DMA_WAITQUEUE 0
+#endif
+#ifndef __HAVE_DMA_RECLAIM
+#define __HAVE_DMA_RECLAIM 0
+#endif
+
+#if __HAVE_DMA
+
+int DRM(dma_setup)( drm_device_t *dev )
+{
+ int i;
+
+ dev->dma = DRM(alloc)( sizeof(*dev->dma), DRM_MEM_DRIVER );
+ if ( !dev->dma )
+ return -ENOMEM;
+
+ memset( dev->dma, 0, sizeof(*dev->dma) );
+
+ for ( i = 0 ; i <= DRM_MAX_ORDER ; i++ )
+ memset(&dev->dma->bufs[i], 0, sizeof(dev->dma->bufs[0]));
+
+ return 0;
+}
+
+void DRM(dma_takedown)(drm_device_t *dev)
+{
+ drm_device_dma_t *dma = dev->dma;
+ int i, j;
+
+ if (!dma) return;
+
+ /* Clear dma buffers */
+ for (i = 0; i <= DRM_MAX_ORDER; i++) {
+ if (dma->bufs[i].seg_count) {
+ DRM_DEBUG("order %d: buf_count = %d,"
+ " seg_count = %d\n",
+ i,
+ dma->bufs[i].buf_count,
+ dma->bufs[i].seg_count);
+ for (j = 0; j < dma->bufs[i].seg_count; j++) {
+ DRM(free_pages)(dma->bufs[i].seglist[j],
+ dma->bufs[i].page_order,
+ DRM_MEM_DMA);
+ }
+ DRM(free)(dma->bufs[i].seglist,
+ dma->bufs[i].seg_count
+ * sizeof(*dma->bufs[0].seglist),
+ DRM_MEM_SEGS);
+ }
+ if(dma->bufs[i].buf_count) {
+ for(j = 0; j < dma->bufs[i].buf_count; j++) {
+ if(dma->bufs[i].buflist[j].dev_private) {
+ DRM(free)(dma->bufs[i].buflist[j].dev_private,
+ dma->bufs[i].buflist[j].dev_priv_size,
+ DRM_MEM_BUFS);
+ }
+ }
+ DRM(free)(dma->bufs[i].buflist,
+ dma->bufs[i].buf_count *
+ sizeof(*dma->bufs[0].buflist),
+ DRM_MEM_BUFS);
+#if __HAVE_DMA_FREELIST
+ DRM(freelist_destroy)(&dma->bufs[i].freelist);
+#endif
+ }
+ }
+
+ if (dma->buflist) {
+ DRM(free)(dma->buflist,
+ dma->buf_count * sizeof(*dma->buflist),
+ DRM_MEM_BUFS);
+ }
+
+ if (dma->pagelist) {
+ DRM(free)(dma->pagelist,
+ dma->page_count * sizeof(*dma->pagelist),
+ DRM_MEM_PAGES);
+ }
+ DRM(free)(dev->dma, sizeof(*dev->dma), DRM_MEM_DRIVER);
+ dev->dma = NULL;
+}
+
+
+#if __HAVE_DMA_HISTOGRAM
+/* This is slow, but is useful for debugging. */
+int DRM(histogram_slot)(unsigned long count)
+{
+ int value = DRM_DMA_HISTOGRAM_INITIAL;
+ int slot;
+
+ for (slot = 0;
+ slot < DRM_DMA_HISTOGRAM_SLOTS;
+ ++slot, value = DRM_DMA_HISTOGRAM_NEXT(value)) {
+ if (count < value) return slot;
+ }
+ return DRM_DMA_HISTOGRAM_SLOTS - 1;
+}
+
+void DRM(histogram_compute)(drm_device_t *dev, drm_buf_t *buf)
+{
+ cycles_t queued_to_dispatched;
+ cycles_t dispatched_to_completed;
+ cycles_t completed_to_freed;
+ int q2d, d2c, c2f, q2c, q2f;
+
+ if (buf->time_queued) {
+ queued_to_dispatched = (buf->time_dispatched
+ - buf->time_queued);
+ dispatched_to_completed = (buf->time_completed
+ - buf->time_dispatched);
+ completed_to_freed = (buf->time_freed
+ - buf->time_completed);
+
+ q2d = DRM(histogram_slot)(queued_to_dispatched);
+ d2c = DRM(histogram_slot)(dispatched_to_completed);
+ c2f = DRM(histogram_slot)(completed_to_freed);
+
+ q2c = DRM(histogram_slot)(queued_to_dispatched
+ + dispatched_to_completed);
+ q2f = DRM(histogram_slot)(queued_to_dispatched
+ + dispatched_to_completed
+ + completed_to_freed);
+
+ atomic_inc(&dev->histo.total);
+ atomic_inc(&dev->histo.queued_to_dispatched[q2d]);
+ atomic_inc(&dev->histo.dispatched_to_completed[d2c]);
+ atomic_inc(&dev->histo.completed_to_freed[c2f]);
+
+ atomic_inc(&dev->histo.queued_to_completed[q2c]);
+ atomic_inc(&dev->histo.queued_to_freed[q2f]);
+
+ }
+ buf->time_queued = 0;
+ buf->time_dispatched = 0;
+ buf->time_completed = 0;
+ buf->time_freed = 0;
+}
+#endif
+
+void DRM(free_buffer)(drm_device_t *dev, drm_buf_t *buf)
+{
+ if (!buf) return;
+
+ buf->waiting = 0;
+ buf->pending = 0;
+ buf->pid = 0;
+ buf->used = 0;
+#if __HAVE_DMA_HISTOGRAM
+ buf->time_completed = get_cycles();
+#endif
+
+ if ( __HAVE_DMA_WAITQUEUE && waitqueue_active(&buf->dma_wait)) {
+ wake_up_interruptible(&buf->dma_wait);
+ }
+#if __HAVE_DMA_FREELIST
+ else {
+ drm_device_dma_t *dma = dev->dma;
+ /* If processes are waiting, the last one
+ to wake will put the buffer on the free
+ list. If no processes are waiting, we
+ put the buffer on the freelist here. */
+ DRM(freelist_put)(dev, &dma->bufs[buf->order].freelist, buf);
+ }
+#endif
+}
+
+#if !__HAVE_DMA_RECLAIM
+void DRM(reclaim_buffers)(drm_device_t *dev, pid_t pid)
+{
+ drm_device_dma_t *dma = dev->dma;
+ int i;
+
+ if (!dma) return;
+ for (i = 0; i < dma->buf_count; i++) {
+ if (dma->buflist[i]->pid == pid) {
+ switch (dma->buflist[i]->list) {
+ case DRM_LIST_NONE:
+ DRM(free_buffer)(dev, dma->buflist[i]);
+ break;
+ case DRM_LIST_WAIT:
+ dma->buflist[i]->list = DRM_LIST_RECLAIM;
+ break;
+ default:
+ /* Buffer already on hardware. */
+ break;
+ }
+ }
+ }
+}
+#endif
+
+
+/* GH: This is a big hack for now...
+ */
+#if __HAVE_OLD_DMA
+
+void DRM(clear_next_buffer)(drm_device_t *dev)
+{
+ drm_device_dma_t *dma = dev->dma;
+
+ dma->next_buffer = NULL;
+ if (dma->next_queue && !DRM_BUFCOUNT(&dma->next_queue->waitlist)) {
+ wake_up_interruptible(&dma->next_queue->flush_queue);
+ }
+ dma->next_queue = NULL;
+}
+
+int DRM(select_queue)(drm_device_t *dev, void (*wrapper)(unsigned long))
+{
+ int i;
+ int candidate = -1;
+ int j = jiffies;
+
+ if (!dev) {
+ DRM_ERROR("No device\n");
+ return -1;
+ }
+ if (!dev->queuelist || !dev->queuelist[DRM_KERNEL_CONTEXT]) {
+ /* This only happens between the time the
+ interrupt is initialized and the time
+ the queues are initialized. */
+ return -1;
+ }
+
+ /* Doing "while locked" DMA? */
+ if (DRM_WAITCOUNT(dev, DRM_KERNEL_CONTEXT)) {
+ return DRM_KERNEL_CONTEXT;
+ }
+
+ /* If there are buffers on the last_context
+ queue, and we have not been executing
+ this context very long, continue to
+ execute this context. */
+ if (dev->last_switch <= j
+ && dev->last_switch + DRM_TIME_SLICE > j
+ && DRM_WAITCOUNT(dev, dev->last_context)) {
+ return dev->last_context;
+ }
+
+ /* Otherwise, find a candidate */
+ for (i = dev->last_checked + 1; i < dev->queue_count; i++) {
+ if (DRM_WAITCOUNT(dev, i)) {
+ candidate = dev->last_checked = i;
+ break;
+ }
+ }
+
+ if (candidate < 0) {
+ for (i = 0; i < dev->queue_count; i++) {
+ if (DRM_WAITCOUNT(dev, i)) {
+ candidate = dev->last_checked = i;
+ break;
+ }
+ }
+ }
+
+ if (wrapper
+ && candidate >= 0
+ && candidate != dev->last_context
+ && dev->last_switch <= j
+ && dev->last_switch + DRM_TIME_SLICE > j) {
+ if (dev->timer.expires != dev->last_switch + DRM_TIME_SLICE) {
+ del_timer(&dev->timer);
+ dev->timer.function = wrapper;
+ dev->timer.data = (unsigned long)dev;
+ dev->timer.expires = dev->last_switch+DRM_TIME_SLICE;
+ add_timer(&dev->timer);
+ }
+ return -1;
+ }
+
+ return candidate;
+}
+
+
+int DRM(dma_enqueue)(drm_device_t *dev, drm_dma_t *d)
+{
+ int i;
+ drm_queue_t *q;
+ drm_buf_t *buf;
+ int idx;
+ int while_locked = 0;
+ drm_device_dma_t *dma = dev->dma;
+ DECLARE_WAITQUEUE(entry, current);
+
+ DRM_DEBUG("%d\n", d->send_count);
+
+ if (d->flags & _DRM_DMA_WHILE_LOCKED) {
+ int context = dev->lock.hw_lock->lock;
+
+ if (!_DRM_LOCK_IS_HELD(context)) {
+ DRM_ERROR("No lock held during \"while locked\""
+ " request\n");
+ return -EINVAL;
+ }
+ if (d->context != _DRM_LOCKING_CONTEXT(context)
+ && _DRM_LOCKING_CONTEXT(context) != DRM_KERNEL_CONTEXT) {
+ DRM_ERROR("Lock held by %d while %d makes"
+ " \"while locked\" request\n",
+ _DRM_LOCKING_CONTEXT(context),
+ d->context);
+ return -EINVAL;
+ }
+ q = dev->queuelist[DRM_KERNEL_CONTEXT];
+ while_locked = 1;
+ } else {
+ q = dev->queuelist[d->context];
+ }
+
+
+ atomic_inc(&q->use_count);
+ if (atomic_read(&q->block_write)) {
+ add_wait_queue(&q->write_queue, &entry);
+ atomic_inc(&q->block_count);
+ for (;;) {
+ current->state = TASK_INTERRUPTIBLE;
+ if (!atomic_read(&q->block_write)) break;
+ schedule();
+ if (signal_pending(current)) {
+ atomic_dec(&q->use_count);
+ remove_wait_queue(&q->write_queue, &entry);
+ return -EINTR;
+ }
+ }
+ atomic_dec(&q->block_count);
+ current->state = TASK_RUNNING;
+ remove_wait_queue(&q->write_queue, &entry);
+ }
+
+ for (i = 0; i < d->send_count; i++) {
+ idx = d->send_indices[i];
+ if (idx < 0 || idx >= dma->buf_count) {
+ atomic_dec(&q->use_count);
+ DRM_ERROR("Index %d (of %d max)\n",
+ d->send_indices[i], dma->buf_count - 1);
+ return -EINVAL;
+ }
+ buf = dma->buflist[ idx ];
+ if (buf->pid != current->pid) {
+ atomic_dec(&q->use_count);
+ DRM_ERROR("Process %d using buffer owned by %d\n",
+ current->pid, buf->pid);
+ return -EINVAL;
+ }
+ if (buf->list != DRM_LIST_NONE) {
+ atomic_dec(&q->use_count);
+ DRM_ERROR("Process %d using buffer %d on list %d\n",
+ current->pid, buf->idx, buf->list);
+ }
+ buf->used = d->send_sizes[i];
+ buf->while_locked = while_locked;
+ buf->context = d->context;
+ if (!buf->used) {
+ DRM_ERROR("Queueing 0 length buffer\n");
+ }
+ if (buf->pending) {
+ atomic_dec(&q->use_count);
+ DRM_ERROR("Queueing pending buffer:"
+ " buffer %d, offset %d\n",
+ d->send_indices[i], i);
+ return -EINVAL;
+ }
+ if (buf->waiting) {
+ atomic_dec(&q->use_count);
+ DRM_ERROR("Queueing waiting buffer:"
+ " buffer %d, offset %d\n",
+ d->send_indices[i], i);
+ return -EINVAL;
+ }
+ buf->waiting = 1;
+ if (atomic_read(&q->use_count) == 1
+ || atomic_read(&q->finalization)) {
+ DRM(free_buffer)(dev, buf);
+ } else {
+ DRM(waitlist_put)(&q->waitlist, buf);
+ atomic_inc(&q->total_queued);
+ }
+ }
+ atomic_dec(&q->use_count);
+
+ return 0;
+}
+
+static int DRM(dma_get_buffers_of_order)(drm_device_t *dev, drm_dma_t *d,
+ int order)
+{
+ int i;
+ drm_buf_t *buf;
+ drm_device_dma_t *dma = dev->dma;
+
+ for (i = d->granted_count; i < d->request_count; i++) {
+ buf = DRM(freelist_get)(&dma->bufs[order].freelist,
+ d->flags & _DRM_DMA_WAIT);
+ if (!buf) break;
+ if (buf->pending || buf->waiting) {
+ DRM_ERROR("Free buffer %d in use by %d (w%d, p%d)\n",
+ buf->idx,
+ buf->pid,
+ buf->waiting,
+ buf->pending);
+ }
+ buf->pid = current->pid;
+ if (copy_to_user(&d->request_indices[i],
+ &buf->idx,
+ sizeof(buf->idx)))
+ return -EFAULT;
+
+ if (copy_to_user(&d->request_sizes[i],
+ &buf->total,
+ sizeof(buf->total)))
+ return -EFAULT;
+
+ ++d->granted_count;
+ }
+ return 0;
+}
+
+
+int DRM(dma_get_buffers)(drm_device_t *dev, drm_dma_t *dma)
+{
+ int order;
+ int retcode = 0;
+ int tmp_order;
+
+ order = DRM(order)(dma->request_size);
+
+ dma->granted_count = 0;
+ retcode = DRM(dma_get_buffers_of_order)(dev, dma, order);
+
+ if (dma->granted_count < dma->request_count
+ && (dma->flags & _DRM_DMA_SMALLER_OK)) {
+ for (tmp_order = order - 1;
+ !retcode
+ && dma->granted_count < dma->request_count
+ && tmp_order >= DRM_MIN_ORDER;
+ --tmp_order) {
+
+ retcode = DRM(dma_get_buffers_of_order)(dev, dma,
+ tmp_order);
+ }
+ }
+
+ if (dma->granted_count < dma->request_count
+ && (dma->flags & _DRM_DMA_LARGER_OK)) {
+ for (tmp_order = order + 1;
+ !retcode
+ && dma->granted_count < dma->request_count
+ && tmp_order <= DRM_MAX_ORDER;
+ ++tmp_order) {
+
+ retcode = DRM(dma_get_buffers_of_order)(dev, dma,
+ tmp_order);
+ }
+ }
+ return 0;
+}
+
+#endif /* __HAVE_OLD_DMA */
+
+
+#if __HAVE_DMA_IRQ
+
+int DRM(irq_install)( drm_device_t *dev, int irq )
+{
+ int ret;
+
+ if ( !irq )
+ return -EINVAL;
+
+ down( &dev->struct_sem );
+ if ( dev->irq ) {
+ up( &dev->struct_sem );
+ return -EBUSY;
+ }
+ dev->irq = irq;
+ up( &dev->struct_sem );
+
+ DRM_DEBUG( "%s: irq=%d\n", __FUNCTION__, irq );
+
+ dev->context_flag = 0;
+ dev->interrupt_flag = 0;
+ dev->dma_flag = 0;
+
+ dev->dma->next_buffer = NULL;
+ dev->dma->next_queue = NULL;
+ dev->dma->this_buffer = NULL;
+
+#if __HAVE_DMA_IRQ_BH
+ INIT_LIST_HEAD( &dev->tq.list );
+ dev->tq.sync = 0;
+ dev->tq.routine = DRM(dma_immediate_bh);
+ dev->tq.data = dev;
+#endif
+
+ /* Before installing handler */
+ DRIVER_PREINSTALL();
+
+ /* Install handler */
+ ret = request_irq( dev->irq, DRM(dma_service),
+ 0, dev->devname, dev );
+ if ( ret < 0 ) {
+ down( &dev->struct_sem );
+ dev->irq = 0;
+ up( &dev->struct_sem );
+ return ret;
+ }
+
+ /* After installing handler */
+ DRIVER_POSTINSTALL();
+
+ return 0;
+}
+
+int DRM(irq_uninstall)( drm_device_t *dev )
+{
+ int irq;
+
+ down( &dev->struct_sem );
+ irq = dev->irq;
+ dev->irq = 0;
+ up( &dev->struct_sem );
+
+ if ( !irq )
+ return -EINVAL;
+
+ DRM_DEBUG( "%s: irq=%d\n", __FUNCTION__, irq );
+
+ DRIVER_UNINSTALL();
+
+ free_irq( irq, dev );
+
+ return 0;
+}
+
+int DRM(control)( struct inode *inode, struct file *filp,
+ unsigned int cmd, unsigned long arg )
+{
+ drm_file_t *priv = filp->private_data;
+ drm_device_t *dev = priv->dev;
+ drm_control_t ctl;
+
+ if ( copy_from_user( &ctl, (drm_control_t *)arg, sizeof(ctl) ) )
+ return -EFAULT;
+
+ switch ( ctl.func ) {
+ case DRM_INST_HANDLER:
+ return DRM(irq_install)( dev, ctl.irq );
+ case DRM_UNINST_HANDLER:
+ return DRM(irq_uninstall)( dev );
+ default:
+ return -EINVAL;
+ }
+}
+
+#endif /* __HAVE_DMA_IRQ */
+
+#endif /* __HAVE_DMA */
diff --git a/linux/drm_drv.h b/linux/drm_drv.h
new file mode 100644
index 00000000..7447ca6d
--- /dev/null
+++ b/linux/drm_drv.h
@@ -0,0 +1,938 @@
+/* drm_drv.h -- Generic driver template -*- linux-c -*-
+ * Created: Thu Nov 23 03:10:50 2000 by gareth@valinux.com
+ *
+ * Copyright 1999, 2000 Precision Insight, Inc., Cedar Park, Texas.
+ * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Authors:
+ * Rickard E. (Rik) Faith <faith@valinux.com>
+ * Gareth Hughes <gareth@valinux.com>
+ */
+
+/*
+ * To use this template, you must at least define the following (samples
+ * given for the MGA driver):
+ *
+ * #define DRIVER_AUTHOR "VA Linux Systems, Inc."
+ *
+ * #define DRIVER_NAME "mga"
+ * #define DRIVER_DESC "Matrox G200/G400"
+ * #define DRIVER_DATE "20001127"
+ *
+ * #define DRIVER_MAJOR 2
+ * #define DRIVER_MINOR 0
+ * #define DRIVER_PATCHLEVEL 2
+ *
+ * #define DRIVER_IOCTL_COUNT DRM_ARRAY_SIZE( mga_ioctls )
+ *
+ * #define DRM(x) mga_##x
+ */
+
+#ifndef __MUST_HAVE_AGP
+#define __MUST_HAVE_AGP 0
+#endif
+#ifndef __HAVE_CTX_BITMAP
+#define __HAVE_CTX_BITMAP 0
+#endif
+#ifndef __HAVE_DMA_IRQ
+#define __HAVE_DMA_IRQ 0
+#endif
+#ifndef __HAVE_DMA_QUEUE
+#define __HAVE_DMA_QUEUE 0
+#endif
+#ifndef __HAVE_MULTIPLE_DMA_QUEUES
+#define __HAVE_MULTIPLE_DMA_QUEUES 0
+#endif
+#ifndef __HAVE_DMA_SCHEDULE
+#define __HAVE_DMA_SCHEDULE 0
+#endif
+#ifndef __HAVE_DMA_FLUSH
+#define __HAVE_DMA_FLUSH 0
+#endif
+#ifndef __HAVE_DMA_READY
+#define __HAVE_DMA_READY 0
+#endif
+#ifndef __HAVE_DMA_QUIESCENT
+#define __HAVE_DMA_QUIESCENT 0
+#endif
+#ifndef __HAVE_RELEASE
+#define __HAVE_RELEASE 0
+#endif
+#ifndef __HAVE_COUNTERS
+#define __HAVE_COUNTERS 0
+#endif
+
+#ifndef DRIVER_PREINIT
+#define DRIVER_PREINIT()
+#endif
+#ifndef DRIVER_POSTINIT
+#define DRIVER_POSTINIT()
+#endif
+#ifndef DRIVER_PRERELEASE
+#define DRIVER_PRERELEASE()
+#endif
+#ifndef DRIVER_PRETAKEDOWN
+#define DRIVER_PRETAKEDOWN()
+#endif
+#ifndef DRIVER_IOCTLS
+#define DRIVER_IOCTLS
+#endif
+
+
+static drm_device_t DRM(device);
+static int DRM(minor);
+
+static struct file_operations DRM(fops) = {
+#if LINUX_VERSION_CODE >= 0x020400
+ /* This started being used during 2.4.0-test */
+ owner: THIS_MODULE,
+#endif
+ open: DRM(open),
+ flush: DRM(flush),
+ release: DRM(release),
+ ioctl: DRM(ioctl),
+ mmap: DRM(mmap),
+ read: DRM(read),
+ fasync: DRM(fasync),
+ poll: DRM(poll),
+};
+
+
+static drm_ioctl_desc_t DRM(ioctls)[] = {
+ [DRM_IOCTL_NR(DRM_IOCTL_VERSION)] = { DRM(version), 0, 0 },
+ [DRM_IOCTL_NR(DRM_IOCTL_GET_UNIQUE)] = { DRM(getunique), 0, 0 },
+ [DRM_IOCTL_NR(DRM_IOCTL_GET_MAGIC)] = { DRM(getmagic), 0, 0 },
+ [DRM_IOCTL_NR(DRM_IOCTL_IRQ_BUSID)] = { DRM(irq_busid), 0, 1 },
+ [DRM_IOCTL_NR(DRM_IOCTL_GET_MAP)] = { DRM(getmap), 0, 0 },
+ [DRM_IOCTL_NR(DRM_IOCTL_GET_CLIENT)] = { DRM(getclient), 0, 0 },
+ [DRM_IOCTL_NR(DRM_IOCTL_GET_STATS)] = { DRM(getstats), 0, 0 },
+
+ [DRM_IOCTL_NR(DRM_IOCTL_SET_UNIQUE)] = { DRM(setunique), 1, 1 },
+ [DRM_IOCTL_NR(DRM_IOCTL_BLOCK)] = { DRM(block), 1, 1 },
+ [DRM_IOCTL_NR(DRM_IOCTL_UNBLOCK)] = { DRM(unblock), 1, 1 },
+ [DRM_IOCTL_NR(DRM_IOCTL_AUTH_MAGIC)] = { DRM(authmagic), 1, 1 },
+
+ [DRM_IOCTL_NR(DRM_IOCTL_ADD_MAP)] = { DRM(addmap), 1, 1 },
+ [DRM_IOCTL_NR(DRM_IOCTL_RM_MAP)] = { DRM(rmmap), 1, 0 },
+
+ [DRM_IOCTL_NR(DRM_IOCTL_SET_SAREA_CTX)] = { DRM(setsareactx), 1, 1 },
+ [DRM_IOCTL_NR(DRM_IOCTL_GET_SAREA_CTX)] = { DRM(getsareactx), 1, 0 },
+
+ [DRM_IOCTL_NR(DRM_IOCTL_ADD_CTX)] = { DRM(addctx), 1, 1 },
+ [DRM_IOCTL_NR(DRM_IOCTL_RM_CTX)] = { DRM(rmctx), 1, 1 },
+ [DRM_IOCTL_NR(DRM_IOCTL_MOD_CTX)] = { DRM(modctx), 1, 1 },
+ [DRM_IOCTL_NR(DRM_IOCTL_GET_CTX)] = { DRM(getctx), 1, 0 },
+ [DRM_IOCTL_NR(DRM_IOCTL_SWITCH_CTX)] = { DRM(switchctx), 1, 1 },
+ [DRM_IOCTL_NR(DRM_IOCTL_NEW_CTX)] = { DRM(newctx), 1, 1 },
+ [DRM_IOCTL_NR(DRM_IOCTL_RES_CTX)] = { DRM(resctx), 1, 0 },
+
+ [DRM_IOCTL_NR(DRM_IOCTL_ADD_DRAW)] = { DRM(adddraw), 1, 1 },
+ [DRM_IOCTL_NR(DRM_IOCTL_RM_DRAW)] = { DRM(rmdraw), 1, 1 },
+
+ [DRM_IOCTL_NR(DRM_IOCTL_LOCK)] = { DRM(lock), 1, 0 },
+ [DRM_IOCTL_NR(DRM_IOCTL_UNLOCK)] = { DRM(unlock), 1, 0 },
+ [DRM_IOCTL_NR(DRM_IOCTL_FINISH)] = { DRM(finish), 1, 0 },
+
+#if __HAVE_DMA
+ [DRM_IOCTL_NR(DRM_IOCTL_ADD_BUFS)] = { DRM(addbufs), 1, 1 },
+ [DRM_IOCTL_NR(DRM_IOCTL_MARK_BUFS)] = { DRM(markbufs), 1, 1 },
+ [DRM_IOCTL_NR(DRM_IOCTL_INFO_BUFS)] = { DRM(infobufs), 1, 0 },
+ [DRM_IOCTL_NR(DRM_IOCTL_MAP_BUFS)] = { DRM(mapbufs), 1, 0 },
+ [DRM_IOCTL_NR(DRM_IOCTL_FREE_BUFS)] = { DRM(freebufs), 1, 0 },
+
+ /* The DRM_IOCTL_DMA ioctl should be defined by the driver.
+ */
+#if __HAVE_DMA_IRQ
+ [DRM_IOCTL_NR(DRM_IOCTL_CONTROL)] = { DRM(control), 1, 1 },
+#endif
+#endif
+
+#if __REALLY_HAVE_AGP
+ [DRM_IOCTL_NR(DRM_IOCTL_AGP_ACQUIRE)] = { DRM(agp_acquire), 1, 1 },
+ [DRM_IOCTL_NR(DRM_IOCTL_AGP_RELEASE)] = { DRM(agp_release), 1, 1 },
+ [DRM_IOCTL_NR(DRM_IOCTL_AGP_ENABLE)] = { DRM(agp_enable), 1, 1 },
+ [DRM_IOCTL_NR(DRM_IOCTL_AGP_INFO)] = { DRM(agp_info), 1, 0 },
+ [DRM_IOCTL_NR(DRM_IOCTL_AGP_ALLOC)] = { DRM(agp_alloc), 1, 1 },
+ [DRM_IOCTL_NR(DRM_IOCTL_AGP_FREE)] = { DRM(agp_free), 1, 1 },
+ [DRM_IOCTL_NR(DRM_IOCTL_AGP_BIND)] = { DRM(agp_bind), 1, 1 },
+ [DRM_IOCTL_NR(DRM_IOCTL_AGP_UNBIND)] = { DRM(agp_unbind), 1, 1 },
+#endif
+
+ DRIVER_IOCTLS
+};
+
+#define DRIVER_IOCTL_COUNT DRM_ARRAY_SIZE( DRM(ioctls) )
+
+#ifdef MODULE
+static char *drm_opts = NULL;
+#endif
+
+MODULE_AUTHOR( DRIVER_AUTHOR );
+MODULE_DESCRIPTION( DRIVER_DESC );
+MODULE_PARM( drm_opts, "s" );
+
+#ifndef MODULE
+/* DRM(options) is called by the kernel to parse command-line options
+ * passed via the boot-loader (e.g., LILO). It calls the insmod option
+ * routine, drm_parse_drm.
+ */
+
+static int __init DRM(options)( char *str )
+{
+ DRM(parse_options)( str );
+ return 1;
+}
+
+__setup( DRIVER_NAME "=", DRM(options) );
+#endif
+
+static int DRM(setup)( drm_device_t *dev )
+{
+ int i;
+
+ atomic_set( &dev->ioctl_count, 0 );
+ atomic_set( &dev->vma_count, 0 );
+ dev->buf_use = 0;
+ atomic_set( &dev->buf_alloc, 0 );
+
+#if __HAVE_DMA
+ i = DRM(dma_setup)( dev );
+ if ( i < 0 )
+ return i;
+#endif
+
+ dev->counters = 6 + __HAVE_COUNTERS;
+ dev->types[0] = _DRM_STAT_LOCK;
+ dev->types[1] = _DRM_STAT_OPENS;
+ dev->types[2] = _DRM_STAT_CLOSES;
+ dev->types[3] = _DRM_STAT_IOCTLS;
+ dev->types[4] = _DRM_STAT_LOCKS;
+ dev->types[5] = _DRM_STAT_UNLOCKS;
+#ifdef __HAVE_COUNTER6
+ dev->types[6] = __HAVE_COUNTER6;
+#endif
+#ifdef __HAVE_COUNTER7
+ dev->types[7] = __HAVE_COUNTER7;
+#endif
+#ifdef __HAVE_COUNTER8
+ dev->types[8] = __HAVE_COUNTER8;
+#endif
+#ifdef __HAVE_COUNTER9
+ dev->types[9] = __HAVE_COUNTER9;
+#endif
+#ifdef __HAVE_COUNTER10
+ dev->types[10] = __HAVE_COUNTER10;
+#endif
+#ifdef __HAVE_COUNTER11
+ dev->types[11] = __HAVE_COUNTER11;
+#endif
+#ifdef __HAVE_COUNTER12
+ dev->types[12] = __HAVE_COUNTER12;
+#endif
+#ifdef __HAVE_COUNTER13
+ dev->types[13] = __HAVE_COUNTER13;
+#endif
+#ifdef __HAVE_COUNTER14
+ dev->types[14] = __HAVE_COUNTER14;
+#endif
+#ifdef __HAVE_COUNTER15
+ dev->types[14] = __HAVE_COUNTER14;
+#endif
+
+ for ( i = 0 ; i < DRM_ARRAY_SIZE(dev->counts) ; i++ )
+ atomic_set( &dev->counts[i], 0 );
+
+ for ( i = 0 ; i < DRM_HASH_SIZE ; i++ ) {
+ dev->magiclist[i].head = NULL;
+ dev->magiclist[i].tail = NULL;
+ }
+
+ dev->maplist = DRM(alloc)(sizeof(*dev->maplist),
+ DRM_MEM_MAPS);
+ if(dev->maplist == NULL) return -ENOMEM;
+ memset(dev->maplist, 0, sizeof(*dev->maplist));
+ INIT_LIST_HEAD(&dev->maplist->head);
+ dev->map_count = 0;
+
+ dev->vmalist = NULL;
+ dev->lock.hw_lock = NULL;
+ init_waitqueue_head( &dev->lock.lock_queue );
+ dev->queue_count = 0;
+ dev->queue_reserved = 0;
+ dev->queue_slots = 0;
+ dev->queuelist = NULL;
+ dev->irq = 0;
+ dev->context_flag = 0;
+ dev->interrupt_flag = 0;
+ dev->dma_flag = 0;
+ dev->last_context = 0;
+ dev->last_switch = 0;
+ dev->last_checked = 0;
+ init_timer( &dev->timer );
+ init_waitqueue_head( &dev->context_wait );
+
+ dev->ctx_start = 0;
+ dev->lck_start = 0;
+
+ dev->buf_rp = dev->buf;
+ dev->buf_wp = dev->buf;
+ dev->buf_end = dev->buf + DRM_BSZ;
+ dev->buf_async = NULL;
+ init_waitqueue_head( &dev->buf_readers );
+ init_waitqueue_head( &dev->buf_writers );
+
+ DRM_DEBUG( "\n" );
+
+ /* The kernel's context could be created here, but is now created
+ * in drm_dma_enqueue. This is more resource-efficient for
+ * hardware that does not do DMA, but may mean that
+ * drm_select_queue fails between the time the interrupt is
+ * initialized and the time the queues are initialized.
+ */
+ return 0;
+}
+
+
+static int DRM(takedown)( drm_device_t *dev )
+{
+ drm_magic_entry_t *pt, *next;
+ drm_map_t *map;
+ drm_map_list_t *r_list;
+ struct list_head *list;
+ drm_vma_entry_t *vma, *vma_next;
+ int i;
+
+ DRM_DEBUG( "\n" );
+
+ DRIVER_PRETAKEDOWN();
+#if __HAVE_DMA_IRQ
+ if ( dev->irq ) DRM(irq_uninstall)( dev );
+#endif
+
+ down( &dev->struct_sem );
+ del_timer( &dev->timer );
+
+ if ( dev->devname ) {
+ DRM(free)( dev->devname, strlen( dev->devname ) + 1,
+ DRM_MEM_DRIVER );
+ dev->devname = NULL;
+ }
+
+ if ( dev->unique ) {
+ DRM(free)( dev->unique, strlen( dev->unique ) + 1,
+ DRM_MEM_DRIVER );
+ dev->unique = NULL;
+ dev->unique_len = 0;
+ }
+ /* Clear pid list */
+ for ( i = 0 ; i < DRM_HASH_SIZE ; i++ ) {
+ for ( pt = dev->magiclist[i].head ; pt ; pt = next ) {
+ next = pt->next;
+ DRM(free)( pt, sizeof(*pt), DRM_MEM_MAGIC );
+ }
+ dev->magiclist[i].head = dev->magiclist[i].tail = NULL;
+ }
+
+#if __REALLY_HAVE_AGP
+ /* Clear AGP information */
+ if ( dev->agp ) {
+ drm_agp_mem_t *entry;
+ drm_agp_mem_t *nexte;
+
+ /* Remove AGP resources, but leave dev->agp
+ intact until drv_cleanup is called. */
+ for ( entry = dev->agp->memory ; entry ; entry = nexte ) {
+ nexte = entry->next;
+ if ( entry->bound ) DRM(unbind_agp)( entry->memory );
+ DRM(free_agp)( entry->memory, entry->pages );
+ DRM(free)( entry, sizeof(*entry), DRM_MEM_AGPLISTS );
+ }
+ dev->agp->memory = NULL;
+
+ if ( dev->agp->acquired ) DRM(agp_do_release)();
+
+ dev->agp->acquired = 0;
+ dev->agp->enabled = 0;
+ }
+#endif
+
+ /* Clear vma list (only built for debugging) */
+ if ( dev->vmalist ) {
+ for ( vma = dev->vmalist ; vma ; vma = vma_next ) {
+ vma_next = vma->next;
+ DRM(free)( vma, sizeof(*vma), DRM_MEM_VMAS );
+ }
+ dev->vmalist = NULL;
+ }
+
+ if( dev->maplist ) {
+ list_for_each(list, &dev->maplist->head) {
+ r_list = (drm_map_list_t *)list;
+ map = r_list->map;
+ DRM(free)(r_list, sizeof(*r_list), DRM_MEM_MAPS);
+ if(!map) continue;
+
+ switch ( map->type ) {
+ case _DRM_REGISTERS:
+ case _DRM_FRAME_BUFFER:
+#if __REALLY_HAVE_MTRR
+ if ( map->mtrr >= 0 ) {
+ int retcode;
+ retcode = mtrr_del( map->mtrr,
+ map->offset,
+ map->size );
+ DRM_DEBUG( "mtrr_del=%d\n", retcode );
+ }
+#endif
+ DRM(ioremapfree)( map->handle, map->size );
+ break;
+ case _DRM_SHM:
+ vfree(map->handle);
+ break;
+
+ case _DRM_AGP:
+ /* Do nothing here, because this is all
+ * handled in the AGP/GART driver.
+ */
+ break;
+ }
+ DRM(free)(map, sizeof(*map), DRM_MEM_MAPS);
+ }
+ DRM(free)(dev->maplist, sizeof(*dev->maplist), DRM_MEM_MAPS);
+ dev->maplist = NULL;
+ }
+
+#if __HAVE_DMA_QUEUE || __HAVE_MULTIPLE_DMA_QUEUES
+ if ( dev->queuelist ) {
+ for ( i = 0 ; i < dev->queue_count ; i++ ) {
+ DRM(waitlist_destroy)( &dev->queuelist[i]->waitlist );
+ if ( dev->queuelist[i] ) {
+ DRM(free)( dev->queuelist[i],
+ sizeof(*dev->queuelist[0]),
+ DRM_MEM_QUEUES );
+ dev->queuelist[i] = NULL;
+ }
+ }
+ DRM(free)( dev->queuelist,
+ dev->queue_slots * sizeof(*dev->queuelist),
+ DRM_MEM_QUEUES );
+ dev->queuelist = NULL;
+ }
+ dev->queue_count = 0;
+#endif
+
+#if __HAVE_DMA
+ DRM(dma_takedown)( dev );
+#endif
+ if ( dev->lock.hw_lock ) {
+ dev->lock.hw_lock = NULL; /* SHM removed */
+ dev->lock.pid = 0;
+ wake_up_interruptible( &dev->lock.lock_queue );
+ }
+ up( &dev->struct_sem );
+
+ return 0;
+}
+
+/* drm_init is called via init_module at module load time, or via
+ * linux/init/main.c (this is not currently supported).
+ */
+static int __init drm_init( void )
+{
+ drm_device_t *dev = &DRM(device);
+#if __HAVE_CTX_BITMAP
+ int retcode;
+#endif
+ DRM_DEBUG( "\n" );
+
+ memset( (void *)dev, 0, sizeof(*dev) );
+ dev->count_lock = SPIN_LOCK_UNLOCKED;
+ sema_init( &dev->struct_sem, 1 );
+
+#ifdef MODULE
+ DRM(parse_options)( drm_opts );
+#endif
+ DRIVER_PREINIT();
+
+ DRM(mem_init)();
+
+ if ((DRM(minor) = DRM(stub_register)(DRIVER_NAME, &DRM(fops),dev)) < 0)
+ return -EPERM;
+ dev->device = MKDEV(DRM_MAJOR, DRM(minor) );
+ dev->name = DRIVER_NAME;
+
+#if __REALLY_HAVE_AGP
+ dev->agp = DRM(agp_init)();
+#if __MUST_HAVE_AGP
+ if ( dev->agp == NULL ) {
+ DRM_ERROR( "Cannot initialize the agpgart module.\n" );
+ DRM(stub_unregister)(DRM(minor));
+ DRM(takedown)( dev );
+ return -ENOMEM;
+ }
+#endif
+#if __REALLY_HAVE_MTRR
+ if (dev->agp)
+ dev->agp->agp_mtrr = mtrr_add( dev->agp->agp_info.aper_base,
+ dev->agp->agp_info.aper_size*1024*1024,
+ MTRR_TYPE_WRCOMB,
+ 1 );
+#endif
+#endif
+
+#if __HAVE_CTX_BITMAP
+ retcode = DRM(ctxbitmap_init)( dev );
+ if( retcode ) {
+ DRM_ERROR( "Cannot allocate memory for context bitmap.\n" );
+ DRM(stub_unregister)(DRM(minor));
+ DRM(takedown)( dev );
+ return retcode;
+ }
+#endif
+
+ DRIVER_POSTINIT();
+
+ DRM_INFO( "Initialized %s %d.%d.%d %s on minor %d\n",
+ DRIVER_NAME,
+ DRIVER_MAJOR,
+ DRIVER_MINOR,
+ DRIVER_PATCHLEVEL,
+ DRIVER_DATE,
+ DRM(minor) );
+
+ return 0;
+}
+
+/* drm_cleanup is called via cleanup_module at module unload time.
+ */
+static void __exit drm_cleanup( void )
+{
+ drm_device_t *dev = &DRM(device);
+
+ DRM_DEBUG( "\n" );
+
+ if ( DRM(stub_unregister)(DRM(minor)) ) {
+ DRM_ERROR( "Cannot unload module\n" );
+ } else {
+ DRM_INFO( "Module unloaded\n" );
+ }
+#if __HAVE_CTX_BITMAP
+ DRM(ctxbitmap_cleanup)( dev );
+#endif
+
+#if __REALLY_HAVE_AGP && __REALLY_HAVE_MTRR
+ if ( dev->agp && dev->agp->agp_mtrr ) {
+ int retval;
+ retval = mtrr_del( dev->agp->agp_mtrr,
+ dev->agp->agp_info.aper_base,
+ dev->agp->agp_info.aper_size*1024*1024 );
+ DRM_DEBUG( "mtrr_del=%d\n", retval );
+ }
+#endif
+
+ DRM(takedown)( dev );
+
+#if __REALLY_HAVE_AGP
+ if ( dev->agp ) {
+ DRM(agp_uninit)();
+ DRM(free)( dev->agp, sizeof(*dev->agp), DRM_MEM_AGPLISTS );
+ dev->agp = NULL;
+ }
+#endif
+}
+
+module_init( drm_init );
+module_exit( drm_cleanup );
+
+
+int DRM(version)( struct inode *inode, struct file *filp,
+ unsigned int cmd, unsigned long arg )
+{
+ drm_version_t version;
+ int len;
+
+ if ( copy_from_user( &version,
+ (drm_version_t *)arg,
+ sizeof(version) ) )
+ return -EFAULT;
+
+#define DRM_COPY( name, value ) \
+ len = strlen( value ); \
+ if ( len > name##_len ) len = name##_len; \
+ name##_len = strlen( value ); \
+ if ( len && name ) { \
+ if ( copy_to_user( name, value, len ) ) \
+ return -EFAULT; \
+ }
+
+ version.version_major = DRIVER_MAJOR;
+ version.version_minor = DRIVER_MINOR;
+ version.version_patchlevel = DRIVER_PATCHLEVEL;
+
+ DRM_COPY( version.name, DRIVER_NAME );
+ DRM_COPY( version.date, DRIVER_DATE );
+ DRM_COPY( version.desc, DRIVER_DESC );
+
+ if ( copy_to_user( (drm_version_t *)arg,
+ &version,
+ sizeof(version) ) )
+ return -EFAULT;
+ return 0;
+}
+
+int DRM(open)( struct inode *inode, struct file *filp )
+{
+ drm_device_t *dev = &DRM(device);
+ int retcode = 0;
+
+ DRM_DEBUG( "open_count = %d\n", dev->open_count );
+
+ retcode = DRM(open_helper)( inode, filp, dev );
+ if ( !retcode ) {
+#if LINUX_VERSION_CODE < 0x020333
+ MOD_INC_USE_COUNT; /* Needed before Linux 2.3.51 */
+#endif
+ atomic_inc( &dev->counts[_DRM_STAT_OPENS] );
+ spin_lock( &dev->count_lock );
+ if ( !dev->open_count++ ) {
+ spin_unlock( &dev->count_lock );
+ return DRM(setup)( dev );
+ }
+ spin_unlock( &dev->count_lock );
+ }
+
+ return retcode;
+}
+
+int DRM(release)( struct inode *inode, struct file *filp )
+{
+ drm_file_t *priv = filp->private_data;
+ drm_device_t *dev;
+ int retcode = 0;
+
+ lock_kernel();
+ dev = priv->dev;
+
+ DRM_DEBUG( "open_count = %d\n", dev->open_count );
+
+ DRIVER_PRERELEASE();
+
+ /* ========================================================
+ * Begin inline drm_release
+ */
+
+ DRM_DEBUG( "pid = %d, device = 0x%x, open_count = %d\n",
+ current->pid, dev->device, dev->open_count );
+
+ if ( dev->lock.hw_lock &&
+ _DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock) &&
+ dev->lock.pid == current->pid ) {
+ DRM_DEBUG( "Process %d dead, freeing lock for context %d\n",
+ current->pid,
+ _DRM_LOCKING_CONTEXT(dev->lock.hw_lock->lock) );
+#if __HAVE_RELEASE
+ DRIVER_RELEASE();
+#endif
+ DRM(lock_free)( dev, &dev->lock.hw_lock->lock,
+ _DRM_LOCKING_CONTEXT(dev->lock.hw_lock->lock) );
+
+ /* FIXME: may require heavy-handed reset of
+ hardware at this point, possibly
+ processed via a callback to the X
+ server. */
+ }
+#if __HAVE_RELEASE
+ else if ( dev->lock.hw_lock ) {
+ /* The lock is required to reclaim buffers */
+ DECLARE_WAITQUEUE( entry, current );
+ add_wait_queue( &dev->lock.lock_queue, &entry );
+ for (;;) {
+ current->state = TASK_INTERRUPTIBLE;
+ if ( !dev->lock.hw_lock ) {
+ /* Device has been unregistered */
+ retcode = -EINTR;
+ break;
+ }
+ if ( DRM(lock_take)( &dev->lock.hw_lock->lock,
+ DRM_KERNEL_CONTEXT ) ) {
+ dev->lock.pid = priv->pid;
+ dev->lock.lock_time = jiffies;
+ atomic_inc( &dev->counts[_DRM_STAT_LOCKS] );
+ break; /* Got lock */
+ }
+ /* Contention */
+#if 0
+ atomic_inc( &dev->total_sleeps );
+#endif
+ schedule();
+ if ( signal_pending( current ) ) {
+ retcode = -ERESTARTSYS;
+ break;
+ }
+ }
+ current->state = TASK_RUNNING;
+ remove_wait_queue( &dev->lock.lock_queue, &entry );
+ if( !retcode ) {
+ DRIVER_RELEASE();
+ DRM(lock_free)( dev, &dev->lock.hw_lock->lock,
+ DRM_KERNEL_CONTEXT );
+ }
+ }
+#elif __HAVE_DMA
+ DRM(reclaim_buffers)( dev, priv->pid );
+#endif
+
+ DRM(fasync)( -1, filp, 0 );
+
+ down( &dev->struct_sem );
+ if ( priv->remove_auth_on_close == 1 ) {
+ drm_file_t *temp = dev->file_first;
+ while ( temp ) {
+ temp->authenticated = 0;
+ temp = temp->next;
+ }
+ }
+ if ( priv->prev ) {
+ priv->prev->next = priv->next;
+ } else {
+ dev->file_first = priv->next;
+ }
+ if ( priv->next ) {
+ priv->next->prev = priv->prev;
+ } else {
+ dev->file_last = priv->prev;
+ }
+ up( &dev->struct_sem );
+
+ DRM(free)( priv, sizeof(*priv), DRM_MEM_FILES );
+
+ /* ========================================================
+ * End inline drm_release
+ */
+
+#if LINUX_VERSION_CODE < 0x020333
+ MOD_DEC_USE_COUNT; /* Needed before Linux 2.3.51 */
+#endif
+ atomic_inc( &dev->counts[_DRM_STAT_CLOSES] );
+ spin_lock( &dev->count_lock );
+ if ( !--dev->open_count ) {
+ if ( atomic_read( &dev->ioctl_count ) || dev->blocked ) {
+ DRM_ERROR( "Device busy: %d %d\n",
+ atomic_read( &dev->ioctl_count ),
+ dev->blocked );
+ spin_unlock( &dev->count_lock );
+ unlock_kernel();
+ return -EBUSY;
+ }
+ spin_unlock( &dev->count_lock );
+ unlock_kernel();
+ return DRM(takedown)( dev );
+ }
+ spin_unlock( &dev->count_lock );
+
+ unlock_kernel();
+ return retcode;
+}
+
+/* DRM(ioctl) is called whenever a process performs an ioctl on /dev/drm.
+ */
+int DRM(ioctl)( struct inode *inode, struct file *filp,
+ unsigned int cmd, unsigned long arg )
+{
+ drm_file_t *priv = filp->private_data;
+ drm_device_t *dev = priv->dev;
+ drm_ioctl_desc_t *ioctl;
+ drm_ioctl_t *func;
+ int nr = DRM_IOCTL_NR(cmd);
+ int retcode = 0;
+
+ atomic_inc( &dev->ioctl_count );
+ atomic_inc( &dev->counts[_DRM_STAT_IOCTLS] );
+ ++priv->ioctl_count;
+
+ DRM_DEBUG( "pid=%d, cmd=0x%02x, nr=0x%02x, dev 0x%x, auth=%d\n",
+ current->pid, cmd, nr, dev->device, priv->authenticated );
+
+ if ( nr >= DRIVER_IOCTL_COUNT ) {
+ retcode = -EINVAL;
+ } else {
+ ioctl = &DRM(ioctls)[nr];
+ func = ioctl->func;
+
+ if ( !func ) {
+ DRM_DEBUG( "no function\n" );
+ retcode = -EINVAL;
+ } else if ( ( ioctl->root_only && !capable( CAP_SYS_ADMIN ) )||
+ ( ioctl->auth_needed && !priv->authenticated ) ) {
+ retcode = -EACCES;
+ } else {
+ retcode = func( inode, filp, cmd, arg );
+ }
+ }
+
+ atomic_dec( &dev->ioctl_count );
+ return retcode;
+}
+
+int DRM(lock)( struct inode *inode, struct file *filp,
+ unsigned int cmd, unsigned long arg )
+{
+ drm_file_t *priv = filp->private_data;
+ drm_device_t *dev = priv->dev;
+ DECLARE_WAITQUEUE( entry, current );
+ drm_lock_t lock;
+ int ret = 0;
+#if __HAVE_MULTIPLE_DMA_QUEUES
+ drm_queue_t *q;
+#endif
+#if __HAVE_DMA_HISTOGRAM
+ cycles_t start;
+
+ dev->lck_start = start = get_cycles();
+#endif
+
+ if ( copy_from_user( &lock, (drm_lock_t *)arg, sizeof(lock) ) )
+ return -EFAULT;
+
+ if ( lock.context == DRM_KERNEL_CONTEXT ) {
+ DRM_ERROR( "Process %d using kernel context %d\n",
+ current->pid, lock.context );
+ return -EINVAL;
+ }
+
+ DRM_DEBUG( "%d (pid %d) requests lock (0x%08x), flags = 0x%08x\n",
+ lock.context, current->pid,
+ dev->lock.hw_lock->lock, lock.flags );
+
+#if __HAVE_DMA_QUEUE
+ if ( lock.context < 0 )
+ return -EINVAL;
+#elif __HAVE_MULTIPLE_DMA_QUEUES
+ if ( lock.context < 0 || lock.context >= dev->queue_count )
+ return -EINVAL;
+ q = dev->queuelist[lock.context];
+#endif
+
+#if __HAVE_DMA_FLUSH
+ ret = DRM(flush_block_and_flush)( dev, lock.context, lock.flags );
+#endif
+ if ( !ret ) {
+ add_wait_queue( &dev->lock.lock_queue, &entry );
+ for (;;) {
+ current->state = TASK_INTERRUPTIBLE;
+ if ( !dev->lock.hw_lock ) {
+ /* Device has been unregistered */
+ ret = -EINTR;
+ break;
+ }
+ if ( DRM(lock_take)( &dev->lock.hw_lock->lock,
+ lock.context ) ) {
+ dev->lock.pid = current->pid;
+ dev->lock.lock_time = jiffies;
+ atomic_inc( &dev->counts[_DRM_STAT_LOCKS] );
+ break; /* Got lock */
+ }
+
+ /* Contention */
+ schedule();
+ if ( signal_pending( current ) ) {
+ ret = -ERESTARTSYS;
+ break;
+ }
+ }
+ current->state = TASK_RUNNING;
+ remove_wait_queue( &dev->lock.lock_queue, &entry );
+ }
+
+#if __HAVE_DMA_FLUSH
+ DRM(flush_unblock)( dev, lock.context, lock.flags ); /* cleanup phase */
+#endif
+
+ if ( !ret ) {
+ sigemptyset( &dev->sigmask );
+ sigaddset( &dev->sigmask, SIGSTOP );
+ sigaddset( &dev->sigmask, SIGTSTP );
+ sigaddset( &dev->sigmask, SIGTTIN );
+ sigaddset( &dev->sigmask, SIGTTOU );
+ dev->sigdata.context = lock.context;
+ dev->sigdata.lock = dev->lock.hw_lock;
+ block_all_signals( DRM(notifier),
+ &dev->sigdata, &dev->sigmask );
+
+#if __HAVE_DMA_READY
+ if ( lock.flags & _DRM_LOCK_READY ) {
+ DRIVER_DMA_READY();
+ }
+#endif
+#if __HAVE_DMA_QUIESCENT
+ if ( lock.flags & _DRM_LOCK_QUIESCENT ) {
+ DRIVER_DMA_QUIESCENT();
+ }
+#endif
+ }
+
+ DRM_DEBUG( "%d %s\n", lock.context, ret ? "interrupted" : "has lock" );
+
+#if __HAVE_DMA_HISTOGRAM
+ atomic_inc(&dev->histo.lacq[DRM(histogram_slot)(get_cycles()-start)]);
+#endif
+ return ret;
+}
+
+
+int DRM(unlock)( struct inode *inode, struct file *filp,
+ unsigned int cmd, unsigned long arg )
+{
+ drm_file_t *priv = filp->private_data;
+ drm_device_t *dev = priv->dev;
+ drm_lock_t lock;
+
+ if ( copy_from_user( &lock, (drm_lock_t *)arg, sizeof(lock) ) )
+ return -EFAULT;
+
+ if ( lock.context == DRM_KERNEL_CONTEXT ) {
+ DRM_ERROR( "Process %d using kernel context %d\n",
+ current->pid, lock.context );
+ return -EINVAL;
+ }
+
+ atomic_inc( &dev->counts[_DRM_STAT_UNLOCKS] );
+
+ DRM(lock_transfer)( dev, &dev->lock.hw_lock->lock,
+ DRM_KERNEL_CONTEXT );
+#if __HAVE_DMA_SCHEDULE
+ DRM(dma_schedule)( dev, 1 );
+#endif
+
+ /* FIXME: Do we ever really need to check this???
+ */
+ if ( 1 /* !dev->context_flag */ ) {
+ if ( DRM(lock_free)( dev, &dev->lock.hw_lock->lock,
+ DRM_KERNEL_CONTEXT ) ) {
+ DRM_ERROR( "\n" );
+ }
+ }
+
+ unblock_all_signals();
+ return 0;
+}
diff --git a/linux/drm_lists.h b/linux/drm_lists.h
new file mode 100644
index 00000000..f8dbaaa7
--- /dev/null
+++ b/linux/drm_lists.h
@@ -0,0 +1,227 @@
+/* drm_lists.h -- Buffer list handling routines -*- linux-c -*-
+ * Created: Mon Apr 19 20:54:22 1999 by faith@valinux.com
+ *
+ * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
+ * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Authors:
+ * Rickard E. (Rik) Faith <faith@valinux.com>
+ * Gareth Hughes <gareth@valinux.com>
+ */
+
+#define __NO_VERSION__
+#include "drmP.h"
+
+#if __HAVE_DMA_WAITLIST
+
+int DRM(waitlist_create)(drm_waitlist_t *bl, int count)
+{
+ if (bl->count) return -EINVAL;
+
+ bl->count = count;
+ bl->bufs = DRM(alloc)((bl->count + 2) * sizeof(*bl->bufs),
+ DRM_MEM_BUFLISTS);
+ bl->rp = bl->bufs;
+ bl->wp = bl->bufs;
+ bl->end = &bl->bufs[bl->count+1];
+ bl->write_lock = SPIN_LOCK_UNLOCKED;
+ bl->read_lock = SPIN_LOCK_UNLOCKED;
+ return 0;
+}
+
+int DRM(waitlist_destroy)(drm_waitlist_t *bl)
+{
+ if (bl->rp != bl->wp) return -EINVAL;
+ if (bl->bufs) DRM(free)(bl->bufs,
+ (bl->count + 2) * sizeof(*bl->bufs),
+ DRM_MEM_BUFLISTS);
+ bl->count = 0;
+ bl->bufs = NULL;
+ bl->rp = NULL;
+ bl->wp = NULL;
+ bl->end = NULL;
+ return 0;
+}
+
+int DRM(waitlist_put)(drm_waitlist_t *bl, drm_buf_t *buf)
+{
+ int left;
+ unsigned long flags;
+
+ left = DRM_LEFTCOUNT(bl);
+ if (!left) {
+ DRM_ERROR("Overflow while adding buffer %d from pid %d\n",
+ buf->idx, buf->pid);
+ return -EINVAL;
+ }
+#if __HAVE_DMA_HISTOGRAM
+ buf->time_queued = get_cycles();
+#endif
+ buf->list = DRM_LIST_WAIT;
+
+ spin_lock_irqsave(&bl->write_lock, flags);
+ *bl->wp = buf;
+ if (++bl->wp >= bl->end) bl->wp = bl->bufs;
+ spin_unlock_irqrestore(&bl->write_lock, flags);
+
+ return 0;
+}
+
+drm_buf_t *DRM(waitlist_get)(drm_waitlist_t *bl)
+{
+ drm_buf_t *buf;
+ unsigned long flags;
+
+ spin_lock_irqsave(&bl->read_lock, flags);
+ buf = *bl->rp;
+ if (bl->rp == bl->wp) {
+ spin_unlock_irqrestore(&bl->read_lock, flags);
+ return NULL;
+ }
+ if (++bl->rp >= bl->end) bl->rp = bl->bufs;
+ spin_unlock_irqrestore(&bl->read_lock, flags);
+
+ return buf;
+}
+
+#endif /* __HAVE_DMA_WAITLIST */
+
+
+#if __HAVE_DMA_FREELIST
+
+int DRM(freelist_create)(drm_freelist_t *bl, int count)
+{
+ atomic_set(&bl->count, 0);
+ bl->next = NULL;
+ init_waitqueue_head(&bl->waiting);
+ bl->low_mark = 0;
+ bl->high_mark = 0;
+ atomic_set(&bl->wfh, 0);
+ bl->lock = SPIN_LOCK_UNLOCKED;
+ ++bl->initialized;
+ return 0;
+}
+
+int DRM(freelist_destroy)(drm_freelist_t *bl)
+{
+ atomic_set(&bl->count, 0);
+ bl->next = NULL;
+ return 0;
+}
+
+int DRM(freelist_put)(drm_device_t *dev, drm_freelist_t *bl, drm_buf_t *buf)
+{
+ drm_device_dma_t *dma = dev->dma;
+
+ if (!dma) {
+ DRM_ERROR("No DMA support\n");
+ return 1;
+ }
+
+ if (buf->waiting || buf->pending || buf->list == DRM_LIST_FREE) {
+ DRM_ERROR("Freed buffer %d: w%d, p%d, l%d\n",
+ buf->idx, buf->waiting, buf->pending, buf->list);
+ }
+ if (!bl) return 1;
+#if __HAVE_DMA_HISTOGRAM
+ buf->time_freed = get_cycles();
+ DRM(histogram_compute)(dev, buf);
+#endif
+ buf->list = DRM_LIST_FREE;
+
+ spin_lock(&bl->lock);
+ buf->next = bl->next;
+ bl->next = buf;
+ spin_unlock(&bl->lock);
+
+ atomic_inc(&bl->count);
+ if (atomic_read(&bl->count) > dma->buf_count) {
+ DRM_ERROR("%d of %d buffers free after addition of %d\n",
+ atomic_read(&bl->count), dma->buf_count, buf->idx);
+ return 1;
+ }
+ /* Check for high water mark */
+ if (atomic_read(&bl->wfh) && atomic_read(&bl->count)>=bl->high_mark) {
+ atomic_set(&bl->wfh, 0);
+ wake_up_interruptible(&bl->waiting);
+ }
+ return 0;
+}
+
+static drm_buf_t *DRM(freelist_try)(drm_freelist_t *bl)
+{
+ drm_buf_t *buf;
+
+ if (!bl) return NULL;
+
+ /* Get buffer */
+ spin_lock(&bl->lock);
+ if (!bl->next) {
+ spin_unlock(&bl->lock);
+ return NULL;
+ }
+ buf = bl->next;
+ bl->next = bl->next->next;
+ spin_unlock(&bl->lock);
+
+ atomic_dec(&bl->count);
+ buf->next = NULL;
+ buf->list = DRM_LIST_NONE;
+ if (buf->waiting || buf->pending) {
+ DRM_ERROR("Free buffer %d: w%d, p%d, l%d\n",
+ buf->idx, buf->waiting, buf->pending, buf->list);
+ }
+
+ return buf;
+}
+
+drm_buf_t *DRM(freelist_get)(drm_freelist_t *bl, int block)
+{
+ drm_buf_t *buf = NULL;
+ DECLARE_WAITQUEUE(entry, current);
+
+ if (!bl || !bl->initialized) return NULL;
+
+ /* Check for low water mark */
+ if (atomic_read(&bl->count) <= bl->low_mark) /* Became low */
+ atomic_set(&bl->wfh, 1);
+ if (atomic_read(&bl->wfh)) {
+ if (block) {
+ add_wait_queue(&bl->waiting, &entry);
+ for (;;) {
+ current->state = TASK_INTERRUPTIBLE;
+ if (!atomic_read(&bl->wfh)
+ && (buf = DRM(freelist_try)(bl))) break;
+ schedule();
+ if (signal_pending(current)) break;
+ }
+ current->state = TASK_RUNNING;
+ remove_wait_queue(&bl->waiting, &entry);
+ }
+ return buf;
+ }
+
+ return DRM(freelist_try)(bl);
+}
+
+#endif /* __HAVE_DMA_FREELIST */
diff --git a/linux/drm_lock.h b/linux/drm_lock.h
new file mode 100644
index 00000000..c10cfe2c
--- /dev/null
+++ b/linux/drm_lock.h
@@ -0,0 +1,251 @@
+/* lock.c -- IOCTLs for locking -*- linux-c -*-
+ * Created: Tue Feb 2 08:37:54 1999 by faith@valinux.com
+ *
+ * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
+ * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Authors:
+ * Rickard E. (Rik) Faith <faith@valinux.com>
+ * Gareth Hughes <gareth@valinux.com>
+ */
+
+#define __NO_VERSION__
+#include "drmP.h"
+
+int DRM(block)(struct inode *inode, struct file *filp, unsigned int cmd,
+ unsigned long arg)
+{
+ DRM_DEBUG("\n");
+ return 0;
+}
+
+int DRM(unblock)(struct inode *inode, struct file *filp, unsigned int cmd,
+ unsigned long arg)
+{
+ DRM_DEBUG("\n");
+ return 0;
+}
+
+int DRM(lock_take)(__volatile__ unsigned int *lock, unsigned int context)
+{
+ unsigned int old, new, prev;
+
+ do {
+ old = *lock;
+ if (old & _DRM_LOCK_HELD) new = old | _DRM_LOCK_CONT;
+ else new = context | _DRM_LOCK_HELD;
+ prev = cmpxchg(lock, old, new);
+ } while (prev != old);
+ if (_DRM_LOCKING_CONTEXT(old) == context) {
+ if (old & _DRM_LOCK_HELD) {
+ if (context != DRM_KERNEL_CONTEXT) {
+ DRM_ERROR("%d holds heavyweight lock\n",
+ context);
+ }
+ return 0;
+ }
+ }
+ if (new == (context | _DRM_LOCK_HELD)) {
+ /* Have lock */
+ return 1;
+ }
+ return 0;
+}
+
+/* This takes a lock forcibly and hands it to context. Should ONLY be used
+ inside *_unlock to give lock to kernel before calling *_dma_schedule. */
+int DRM(lock_transfer)(drm_device_t *dev,
+ __volatile__ unsigned int *lock, unsigned int context)
+{
+ unsigned int old, new, prev;
+
+ dev->lock.pid = 0;
+ do {
+ old = *lock;
+ new = context | _DRM_LOCK_HELD;
+ prev = cmpxchg(lock, old, new);
+ } while (prev != old);
+ return 1;
+}
+
+int DRM(lock_free)(drm_device_t *dev,
+ __volatile__ unsigned int *lock, unsigned int context)
+{
+ unsigned int old, new, prev;
+ pid_t pid = dev->lock.pid;
+
+ dev->lock.pid = 0;
+ do {
+ old = *lock;
+ new = 0;
+ prev = cmpxchg(lock, old, new);
+ } while (prev != old);
+ if (_DRM_LOCK_IS_HELD(old) && _DRM_LOCKING_CONTEXT(old) != context) {
+ DRM_ERROR("%d freed heavyweight lock held by %d (pid %d)\n",
+ context,
+ _DRM_LOCKING_CONTEXT(old),
+ pid);
+ return 1;
+ }
+ wake_up_interruptible(&dev->lock.lock_queue);
+ return 0;
+}
+
+static int DRM(flush_queue)(drm_device_t *dev, int context)
+{
+ DECLARE_WAITQUEUE(entry, current);
+ int ret = 0;
+ drm_queue_t *q = dev->queuelist[context];
+
+ DRM_DEBUG("\n");
+
+ atomic_inc(&q->use_count);
+ if (atomic_read(&q->use_count) > 1) {
+ atomic_inc(&q->block_write);
+ add_wait_queue(&q->flush_queue, &entry);
+ atomic_inc(&q->block_count);
+ for (;;) {
+ current->state = TASK_INTERRUPTIBLE;
+ if (!DRM_BUFCOUNT(&q->waitlist)) break;
+ schedule();
+ if (signal_pending(current)) {
+ ret = -EINTR; /* Can't restart */
+ break;
+ }
+ }
+ atomic_dec(&q->block_count);
+ current->state = TASK_RUNNING;
+ remove_wait_queue(&q->flush_queue, &entry);
+ }
+ atomic_dec(&q->use_count);
+
+ /* NOTE: block_write is still incremented!
+ Use drm_flush_unlock_queue to decrement. */
+ return ret;
+}
+
+static int DRM(flush_unblock_queue)(drm_device_t *dev, int context)
+{
+ drm_queue_t *q = dev->queuelist[context];
+
+ DRM_DEBUG("\n");
+
+ atomic_inc(&q->use_count);
+ if (atomic_read(&q->use_count) > 1) {
+ if (atomic_read(&q->block_write)) {
+ atomic_dec(&q->block_write);
+ wake_up_interruptible(&q->write_queue);
+ }
+ }
+ atomic_dec(&q->use_count);
+ return 0;
+}
+
+int DRM(flush_block_and_flush)(drm_device_t *dev, int context,
+ drm_lock_flags_t flags)
+{
+ int ret = 0;
+ int i;
+
+ DRM_DEBUG("\n");
+
+ if (flags & _DRM_LOCK_FLUSH) {
+ ret = DRM(flush_queue)(dev, DRM_KERNEL_CONTEXT);
+ if (!ret) ret = DRM(flush_queue)(dev, context);
+ }
+ if (flags & _DRM_LOCK_FLUSH_ALL) {
+ for (i = 0; !ret && i < dev->queue_count; i++) {
+ ret = DRM(flush_queue)(dev, i);
+ }
+ }
+ return ret;
+}
+
+int DRM(flush_unblock)(drm_device_t *dev, int context, drm_lock_flags_t flags)
+{
+ int ret = 0;
+ int i;
+
+ DRM_DEBUG("\n");
+
+ if (flags & _DRM_LOCK_FLUSH) {
+ ret = DRM(flush_unblock_queue)(dev, DRM_KERNEL_CONTEXT);
+ if (!ret) ret = DRM(flush_unblock_queue)(dev, context);
+ }
+ if (flags & _DRM_LOCK_FLUSH_ALL) {
+ for (i = 0; !ret && i < dev->queue_count; i++) {
+ ret = DRM(flush_unblock_queue)(dev, i);
+ }
+ }
+
+ return ret;
+}
+
+int DRM(finish)(struct inode *inode, struct file *filp, unsigned int cmd,
+ unsigned long arg)
+{
+ drm_file_t *priv = filp->private_data;
+ drm_device_t *dev = priv->dev;
+ int ret = 0;
+ drm_lock_t lock;
+
+ DRM_DEBUG("\n");
+
+ if (copy_from_user(&lock, (drm_lock_t *)arg, sizeof(lock)))
+ return -EFAULT;
+ ret = DRM(flush_block_and_flush)(dev, lock.context, lock.flags);
+ DRM(flush_unblock)(dev, lock.context, lock.flags);
+ return ret;
+}
+
+/* If we get here, it means that the process has called DRM_IOCTL_LOCK
+ without calling DRM_IOCTL_UNLOCK.
+
+ If the lock is not held, then let the signal proceed as usual.
+
+ If the lock is held, then set the contended flag and keep the signal
+ blocked.
+
+
+ Return 1 if the signal should be delivered normally.
+ Return 0 if the signal should be blocked. */
+
+int DRM(notifier)(void *priv)
+{
+ drm_sigdata_t *s = (drm_sigdata_t *)priv;
+ unsigned int old, new, prev;
+
+
+ /* Allow signal delivery if lock isn't held */
+ if (!_DRM_LOCK_IS_HELD(s->lock->lock)
+ || _DRM_LOCKING_CONTEXT(s->lock->lock) != s->context) return 1;
+
+ /* Otherwise, set flag to force call to
+ drmUnlock */
+ do {
+ old = s->lock->lock;
+ new = old | _DRM_LOCK_CONT;
+ prev = cmpxchg(&s->lock->lock, old, new);
+ } while (prev != old);
+ return 0;
+}
diff --git a/linux/drm_proc.h b/linux/drm_proc.h
new file mode 100644
index 00000000..f65f42b7
--- /dev/null
+++ b/linux/drm_proc.h
@@ -0,0 +1,630 @@
+/* drm_proc.h -- /proc support for DRM -*- linux-c -*-
+ * Created: Mon Jan 11 09:48:47 1999 by faith@valinux.com
+ *
+ * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
+ * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Authors:
+ * Rickard E. (Rik) Faith <faith@valinux.com>
+ * Gareth Hughes <gareth@valinux.com>
+ *
+ * Acknowledgements:
+ * Matthew J Sottek <matthew.j.sottek@intel.com> sent in a patch to fix
+ * the problem with the proc files not outputting all their information.
+ */
+
+#define __NO_VERSION__
+#include "drmP.h"
+
+static int DRM(name_info)(char *buf, char **start, off_t offset,
+ int request, int *eof, void *data);
+static int DRM(vm_info)(char *buf, char **start, off_t offset,
+ int request, int *eof, void *data);
+static int DRM(clients_info)(char *buf, char **start, off_t offset,
+ int request, int *eof, void *data);
+static int DRM(queues_info)(char *buf, char **start, off_t offset,
+ int request, int *eof, void *data);
+static int DRM(bufs_info)(char *buf, char **start, off_t offset,
+ int request, int *eof, void *data);
+#if DRM_DEBUG_CODE
+static int DRM(vma_info)(char *buf, char **start, off_t offset,
+ int request, int *eof, void *data);
+#endif
+#if __HAVE_DMA_HISTOGRAM
+static int DRM(histo_info)(char *buf, char **start, off_t offset,
+ int request, int *eof, void *data);
+#endif
+
+struct drm_proc_list {
+ const char *name;
+ int (*f)(char *, char **, off_t, int, int *, void *);
+} DRM(proc_list)[] = {
+ { "name", DRM(name_info) },
+ { "mem", DRM(mem_info) },
+ { "vm", DRM(vm_info) },
+ { "clients", DRM(clients_info) },
+ { "queues", DRM(queues_info) },
+ { "bufs", DRM(bufs_info) },
+#if DRM_DEBUG_CODE
+ { "vma", DRM(vma_info) },
+#endif
+#if __HAVE_DMA_HISTOGRAM
+ { "histo", DRM(histo_info) },
+#endif
+};
+#define DRM_PROC_ENTRIES (sizeof(DRM(proc_list))/sizeof(DRM(proc_list)[0]))
+
+struct proc_dir_entry *DRM(proc_init)(drm_device_t *dev, int minor,
+ struct proc_dir_entry *root,
+ struct proc_dir_entry **dev_root)
+{
+ struct proc_dir_entry *ent;
+ int i, j;
+ char name[64];
+
+ if (!minor) root = create_proc_entry("dri", S_IFDIR, NULL);
+ if (!root) {
+ DRM_ERROR("Cannot create /proc/dri\n");
+ return NULL;
+ }
+
+ sprintf(name, "%d", minor);
+ *dev_root = create_proc_entry(name, S_IFDIR, root);
+ if (!*dev_root) {
+ DRM_ERROR("Cannot create /proc/%s\n", name);
+ return NULL;
+ }
+
+ for (i = 0; i < DRM_PROC_ENTRIES; i++) {
+ ent = create_proc_entry(DRM(proc_list)[i].name,
+ S_IFREG|S_IRUGO, *dev_root);
+ if (!ent) {
+ DRM_ERROR("Cannot create /proc/dri/%s/%s\n",
+ name, DRM(proc_list)[i].name);
+ for (j = 0; j < i; j++)
+ remove_proc_entry(DRM(proc_list)[i].name,
+ *dev_root);
+ remove_proc_entry(name, root);
+ if (!minor) remove_proc_entry("dri", NULL);
+ return NULL;
+ }
+ ent->read_proc = DRM(proc_list)[i].f;
+ ent->data = dev;
+ }
+
+ return root;
+}
+
+
+int DRM(proc_cleanup)(int minor, struct proc_dir_entry *root,
+ struct proc_dir_entry *dev_root)
+{
+ int i;
+ char name[64];
+
+ if (!root || !dev_root) return 0;
+
+ for (i = 0; i < DRM_PROC_ENTRIES; i++)
+ remove_proc_entry(DRM(proc_list)[i].name, dev_root);
+ sprintf(name, "%d", minor);
+ remove_proc_entry(name, root);
+ if (!minor) remove_proc_entry("dri", NULL);
+
+ return 0;
+}
+
+static int DRM(name_info)(char *buf, char **start, off_t offset, int request,
+ int *eof, void *data)
+{
+ drm_device_t *dev = (drm_device_t *)data;
+ int len = 0;
+
+ if (offset > DRM_PROC_LIMIT) {
+ *eof = 1;
+ return 0;
+ }
+
+ *start = &buf[offset];
+ *eof = 0;
+
+ if (dev->unique) {
+ DRM_PROC_PRINT("%s 0x%x %s\n",
+ dev->name, dev->device, dev->unique);
+ } else {
+ DRM_PROC_PRINT("%s 0x%x\n", dev->name, dev->device);
+ }
+
+ if (len > request + offset) return request;
+ *eof = 1;
+ return len - offset;
+}
+
+static int DRM(_vm_info)(char *buf, char **start, off_t offset, int request,
+ int *eof, void *data)
+{
+ drm_device_t *dev = (drm_device_t *)data;
+ int len = 0;
+ drm_map_t *map;
+ drm_map_list_t *r_list;
+ struct list_head *list;
+
+ /* Hardcoded from _DRM_FRAME_BUFFER,
+ _DRM_REGISTERS, _DRM_SHM, and
+ _DRM_AGP. */
+ const char *types[] = { "FB", "REG", "SHM", "AGP" };
+ const char *type;
+ int i;
+
+ if (offset > DRM_PROC_LIMIT) {
+ *eof = 1;
+ return 0;
+ }
+
+ *start = &buf[offset];
+ *eof = 0;
+
+ DRM_PROC_PRINT("slot offset size type flags "
+ "address mtrr\n\n");
+ i = 0;
+ list_for_each(list, &dev->maplist->head) {
+ r_list = (drm_map_list_t *)list;
+ map = r_list->map;
+ if(!map) continue;
+ if (map->type < 0 || map->type > 3) type = "??";
+ else type = types[map->type];
+ DRM_PROC_PRINT("%4d 0x%08lx 0x%08lx %4.4s 0x%02x 0x%08lx ",
+ i,
+ map->offset,
+ map->size,
+ type,
+ map->flags,
+ (unsigned long)map->handle);
+ if (map->mtrr < 0) {
+ DRM_PROC_PRINT("none\n");
+ } else {
+ DRM_PROC_PRINT("%4d\n", map->mtrr);
+ }
+ i++;
+ }
+
+ if (len > request + offset) return request;
+ *eof = 1;
+ return len - offset;
+}
+
+static int DRM(vm_info)(char *buf, char **start, off_t offset, int request,
+ int *eof, void *data)
+{
+ drm_device_t *dev = (drm_device_t *)data;
+ int ret;
+
+ down(&dev->struct_sem);
+ ret = DRM(_vm_info)(buf, start, offset, request, eof, data);
+ up(&dev->struct_sem);
+ return ret;
+}
+
+
+static int DRM(_queues_info)(char *buf, char **start, off_t offset,
+ int request, int *eof, void *data)
+{
+ drm_device_t *dev = (drm_device_t *)data;
+ int len = 0;
+ int i;
+ drm_queue_t *q;
+
+ if (offset > DRM_PROC_LIMIT) {
+ *eof = 1;
+ return 0;
+ }
+
+ *start = &buf[offset];
+ *eof = 0;
+
+ DRM_PROC_PRINT(" ctx/flags use fin"
+ " blk/rw/rwf wait flushed queued"
+ " locks\n\n");
+ for (i = 0; i < dev->queue_count; i++) {
+ q = dev->queuelist[i];
+ atomic_inc(&q->use_count);
+ DRM_PROC_PRINT_RET(atomic_dec(&q->use_count),
+ "%5d/0x%03x %5d %5d"
+ " %5d/%c%c/%c%c%c %5Zd\n",
+ i,
+ q->flags,
+ atomic_read(&q->use_count),
+ atomic_read(&q->finalization),
+ atomic_read(&q->block_count),
+ atomic_read(&q->block_read) ? 'r' : '-',
+ atomic_read(&q->block_write) ? 'w' : '-',
+ waitqueue_active(&q->read_queue) ? 'r':'-',
+ waitqueue_active(&q->write_queue) ? 'w':'-',
+ waitqueue_active(&q->flush_queue) ? 'f':'-',
+ DRM_BUFCOUNT(&q->waitlist));
+ atomic_dec(&q->use_count);
+ }
+
+ if (len > request + offset) return request;
+ *eof = 1;
+ return len - offset;
+}
+
+static int DRM(queues_info)(char *buf, char **start, off_t offset, int request,
+ int *eof, void *data)
+{
+ drm_device_t *dev = (drm_device_t *)data;
+ int ret;
+
+ down(&dev->struct_sem);
+ ret = DRM(_queues_info)(buf, start, offset, request, eof, data);
+ up(&dev->struct_sem);
+ return ret;
+}
+
+/* drm_bufs_info is called whenever a process reads
+ /dev/dri/<dev>/bufs. */
+
+static int DRM(_bufs_info)(char *buf, char **start, off_t offset, int request,
+ int *eof, void *data)
+{
+ drm_device_t *dev = (drm_device_t *)data;
+ int len = 0;
+ drm_device_dma_t *dma = dev->dma;
+ int i;
+
+ if (!dma || offset > DRM_PROC_LIMIT) {
+ *eof = 1;
+ return 0;
+ }
+
+ *start = &buf[offset];
+ *eof = 0;
+
+ DRM_PROC_PRINT(" o size count free segs pages kB\n\n");
+ for (i = 0; i <= DRM_MAX_ORDER; i++) {
+ if (dma->bufs[i].buf_count)
+ DRM_PROC_PRINT("%2d %8d %5d %5d %5d %5d %5ld\n",
+ i,
+ dma->bufs[i].buf_size,
+ dma->bufs[i].buf_count,
+ atomic_read(&dma->bufs[i]
+ .freelist.count),
+ dma->bufs[i].seg_count,
+ dma->bufs[i].seg_count
+ *(1 << dma->bufs[i].page_order),
+ (dma->bufs[i].seg_count
+ * (1 << dma->bufs[i].page_order))
+ * PAGE_SIZE / 1024);
+ }
+ DRM_PROC_PRINT("\n");
+ for (i = 0; i < dma->buf_count; i++) {
+ if (i && !(i%32)) DRM_PROC_PRINT("\n");
+ DRM_PROC_PRINT(" %d", dma->buflist[i]->list);
+ }
+ DRM_PROC_PRINT("\n");
+
+ if (len > request + offset) return request;
+ *eof = 1;
+ return len - offset;
+}
+
+static int DRM(bufs_info)(char *buf, char **start, off_t offset, int request,
+ int *eof, void *data)
+{
+ drm_device_t *dev = (drm_device_t *)data;
+ int ret;
+
+ down(&dev->struct_sem);
+ ret = DRM(_bufs_info)(buf, start, offset, request, eof, data);
+ up(&dev->struct_sem);
+ return ret;
+}
+
+
+static int DRM(_clients_info)(char *buf, char **start, off_t offset,
+ int request, int *eof, void *data)
+{
+ drm_device_t *dev = (drm_device_t *)data;
+ int len = 0;
+ drm_file_t *priv;
+
+ if (offset > DRM_PROC_LIMIT) {
+ *eof = 1;
+ return 0;
+ }
+
+ *start = &buf[offset];
+ *eof = 0;
+
+ DRM_PROC_PRINT("a dev pid uid magic ioctls\n\n");
+ for (priv = dev->file_first; priv; priv = priv->next) {
+ DRM_PROC_PRINT("%c %3d %5d %5d %10u %10lu\n",
+ priv->authenticated ? 'y' : 'n',
+ priv->minor,
+ priv->pid,
+ priv->uid,
+ priv->magic,
+ priv->ioctl_count);
+ }
+
+ if (len > request + offset) return request;
+ *eof = 1;
+ return len - offset;
+}
+
+static int DRM(clients_info)(char *buf, char **start, off_t offset,
+ int request, int *eof, void *data)
+{
+ drm_device_t *dev = (drm_device_t *)data;
+ int ret;
+
+ down(&dev->struct_sem);
+ ret = DRM(_clients_info)(buf, start, offset, request, eof, data);
+ up(&dev->struct_sem);
+ return ret;
+}
+
+#if DRM_DEBUG_CODE
+
+#define DRM_VMA_VERBOSE 0
+
+static int DRM(_vma_info)(char *buf, char **start, off_t offset, int request,
+ int *eof, void *data)
+{
+ drm_device_t *dev = (drm_device_t *)data;
+ int len = 0;
+ drm_vma_entry_t *pt;
+ struct vm_area_struct *vma;
+#if DRM_VMA_VERBOSE
+ unsigned long i;
+ unsigned long address;
+ pgd_t *pgd;
+ pmd_t *pmd;
+ pte_t *pte;
+#endif
+#if defined(__i386__)
+ unsigned int pgprot;
+#endif
+
+ if (offset > DRM_PROC_LIMIT) {
+ *eof = 1;
+ return 0;
+ }
+
+ *start = &buf[offset];
+ *eof = 0;
+
+ DRM_PROC_PRINT("vma use count: %d, high_memory = %p, 0x%08lx\n",
+ atomic_read(&dev->vma_count),
+ high_memory, virt_to_phys(high_memory));
+ for (pt = dev->vmalist; pt; pt = pt->next) {
+ if (!(vma = pt->vma)) continue;
+ DRM_PROC_PRINT("\n%5d 0x%08lx-0x%08lx %c%c%c%c%c%c 0x%08lx",
+ pt->pid,
+ vma->vm_start,
+ vma->vm_end,
+ vma->vm_flags & VM_READ ? 'r' : '-',
+ vma->vm_flags & VM_WRITE ? 'w' : '-',
+ vma->vm_flags & VM_EXEC ? 'x' : '-',
+ vma->vm_flags & VM_MAYSHARE ? 's' : 'p',
+ vma->vm_flags & VM_LOCKED ? 'l' : '-',
+ vma->vm_flags & VM_IO ? 'i' : '-',
+ VM_OFFSET(vma));
+
+#if defined(__i386__)
+ pgprot = pgprot_val(vma->vm_page_prot);
+ DRM_PROC_PRINT(" %c%c%c%c%c%c%c%c%c",
+ pgprot & _PAGE_PRESENT ? 'p' : '-',
+ pgprot & _PAGE_RW ? 'w' : 'r',
+ pgprot & _PAGE_USER ? 'u' : 's',
+ pgprot & _PAGE_PWT ? 't' : 'b',
+ pgprot & _PAGE_PCD ? 'u' : 'c',
+ pgprot & _PAGE_ACCESSED ? 'a' : '-',
+ pgprot & _PAGE_DIRTY ? 'd' : '-',
+ pgprot & _PAGE_PSE ? 'm' : 'k',
+ pgprot & _PAGE_GLOBAL ? 'g' : 'l' );
+#endif
+ DRM_PROC_PRINT("\n");
+#if 0
+ for (i = vma->vm_start; i < vma->vm_end; i += PAGE_SIZE) {
+ pgd = pgd_offset(vma->vm_mm, i);
+ pmd = pmd_offset(pgd, i);
+ pte = pte_offset(pmd, i);
+ if (pte_present(*pte)) {
+ address = __pa(pte_page(*pte))
+ + (i & (PAGE_SIZE-1));
+ DRM_PROC_PRINT(" 0x%08lx -> 0x%08lx"
+ " %c%c%c%c%c\n",
+ i,
+ address,
+ pte_read(*pte) ? 'r' : '-',
+ pte_write(*pte) ? 'w' : '-',
+ pte_exec(*pte) ? 'x' : '-',
+ pte_dirty(*pte) ? 'd' : '-',
+ pte_young(*pte) ? 'a' : '-' );
+ } else {
+ DRM_PROC_PRINT(" 0x%08lx\n", i);
+ }
+ }
+#endif
+ }
+
+ if (len > request + offset) return request;
+ *eof = 1;
+ return len - offset;
+}
+
+static int DRM(vma_info)(char *buf, char **start, off_t offset, int request,
+ int *eof, void *data)
+{
+ drm_device_t *dev = (drm_device_t *)data;
+ int ret;
+
+ down(&dev->struct_sem);
+ ret = DRM(_vma_info)(buf, start, offset, request, eof, data);
+ up(&dev->struct_sem);
+ return ret;
+}
+#endif
+
+
+#if __HAVE_DMA_HISTOGRAM
+static int DRM(_histo_info)(char *buf, char **start, off_t offset, int request,
+ int *eof, void *data)
+{
+ drm_device_t *dev = (drm_device_t *)data;
+ int len = 0;
+ drm_device_dma_t *dma = dev->dma;
+ int i;
+ unsigned long slot_value = DRM_DMA_HISTOGRAM_INITIAL;
+ unsigned long prev_value = 0;
+ drm_buf_t *buffer;
+
+ if (offset > DRM_PROC_LIMIT) {
+ *eof = 1;
+ return 0;
+ }
+
+ *start = &buf[offset];
+ *eof = 0;
+
+ DRM_PROC_PRINT("general statistics:\n");
+ DRM_PROC_PRINT("total %10u\n", atomic_read(&dev->histo.total));
+ DRM_PROC_PRINT("open %10u\n",
+ atomic_read(&dev->counts[_DRM_STAT_OPENS]));
+ DRM_PROC_PRINT("close %10u\n",
+ atomic_read(&dev->counts[_DRM_STAT_CLOSES]));
+ DRM_PROC_PRINT("ioctl %10u\n",
+ atomic_read(&dev->counts[_DRM_STAT_IOCTLS]));
+
+ DRM_PROC_PRINT("\nlock statistics:\n");
+ DRM_PROC_PRINT("locks %10u\n",
+ atomic_read(&dev->counts[_DRM_STAT_LOCKS]));
+ DRM_PROC_PRINT("unlocks %10u\n",
+ atomic_read(&dev->counts[_DRM_STAT_UNLOCKS]));
+
+ if (dma) {
+#if 0
+ DRM_PROC_PRINT("\ndma statistics:\n");
+ DRM_PROC_PRINT("prio %10u\n",
+ atomic_read(&dma->total_prio));
+ DRM_PROC_PRINT("bytes %10u\n",
+ atomic_read(&dma->total_bytes));
+ DRM_PROC_PRINT("dmas %10u\n",
+ atomic_read(&dma->total_dmas));
+ DRM_PROC_PRINT("missed:\n");
+ DRM_PROC_PRINT(" dma %10u\n",
+ atomic_read(&dma->total_missed_dma));
+ DRM_PROC_PRINT(" lock %10u\n",
+ atomic_read(&dma->total_missed_lock));
+ DRM_PROC_PRINT(" free %10u\n",
+ atomic_read(&dma->total_missed_free));
+ DRM_PROC_PRINT(" sched %10u\n",
+ atomic_read(&dma->total_missed_sched));
+ DRM_PROC_PRINT("tried %10u\n",
+ atomic_read(&dma->total_tried));
+ DRM_PROC_PRINT("hit %10u\n",
+ atomic_read(&dma->total_hit));
+ DRM_PROC_PRINT("lost %10u\n",
+ atomic_read(&dma->total_lost));
+#endif
+
+ buffer = dma->next_buffer;
+ if (buffer) {
+ DRM_PROC_PRINT("next_buffer %7d\n", buffer->idx);
+ } else {
+ DRM_PROC_PRINT("next_buffer none\n");
+ }
+ buffer = dma->this_buffer;
+ if (buffer) {
+ DRM_PROC_PRINT("this_buffer %7d\n", buffer->idx);
+ } else {
+ DRM_PROC_PRINT("this_buffer none\n");
+ }
+ }
+
+
+ DRM_PROC_PRINT("\nvalues:\n");
+ if (dev->lock.hw_lock) {
+ DRM_PROC_PRINT("lock 0x%08x\n",
+ dev->lock.hw_lock->lock);
+ } else {
+ DRM_PROC_PRINT("lock none\n");
+ }
+ DRM_PROC_PRINT("context_flag 0x%08lx\n", dev->context_flag);
+ DRM_PROC_PRINT("interrupt_flag 0x%08lx\n", dev->interrupt_flag);
+ DRM_PROC_PRINT("dma_flag 0x%08lx\n", dev->dma_flag);
+
+ DRM_PROC_PRINT("queue_count %10d\n", dev->queue_count);
+ DRM_PROC_PRINT("last_context %10d\n", dev->last_context);
+ DRM_PROC_PRINT("last_switch %10lu\n", dev->last_switch);
+ DRM_PROC_PRINT("last_checked %10d\n", dev->last_checked);
+
+
+ DRM_PROC_PRINT("\n q2d d2c c2f"
+ " q2c q2f dma sch"
+ " ctx lacq lhld\n\n");
+ for (i = 0; i < DRM_DMA_HISTOGRAM_SLOTS; i++) {
+ DRM_PROC_PRINT("%s %10lu %10u %10u %10u %10u %10u"
+ " %10u %10u %10u %10u %10u\n",
+ i == DRM_DMA_HISTOGRAM_SLOTS - 1 ? ">=" : "< ",
+ i == DRM_DMA_HISTOGRAM_SLOTS - 1
+ ? prev_value : slot_value ,
+
+ atomic_read(&dev->histo
+ .queued_to_dispatched[i]),
+ atomic_read(&dev->histo
+ .dispatched_to_completed[i]),
+ atomic_read(&dev->histo
+ .completed_to_freed[i]),
+
+ atomic_read(&dev->histo
+ .queued_to_completed[i]),
+ atomic_read(&dev->histo
+ .queued_to_freed[i]),
+ atomic_read(&dev->histo.dma[i]),
+ atomic_read(&dev->histo.schedule[i]),
+ atomic_read(&dev->histo.ctx[i]),
+ atomic_read(&dev->histo.lacq[i]),
+ atomic_read(&dev->histo.lhld[i]));
+ prev_value = slot_value;
+ slot_value = DRM_DMA_HISTOGRAM_NEXT(slot_value);
+ }
+
+ if (len > request + offset) return request;
+ *eof = 1;
+ return len - offset;
+}
+
+static int DRM(histo_info)(char *buf, char **start, off_t offset, int request,
+ int *eof, void *data)
+{
+ drm_device_t *dev = (drm_device_t *)data;
+ int ret;
+
+ down(&dev->struct_sem);
+ ret = DRM(_histo_info)(buf, start, offset, request, eof, data);
+ up(&dev->struct_sem);
+ return ret;
+}
+#endif
diff --git a/linux/drm_stub.h b/linux/drm_stub.h
new file mode 100644
index 00000000..bc958796
--- /dev/null
+++ b/linux/drm_stub.h
@@ -0,0 +1,152 @@
+/* drm_stub.h -- -*- linux-c -*-
+ * Created: Fri Jan 19 10:48:35 2001 by faith@acm.org
+ *
+ * Copyright 2001 VA Linux Systems, Inc., Sunnyvale, California.
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ *
+ * Authors:
+ * Rickard E. (Rik) Faith <faith@valinux.com>
+ *
+ */
+
+#define __NO_VERSION__
+#include "drmP.h"
+
+#if LINUX_VERSION_CODE < 0x020400
+#include "stubsupport-pre24.h"
+#endif
+
+#define DRM_STUB_MAXCARDS 16 /* Enough for one machine */
+
+static struct drm_stub_list {
+ const char *name;
+ struct file_operations *fops;
+ struct proc_dir_entry *dev_root;
+} *DRM(stub_list);
+
+static struct proc_dir_entry *DRM(stub_root);
+
+static struct drm_stub_info {
+ int (*info_register)(const char *name, struct file_operations *fops,
+ drm_device_t *dev);
+ int (*info_unregister)(int minor);
+} DRM(stub_info);
+
+static int DRM(stub_open)(struct inode *inode, struct file *filp)
+{
+ int minor = MINOR(inode->i_rdev);
+ int err = -ENODEV;
+ struct file_operations *old_fops;
+
+ if (!DRM(stub_list) || !DRM(stub_list)[minor].fops) return -ENODEV;
+ old_fops = filp->f_op;
+ filp->f_op = fops_get(DRM(stub_list)[minor].fops);
+ if (filp->f_op->open && (err = filp->f_op->open(inode, filp))) {
+ fops_put(filp->f_op);
+ filp->f_op = fops_get(old_fops);
+ }
+ fops_put(old_fops);
+
+ return err;
+}
+
+static struct file_operations DRM(stub_fops) = {
+#if LINUX_VERSION_CODE >= 0x020400
+ owner: THIS_MODULE,
+#endif
+ open: DRM(stub_open)
+};
+
+static int DRM(stub_getminor)(const char *name, struct file_operations *fops,
+ drm_device_t *dev)
+{
+ int i;
+
+ if (!DRM(stub_list)) {
+ DRM(stub_list) = DRM(alloc)(sizeof(*DRM(stub_list))
+ * DRM_STUB_MAXCARDS, DRM_MEM_STUB);
+ for (i = 0; i < DRM_STUB_MAXCARDS; i++) {
+ DRM(stub_list)[i].name = NULL;
+ DRM(stub_list)[i].fops = NULL;
+ }
+ }
+ for (i = 0; i < DRM_STUB_MAXCARDS; i++) {
+ if (!DRM(stub_list)[i].fops) {
+ DRM(stub_list)[i].name = name;
+ DRM(stub_list)[i].fops = fops;
+ DRM(stub_root) = DRM(proc_init)(dev, i, DRM(stub_root),
+ &DRM(stub_list)[i]
+ .dev_root);
+ return i;
+ }
+ }
+ return -1;
+}
+
+static int DRM(stub_putminor)(int minor)
+{
+ if (minor < 0 || minor >= DRM_STUB_MAXCARDS) return -1;
+ DRM(stub_list)[minor].name = NULL;
+ DRM(stub_list)[minor].fops = NULL;
+ DRM(proc_cleanup)(minor, DRM(stub_root),
+ DRM(stub_list)[minor].dev_root);
+ if (minor) {
+ inter_module_put("drm");
+ } else {
+ inter_module_unregister("drm");
+ DRM(free)(DRM(stub_list),
+ sizeof(*DRM(stub_list)) * DRM_STUB_MAXCARDS,
+ DRM_MEM_STUB);
+ unregister_chrdev(DRM_MAJOR, "drm");
+ }
+ return 0;
+}
+
+int DRM(stub_register)(const char *name, struct file_operations *fops,
+ drm_device_t *dev)
+{
+ struct drm_stub_info *i = NULL;
+
+ if (register_chrdev(DRM_MAJOR, "drm", &DRM(stub_fops)))
+ i = (struct drm_stub_info *)inter_module_get("drm");
+
+ if (i) {
+ /* Already registered */
+ DRM(stub_info).info_register = i->info_register;
+ DRM(stub_info).info_unregister = i->info_unregister;
+ } else {
+ DRM(stub_info).info_register = DRM(stub_getminor);
+ DRM(stub_info).info_unregister = DRM(stub_putminor);
+ inter_module_register("drm", THIS_MODULE, &DRM(stub_info));
+ }
+ if (DRM(stub_info).info_register)
+ return DRM(stub_info).info_register(name, fops, dev);
+ return -1;
+}
+
+int DRM(stub_unregister)(int minor)
+{
+ DRM_DEBUG("%d\n", minor);
+ if (DRM(stub_info).info_unregister)
+ return DRM(stub_info).info_unregister(minor);
+ return -1;
+}
diff --git a/linux/gamma.h b/linux/gamma.h
new file mode 100644
index 00000000..232ed018
--- /dev/null
+++ b/linux/gamma.h
@@ -0,0 +1,93 @@
+/* gamma.c -- 3dlabs GMX 2000 driver -*- linux-c -*-
+ * Created: Mon Jan 4 08:58:31 1999 by gareth@valinux.com
+ *
+ * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ *
+ * Authors:
+ * Gareth Hughes <gareth@valinux.com>
+ */
+
+#ifndef __GAMMA_H__
+#define __GAMMA_H__
+
+/* This remains constant for all DRM template files.
+ */
+#define DRM(x) gamma_##x
+
+/* General customization:
+ */
+#define __HAVE_MTRR 1
+
+/* DMA customization:
+ */
+#define __HAVE_DMA 1
+#define __HAVE_OLD_DMA 1
+#define __HAVE_PCI_DMA 1
+
+#define __HAVE_MULTIPLE_DMA_QUEUES 1
+#define __HAVE_DMA_WAITQUEUE 1
+
+#define __HAVE_DMA_WAITLIST 1
+#define __HAVE_DMA_FREELIST 1
+
+#define __HAVE_DMA_FLUSH 1
+#define __HAVE_DMA_SCHEDULE 1
+
+#define __HAVE_DMA_READY 1
+#define DRIVER_DMA_READY() do { \
+ gamma_dma_ready(dev); \
+} while (0)
+
+#define __HAVE_DMA_QUIESCENT 1
+#define DRIVER_DMA_QUIESCENT() do { \
+ /* FIXME ! */ \
+ gamma_dma_quiescent_dual(dev); \
+ return 0; \
+} while (0)
+
+#define __HAVE_DMA_IRQ 1
+#define __HAVE_DMA_IRQ_BH 1
+#define DRIVER_PREINSTALL() do { \
+ drm_gamma_private_t *dev_priv = \
+ (drm_gamma_private_t *)dev->dev_private;\
+ GAMMA_WRITE( GAMMA_GCOMMANDMODE, 0x00000000 ); \
+ GAMMA_WRITE( GAMMA_GDMACONTROL, 0x00000000 ); \
+} while (0)
+
+#define DRIVER_POSTINSTALL() do { \
+ drm_gamma_private_t *dev_priv = \
+ (drm_gamma_private_t *)dev->dev_private;\
+ GAMMA_WRITE( GAMMA_GINTENABLE, 0x00002001 ); \
+ GAMMA_WRITE( GAMMA_COMMANDINTENABLE, 0x00000008 ); \
+ GAMMA_WRITE( GAMMA_GDELAYTIMER, 0x00039090 ); \
+} while (0)
+
+#define DRIVER_UNINSTALL() do { \
+ drm_gamma_private_t *dev_priv = \
+ (drm_gamma_private_t *)dev->dev_private;\
+ GAMMA_WRITE( GAMMA_GDELAYTIMER, 0x00000000 ); \
+ GAMMA_WRITE( GAMMA_COMMANDINTENABLE, 0x00000000 ); \
+ GAMMA_WRITE( GAMMA_GINTENABLE, 0x00000000 ); \
+} while (0)
+
+#endif /* __GAMMA_H__ */
diff --git a/linux/gamma_dma.c b/linux/gamma_dma.c
index 4854c56d..d3a9414d 100644
--- a/linux/gamma_dma.c
+++ b/linux/gamma_dma.c
@@ -11,11 +11,11 @@
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
- *
+ *
* The above copyright notice and this permission notice (including the next
* paragraph) shall be included in all copies or substantial portions of the
* Software.
- *
+ *
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
@@ -23,73 +23,38 @@
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
* DEALINGS IN THE SOFTWARE.
- *
+ *
* Authors:
* Rickard E. (Rik) Faith <faith@valinux.com>
*
*/
#define __NO_VERSION__
+#include "gamma.h"
#include "drmP.h"
#include "gamma_drv.h"
#include <linux/interrupt.h> /* For task queue support */
+#include <linux/delay.h>
-/* WARNING!!! MAGIC NUMBER!!! The number of regions already added to the
- kernel must be specified here. Currently, the number is 2. This must
- match the order the X server uses for instantiating register regions ,
- or must be passed in a new ioctl. */
-#define GAMMA_REG(reg) \
- (2 \
- + ((reg < 0x1000) \
- ? 0 \
- : ((reg < 0x10000) ? 1 : ((reg < 0x11000) ? 2 : 3))))
-
-#define GAMMA_OFF(reg) \
- ((reg < 0x1000) \
- ? reg \
- : ((reg < 0x10000) \
- ? (reg - 0x1000) \
- : ((reg < 0x11000) \
- ? (reg - 0x10000) \
- : (reg - 0x11000))))
-
-#define GAMMA_BASE(reg) ((unsigned long)dev->maplist[GAMMA_REG(reg)]->handle)
-#define GAMMA_ADDR(reg) (GAMMA_BASE(reg) + GAMMA_OFF(reg))
-#define GAMMA_DEREF(reg) *(__volatile__ int *)GAMMA_ADDR(reg)
-#define GAMMA_READ(reg) GAMMA_DEREF(reg)
-#define GAMMA_WRITE(reg,val) do { GAMMA_DEREF(reg) = val; } while (0)
-
-#define GAMMA_BROADCASTMASK 0x9378
-#define GAMMA_COMMANDINTENABLE 0x0c48
-#define GAMMA_DMAADDRESS 0x0028
-#define GAMMA_DMACOUNT 0x0030
-#define GAMMA_FILTERMODE 0x8c00
-#define GAMMA_GCOMMANDINTFLAGS 0x0c50
-#define GAMMA_GCOMMANDMODE 0x0c40
-#define GAMMA_GCOMMANDSTATUS 0x0c60
-#define GAMMA_GDELAYTIMER 0x0c38
-#define GAMMA_GDMACONTROL 0x0060
-#define GAMMA_GINTENABLE 0x0808
-#define GAMMA_GINTFLAGS 0x0810
-#define GAMMA_INFIFOSPACE 0x0018
-#define GAMMA_OUTFIFOWORDS 0x0020
-#define GAMMA_OUTPUTFIFO 0x2000
-#define GAMMA_SYNC 0x8c40
-#define GAMMA_SYNC_TAG 0x0188
-
static inline void gamma_dma_dispatch(drm_device_t *dev, unsigned long address,
unsigned long length)
{
+ drm_gamma_private_t *dev_priv =
+ (drm_gamma_private_t *)dev->dev_private;
+
GAMMA_WRITE(GAMMA_DMAADDRESS, virt_to_phys((void *)address));
while (GAMMA_READ(GAMMA_GCOMMANDSTATUS) != 4)
;
GAMMA_WRITE(GAMMA_DMACOUNT, length / 4);
}
-static inline void gamma_dma_quiescent_single(drm_device_t *dev)
+void gamma_dma_quiescent_single(drm_device_t *dev)
{
+ drm_gamma_private_t *dev_priv =
+ (drm_gamma_private_t *)dev->dev_private;
+
while (GAMMA_READ(GAMMA_DMACOUNT))
;
while (GAMMA_READ(GAMMA_INFIFOSPACE) < 3)
@@ -97,15 +62,18 @@ static inline void gamma_dma_quiescent_single(drm_device_t *dev)
GAMMA_WRITE(GAMMA_FILTERMODE, 1 << 10);
GAMMA_WRITE(GAMMA_SYNC, 0);
-
+
do {
while (!GAMMA_READ(GAMMA_OUTFIFOWORDS))
;
} while (GAMMA_READ(GAMMA_OUTPUTFIFO) != GAMMA_SYNC_TAG);
}
-static inline void gamma_dma_quiescent_dual(drm_device_t *dev)
+void gamma_dma_quiescent_dual(drm_device_t *dev)
{
+ drm_gamma_private_t *dev_priv =
+ (drm_gamma_private_t *)dev->dev_private;
+
while (GAMMA_READ(GAMMA_DMACOUNT))
;
while (GAMMA_READ(GAMMA_INFIFOSPACE) < 3)
@@ -115,13 +83,13 @@ static inline void gamma_dma_quiescent_dual(drm_device_t *dev)
GAMMA_WRITE(GAMMA_FILTERMODE, 1 << 10);
GAMMA_WRITE(GAMMA_SYNC, 0);
-
+
/* Read from first MX */
do {
while (!GAMMA_READ(GAMMA_OUTFIFOWORDS))
;
} while (GAMMA_READ(GAMMA_OUTPUTFIFO) != GAMMA_SYNC_TAG);
-
+
/* Read from second MX */
do {
while (!GAMMA_READ(GAMMA_OUTFIFOWORDS + 0x10000))
@@ -129,34 +97,39 @@ static inline void gamma_dma_quiescent_dual(drm_device_t *dev)
} while (GAMMA_READ(GAMMA_OUTPUTFIFO + 0x10000) != GAMMA_SYNC_TAG);
}
-static inline void gamma_dma_ready(drm_device_t *dev)
+void gamma_dma_ready(drm_device_t *dev)
{
+ drm_gamma_private_t *dev_priv =
+ (drm_gamma_private_t *)dev->dev_private;
+
while (GAMMA_READ(GAMMA_DMACOUNT))
;
}
static inline int gamma_dma_is_ready(drm_device_t *dev)
{
+ drm_gamma_private_t *dev_priv =
+ (drm_gamma_private_t *)dev->dev_private;
+
return !GAMMA_READ(GAMMA_DMACOUNT);
}
-static void gamma_dma_service(int irq, void *device, struct pt_regs *regs)
+void gamma_dma_service(int irq, void *device, struct pt_regs *regs)
{
- drm_device_t *dev = (drm_device_t *)device;
- drm_device_dma_t *dma = dev->dma;
-
- atomic_inc(&dev->total_irq);
+ drm_device_t *dev = (drm_device_t *)device;
+ drm_device_dma_t *dma = dev->dma;
+ drm_gamma_private_t *dev_priv =
+ (drm_gamma_private_t *)dev->dev_private;
+
+ atomic_inc(&dev->counts[6]); /* _DRM_STAT_IRQ */
GAMMA_WRITE(GAMMA_GDELAYTIMER, 0xc350/2); /* 0x05S */
GAMMA_WRITE(GAMMA_GCOMMANDINTFLAGS, 8);
GAMMA_WRITE(GAMMA_GINTFLAGS, 0x2001);
if (gamma_dma_is_ready(dev)) {
/* Free previous buffer */
- if (test_and_set_bit(0, &dev->dma_flag)) {
- atomic_inc(&dma->total_missed_free);
- return;
- }
+ if (test_and_set_bit(0, &dev->dma_flag)) return;
if (dma->this_buffer) {
- drm_free_buffer(dev, dma->this_buffer);
+ gamma_free_buffer(dev, dma->this_buffer);
dma->this_buffer = NULL;
}
clear_bit(0, &dev->dma_flag);
@@ -179,11 +152,8 @@ static int gamma_do_dma(drm_device_t *dev, int locked)
cycles_t dma_start, dma_stop;
#endif
- if (test_and_set_bit(0, &dev->dma_flag)) {
- atomic_inc(&dma->total_missed_dma);
- return -EBUSY;
- }
-
+ if (test_and_set_bit(0, &dev->dma_flag)) return -EBUSY;
+
#if DRM_DMA_HISTOGRAM
dma_start = get_cycles();
#endif
@@ -202,20 +172,20 @@ static int gamma_do_dma(drm_device_t *dev, int locked)
buf->context, buf->idx, length);
if (buf->list == DRM_LIST_RECLAIM) {
- drm_clear_next_buffer(dev);
- drm_free_buffer(dev, buf);
+ gamma_clear_next_buffer(dev);
+ gamma_free_buffer(dev, buf);
clear_bit(0, &dev->dma_flag);
return -EINVAL;
}
if (!length) {
DRM_ERROR("0 length buffer\n");
- drm_clear_next_buffer(dev);
- drm_free_buffer(dev, buf);
+ gamma_clear_next_buffer(dev);
+ gamma_free_buffer(dev, buf);
clear_bit(0, &dev->dma_flag);
return 0;
}
-
+
if (!gamma_dma_is_ready(dev)) {
clear_bit(0, &dev->dma_flag);
return -EBUSY;
@@ -228,9 +198,8 @@ static int gamma_do_dma(drm_device_t *dev, int locked)
buf->idx, buf->pid);
}
} else {
- if (!locked && !drm_lock_take(&dev->lock.hw_lock->lock,
+ if (!locked && !gamma_lock_take(&dev->lock.hw_lock->lock,
DRM_KERNEL_CONTEXT)) {
- atomic_inc(&dma->total_missed_lock);
clear_bit(0, &dev->dma_flag);
return -EBUSY;
}
@@ -240,13 +209,14 @@ static int gamma_do_dma(drm_device_t *dev, int locked)
&& !(dev->queuelist[buf->context]->flags
& _DRM_CONTEXT_PRESERVED)) {
/* PRE: dev->last_context != buf->context */
- if (drm_context_switch(dev, dev->last_context, buf->context)) {
- drm_clear_next_buffer(dev);
- drm_free_buffer(dev, buf);
+ if (DRM(context_switch)(dev, dev->last_context,
+ buf->context)) {
+ DRM(clear_next_buffer)(dev);
+ DRM(free_buffer)(dev, buf);
}
retcode = -EBUSY;
goto cleanup;
-
+
/* POST: we will wait for the context
switch and will dispatch on a later call
when dev->last_context == buf->context.
@@ -254,7 +224,7 @@ static int gamma_do_dma(drm_device_t *dev, int locked)
TIME! */
}
- drm_clear_next_buffer(dev);
+ gamma_clear_next_buffer(dev);
buf->pending = 1;
buf->waiting = 0;
buf->list = DRM_LIST_PEND;
@@ -263,14 +233,14 @@ static int gamma_do_dma(drm_device_t *dev, int locked)
#endif
gamma_dma_dispatch(dev, address, length);
- drm_free_buffer(dev, dma->this_buffer);
+ gamma_free_buffer(dev, dma->this_buffer);
dma->this_buffer = buf;
- atomic_add(length, &dma->total_bytes);
- atomic_inc(&dma->total_dmas);
+ atomic_inc(&dev->counts[7]); /* _DRM_STAT_DMA */
+ atomic_add(length, &dev->counts[8]); /* _DRM_STAT_PRIMARY */
if (!buf->while_locked && !dev->context_flag && !locked) {
- if (drm_lock_free(dev, &dev->lock.hw_lock->lock,
+ if (gamma_lock_free(dev, &dev->lock.hw_lock->lock,
DRM_KERNEL_CONTEXT)) {
DRM_ERROR("\n");
}
@@ -281,18 +251,18 @@ cleanup:
#if DRM_DMA_HISTOGRAM
dma_stop = get_cycles();
- atomic_inc(&dev->histo.dma[drm_histogram_slot(dma_stop - dma_start)]);
+ atomic_inc(&dev->histo.dma[gamma_histogram_slot(dma_stop - dma_start)]);
#endif
return retcode;
}
-static void gamma_dma_schedule_timer_wrapper(unsigned long dev)
+static void gamma_dma_timer_bh(unsigned long dev)
{
gamma_dma_schedule((drm_device_t *)dev, 0);
}
-static void gamma_dma_schedule_tq_wrapper(void *dev)
+void gamma_dma_immediate_bh(void *dev)
{
gamma_dma_schedule(dev, 0);
}
@@ -313,10 +283,10 @@ int gamma_dma_schedule(drm_device_t *dev, int locked)
if (test_and_set_bit(0, &dev->interrupt_flag)) {
/* Not reentrant */
- atomic_inc(&dma->total_missed_sched);
+ atomic_inc(&dev->counts[10]); /* _DRM_STAT_MISSED */
return -EBUSY;
}
- missed = atomic_read(&dma->total_missed_sched);
+ missed = atomic_read(&dev->counts[10]);
#if DRM_DMA_HISTOGRAM
schedule_start = get_cycles();
@@ -333,23 +303,18 @@ again:
because the lock could not be obtained
or the DMA engine wasn't ready. Try
again. */
- atomic_inc(&dma->total_tried);
- if (!(retcode = gamma_do_dma(dev, locked))) {
- atomic_inc(&dma->total_hit);
- ++processed;
- }
+ if (!(retcode = gamma_do_dma(dev, locked))) ++processed;
} else {
do {
- next = drm_select_queue(dev,
- gamma_dma_schedule_timer_wrapper);
+ next = gamma_select_queue(dev, gamma_dma_timer_bh);
if (next >= 0) {
q = dev->queuelist[next];
- buf = drm_waitlist_get(&q->waitlist);
+ buf = gamma_waitlist_get(&q->waitlist);
dma->next_buffer = buf;
dma->next_queue = q;
if (buf && buf->list == DRM_LIST_RECLAIM) {
- drm_clear_next_buffer(dev);
- drm_free_buffer(dev, buf);
+ gamma_clear_next_buffer(dev);
+ gamma_free_buffer(dev, buf);
}
}
} while (next >= 0 && !dma->next_buffer);
@@ -361,21 +326,19 @@ again:
}
if (--expire) {
- if (missed != atomic_read(&dma->total_missed_sched)) {
- atomic_inc(&dma->total_lost);
+ if (missed != atomic_read(&dev->counts[10])) {
if (gamma_dma_is_ready(dev)) goto again;
}
if (processed && gamma_dma_is_ready(dev)) {
- atomic_inc(&dma->total_lost);
processed = 0;
goto again;
}
}
-
+
clear_bit(0, &dev->interrupt_flag);
-
+
#if DRM_DMA_HISTOGRAM
- atomic_inc(&dev->histo.schedule[drm_histogram_slot(get_cycles()
+ atomic_inc(&dev->histo.schedule[gamma_histogram_slot(get_cycles()
- schedule_start)]);
#endif
return retcode;
@@ -400,7 +363,7 @@ static int gamma_dma_priority(drm_device_t *dev, drm_dma_t *d)
if (signal_pending(current)) return -EINTR;
}
if (!(d->flags & _DRM_DMA_WHILE_LOCKED)) {
- while (!drm_lock_take(&dev->lock.hw_lock->lock,
+ while (!gamma_lock_take(&dev->lock.hw_lock->lock,
DRM_KERNEL_CONTEXT)) {
schedule();
if (signal_pending(current)) {
@@ -410,7 +373,6 @@ static int gamma_dma_priority(drm_device_t *dev, drm_dma_t *d)
}
++must_free;
}
- atomic_inc(&dma->total_prio);
for (i = 0; i < d->send_count; i++) {
idx = d->send_indices[i];
@@ -461,15 +423,15 @@ static int gamma_dma_priority(drm_device_t *dev, drm_dma_t *d)
goto cleanup;
}
buf->pending = 1;
-
+
if (dev->last_context != buf->context
&& !(dev->queuelist[buf->context]->flags
& _DRM_CONTEXT_PRESERVED)) {
add_wait_queue(&dev->context_wait, &entry);
current->state = TASK_INTERRUPTIBLE;
/* PRE: dev->last_context != buf->context */
- drm_context_switch(dev, dev->last_context,
- buf->context);
+ DRM(context_switch)(dev, dev->last_context,
+ buf->context);
/* POST: we will wait for the context
switch and will dispatch on a later call
when dev->last_context == buf->context.
@@ -494,11 +456,11 @@ static int gamma_dma_priority(drm_device_t *dev, drm_dma_t *d)
buf->time_dispatched = buf->time_queued;
#endif
gamma_dma_dispatch(dev, address, length);
- atomic_add(length, &dma->total_bytes);
- atomic_inc(&dma->total_dmas);
-
+ atomic_inc(&dev->counts[9]); /* _DRM_STAT_SPECIAL */
+ atomic_add(length, &dev->counts[8]); /* _DRM_STAT_PRIMARY */
+
if (last_buf) {
- drm_free_buffer(dev, last_buf);
+ gamma_free_buffer(dev, last_buf);
}
last_buf = buf;
}
@@ -507,11 +469,11 @@ static int gamma_dma_priority(drm_device_t *dev, drm_dma_t *d)
cleanup:
if (last_buf) {
gamma_dma_ready(dev);
- drm_free_buffer(dev, last_buf);
+ gamma_free_buffer(dev, last_buf);
}
-
+
if (must_free && !dev->context_flag) {
- if (drm_lock_free(dev, &dev->lock.hw_lock->lock,
+ if (gamma_lock_free(dev, &dev->lock.hw_lock->lock,
DRM_KERNEL_CONTEXT)) {
DRM_ERROR("\n");
}
@@ -531,15 +493,15 @@ static int gamma_dma_send_buffers(drm_device_t *dev, drm_dma_t *d)
last_buf = dma->buflist[d->send_indices[d->send_count-1]];
add_wait_queue(&last_buf->dma_wait, &entry);
}
-
- if ((retcode = drm_dma_enqueue(dev, d))) {
+
+ if ((retcode = gamma_dma_enqueue(dev, d))) {
if (d->flags & _DRM_DMA_BLOCK)
remove_wait_queue(&last_buf->dma_wait, &entry);
return retcode;
}
-
+
gamma_dma_schedule(dev, 0);
-
+
if (d->flags & _DRM_DMA_BLOCK) {
DRM_DEBUG("%d waiting\n", current->pid);
for (;;) {
@@ -558,7 +520,7 @@ static int gamma_dma_send_buffers(drm_device_t *dev, drm_dma_t *d)
if (!retcode
|| (last_buf->list==DRM_LIST_PEND && !last_buf->pending)) {
if (!waitqueue_active(&last_buf->dma_wait)) {
- drm_free_buffer(dev, last_buf);
+ gamma_free_buffer(dev, last_buf);
}
}
if (retcode) {
@@ -585,21 +547,19 @@ int gamma_dma(struct inode *inode, struct file *filp, unsigned int cmd,
int retcode = 0;
drm_dma_t d;
+#if 0
+ LOCK_TEST_WITH_RETURN( dev );
+#endif
+
if (copy_from_user(&d, (drm_dma_t *)arg, sizeof(d)))
return -EFAULT;
- DRM_DEBUG("%d %d: %d send, %d req\n",
- current->pid, d.context, d.send_count, d.request_count);
- if (d.context == DRM_KERNEL_CONTEXT || d.context >= dev->queue_slots) {
- DRM_ERROR("Process %d using context %d\n",
- current->pid, d.context);
- return -EINVAL;
- }
if (d.send_count < 0 || d.send_count > dma->buf_count) {
DRM_ERROR("Process %d trying to send %d buffers (of %d max)\n",
current->pid, d.send_count, dma->buf_count);
return -EINVAL;
}
+
if (d.request_count < 0 || d.request_count > dma->buf_count) {
DRM_ERROR("Process %d trying to get %d buffers (of %d max)\n",
current->pid, d.request_count, dma->buf_count);
@@ -609,14 +569,14 @@ int gamma_dma(struct inode *inode, struct file *filp, unsigned int cmd,
if (d.send_count) {
if (d.flags & _DRM_DMA_PRIORITY)
retcode = gamma_dma_priority(dev, &d);
- else
+ else
retcode = gamma_dma_send_buffers(dev, &d);
}
d.granted_count = 0;
if (!retcode && d.request_count) {
- retcode = drm_dma_get_buffers(dev, &d);
+ retcode = gamma_dma_get_buffers(dev, &d);
}
DRM_DEBUG("%d returning, granted = %d\n",
@@ -626,211 +586,3 @@ int gamma_dma(struct inode *inode, struct file *filp, unsigned int cmd,
return retcode;
}
-
-int gamma_irq_install(drm_device_t *dev, int irq)
-{
- int retcode;
-
- if (!irq) return -EINVAL;
-
- down(&dev->struct_sem);
- if (dev->irq) {
- up(&dev->struct_sem);
- return -EBUSY;
- }
- dev->irq = irq;
- up(&dev->struct_sem);
-
- DRM_DEBUG("%d\n", irq);
-
- dev->context_flag = 0;
- dev->interrupt_flag = 0;
- dev->dma_flag = 0;
-
- dev->dma->next_buffer = NULL;
- dev->dma->next_queue = NULL;
- dev->dma->this_buffer = NULL;
-
- INIT_LIST_HEAD(&dev->tq.list);
- dev->tq.sync = 0;
- dev->tq.routine = gamma_dma_schedule_tq_wrapper;
- dev->tq.data = dev;
-
-
- /* Before installing handler */
- GAMMA_WRITE(GAMMA_GCOMMANDMODE, 0);
- GAMMA_WRITE(GAMMA_GDMACONTROL, 0);
-
- /* Install handler */
- if ((retcode = request_irq(dev->irq,
- gamma_dma_service,
- 0,
- dev->devname,
- dev))) {
- down(&dev->struct_sem);
- dev->irq = 0;
- up(&dev->struct_sem);
- return retcode;
- }
-
- /* After installing handler */
- GAMMA_WRITE(GAMMA_GINTENABLE, 0x2001);
- GAMMA_WRITE(GAMMA_COMMANDINTENABLE, 0x0008);
- GAMMA_WRITE(GAMMA_GDELAYTIMER, 0x39090);
-
- return 0;
-}
-
-int gamma_irq_uninstall(drm_device_t *dev)
-{
- int irq;
-
- down(&dev->struct_sem);
- irq = dev->irq;
- dev->irq = 0;
- up(&dev->struct_sem);
-
- if (!irq) return -EINVAL;
-
- DRM_DEBUG("%d\n", irq);
-
- GAMMA_WRITE(GAMMA_GDELAYTIMER, 0);
- GAMMA_WRITE(GAMMA_COMMANDINTENABLE, 0);
- GAMMA_WRITE(GAMMA_GINTENABLE, 0);
- free_irq(irq, dev);
-
- return 0;
-}
-
-
-int gamma_control(struct inode *inode, struct file *filp, unsigned int cmd,
- unsigned long arg)
-{
- drm_file_t *priv = filp->private_data;
- drm_device_t *dev = priv->dev;
- drm_control_t ctl;
- int retcode;
-
- if (copy_from_user(&ctl, (drm_control_t *)arg, sizeof(ctl)))
- return -EFAULT;
-
- switch (ctl.func) {
- case DRM_INST_HANDLER:
- if ((retcode = gamma_irq_install(dev, ctl.irq)))
- return retcode;
- break;
- case DRM_UNINST_HANDLER:
- if ((retcode = gamma_irq_uninstall(dev)))
- return retcode;
- break;
- default:
- return -EINVAL;
- }
- return 0;
-}
-
-int gamma_lock(struct inode *inode, struct file *filp, unsigned int cmd,
- unsigned long arg)
-{
- drm_file_t *priv = filp->private_data;
- drm_device_t *dev = priv->dev;
- DECLARE_WAITQUEUE(entry, current);
- int ret = 0;
- drm_lock_t lock;
- drm_queue_t *q;
-#if DRM_DMA_HISTOGRAM
- cycles_t start;
-
- dev->lck_start = start = get_cycles();
-#endif
-
- if (copy_from_user(&lock, (drm_lock_t *)arg, sizeof(lock)))
- return -EFAULT;
-
- if (lock.context == DRM_KERNEL_CONTEXT) {
- DRM_ERROR("Process %d using kernel context %d\n",
- current->pid, lock.context);
- return -EINVAL;
- }
-
- DRM_DEBUG("%d (pid %d) requests lock (0x%08x), flags = 0x%08x\n",
- lock.context, current->pid, dev->lock.hw_lock->lock,
- lock.flags);
-
- if (lock.context < 0 || lock.context >= dev->queue_count)
- return -EINVAL;
- q = dev->queuelist[lock.context];
-
- ret = drm_flush_block_and_flush(dev, lock.context, lock.flags);
-
- if (!ret) {
- if (_DRM_LOCKING_CONTEXT(dev->lock.hw_lock->lock)
- != lock.context) {
- long j = jiffies - dev->lock.lock_time;
-
- if (j > 0 && j <= DRM_LOCK_SLICE) {
- /* Can't take lock if we just had it and
- there is contention. */
- current->state = TASK_INTERRUPTIBLE;
- schedule_timeout(j);
- }
- }
- add_wait_queue(&dev->lock.lock_queue, &entry);
- for (;;) {
- current->state = TASK_INTERRUPTIBLE;
- if (!dev->lock.hw_lock) {
- /* Device has been unregistered */
- ret = -EINTR;
- break;
- }
- if (drm_lock_take(&dev->lock.hw_lock->lock,
- lock.context)) {
- dev->lock.pid = current->pid;
- dev->lock.lock_time = jiffies;
- atomic_inc(&dev->total_locks);
- atomic_inc(&q->total_locks);
- break; /* Got lock */
- }
-
- /* Contention */
- atomic_inc(&dev->total_sleeps);
- schedule();
- if (signal_pending(current)) {
- ret = -ERESTARTSYS;
- break;
- }
- }
- current->state = TASK_RUNNING;
- remove_wait_queue(&dev->lock.lock_queue, &entry);
- }
-
- drm_flush_unblock(dev, lock.context, lock.flags); /* cleanup phase */
-
- if (!ret) {
- sigemptyset(&dev->sigmask);
- sigaddset(&dev->sigmask, SIGSTOP);
- sigaddset(&dev->sigmask, SIGTSTP);
- sigaddset(&dev->sigmask, SIGTTIN);
- sigaddset(&dev->sigmask, SIGTTOU);
- dev->sigdata.context = lock.context;
- dev->sigdata.lock = dev->lock.hw_lock;
- block_all_signals(drm_notifier, &dev->sigdata, &dev->sigmask);
-
- if (lock.flags & _DRM_LOCK_READY)
- gamma_dma_ready(dev);
- if (lock.flags & _DRM_LOCK_QUIESCENT) {
- if (gamma_found() == 1) {
- gamma_dma_quiescent_single(dev);
- } else {
- gamma_dma_quiescent_dual(dev);
- }
- }
- }
- DRM_DEBUG("%d %s\n", lock.context, ret ? "interrupted" : "has lock");
-
-#if DRM_DMA_HISTOGRAM
- atomic_inc(&dev->histo.lacq[drm_histogram_slot(get_cycles() - start)]);
-#endif
-
- return ret;
-}
diff --git a/linux/gamma_drv.c b/linux/gamma_drv.c
index a17bc1a9..98916bc5 100644
--- a/linux/gamma_drv.c
+++ b/linux/gamma_drv.c
@@ -26,546 +26,48 @@
*
* Authors:
* Rickard E. (Rik) Faith <faith@valinux.com>
- *
+ * Gareth Hughes <gareth@valinux.com>
*/
#include <linux/config.h>
+#include "gamma.h"
#include "drmP.h"
#include "gamma_drv.h"
-#ifndef PCI_DEVICE_ID_3DLABS_GAMMA
-#define PCI_DEVICE_ID_3DLABS_GAMMA 0x0008
-#endif
-#ifndef PCI_DEVICE_ID_3DLABS_MX
-#define PCI_DEVICE_ID_3DLABS_MX 0x0006
-#endif
-
-#define GAMMA_NAME "gamma"
-#define GAMMA_DESC "3dlabs GMX 2000"
-#define GAMMA_DATE "20000910"
-#define GAMMA_MAJOR 1
-#define GAMMA_MINOR 0
-#define GAMMA_PATCHLEVEL 0
-
-static drm_device_t gamma_device;
-
-static struct file_operations gamma_fops = {
-#if LINUX_VERSION_CODE >= 0x020400
- /* This started being used during 2.4.0-test */
- owner: THIS_MODULE,
-#endif
- open: gamma_open,
- flush: drm_flush,
- release: gamma_release,
- ioctl: gamma_ioctl,
- mmap: drm_mmap,
- read: drm_read,
- fasync: drm_fasync,
- poll: drm_poll,
-};
-
-static struct miscdevice gamma_misc = {
- minor: MISC_DYNAMIC_MINOR,
- name: GAMMA_NAME,
- fops: &gamma_fops,
-};
-
-static drm_ioctl_desc_t gamma_ioctls[] = {
- [DRM_IOCTL_NR(DRM_IOCTL_VERSION)] = { gamma_version, 0, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_GET_UNIQUE)] = { drm_getunique, 0, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_GET_MAGIC)] = { drm_getmagic, 0, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_IRQ_BUSID)] = { drm_irq_busid, 0, 1 },
-
- [DRM_IOCTL_NR(DRM_IOCTL_SET_UNIQUE)] = { drm_setunique, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_BLOCK)] = { drm_block, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_UNBLOCK)] = { drm_unblock, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_CONTROL)] = { gamma_control, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_AUTH_MAGIC)] = { drm_authmagic, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_ADD_MAP)] = { drm_addmap, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_ADD_BUFS)] = { drm_addbufs, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_MARK_BUFS)] = { drm_markbufs, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_INFO_BUFS)] = { drm_infobufs, 1, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_MAP_BUFS)] = { drm_mapbufs, 1, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_FREE_BUFS)] = { drm_freebufs, 1, 0 },
-
- [DRM_IOCTL_NR(DRM_IOCTL_ADD_CTX)] = { drm_addctx, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_RM_CTX)] = { drm_rmctx, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_MOD_CTX)] = { drm_modctx, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_GET_CTX)] = { drm_getctx, 1, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_SWITCH_CTX)] = { drm_switchctx, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_NEW_CTX)] = { drm_newctx, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_RES_CTX)] = { drm_resctx, 1, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_ADD_DRAW)] = { drm_adddraw, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_RM_DRAW)] = { drm_rmdraw, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_DMA)] = { gamma_dma, 1, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_LOCK)] = { gamma_lock, 1, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_UNLOCK)] = { gamma_unlock, 1, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_FINISH)] = { drm_finish, 1, 0 },
-};
-#define GAMMA_IOCTL_COUNT DRM_ARRAY_SIZE(gamma_ioctls)
-
-#ifdef MODULE
-static char *gamma = NULL;
-#endif
-static int devices = 0;
-
-MODULE_AUTHOR("VA Linux Systems, Inc.");
-MODULE_DESCRIPTION("3dlabs GMX 2000");
-MODULE_PARM(gamma, "s");
-MODULE_PARM(devices, "i");
-MODULE_PARM_DESC(devices,
- "devices=x, where x is the number of MX chips on card\n");
-#ifndef MODULE
-/* gamma_options is called by the kernel to parse command-line options
- * passed via the boot-loader (e.g., LILO). It calls the insmod option
- * routine, drm_parse_options.
- */
-
-
-static int __init gamma_options(char *str)
-{
- drm_parse_options(str);
- return 1;
-}
-
-__setup("gamma=", gamma_options);
-#endif
-
-static int gamma_setup(drm_device_t *dev)
-{
- int i;
-
- atomic_set(&dev->ioctl_count, 0);
- atomic_set(&dev->vma_count, 0);
- dev->buf_use = 0;
- atomic_set(&dev->buf_alloc, 0);
-
- drm_dma_setup(dev);
-
- atomic_set(&dev->total_open, 0);
- atomic_set(&dev->total_close, 0);
- atomic_set(&dev->total_ioctl, 0);
- atomic_set(&dev->total_irq, 0);
- atomic_set(&dev->total_ctx, 0);
- atomic_set(&dev->total_locks, 0);
- atomic_set(&dev->total_unlocks, 0);
- atomic_set(&dev->total_contends, 0);
- atomic_set(&dev->total_sleeps, 0);
-
- for (i = 0; i < DRM_HASH_SIZE; i++) {
- dev->magiclist[i].head = NULL;
- dev->magiclist[i].tail = NULL;
- }
- dev->maplist = NULL;
- dev->map_count = 0;
- dev->vmalist = NULL;
- dev->lock.hw_lock = NULL;
- init_waitqueue_head(&dev->lock.lock_queue);
- dev->queue_count = 0;
- dev->queue_reserved = 0;
- dev->queue_slots = 0;
- dev->queuelist = NULL;
- dev->irq = 0;
- dev->context_flag = 0;
- dev->interrupt_flag = 0;
- dev->dma_flag = 0;
- dev->last_context = 0;
- dev->last_switch = 0;
- dev->last_checked = 0;
- init_timer(&dev->timer);
- init_waitqueue_head(&dev->context_wait);
-#if DRM_DMA_HISTO
- memset(&dev->histo, 0, sizeof(dev->histo));
-#endif
- dev->ctx_start = 0;
- dev->lck_start = 0;
-
- dev->buf_rp = dev->buf;
- dev->buf_wp = dev->buf;
- dev->buf_end = dev->buf + DRM_BSZ;
- dev->buf_async = NULL;
- init_waitqueue_head(&dev->buf_readers);
- init_waitqueue_head(&dev->buf_writers);
-
- DRM_DEBUG("\n");
-
- /* The kernel's context could be created here, but is now created
- in drm_dma_enqueue. This is more resource-efficient for
- hardware that does not do DMA, but may mean that
- drm_select_queue fails between the time the interrupt is
- initialized and the time the queues are initialized. */
-
- return 0;
-}
-
-
-static int gamma_takedown(drm_device_t *dev)
-{
- int i;
- drm_magic_entry_t *pt, *next;
- drm_map_t *map;
- drm_vma_entry_t *vma, *vma_next;
-
- DRM_DEBUG("\n");
-
- if (dev->irq) gamma_irq_uninstall(dev);
-
- down(&dev->struct_sem);
- del_timer(&dev->timer);
-
- if (dev->devname) {
- drm_free(dev->devname, strlen(dev->devname)+1, DRM_MEM_DRIVER);
- dev->devname = NULL;
- }
-
- if (dev->unique) {
- drm_free(dev->unique, strlen(dev->unique)+1, DRM_MEM_DRIVER);
- dev->unique = NULL;
- dev->unique_len = 0;
- }
- /* Clear pid list */
- for (i = 0; i < DRM_HASH_SIZE; i++) {
- for (pt = dev->magiclist[i].head; pt; pt = next) {
- next = pt->next;
- drm_free(pt, sizeof(*pt), DRM_MEM_MAGIC);
- }
- dev->magiclist[i].head = dev->magiclist[i].tail = NULL;
- }
-
- /* Clear vma list (only built for debugging) */
- if (dev->vmalist) {
- for (vma = dev->vmalist; vma; vma = vma_next) {
- vma_next = vma->next;
- drm_free(vma, sizeof(*vma), DRM_MEM_VMAS);
- }
- dev->vmalist = NULL;
- }
-
- /* Clear map area and mtrr information */
- if (dev->maplist) {
- for (i = 0; i < dev->map_count; i++) {
- map = dev->maplist[i];
- switch (map->type) {
- case _DRM_REGISTERS:
- case _DRM_FRAME_BUFFER:
-#ifdef CONFIG_MTRR
- if (map->mtrr >= 0) {
- int retcode;
- retcode = mtrr_del(map->mtrr,
- map->offset,
- map->size);
- DRM_DEBUG("mtrr_del = %d\n", retcode);
- }
-#endif
- drm_ioremapfree(map->handle, map->size);
- break;
- case _DRM_SHM:
- drm_free_pages((unsigned long)map->handle,
- drm_order(map->size)
- - PAGE_SHIFT,
- DRM_MEM_SAREA);
- break;
- case _DRM_AGP:
- /* Do nothing here, because this is all
- handled in the AGP/GART driver. */
- break;
- }
- drm_free(map, sizeof(*map), DRM_MEM_MAPS);
- }
- drm_free(dev->maplist,
- dev->map_count * sizeof(*dev->maplist),
- DRM_MEM_MAPS);
- dev->maplist = NULL;
- dev->map_count = 0;
- }
-
- if (dev->queuelist) {
- for (i = 0; i < dev->queue_count; i++) {
- drm_waitlist_destroy(&dev->queuelist[i]->waitlist);
- if (dev->queuelist[i]) {
- drm_free(dev->queuelist[i],
- sizeof(*dev->queuelist[0]),
- DRM_MEM_QUEUES);
- dev->queuelist[i] = NULL;
- }
- }
- drm_free(dev->queuelist,
- dev->queue_slots * sizeof(*dev->queuelist),
- DRM_MEM_QUEUES);
- dev->queuelist = NULL;
- }
-
- drm_dma_takedown(dev);
-
- dev->queue_count = 0;
- if (dev->lock.hw_lock) {
- dev->lock.hw_lock = NULL; /* SHM removed */
- dev->lock.pid = 0;
- wake_up_interruptible(&dev->lock.lock_queue);
- }
- up(&dev->struct_sem);
-
- return 0;
-}
-
-int gamma_found(void)
-{
- return devices;
-}
-
-int gamma_find_devices(void)
-{
- struct pci_dev *d = NULL, *one = NULL, *two = NULL;
-
- d = pci_find_device(PCI_VENDOR_ID_3DLABS,PCI_DEVICE_ID_3DLABS_GAMMA,d);
- if (!d) return 0;
-
- one = pci_find_device(PCI_VENDOR_ID_3DLABS,PCI_DEVICE_ID_3DLABS_MX,d);
- if (!one) return 0;
-
- /* Make sure it's on the same card, if not - no MX's found */
- if (PCI_SLOT(d->devfn) != PCI_SLOT(one->devfn)) return 0;
-
- two = pci_find_device(PCI_VENDOR_ID_3DLABS,PCI_DEVICE_ID_3DLABS_MX,one);
- if (!two) return 1;
-
- /* Make sure it's on the same card, if not - only 1 MX found */
- if (PCI_SLOT(d->devfn) != PCI_SLOT(two->devfn)) return 1;
-
- /* Two MX's found - we don't currently support more than 2 */
- return 2;
-}
-
-/* gamma_init is called via init_module at module load time, or via
- * linux/init/main.c (this is not currently supported). */
-
-static int __init gamma_init(void)
-{
- int retcode;
- drm_device_t *dev = &gamma_device;
-
- DRM_DEBUG("\n");
-
- memset((void *)dev, 0, sizeof(*dev));
- dev->count_lock = SPIN_LOCK_UNLOCKED;
- sema_init(&dev->struct_sem, 1);
-
-#ifdef MODULE
- drm_parse_options(gamma);
-#endif
- devices = gamma_find_devices();
- if (devices == 0) return -1;
-
- if ((retcode = misc_register(&gamma_misc))) {
- DRM_ERROR("Cannot register \"%s\"\n", GAMMA_NAME);
- return retcode;
- }
- dev->device = MKDEV(MISC_MAJOR, gamma_misc.minor);
- dev->name = GAMMA_NAME;
-
- drm_mem_init();
- drm_proc_init(dev);
-
- DRM_INFO("Initialized %s %d.%d.%d %s on minor %d with %d MX devices\n",
- GAMMA_NAME,
- GAMMA_MAJOR,
- GAMMA_MINOR,
- GAMMA_PATCHLEVEL,
- GAMMA_DATE,
- gamma_misc.minor,
- devices);
-
- return 0;
-}
-
-/* gamma_cleanup is called via cleanup_module at module unload time. */
-
-static void __exit gamma_cleanup(void)
-{
- drm_device_t *dev = &gamma_device;
-
- DRM_DEBUG("\n");
-
- drm_proc_cleanup();
- if (misc_deregister(&gamma_misc)) {
- DRM_ERROR("Cannot unload module\n");
- } else {
- DRM_INFO("Module unloaded\n");
- }
- gamma_takedown(dev);
-}
-
-module_init(gamma_init);
-module_exit(gamma_cleanup);
-
-
-int gamma_version(struct inode *inode, struct file *filp, unsigned int cmd,
- unsigned long arg)
-{
- drm_version_t version;
- int len;
-
- if (copy_from_user(&version,
- (drm_version_t *)arg,
- sizeof(version)))
- return -EFAULT;
-
-#define DRM_COPY(name,value) \
- len = strlen(value); \
- if (len > name##_len) len = name##_len; \
- name##_len = strlen(value); \
- if (len && name) { \
- if (copy_to_user(name, value, len)) \
- return -EFAULT; \
- }
-
- version.version_major = GAMMA_MAJOR;
- version.version_minor = GAMMA_MINOR;
- version.version_patchlevel = GAMMA_PATCHLEVEL;
-
- DRM_COPY(version.name, GAMMA_NAME);
- DRM_COPY(version.date, GAMMA_DATE);
- DRM_COPY(version.desc, GAMMA_DESC);
-
- if (copy_to_user((drm_version_t *)arg,
- &version,
- sizeof(version)))
- return -EFAULT;
- return 0;
-}
-
-int gamma_open(struct inode *inode, struct file *filp)
-{
- drm_device_t *dev = &gamma_device;
- int retcode = 0;
-
- DRM_DEBUG("open_count = %d\n", dev->open_count);
- if (!(retcode = drm_open_helper(inode, filp, dev))) {
-#if LINUX_VERSION_CODE < 0x020333
- MOD_INC_USE_COUNT; /* Needed before Linux 2.3.51 */
-#endif
- atomic_inc(&dev->total_open);
- spin_lock(&dev->count_lock);
- if (!dev->open_count++) {
- spin_unlock(&dev->count_lock);
- return gamma_setup(dev);
- }
- spin_unlock(&dev->count_lock);
- }
- return retcode;
-}
-
-int gamma_release(struct inode *inode, struct file *filp)
-{
- drm_file_t *priv = filp->private_data;
- drm_device_t *dev;
- int retcode = 0;
-
- lock_kernel();
- dev = priv->dev;
-
- DRM_DEBUG("open_count = %d\n", dev->open_count);
- if (!(retcode = drm_release(inode, filp))) {
-#if LINUX_VERSION_CODE < 0x020333
- MOD_DEC_USE_COUNT; /* Needed before Linux 2.3.51 */
-#endif
- atomic_inc(&dev->total_close);
- spin_lock(&dev->count_lock);
- if (!--dev->open_count) {
- if (atomic_read(&dev->ioctl_count) || dev->blocked) {
- DRM_ERROR("Device busy: %d %d\n",
- atomic_read(&dev->ioctl_count),
- dev->blocked);
- spin_unlock(&dev->count_lock);
- unlock_kernel();
- return -EBUSY;
- }
- spin_unlock(&dev->count_lock);
- unlock_kernel();
- return gamma_takedown(dev);
- }
- spin_unlock(&dev->count_lock);
- }
- unlock_kernel();
- return retcode;
-}
-
-/* drm_ioctl is called whenever a process performs an ioctl on /dev/drm. */
-
-int gamma_ioctl(struct inode *inode, struct file *filp, unsigned int cmd,
- unsigned long arg)
-{
- int nr = DRM_IOCTL_NR(cmd);
- drm_file_t *priv = filp->private_data;
- drm_device_t *dev = priv->dev;
- int retcode = 0;
- drm_ioctl_desc_t *ioctl;
- drm_ioctl_t *func;
-
- atomic_inc(&dev->ioctl_count);
- atomic_inc(&dev->total_ioctl);
- ++priv->ioctl_count;
-
- DRM_DEBUG("pid = %d, cmd = 0x%02x, nr = 0x%02x, dev 0x%x, auth = %d\n",
- current->pid, cmd, nr, dev->device, priv->authenticated);
-
- if (nr >= GAMMA_IOCTL_COUNT) {
- retcode = -EINVAL;
- } else {
- ioctl = &gamma_ioctls[nr];
- func = ioctl->func;
-
- if (!func) {
- DRM_DEBUG("no function\n");
- retcode = -EINVAL;
- } else if ((ioctl->root_only && !capable(CAP_SYS_ADMIN))
- || (ioctl->auth_needed && !priv->authenticated)) {
- retcode = -EACCES;
- } else {
- retcode = (func)(inode, filp, cmd, arg);
- }
- }
-
- atomic_dec(&dev->ioctl_count);
- return retcode;
-}
-
-
-int gamma_unlock(struct inode *inode, struct file *filp, unsigned int cmd,
- unsigned long arg)
-{
- drm_file_t *priv = filp->private_data;
- drm_device_t *dev = priv->dev;
- drm_lock_t lock;
-
- if (copy_from_user(&lock, (drm_lock_t *)arg, sizeof(lock)))
- return -EFAULT;
-
- if (lock.context == DRM_KERNEL_CONTEXT) {
- DRM_ERROR("Process %d using kernel context %d\n",
- current->pid, lock.context);
- return -EINVAL;
- }
-
- DRM_DEBUG("%d frees lock (%d holds)\n",
- lock.context,
- _DRM_LOCKING_CONTEXT(dev->lock.hw_lock->lock));
- atomic_inc(&dev->total_unlocks);
- if (_DRM_LOCK_IS_CONT(dev->lock.hw_lock->lock))
- atomic_inc(&dev->total_contends);
- drm_lock_transfer(dev, &dev->lock.hw_lock->lock, DRM_KERNEL_CONTEXT);
- gamma_dma_schedule(dev, 1);
- if (!dev->context_flag) {
- if (drm_lock_free(dev, &dev->lock.hw_lock->lock,
- DRM_KERNEL_CONTEXT)) {
- DRM_ERROR("\n");
- }
- }
-#if DRM_DMA_HISTOGRAM
- atomic_inc(&dev->histo.lhld[drm_histogram_slot(get_cycles()
- - dev->lck_start)]);
-#endif
-
- unblock_all_signals();
- return 0;
-}
+#define DRIVER_AUTHOR "VA Linux Systems Inc."
+
+#define DRIVER_NAME "gamma"
+#define DRIVER_DESC "3DLabs gamma"
+#define DRIVER_DATE "20010216"
+
+#define DRIVER_MAJOR 1
+#define DRIVER_MINOR 0
+#define DRIVER_PATCHLEVEL 0
+
+#define DRIVER_IOCTLS \
+ [DRM_IOCTL_NR(DRM_IOCTL_DMA)] = { gamma_dma, 1, 0 }
+
+
+#define __HAVE_COUNTERS 5
+#define __HAVE_COUNTER6 _DRM_STAT_IRQ
+#define __HAVE_COUNTER7 _DRM_STAT_DMA
+#define __HAVE_COUNTER8 _DRM_STAT_PRIMARY
+#define __HAVE_COUNTER9 _DRM_STAT_SPECIAL
+#define __HAVE_COUNTER10 _DRM_STAT_MISSED
+
+
+#include "drm_auth.h"
+#include "drm_bufs.h"
+#include "drm_context.h"
+#include "drm_dma.h"
+#include "drm_drawable.h"
+#include "drm_drv.h"
+#include "drm_fops.h"
+#include "drm_init.h"
+#include "drm_ioctl.h"
+#include "drm_lists.h"
+#include "drm_lock.h"
+#include "drm_memory.h"
+#include "drm_proc.h"
+#include "drm_vm.h"
+#include "drm_stub.h"
diff --git a/linux/gamma_drv.h b/linux/gamma_drv.h
index e9ce3958..68b52070 100644
--- a/linux/gamma_drv.h
+++ b/linux/gamma_drv.h
@@ -11,11 +11,11 @@
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
- *
+ *
* The above copyright notice and this permission notice (including the next
* paragraph) shall be included in all copies or substantial portions of the
* Software.
- *
+ *
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
@@ -23,36 +23,83 @@
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
* DEALINGS IN THE SOFTWARE.
- *
+ *
* Authors:
* Rickard E. (Rik) Faith <faith@valinux.com>
- *
+ *
*/
#ifndef _GAMMA_DRV_H_
#define _GAMMA_DRV_H_
- /* gamma_drv.c */
-extern int gamma_version(struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg);
-extern int gamma_open(struct inode *inode, struct file *filp);
-extern int gamma_release(struct inode *inode, struct file *filp);
-extern int gamma_ioctl(struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg);
-extern int gamma_lock(struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg);
-extern int gamma_unlock(struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg);
+
+typedef struct drm_gamma_private {
+ drm_map_t *buffers;
+ drm_map_t *mmio0;
+ drm_map_t *mmio1;
+ drm_map_t *mmio2;
+ drm_map_t *mmio3;
+} drm_gamma_private_t;
+
+#define LOCK_TEST_WITH_RETURN( dev ) \
+do { \
+ if ( !_DRM_LOCK_IS_HELD( dev->lock.hw_lock->lock ) || \
+ dev->lock.pid != current->pid ) { \
+ DRM_ERROR( "%s called without lock held\n", \
+ __FUNCTION__ ); \
+ return -EINVAL; \
+ } \
+} while (0)
+
+
+extern void gamma_dma_ready(drm_device_t *dev);
+extern void gamma_dma_quiescent_single(drm_device_t *dev);
+extern void gamma_dma_quiescent_dual(drm_device_t *dev);
/* gamma_dma.c */
extern int gamma_dma_schedule(drm_device_t *dev, int locked);
extern int gamma_dma(struct inode *inode, struct file *filp,
unsigned int cmd, unsigned long arg);
-extern int gamma_irq_install(drm_device_t *dev, int irq);
-extern int gamma_irq_uninstall(drm_device_t *dev);
-extern int gamma_control(struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg);
extern int gamma_find_devices(void);
extern int gamma_found(void);
+
+#define GAMMA_OFF(reg) \
+ ((reg < 0x1000) \
+ ? reg \
+ : ((reg < 0x10000) \
+ ? (reg - 0x1000) \
+ : ((reg < 0x11000) \
+ ? (reg - 0x10000) \
+ : (reg - 0x11000))))
+
+#define GAMMA_BASE(reg) ((unsigned long) \
+ ((reg < 0x1000) ? dev_priv->mmio0->handle : \
+ ((reg < 0x10000) ? dev_priv->mmio1->handle : \
+ ((reg < 0x11000) ? dev_priv->mmio2->handle : \
+ dev_priv->mmio3->handle))))
+
+#define GAMMA_ADDR(reg) (GAMMA_BASE(reg) + GAMMA_OFF(reg))
+#define GAMMA_DEREF(reg) *(__volatile__ int *)GAMMA_ADDR(reg)
+#define GAMMA_READ(reg) GAMMA_DEREF(reg)
+#define GAMMA_WRITE(reg,val) do { GAMMA_DEREF(reg) = val; } while (0)
+
+#define GAMMA_BROADCASTMASK 0x9378
+#define GAMMA_COMMANDINTENABLE 0x0c48
+#define GAMMA_DMAADDRESS 0x0028
+#define GAMMA_DMACOUNT 0x0030
+#define GAMMA_FILTERMODE 0x8c00
+#define GAMMA_GCOMMANDINTFLAGS 0x0c50
+#define GAMMA_GCOMMANDMODE 0x0c40
+#define GAMMA_GCOMMANDSTATUS 0x0c60
+#define GAMMA_GDELAYTIMER 0x0c38
+#define GAMMA_GDMACONTROL 0x0060
+#define GAMMA_GINTENABLE 0x0808
+#define GAMMA_GINTFLAGS 0x0810
+#define GAMMA_INFIFOSPACE 0x0018
+#define GAMMA_OUTFIFOWORDS 0x0020
+#define GAMMA_OUTPUTFIFO 0x2000
+#define GAMMA_SYNC 0x8c40
+#define GAMMA_SYNC_TAG 0x0188
+
#endif
diff --git a/linux/i810.h b/linux/i810.h
new file mode 100644
index 00000000..ed25b2a9
--- /dev/null
+++ b/linux/i810.h
@@ -0,0 +1,112 @@
+/* i810.h -- Intel i810/i815 DRM template customization -*- linux-c -*-
+ * Created: Thu Feb 15 00:01:12 2001 by gareth@valinux.com
+ *
+ * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Authors:
+ * Gareth Hughes <gareth@valinux.com>
+ */
+
+#ifndef __I810_H__
+#define __I810_H__
+
+/* This remains constant for all DRM template files.
+ */
+#define DRM(x) i810_##x
+
+/* General customization:
+ */
+#define __HAVE_AGP 1
+#define __MUST_HAVE_AGP 1
+#define __HAVE_MTRR 1
+#define __HAVE_CTX_BITMAP 1
+
+/* Driver customization:
+ */
+#define __HAVE_RELEASE 1
+#define DRIVER_RELEASE() do { \
+ i810_reclaim_buffers( dev, priv->pid ); \
+} while (0)
+
+/* DMA customization:
+ */
+#define __HAVE_DMA 1
+#define __HAVE_DMA_QUEUE 1
+#define __HAVE_DMA_WAITLIST 1
+#define __HAVE_DMA_RECLAIM 1
+
+#define __HAVE_DMA_QUIESCENT 1
+#define DRIVER_DMA_QUIESCENT() do { \
+ i810_dma_quiescent( dev ); \
+} while (0)
+
+#define __HAVE_DMA_IRQ 1
+#define __HAVE_DMA_IRQ_BH 1
+#define DRIVER_PREINSTALL() do { \
+ drm_i810_private_t *dev_priv = \
+ (drm_i810_private_t *)dev->dev_private; \
+ u16 tmp; \
+ tmp = I810_READ16( I810REG_HWSTAM ); \
+ tmp = tmp & 0x6000; \
+ I810_WRITE16( I810REG_HWSTAM, tmp ); \
+ \
+ tmp = I810_READ16( I810REG_INT_MASK_R ); \
+ tmp = tmp & 0x6000; /* Unmask interrupts */ \
+ I810_WRITE16( I810REG_INT_MASK_R, tmp ); \
+ tmp = I810_READ16( I810REG_INT_ENABLE_R ); \
+ tmp = tmp & 0x6000; /* Disable all interrupts */ \
+ I810_WRITE16( I810REG_INT_ENABLE_R, tmp ); \
+} while (0)
+
+#define DRIVER_POSTINSTALL() do { \
+ drm_i810_private_t *dev_priv = \
+ (drm_i810_private_t *)dev->dev_private; \
+ u16 tmp; \
+ tmp = I810_READ16( I810REG_INT_ENABLE_R ); \
+ tmp = tmp & 0x6000; \
+ tmp = tmp | 0x0003; /* Enable bp & user interrupts */ \
+ I810_WRITE16( I810REG_INT_ENABLE_R, tmp ); \
+} while (0)
+
+#define DRIVER_UNINSTALL() do { \
+ drm_i810_private_t *dev_priv = \
+ (drm_i810_private_t *)dev->dev_private; \
+ u16 tmp; \
+ tmp = I810_READ16( I810REG_INT_IDENTITY_R ); \
+ tmp = tmp & ~(0x6000); /* Clear all interrupts */ \
+ if ( tmp != 0 ) I810_WRITE16( I810REG_INT_IDENTITY_R, tmp ); \
+ \
+ tmp = I810_READ16( I810REG_INT_ENABLE_R ); \
+ tmp = tmp & 0x6000; /* Disable all interrupts */ \
+ I810_WRITE16( I810REG_INT_ENABLE_R, tmp ); \
+} while (0)
+
+/* Buffer customization:
+ */
+
+#define DRIVER_BUF_PRIV_T drm_i810_buf_priv_t
+
+#define DRIVER_AGP_BUFFERS_MAP( dev ) \
+ ((drm_i810_private_t *)((dev)->dev_private))->buffer_map
+
+#endif
diff --git a/linux/i810_dma.c b/linux/i810_dma.c
index aa824a79..4c90496a 100644
--- a/linux/i810_dma.c
+++ b/linux/i810_dma.c
@@ -11,11 +11,11 @@
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
- *
+ *
* The above copyright notice and this permission notice (including the next
* paragraph) shall be included in all copies or substantial portions of the
* Software.
- *
+ *
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
@@ -31,6 +31,7 @@
*/
#define __NO_VERSION__
+#include "i810.h"
#include "drmP.h"
#include "i810_drv.h"
#include <linux/interrupt.h> /* For task queue support */
@@ -47,17 +48,6 @@
#define I810_BUF_UNMAPPED 0
#define I810_BUF_MAPPED 1
-#define I810_REG(reg) 2
-#define I810_BASE(reg) ((unsigned long) \
- dev->maplist[I810_REG(reg)]->handle)
-#define I810_ADDR(reg) (I810_BASE(reg) + reg)
-#define I810_DEREF(reg) *(__volatile__ int *)I810_ADDR(reg)
-#define I810_READ(reg) I810_DEREF(reg)
-#define I810_WRITE(reg,val) do { I810_DEREF(reg) = val; } while (0)
-#define I810_DEREF16(reg) *(__volatile__ u16 *)I810_ADDR(reg)
-#define I810_READ16(reg) I810_DEREF16(reg)
-#define I810_WRITE16(reg,val) do { I810_DEREF16(reg) = val; } while (0)
-
#define RING_LOCALS unsigned int outring, ringmask; volatile char *virt;
#define BEGIN_LP_RING(n) do { \
@@ -107,14 +97,14 @@ static drm_buf_t *i810_freelist_get(drm_device_t *dev)
drm_device_dma_t *dma = dev->dma;
int i;
int used;
-
+
/* Linear search might not be the best solution */
for (i = 0; i < dma->buf_count; i++) {
drm_buf_t *buf = dma->buflist[ i ];
drm_i810_buf_priv_t *buf_priv = buf->dev_private;
/* In use is already a pointer */
- used = cmpxchg(buf_priv->in_use, I810_BUF_FREE,
+ used = cmpxchg(buf_priv->in_use, I810_BUF_FREE,
I810_BUF_CLIENT);
if(used == I810_BUF_FREE) {
return buf;
@@ -131,26 +121,26 @@ static int i810_freelist_put(drm_device_t *dev, drm_buf_t *buf)
{
drm_i810_buf_priv_t *buf_priv = buf->dev_private;
int used;
-
+
/* In use is already a pointer */
used = cmpxchg(buf_priv->in_use, I810_BUF_CLIENT, I810_BUF_FREE);
if(used != I810_BUF_CLIENT) {
DRM_ERROR("Freeing buffer thats not in use : %d\n", buf->idx);
return -EINVAL;
}
-
+
return 0;
}
static struct file_operations i810_buffer_fops = {
- open: i810_open,
- flush: drm_flush,
- release: i810_release,
- ioctl: i810_ioctl,
+ open: DRM(open),
+ flush: DRM(flush),
+ release: DRM(release),
+ ioctl: DRM(ioctl),
mmap: i810_mmap_buffers,
- read: drm_read,
- fasync: drm_fasync,
- poll: drm_poll,
+ read: DRM(read),
+ fasync: DRM(fasync),
+ poll: DRM(poll),
};
int i810_mmap_buffers(struct file *filp, struct vm_area_struct *vma)
@@ -166,10 +156,10 @@ int i810_mmap_buffers(struct file *filp, struct vm_area_struct *vma)
dev_priv = dev->dev_private;
buf = dev_priv->mmap_buffer;
buf_priv = buf->dev_private;
-
+
vma->vm_flags |= (VM_IO | VM_DONTCOPY);
vma->vm_file = filp;
-
+
buf_priv->currently_mapped = I810_BUF_MAPPED;
unlock_kernel();
@@ -196,9 +186,9 @@ static int i810_map_buffer(drm_buf_t *buf, struct file *filp)
old_fops = filp->f_op;
filp->f_op = &i810_buffer_fops;
dev_priv->mmap_buffer = buf;
- buf_priv->virtual = (void *)do_mmap(filp, 0, buf->total,
+ buf_priv->virtual = (void *)do_mmap(filp, 0, buf->total,
PROT_READ|PROT_WRITE,
- MAP_SHARED,
+ MAP_SHARED,
buf->bus_address);
dev_priv->mmap_buffer = NULL;
filp->f_op = old_fops;
@@ -222,15 +212,15 @@ static int i810_unmap_buffer(drm_buf_t *buf)
int retcode = 0;
if(VM_DONTCOPY != 0) {
- if(buf_priv->currently_mapped != I810_BUF_MAPPED)
+ if(buf_priv->currently_mapped != I810_BUF_MAPPED)
return -EINVAL;
down(&current->mm->mmap_sem);
#if LINUX_VERSION_CODE < 0x020399
- retcode = do_munmap((unsigned long)buf_priv->virtual,
+ retcode = do_munmap((unsigned long)buf_priv->virtual,
(size_t) buf->total);
#else
- retcode = do_munmap(current->mm,
- (unsigned long)buf_priv->virtual,
+ retcode = do_munmap(current->mm,
+ (unsigned long)buf_priv->virtual,
(size_t) buf->total);
#endif
up(&current->mm->mmap_sem);
@@ -241,7 +231,7 @@ static int i810_unmap_buffer(drm_buf_t *buf)
return retcode;
}
-static int i810_dma_get_buffer(drm_device_t *dev, drm_i810_dma_t *d,
+static int i810_dma_get_buffer(drm_device_t *dev, drm_i810_dma_t *d,
struct file *filp)
{
drm_file_t *priv = filp->private_data;
@@ -255,7 +245,7 @@ static int i810_dma_get_buffer(drm_device_t *dev, drm_i810_dma_t *d,
DRM_DEBUG("retcode=%d\n", retcode);
return retcode;
}
-
+
retcode = i810_map_buffer(buf, filp);
if(retcode) {
i810_freelist_put(dev, buf);
@@ -263,7 +253,7 @@ static int i810_dma_get_buffer(drm_device_t *dev, drm_i810_dma_t *d,
return retcode;
}
buf->pid = priv->pid;
- buf_priv = buf->dev_private;
+ buf_priv = buf->dev_private;
d->granted = 1;
d->request_idx = buf->idx;
d->request_size = buf->total;
@@ -275,22 +265,22 @@ static int i810_dma_get_buffer(drm_device_t *dev, drm_i810_dma_t *d,
static unsigned long i810_alloc_page(drm_device_t *dev)
{
unsigned long address;
-
+
address = __get_free_page(GFP_KERNEL);
- if(address == 0UL)
+ if(address == 0UL)
return 0;
-
+
atomic_inc(&virt_to_page(address)->count);
set_bit(PG_locked, &virt_to_page(address)->flags);
-
+
return address;
}
static void i810_free_page(drm_device_t *dev, unsigned long page)
{
- if(page == 0UL)
+ if(page == 0UL)
return;
-
+
atomic_dec(&virt_to_page(page)->count);
clear_bit(PG_locked, &virt_to_page(page)->flags);
wake_up(&virt_to_page(page)->wait);
@@ -304,26 +294,26 @@ static int i810_dma_cleanup(drm_device_t *dev)
if(dev->dev_private) {
int i;
- drm_i810_private_t *dev_priv =
+ drm_i810_private_t *dev_priv =
(drm_i810_private_t *) dev->dev_private;
-
+
if(dev_priv->ring.virtual_start) {
- drm_ioremapfree((void *) dev_priv->ring.virtual_start,
- dev_priv->ring.Size);
+ DRM(ioremapfree)((void *) dev_priv->ring.virtual_start,
+ dev_priv->ring.Size);
}
if(dev_priv->hw_status_page != 0UL) {
i810_free_page(dev, dev_priv->hw_status_page);
/* Need to rewrite hardware status page */
I810_WRITE(0x02080, 0x1ffff000);
}
- drm_free(dev->dev_private, sizeof(drm_i810_private_t),
+ DRM(free)(dev->dev_private, sizeof(drm_i810_private_t),
DRM_MEM_DRIVER);
dev->dev_private = NULL;
for (i = 0; i < dma->buf_count; i++) {
drm_buf_t *buf = dma->buflist[ i ];
drm_i810_buf_priv_t *buf_priv = buf->dev_private;
- drm_ioremapfree(buf_priv->kernel_virtual, buf->total);
+ DRM(ioremapfree)(buf_priv->kernel_virtual, buf->total);
}
}
return 0;
@@ -340,14 +330,14 @@ static int i810_wait_ring(drm_device_t *dev, int n)
end = jiffies + (HZ*3);
while (ring->space < n) {
int i;
-
+
ring->head = I810_READ(LP_RING + RING_HEAD) & HEAD_ADDR;
ring->space = ring->head - (ring->tail+8);
if (ring->space < 0) ring->space += ring->Size;
-
+
if (ring->head != last_head)
end = jiffies + (HZ*3);
-
+
iters++;
if((signed)(end - jiffies) <= 0) {
DRM_ERROR("space: %d wanted %d\n", ring->space, n);
@@ -358,7 +348,7 @@ static int i810_wait_ring(drm_device_t *dev, int n)
for (i = 0 ; i < 2000 ; i++) ;
}
-out_wait_ring:
+out_wait_ring:
return iters;
}
@@ -366,7 +356,7 @@ static void i810_kernel_lost_context(drm_device_t *dev)
{
drm_i810_private_t *dev_priv = dev->dev_private;
drm_i810_ring_buffer_t *ring = &(dev_priv->ring);
-
+
ring->head = I810_READ(LP_RING + RING_HEAD) & HEAD_ADDR;
ring->tail = I810_READ(LP_RING + RING_TAIL);
ring->space = ring->head - (ring->tail+8);
@@ -380,7 +370,7 @@ static int i810_freelist_init(drm_device_t *dev)
int my_idx = 24;
u32 *hw_status = (u32 *)(dev_priv->hw_status_page + my_idx);
int i;
-
+
if(dma->buf_count > 1019) {
/* Not enough space in the status page for the freelist */
return -EINVAL;
@@ -389,55 +379,58 @@ static int i810_freelist_init(drm_device_t *dev)
for (i = 0; i < dma->buf_count; i++) {
drm_buf_t *buf = dma->buflist[ i ];
drm_i810_buf_priv_t *buf_priv = buf->dev_private;
-
+
buf_priv->in_use = hw_status++;
buf_priv->my_use_idx = my_idx;
my_idx += 4;
*buf_priv->in_use = I810_BUF_FREE;
- buf_priv->kernel_virtual = drm_ioremap(buf->bus_address,
- buf->total);
+ buf_priv->kernel_virtual = DRM(ioremap)(buf->bus_address,
+ buf->total);
}
return 0;
}
-static int i810_dma_initialize(drm_device_t *dev,
+static int i810_dma_initialize(drm_device_t *dev,
drm_i810_private_t *dev_priv,
drm_i810_init_t *init)
{
- drm_map_t *sarea_map;
+ struct list_head *list;
dev->dev_private = (void *) dev_priv;
memset(dev_priv, 0, sizeof(drm_i810_private_t));
- if (init->ring_map_idx >= dev->map_count ||
- init->buffer_map_idx >= dev->map_count) {
- i810_dma_cleanup(dev);
- DRM_ERROR("ring_map or buffer_map are invalid\n");
- return -EINVAL;
- }
-
- dev_priv->ring_map_idx = init->ring_map_idx;
- dev_priv->buffer_map_idx = init->buffer_map_idx;
- sarea_map = dev->maplist[0];
- dev_priv->sarea_priv = (drm_i810_sarea_t *)
- ((u8 *)sarea_map->handle +
+ list_for_each(list, &dev->maplist->head) {
+ drm_map_list_t *r_list = (drm_map_list_t *)list;
+ if( r_list->map &&
+ r_list->map->type == _DRM_SHM &&
+ r_list->map->flags & _DRM_CONTAINS_LOCK ) {
+ dev_priv->sarea_map = r_list->map;
+ break;
+ }
+ }
+
+ DRM_FIND_MAP( dev_priv->mmio_map, init->mmio_offset );
+ DRM_FIND_MAP( dev_priv->buffer_map, init->buffers_offset );
+
+ dev_priv->sarea_priv = (drm_i810_sarea_t *)
+ ((u8 *)dev_priv->sarea_map->handle +
init->sarea_priv_offset);
atomic_set(&dev_priv->flush_done, 0);
init_waitqueue_head(&dev_priv->flush_queue);
-
+
dev_priv->ring.Start = init->ring_start;
dev_priv->ring.End = init->ring_end;
dev_priv->ring.Size = init->ring_size;
- dev_priv->ring.virtual_start = drm_ioremap(dev->agp->base +
- init->ring_start,
- init->ring_size);
+ dev_priv->ring.virtual_start = DRM(ioremap)(dev->agp->base +
+ init->ring_start,
+ init->ring_size);
dev_priv->ring.tail_mask = dev_priv->ring.Size - 1;
-
+
if (dev_priv->ring.virtual_start == NULL) {
i810_dma_cleanup(dev);
DRM_ERROR("can not ioremap virtual address for"
@@ -454,8 +447,8 @@ static int i810_dma_initialize(drm_device_t *dev,
dev_priv->front_di1 = init->front_offset | init->pitch_bits;
dev_priv->back_di1 = init->back_offset | init->pitch_bits;
dev_priv->zi1 = init->depth_offset | init->pitch_bits;
-
-
+
+
/* Program Hardware Status Page */
dev_priv->hw_status_page = i810_alloc_page(dev);
memset((void *) dev_priv->hw_status_page, 0, PAGE_SIZE);
@@ -465,10 +458,10 @@ static int i810_dma_initialize(drm_device_t *dev,
return -ENOMEM;
}
DRM_DEBUG("hw status page @ %lx\n", dev_priv->hw_status_page);
-
+
I810_WRITE(0x02080, virt_to_bus((void *)dev_priv->hw_status_page));
DRM_DEBUG("Enabled hardware status page\n");
-
+
/* Now we need to init our freelist */
if(i810_freelist_init(dev) != 0) {
i810_dma_cleanup(dev);
@@ -487,13 +480,13 @@ int i810_dma_init(struct inode *inode, struct file *filp,
drm_i810_private_t *dev_priv;
drm_i810_init_t init;
int retcode = 0;
-
+
if (copy_from_user(&init, (drm_i810_init_t *)arg, sizeof(init)))
return -EFAULT;
-
+
switch(init.func) {
case I810_INIT_DMA:
- dev_priv = drm_alloc(sizeof(drm_i810_private_t),
+ dev_priv = DRM(alloc)(sizeof(drm_i810_private_t),
DRM_MEM_DRIVER);
if(dev_priv == NULL) return -ENOMEM;
retcode = i810_dma_initialize(dev, dev_priv, &init);
@@ -505,7 +498,7 @@ int i810_dma_init(struct inode *inode, struct file *filp,
retcode = -EINVAL;
break;
}
-
+
return retcode;
}
@@ -517,9 +510,9 @@ int i810_dma_init(struct inode *inode, struct file *filp,
* Use 'volatile' & local var tmp to force the emitted values to be
* identical to the verified ones.
*/
-static void i810EmitContextVerified( drm_device_t *dev,
- volatile unsigned int *code )
-{
+static void i810EmitContextVerified( drm_device_t *dev,
+ volatile unsigned int *code )
+{
drm_i810_private_t *dev_priv = dev->dev_private;
int i, j = 0;
unsigned int tmp;
@@ -537,22 +530,22 @@ static void i810EmitContextVerified( drm_device_t *dev,
tmp = code[i];
if ((tmp & (7<<29)) == (3<<29) &&
- (tmp & (0x1f<<24)) < (0x1d<<24))
+ (tmp & (0x1f<<24)) < (0x1d<<24))
{
- OUT_RING( tmp );
+ OUT_RING( tmp );
j++;
- }
+ }
}
- if (j & 1)
- OUT_RING( 0 );
+ if (j & 1)
+ OUT_RING( 0 );
ADVANCE_LP_RING();
}
-static void i810EmitTexVerified( drm_device_t *dev,
- volatile unsigned int *code )
-{
+static void i810EmitTexVerified( drm_device_t *dev,
+ volatile unsigned int *code )
+{
drm_i810_private_t *dev_priv = dev->dev_private;
int i, j = 0;
unsigned int tmp;
@@ -569,15 +562,15 @@ static void i810EmitTexVerified( drm_device_t *dev,
tmp = code[i];
if ((tmp & (7<<29)) == (3<<29) &&
- (tmp & (0x1f<<24)) < (0x1d<<24))
+ (tmp & (0x1f<<24)) < (0x1d<<24))
{
- OUT_RING( tmp );
+ OUT_RING( tmp );
j++;
}
- }
-
- if (j & 1)
- OUT_RING( 0 );
+ }
+
+ if (j & 1)
+ OUT_RING( 0 );
ADVANCE_LP_RING();
}
@@ -585,9 +578,9 @@ static void i810EmitTexVerified( drm_device_t *dev,
/* Need to do some additional checking when setting the dest buffer.
*/
-static void i810EmitDestVerified( drm_device_t *dev,
- volatile unsigned int *code )
-{
+static void i810EmitDestVerified( drm_device_t *dev,
+ volatile unsigned int *code )
+{
drm_i810_private_t *dev_priv = dev->dev_private;
unsigned int tmp;
RING_LOCALS;
@@ -651,9 +644,9 @@ static void i810EmitState( drm_device_t *dev )
-/* need to verify
+/* need to verify
*/
-static void i810_dma_dispatch_clear( drm_device_t *dev, int flags,
+static void i810_dma_dispatch_clear( drm_device_t *dev, int flags,
unsigned int clear_color,
unsigned int clear_zval )
{
@@ -684,10 +677,10 @@ static void i810_dma_dispatch_clear( drm_device_t *dev, int flags,
pbox->y2 > dev_priv->h)
continue;
- if ( flags & I810_FRONT ) {
+ if ( flags & I810_FRONT ) {
DRM_DEBUG("clear front\n");
- BEGIN_LP_RING( 6 );
- OUT_RING( BR00_BITBLT_CLIENT |
+ BEGIN_LP_RING( 6 );
+ OUT_RING( BR00_BITBLT_CLIENT |
BR00_OP_COLOR_BLT | 0x3 );
OUT_RING( BR13_SOLID_PATTERN | (0xF0 << 16) | pitch );
OUT_RING( (height << 16) | width );
@@ -699,8 +692,8 @@ static void i810_dma_dispatch_clear( drm_device_t *dev, int flags,
if ( flags & I810_BACK ) {
DRM_DEBUG("clear back\n");
- BEGIN_LP_RING( 6 );
- OUT_RING( BR00_BITBLT_CLIENT |
+ BEGIN_LP_RING( 6 );
+ OUT_RING( BR00_BITBLT_CLIENT |
BR00_OP_COLOR_BLT | 0x3 );
OUT_RING( BR13_SOLID_PATTERN | (0xF0 << 16) | pitch );
OUT_RING( (height << 16) | width );
@@ -712,8 +705,8 @@ static void i810_dma_dispatch_clear( drm_device_t *dev, int flags,
if ( flags & I810_DEPTH ) {
DRM_DEBUG("clear depth\n");
- BEGIN_LP_RING( 6 );
- OUT_RING( BR00_BITBLT_CLIENT |
+ BEGIN_LP_RING( 6 );
+ OUT_RING( BR00_BITBLT_CLIENT |
BR00_OP_COLOR_BLT | 0x3 );
OUT_RING( BR13_SOLID_PATTERN | (0xF0 << 16) | pitch );
OUT_RING( (height << 16) | width );
@@ -744,7 +737,7 @@ static void i810_dma_dispatch_swap( drm_device_t *dev )
if (nbox > I810_NR_SAREA_CLIPRECTS)
nbox = I810_NR_SAREA_CLIPRECTS;
- for (i = 0 ; i < nbox; i++, pbox++)
+ for (i = 0 ; i < nbox; i++, pbox++)
{
unsigned int w = pbox->x2 - pbox->x1;
unsigned int h = pbox->y2 - pbox->y1;
@@ -756,7 +749,7 @@ static void i810_dma_dispatch_swap( drm_device_t *dev )
pbox->x2 > dev_priv->w ||
pbox->y2 > dev_priv->h)
continue;
-
+
DRM_DEBUG("dispatch swap %d,%d-%d,%d!\n",
pbox[i].x1, pbox[i].y1,
pbox[i].x2, pbox[i].y2);
@@ -766,14 +759,14 @@ static void i810_dma_dispatch_swap( drm_device_t *dev )
OUT_RING( pitch | (0xCC << 16));
OUT_RING( (h << 16) | (w * cpp));
OUT_RING( dst );
- OUT_RING( pitch );
+ OUT_RING( pitch );
OUT_RING( start );
ADVANCE_LP_RING();
}
}
-static void i810_dma_dispatch_vertex(drm_device_t *dev,
+static void i810_dma_dispatch_vertex(drm_device_t *dev,
drm_buf_t *buf,
int discard,
int used)
@@ -784,30 +777,30 @@ static void i810_dma_dispatch_vertex(drm_device_t *dev,
drm_clip_rect_t *box = sarea_priv->boxes;
int nbox = sarea_priv->nbox;
unsigned long address = (unsigned long)buf->bus_address;
- unsigned long start = address - dev->agp->base;
+ unsigned long start = address - dev->agp->base;
int i = 0, u;
RING_LOCALS;
i810_kernel_lost_context(dev);
- if (nbox > I810_NR_SAREA_CLIPRECTS)
+ if (nbox > I810_NR_SAREA_CLIPRECTS)
nbox = I810_NR_SAREA_CLIPRECTS;
if (discard) {
- u = cmpxchg(buf_priv->in_use, I810_BUF_CLIENT,
+ u = cmpxchg(buf_priv->in_use, I810_BUF_CLIENT,
I810_BUF_HARDWARE);
if(u != I810_BUF_CLIENT) {
DRM_DEBUG("xxxx 2\n");
}
}
- if (used > 4*1024)
+ if (used > 4*1024)
used = 0;
if (sarea_priv->dirty)
i810EmitState( dev );
- DRM_DEBUG("dispatch vertex addr 0x%lx, used 0x%x nbox %d\n",
+ DRM_DEBUG("dispatch vertex addr 0x%lx, used 0x%x nbox %d\n",
address, used, nbox);
dev_priv->counter++;
@@ -821,7 +814,7 @@ static void i810_dma_dispatch_vertex(drm_device_t *dev,
*(u32 *)buf_priv->virtual = (GFX_OP_PRIMITIVE |
sarea_priv->vertex_prim |
((used/4)-2));
-
+
if (used & 4) {
*(u32 *)((u32)buf_priv->virtual + used) = 0;
used += 4;
@@ -829,26 +822,26 @@ static void i810_dma_dispatch_vertex(drm_device_t *dev,
i810_unmap_buffer(buf);
}
-
+
if (used) {
do {
if (i < nbox) {
BEGIN_LP_RING(4);
- OUT_RING( GFX_OP_SCISSOR | SC_UPDATE_SCISSOR |
+ OUT_RING( GFX_OP_SCISSOR | SC_UPDATE_SCISSOR |
SC_ENABLE );
OUT_RING( GFX_OP_SCISSOR_INFO );
OUT_RING( box[i].x1 | (box[i].y1<<16) );
OUT_RING( (box[i].x2-1) | ((box[i].y2-1)<<16) );
ADVANCE_LP_RING();
}
-
+
BEGIN_LP_RING(4);
OUT_RING( CMD_OP_BATCH_BUFFER );
OUT_RING( start | BB1_PROTECTED );
OUT_RING( start + used - 4 );
OUT_RING( 0 );
ADVANCE_LP_RING();
-
+
} while (++i < nbox);
}
@@ -872,24 +865,25 @@ static void i810_dma_dispatch_vertex(drm_device_t *dev,
/* Interrupts are only for flushing */
-static void i810_dma_service(int irq, void *device, struct pt_regs *regs)
+void i810_dma_service(int irq, void *device, struct pt_regs *regs)
{
drm_device_t *dev = (drm_device_t *)device;
+ drm_i810_private_t *dev_priv = (drm_i810_private_t *)dev->dev_private;
u16 temp;
-
- atomic_inc(&dev->total_irq);
+
+ atomic_inc(&dev->counts[_DRM_STAT_IRQ]);
temp = I810_READ16(I810REG_INT_IDENTITY_R);
temp = temp & ~(0x6000);
- if(temp != 0) I810_WRITE16(I810REG_INT_IDENTITY_R,
+ if(temp != 0) I810_WRITE16(I810REG_INT_IDENTITY_R,
temp); /* Clear all interrupts */
else
return;
-
+
queue_task(&dev->tq, &tq_immediate);
mark_bh(IMMEDIATE_BH);
}
-static void i810_dma_task_queue(void *device)
+void i810_dma_immediate_bh(void *device)
{
drm_device_t *dev = (drm_device_t *) device;
drm_i810_private_t *dev_priv = (drm_i810_private_t *)dev->dev_private;
@@ -898,129 +892,6 @@ static void i810_dma_task_queue(void *device)
wake_up_interruptible(&dev_priv->flush_queue);
}
-int i810_irq_install(drm_device_t *dev, int irq)
-{
- int retcode;
- u16 temp;
-
- if (!irq) return -EINVAL;
-
- down(&dev->struct_sem);
- if (dev->irq) {
- up(&dev->struct_sem);
- return -EBUSY;
- }
- dev->irq = irq;
- up(&dev->struct_sem);
-
- DRM_DEBUG( "Interrupt Install : %d\n", irq);
- DRM_DEBUG("%d\n", irq);
-
- dev->context_flag = 0;
- dev->interrupt_flag = 0;
- dev->dma_flag = 0;
-
- dev->dma->next_buffer = NULL;
- dev->dma->next_queue = NULL;
- dev->dma->this_buffer = NULL;
-
- INIT_LIST_HEAD(&dev->tq.list);
- dev->tq.sync = 0;
- dev->tq.routine = i810_dma_task_queue;
- dev->tq.data = dev;
-
- /* Before installing handler */
- temp = I810_READ16(I810REG_HWSTAM);
- temp = temp & 0x6000;
- I810_WRITE16(I810REG_HWSTAM, temp);
-
- temp = I810_READ16(I810REG_INT_MASK_R);
- temp = temp & 0x6000;
- I810_WRITE16(I810REG_INT_MASK_R, temp); /* Unmask interrupts */
- temp = I810_READ16(I810REG_INT_ENABLE_R);
- temp = temp & 0x6000;
- I810_WRITE16(I810REG_INT_ENABLE_R, temp); /* Disable all interrupts */
-
- /* Install handler */
- if ((retcode = request_irq(dev->irq,
- i810_dma_service,
- SA_SHIRQ,
- dev->devname,
- dev))) {
- down(&dev->struct_sem);
- dev->irq = 0;
- up(&dev->struct_sem);
- return retcode;
- }
- temp = I810_READ16(I810REG_INT_ENABLE_R);
- temp = temp & 0x6000;
- temp = temp | 0x0003;
- I810_WRITE16(I810REG_INT_ENABLE_R,
- temp); /* Enable bp & user interrupts */
- return 0;
-}
-
-int i810_irq_uninstall(drm_device_t *dev)
-{
- int irq;
- u16 temp;
-
-
-/* return 0; */
-
- down(&dev->struct_sem);
- irq = dev->irq;
- dev->irq = 0;
- up(&dev->struct_sem);
-
- if (!irq) return -EINVAL;
-
- DRM_DEBUG( "Interrupt UnInstall: %d\n", irq);
- DRM_DEBUG("%d\n", irq);
-
- temp = I810_READ16(I810REG_INT_IDENTITY_R);
- temp = temp & ~(0x6000);
- if(temp != 0) I810_WRITE16(I810REG_INT_IDENTITY_R,
- temp); /* Clear all interrupts */
-
- temp = I810_READ16(I810REG_INT_ENABLE_R);
- temp = temp & 0x6000;
- I810_WRITE16(I810REG_INT_ENABLE_R,
- temp); /* Disable all interrupts */
-
- free_irq(irq, dev);
-
- return 0;
-}
-
-int i810_control(struct inode *inode, struct file *filp, unsigned int cmd,
- unsigned long arg)
-{
- drm_file_t *priv = filp->private_data;
- drm_device_t *dev = priv->dev;
- drm_control_t ctl;
- int retcode;
-
- DRM_DEBUG( "i810_control\n");
-
- if (copy_from_user(&ctl, (drm_control_t *)arg, sizeof(ctl)))
- return -EFAULT;
-
- switch (ctl.func) {
- case DRM_INST_HANDLER:
- if ((retcode = i810_irq_install(dev, ctl.irq)))
- return retcode;
- break;
- case DRM_UNINST_HANDLER:
- if ((retcode = i810_irq_uninstall(dev)))
- return retcode;
- break;
- default:
- return -EINVAL;
- }
- return 0;
-}
-
static inline void i810_dma_emit_flush(drm_device_t *dev)
{
drm_i810_private_t *dev_priv = dev->dev_private;
@@ -1057,11 +928,11 @@ static inline void i810_dma_quiescent_emit(drm_device_t *dev)
/* wake_up_interruptible(&dev_priv->flush_queue); */
}
-static void i810_dma_quiescent(drm_device_t *dev)
+void i810_dma_quiescent(drm_device_t *dev)
{
DECLARE_WAITQUEUE(entry, current);
drm_i810_private_t *dev_priv = (drm_i810_private_t *)dev->dev_private;
- unsigned long end;
+ unsigned long end;
if(dev_priv == NULL) {
return;
@@ -1069,7 +940,7 @@ static void i810_dma_quiescent(drm_device_t *dev)
atomic_set(&dev_priv->flush_done, 0);
add_wait_queue(&dev_priv->flush_queue, &entry);
end = jiffies + (HZ*3);
-
+
for (;;) {
current->state = TASK_INTERRUPTIBLE;
i810_dma_quiescent_emit(dev);
@@ -1077,16 +948,16 @@ static void i810_dma_quiescent(drm_device_t *dev)
if((signed)(end - jiffies) <= 0) {
DRM_ERROR("lockup\n");
break;
- }
+ }
schedule_timeout(HZ*3);
if (signal_pending(current)) {
break;
}
}
-
+
current->state = TASK_RUNNING;
remove_wait_queue(&dev_priv->flush_queue, &entry);
-
+
return;
}
@@ -1096,7 +967,7 @@ static int i810_flush_queue(drm_device_t *dev)
drm_i810_private_t *dev_priv = (drm_i810_private_t *)dev->dev_private;
drm_device_dma_t *dma = dev->dma;
unsigned long end;
- int i, ret = 0;
+ int i, ret = 0;
if(dev_priv == NULL) {
return 0;
@@ -1111,14 +982,14 @@ static int i810_flush_queue(drm_device_t *dev)
if((signed)(end - jiffies) <= 0) {
DRM_ERROR("lockup\n");
break;
- }
+ }
schedule_timeout(HZ*3);
if (signal_pending(current)) {
ret = -EINTR; /* Can't restart */
break;
}
}
-
+
current->state = TASK_RUNNING;
remove_wait_queue(&dev_priv->flush_queue, &entry);
@@ -1126,8 +997,8 @@ static int i810_flush_queue(drm_device_t *dev)
for (i = 0; i < dma->buf_count; i++) {
drm_buf_t *buf = dma->buflist[ i ];
drm_i810_buf_priv_t *buf_priv = buf->dev_private;
-
- int used = cmpxchg(buf_priv->in_use, I810_BUF_HARDWARE,
+
+ int used = cmpxchg(buf_priv->in_use, I810_BUF_HARDWARE,
I810_BUF_FREE);
if (used == I810_BUF_HARDWARE)
@@ -1154,9 +1025,9 @@ void i810_reclaim_buffers(drm_device_t *dev, pid_t pid)
for (i = 0; i < dma->buf_count; i++) {
drm_buf_t *buf = dma->buflist[ i ];
drm_i810_buf_priv_t *buf_priv = buf->dev_private;
-
+
if (buf->pid == pid && buf_priv) {
- int used = cmpxchg(buf_priv->in_use, I810_BUF_CLIENT,
+ int used = cmpxchg(buf_priv->in_use, I810_BUF_CLIENT,
I810_BUF_FREE);
if (used == I810_BUF_CLIENT)
@@ -1167,91 +1038,12 @@ void i810_reclaim_buffers(drm_device_t *dev, pid_t pid)
}
}
-int i810_lock(struct inode *inode, struct file *filp, unsigned int cmd,
- unsigned long arg)
-{
- drm_file_t *priv = filp->private_data;
- drm_device_t *dev = priv->dev;
-
- DECLARE_WAITQUEUE(entry, current);
- int ret = 0;
- drm_lock_t lock;
-
- if (copy_from_user(&lock, (drm_lock_t *)arg, sizeof(lock)))
- return -EFAULT;
-
- if (lock.context == DRM_KERNEL_CONTEXT) {
- DRM_ERROR("Process %d using kernel context %d\n",
- current->pid, lock.context);
- return -EINVAL;
- }
-
- DRM_DEBUG("%d (pid %d) requests lock (0x%08x), flags = 0x%08x\n",
- lock.context, current->pid, dev->lock.hw_lock->lock,
- lock.flags);
-
- if (lock.context < 0) {
- return -EINVAL;
- }
- /* Only one queue:
- */
-
- if (!ret) {
- add_wait_queue(&dev->lock.lock_queue, &entry);
- for (;;) {
- current->state = TASK_INTERRUPTIBLE;
- if (!dev->lock.hw_lock) {
- /* Device has been unregistered */
- ret = -EINTR;
- break;
- }
- if (drm_lock_take(&dev->lock.hw_lock->lock,
- lock.context)) {
- dev->lock.pid = current->pid;
- dev->lock.lock_time = jiffies;
- atomic_inc(&dev->total_locks);
- break; /* Got lock */
- }
-
- /* Contention */
- atomic_inc(&dev->total_sleeps);
- DRM_DEBUG("Calling lock schedule\n");
- schedule();
- if (signal_pending(current)) {
- ret = -ERESTARTSYS;
- break;
- }
- }
- current->state = TASK_RUNNING;
- remove_wait_queue(&dev->lock.lock_queue, &entry);
- }
-
- if (!ret) {
- sigemptyset(&dev->sigmask);
- sigaddset(&dev->sigmask, SIGSTOP);
- sigaddset(&dev->sigmask, SIGTSTP);
- sigaddset(&dev->sigmask, SIGTTIN);
- sigaddset(&dev->sigmask, SIGTTOU);
- dev->sigdata.context = lock.context;
- dev->sigdata.lock = dev->lock.hw_lock;
- block_all_signals(drm_notifier, &dev->sigdata, &dev->sigmask);
-
- if (lock.flags & _DRM_LOCK_QUIESCENT) {
- DRM_DEBUG("_DRM_LOCK_QUIESCENT\n");
- DRM_DEBUG("fred\n");
- i810_dma_quiescent(dev);
- }
- }
- DRM_DEBUG("%d %s\n", lock.context, ret ? "interrupted" : "has lock");
- return ret;
-}
-
-int i810_flush_ioctl(struct inode *inode, struct file *filp,
+int i810_flush_ioctl(struct inode *inode, struct file *filp,
unsigned int cmd, unsigned long arg)
{
drm_file_t *priv = filp->private_data;
drm_device_t *dev = priv->dev;
-
+
DRM_DEBUG("i810_flush_ioctl\n");
if(!_DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock)) {
DRM_ERROR("i810_flush_ioctl called without lock held\n");
@@ -1271,8 +1063,8 @@ int i810_dma_vertex(struct inode *inode, struct file *filp,
drm_device_dma_t *dma = dev->dma;
drm_i810_private_t *dev_priv = (drm_i810_private_t *)dev->dev_private;
u32 *hw_status = (u32 *)dev_priv->hw_status_page;
- drm_i810_sarea_t *sarea_priv = (drm_i810_sarea_t *)
- dev_priv->sarea_priv;
+ drm_i810_sarea_t *sarea_priv = (drm_i810_sarea_t *)
+ dev_priv->sarea_priv;
drm_i810_vertex_t vertex;
if (copy_from_user(&vertex, (drm_i810_vertex_t *)arg, sizeof(vertex)))
@@ -1286,15 +1078,15 @@ int i810_dma_vertex(struct inode *inode, struct file *filp,
DRM_DEBUG("i810 dma vertex, idx %d used %d discard %d\n",
vertex.idx, vertex.used, vertex.discard);
- i810_dma_dispatch_vertex( dev,
- dma->buflist[ vertex.idx ],
+ i810_dma_dispatch_vertex( dev,
+ dma->buflist[ vertex.idx ],
vertex.discard, vertex.used );
- atomic_add(vertex.used, &dma->total_bytes);
- atomic_inc(&dma->total_dmas);
+ atomic_add(vertex.used, &dev->counts[_DRM_STAT_SECONDARY]);
+ atomic_inc(&dev->counts[_DRM_STAT_DMA]);
sarea_priv->last_enqueue = dev_priv->counter-1;
sarea_priv->last_dispatch = (int) hw_status[5];
-
+
return 0;
}
@@ -1309,14 +1101,14 @@ int i810_clear_bufs(struct inode *inode, struct file *filp,
if (copy_from_user(&clear, (drm_i810_clear_t *)arg, sizeof(clear)))
return -EFAULT;
-
+
if(!_DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock)) {
DRM_ERROR("i810_clear_bufs called without lock held\n");
return -EINVAL;
}
- i810_dma_dispatch_clear( dev, clear.flags,
- clear.clear_color,
+ i810_dma_dispatch_clear( dev, clear.flags,
+ clear.clear_color,
clear.clear_depth );
return 0;
}
@@ -1326,7 +1118,7 @@ int i810_swap_bufs(struct inode *inode, struct file *filp,
{
drm_file_t *priv = filp->private_data;
drm_device_t *dev = priv->dev;
-
+
DRM_DEBUG("i810_swap_bufs\n");
if(!_DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock)) {
@@ -1345,8 +1137,8 @@ int i810_getage(struct inode *inode, struct file *filp, unsigned int cmd,
drm_device_t *dev = priv->dev;
drm_i810_private_t *dev_priv = (drm_i810_private_t *)dev->dev_private;
u32 *hw_status = (u32 *)dev_priv->hw_status_page;
- drm_i810_sarea_t *sarea_priv = (drm_i810_sarea_t *)
- dev_priv->sarea_priv;
+ drm_i810_sarea_t *sarea_priv = (drm_i810_sarea_t *)
+ dev_priv->sarea_priv;
sarea_priv->last_dispatch = (int) hw_status[5];
return 0;
@@ -1361,18 +1153,18 @@ int i810_getbuf(struct inode *inode, struct file *filp, unsigned int cmd,
drm_i810_dma_t d;
drm_i810_private_t *dev_priv = (drm_i810_private_t *)dev->dev_private;
u32 *hw_status = (u32 *)dev_priv->hw_status_page;
- drm_i810_sarea_t *sarea_priv = (drm_i810_sarea_t *)
- dev_priv->sarea_priv;
+ drm_i810_sarea_t *sarea_priv = (drm_i810_sarea_t *)
+ dev_priv->sarea_priv;
DRM_DEBUG("getbuf\n");
if (copy_from_user(&d, (drm_i810_dma_t *)arg, sizeof(d)))
return -EFAULT;
-
+
if(!_DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock)) {
DRM_ERROR("i810_dma called without lock held\n");
return -EINVAL;
}
-
+
d.granted = 0;
retcode = i810_dma_get_buffer(dev, &d, filp);
@@ -1395,8 +1187,8 @@ int i810_copybuf(struct inode *inode, struct file *filp, unsigned int cmd,
drm_i810_copy_t d;
drm_i810_private_t *dev_priv = (drm_i810_private_t *)dev->dev_private;
u32 *hw_status = (u32 *)dev_priv->hw_status_page;
- drm_i810_sarea_t *sarea_priv = (drm_i810_sarea_t *)
- dev_priv->sarea_priv;
+ drm_i810_sarea_t *sarea_priv = (drm_i810_sarea_t *)
+ dev_priv->sarea_priv;
drm_buf_t *buf;
drm_i810_buf_priv_t *buf_priv;
drm_device_dma_t *dma = dev->dma;
@@ -1405,7 +1197,7 @@ int i810_copybuf(struct inode *inode, struct file *filp, unsigned int cmd,
DRM_ERROR("i810_dma called without lock held\n");
return -EINVAL;
}
-
+
if (copy_from_user(&d, (drm_i810_copy_t *)arg, sizeof(d)))
return -EFAULT;
diff --git a/linux/i810_drm.h b/linux/i810_drm.h
index c5f51c9a..cee189b7 100644
--- a/linux/i810_drm.h
+++ b/linux/i810_drm.h
@@ -98,8 +98,8 @@ typedef struct _drm_i810_init {
I810_INIT_DMA = 0x01,
I810_CLEANUP_DMA = 0x02
} func;
- int ring_map_idx;
- int buffer_map_idx;
+ unsigned int mmio_offset;
+ unsigned int buffers_offset;
int sarea_priv_offset;
unsigned int ring_start;
unsigned int ring_end;
diff --git a/linux/i810_drv.c b/linux/i810_drv.c
index 7152eac3..12a59dbf 100644
--- a/linux/i810_drv.c
+++ b/linux/i810_drv.c
@@ -19,630 +19,64 @@
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
- * DEALINGS IN THE SOFTWARE.
- *
- * Authors: Rickard E. (Rik) Faith <faith@valinux.com>
- * Jeff Hartmann <jhartmann@valinux.com>
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
*
+ * Authors:
+ * Rickard E. (Rik) Faith <faith@valinux.com>
+ * Jeff Hartmann <jhartmann@valinux.com>
+ * Gareth Hughes <gareth@valinux.com>
*/
#include <linux/config.h>
+#include "i810.h"
#include "drmP.h"
#include "i810_drv.h"
-#define I810_NAME "i810"
-#define I810_DESC "Intel I810"
-#define I810_DATE "20000928"
-#define I810_MAJOR 1
-#define I810_MINOR 1
-#define I810_PATCHLEVEL 0
-
-static drm_device_t i810_device;
-drm_ctx_t i810_res_ctx;
-
-static struct file_operations i810_fops = {
-#if LINUX_VERSION_CODE >= 0x020400
- /* This started being used during 2.4.0-test */
- owner: THIS_MODULE,
-#endif
- open: i810_open,
- flush: drm_flush,
- release: i810_release,
- ioctl: i810_ioctl,
- mmap: drm_mmap,
- read: drm_read,
- fasync: drm_fasync,
- poll: drm_poll,
-};
-
-static struct miscdevice i810_misc = {
- minor: MISC_DYNAMIC_MINOR,
- name: I810_NAME,
- fops: &i810_fops,
-};
-
-static drm_ioctl_desc_t i810_ioctls[] = {
- [DRM_IOCTL_NR(DRM_IOCTL_VERSION)] = { i810_version, 0, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_GET_UNIQUE)] = { drm_getunique, 0, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_GET_MAGIC)] = { drm_getmagic, 0, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_IRQ_BUSID)] = { drm_irq_busid, 0, 1 },
-
- [DRM_IOCTL_NR(DRM_IOCTL_SET_UNIQUE)] = { drm_setunique, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_BLOCK)] = { drm_block, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_UNBLOCK)] = { drm_unblock, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_CONTROL)] = { i810_control, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_AUTH_MAGIC)] = { drm_authmagic, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_ADD_MAP)] = { drm_addmap, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_ADD_BUFS)] = { i810_addbufs, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_MARK_BUFS)] = { i810_markbufs, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_INFO_BUFS)] = { i810_infobufs, 1, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_FREE_BUFS)] = { i810_freebufs, 1, 0 },
-
- [DRM_IOCTL_NR(DRM_IOCTL_ADD_CTX)] = { i810_addctx, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_RM_CTX)] = { i810_rmctx, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_MOD_CTX)] = { i810_modctx, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_GET_CTX)] = { i810_getctx, 1, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_SWITCH_CTX)] = { i810_switchctx, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_NEW_CTX)] = { i810_newctx, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_RES_CTX)] = { i810_resctx, 1, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_ADD_DRAW)] = { drm_adddraw, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_RM_DRAW)] = { drm_rmdraw, 1, 1 },
-
- [DRM_IOCTL_NR(DRM_IOCTL_LOCK)] = { i810_lock, 1, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_UNLOCK)] = { i810_unlock, 1, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_FINISH)] = { drm_finish, 1, 0 },
-
- [DRM_IOCTL_NR(DRM_IOCTL_AGP_ACQUIRE)] = { drm_agp_acquire, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_AGP_RELEASE)] = { drm_agp_release, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_AGP_ENABLE)] = { drm_agp_enable, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_AGP_INFO)] = { drm_agp_info, 1, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_AGP_ALLOC)] = { drm_agp_alloc, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_AGP_FREE)] = { drm_agp_free, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_AGP_BIND)] = { drm_agp_bind, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_AGP_UNBIND)] = { drm_agp_unbind, 1, 1 },
-
- [DRM_IOCTL_NR(DRM_IOCTL_I810_INIT)] = { i810_dma_init, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_I810_VERTEX)] = { i810_dma_vertex, 1, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_I810_CLEAR)] = { i810_clear_bufs, 1, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_I810_FLUSH)] = { i810_flush_ioctl,1, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_I810_GETAGE)] = { i810_getage, 1, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_I810_GETBUF)] = { i810_getbuf, 1, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_I810_SWAP)] = { i810_swap_bufs, 1, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_I810_COPY)] = { i810_copybuf, 1, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_I810_DOCOPY)] = { i810_docopy, 1, 0 },
-};
-
-#define I810_IOCTL_COUNT DRM_ARRAY_SIZE(i810_ioctls)
-
-#ifdef MODULE
-static char *i810 = NULL;
-#endif
-
-MODULE_AUTHOR("VA Linux Systems, Inc.");
-MODULE_DESCRIPTION("Intel I810");
-MODULE_PARM(i810, "s");
-
-#ifndef MODULE
-/* i810_options is called by the kernel to parse command-line options
- * passed via the boot-loader (e.g., LILO). It calls the insmod option
- * routine, drm_parse_drm.
- */
-
-static int __init i810_options(char *str)
-{
- drm_parse_options(str);
- return 1;
-}
-
-__setup("i810=", i810_options);
-#endif
-
-static int i810_setup(drm_device_t *dev)
-{
- int i;
-
- atomic_set(&dev->ioctl_count, 0);
- atomic_set(&dev->vma_count, 0);
- dev->buf_use = 0;
- atomic_set(&dev->buf_alloc, 0);
-
- drm_dma_setup(dev);
-
- atomic_set(&dev->total_open, 0);
- atomic_set(&dev->total_close, 0);
- atomic_set(&dev->total_ioctl, 0);
- atomic_set(&dev->total_irq, 0);
- atomic_set(&dev->total_ctx, 0);
- atomic_set(&dev->total_locks, 0);
- atomic_set(&dev->total_unlocks, 0);
- atomic_set(&dev->total_contends, 0);
- atomic_set(&dev->total_sleeps, 0);
-
- for (i = 0; i < DRM_HASH_SIZE; i++) {
- dev->magiclist[i].head = NULL;
- dev->magiclist[i].tail = NULL;
- }
- dev->maplist = NULL;
- dev->map_count = 0;
- dev->vmalist = NULL;
- dev->lock.hw_lock = NULL;
- init_waitqueue_head(&dev->lock.lock_queue);
- dev->queue_count = 0;
- dev->queue_reserved = 0;
- dev->queue_slots = 0;
- dev->queuelist = NULL;
- dev->irq = 0;
- dev->context_flag = 0;
- dev->interrupt_flag = 0;
- dev->dma_flag = 0;
- dev->last_context = 0;
- dev->last_switch = 0;
- dev->last_checked = 0;
- init_timer(&dev->timer);
- init_waitqueue_head(&dev->context_wait);
-#if DRM_DMA_HISTO
- memset(&dev->histo, 0, sizeof(dev->histo));
-#endif
- dev->ctx_start = 0;
- dev->lck_start = 0;
-
- dev->buf_rp = dev->buf;
- dev->buf_wp = dev->buf;
- dev->buf_end = dev->buf + DRM_BSZ;
- dev->buf_async = NULL;
- init_waitqueue_head(&dev->buf_readers);
- init_waitqueue_head(&dev->buf_writers);
-
- DRM_DEBUG("\n");
-
- /* The kernel's context could be created here, but is now created
- in drm_dma_enqueue. This is more resource-efficient for
- hardware that does not do DMA, but may mean that
- drm_select_queue fails between the time the interrupt is
- initialized and the time the queues are initialized. */
-
- return 0;
-}
-
-
-static int i810_takedown(drm_device_t *dev)
-{
- int i;
- drm_magic_entry_t *pt, *next;
- drm_map_t *map;
- drm_vma_entry_t *vma, *vma_next;
-
- DRM_DEBUG("\n");
-
- if (dev->irq) i810_irq_uninstall(dev);
-
- down(&dev->struct_sem);
- del_timer(&dev->timer);
-
- if (dev->devname) {
- drm_free(dev->devname, strlen(dev->devname)+1, DRM_MEM_DRIVER);
- dev->devname = NULL;
- }
-
- if (dev->unique) {
- drm_free(dev->unique, strlen(dev->unique)+1, DRM_MEM_DRIVER);
- dev->unique = NULL;
- dev->unique_len = 0;
- }
- /* Clear pid list */
- for (i = 0; i < DRM_HASH_SIZE; i++) {
- for (pt = dev->magiclist[i].head; pt; pt = next) {
- next = pt->next;
- drm_free(pt, sizeof(*pt), DRM_MEM_MAGIC);
- }
- dev->magiclist[i].head = dev->magiclist[i].tail = NULL;
- }
- /* Clear AGP information */
- if (dev->agp) {
- drm_agp_mem_t *entry;
- drm_agp_mem_t *nexte;
-
- /* Remove AGP resources, but leave dev->agp
- intact until r128_cleanup is called. */
- for (entry = dev->agp->memory; entry; entry = nexte) {
- nexte = entry->next;
- if (entry->bound) drm_unbind_agp(entry->memory);
- drm_free_agp(entry->memory, entry->pages);
- drm_free(entry, sizeof(*entry), DRM_MEM_AGPLISTS);
- }
- dev->agp->memory = NULL;
-
- if (dev->agp->acquired) _drm_agp_release();
-
- dev->agp->acquired = 0;
- dev->agp->enabled = 0;
- }
- /* Clear vma list (only built for debugging) */
- if (dev->vmalist) {
- for (vma = dev->vmalist; vma; vma = vma_next) {
- vma_next = vma->next;
- drm_free(vma, sizeof(*vma), DRM_MEM_VMAS);
- }
- dev->vmalist = NULL;
- }
-
- /* Clear map area and mtrr information */
- if (dev->maplist) {
- for (i = 0; i < dev->map_count; i++) {
- map = dev->maplist[i];
- switch (map->type) {
- case _DRM_REGISTERS:
- case _DRM_FRAME_BUFFER:
-#ifdef CONFIG_MTRR
- if (map->mtrr >= 0) {
- int retcode;
- retcode = mtrr_del(map->mtrr,
- map->offset,
- map->size);
- DRM_DEBUG("mtrr_del = %d\n", retcode);
- }
-#endif
- drm_ioremapfree(map->handle, map->size);
- break;
- case _DRM_SHM:
- drm_free_pages((unsigned long)map->handle,
- drm_order(map->size)
- - PAGE_SHIFT,
- DRM_MEM_SAREA);
- break;
- case _DRM_AGP:
- break;
- }
- drm_free(map, sizeof(*map), DRM_MEM_MAPS);
- }
- drm_free(dev->maplist,
- dev->map_count * sizeof(*dev->maplist),
- DRM_MEM_MAPS);
- dev->maplist = NULL;
- dev->map_count = 0;
- }
-
- if (dev->queuelist) {
- for (i = 0; i < dev->queue_count; i++) {
- drm_waitlist_destroy(&dev->queuelist[i]->waitlist);
- if (dev->queuelist[i]) {
- drm_free(dev->queuelist[i],
- sizeof(*dev->queuelist[0]),
- DRM_MEM_QUEUES);
- dev->queuelist[i] = NULL;
- }
- }
- drm_free(dev->queuelist,
- dev->queue_slots * sizeof(*dev->queuelist),
- DRM_MEM_QUEUES);
- dev->queuelist = NULL;
- }
-
- drm_dma_takedown(dev);
-
- dev->queue_count = 0;
- if (dev->lock.hw_lock) {
- dev->lock.hw_lock = NULL; /* SHM removed */
- dev->lock.pid = 0;
- wake_up_interruptible(&dev->lock.lock_queue);
- }
- up(&dev->struct_sem);
-
- return 0;
-}
-
-/* i810_init is called via init_module at module load time, or via
- * linux/init/main.c (this is not currently supported). */
-
-static int __init i810_init(void)
-{
- int retcode;
- drm_device_t *dev = &i810_device;
-
- DRM_DEBUG("\n");
-
- memset((void *)dev, 0, sizeof(*dev));
- dev->count_lock = SPIN_LOCK_UNLOCKED;
- sema_init(&dev->struct_sem, 1);
-
-#ifdef MODULE
- drm_parse_options(i810);
-#endif
- DRM_DEBUG("doing misc_register\n");
- if ((retcode = misc_register(&i810_misc))) {
- DRM_ERROR("Cannot register \"%s\"\n", I810_NAME);
- return retcode;
- }
- dev->device = MKDEV(MISC_MAJOR, i810_misc.minor);
- dev->name = I810_NAME;
-
- DRM_DEBUG("doing mem init\n");
- drm_mem_init();
- DRM_DEBUG("doing proc init\n");
- drm_proc_init(dev);
- DRM_DEBUG("doing agp init\n");
- dev->agp = drm_agp_init();
- if(dev->agp == NULL) {
- DRM_INFO("The i810 drm module requires the agpgart module"
- " to function correctly\nPlease load the agpgart"
- " module before you load the i810 module\n");
- drm_proc_cleanup();
- misc_deregister(&i810_misc);
- i810_takedown(dev);
- return -ENOMEM;
- }
- DRM_DEBUG("doing ctxbitmap init\n");
- if((retcode = drm_ctxbitmap_init(dev))) {
- DRM_ERROR("Cannot allocate memory for context bitmap.\n");
- drm_proc_cleanup();
- misc_deregister(&i810_misc);
- i810_takedown(dev);
- return retcode;
- }
-
- DRM_INFO("Initialized %s %d.%d.%d %s on minor %d\n",
- I810_NAME,
- I810_MAJOR,
- I810_MINOR,
- I810_PATCHLEVEL,
- I810_DATE,
- i810_misc.minor);
-
- return 0;
-}
-
-/* i810_cleanup is called via cleanup_module at module unload time. */
-
-static void __exit i810_cleanup(void)
-{
- drm_device_t *dev = &i810_device;
-
- DRM_DEBUG("\n");
-
- drm_proc_cleanup();
- if (misc_deregister(&i810_misc)) {
- DRM_ERROR("Cannot unload module\n");
- } else {
- DRM_INFO("Module unloaded\n");
- }
- drm_ctxbitmap_cleanup(dev);
- i810_takedown(dev);
- if (dev->agp) {
- drm_agp_uninit();
- drm_free(dev->agp, sizeof(*dev->agp), DRM_MEM_AGPLISTS);
- dev->agp = NULL;
- }
-}
-
-module_init(i810_init);
-module_exit(i810_cleanup);
-
-
-int i810_version(struct inode *inode, struct file *filp, unsigned int cmd,
- unsigned long arg)
-{
- drm_version_t version;
- int len;
-
- if (copy_from_user(&version,
- (drm_version_t *)arg,
- sizeof(version)))
- return -EFAULT;
-
-#define DRM_COPY(name,value) \
- len = strlen(value); \
- if (len > name##_len) len = name##_len; \
- name##_len = strlen(value); \
- if (len && name) { \
- if (copy_to_user(name, value, len)) \
- return -EFAULT; \
- }
-
- version.version_major = I810_MAJOR;
- version.version_minor = I810_MINOR;
- version.version_patchlevel = I810_PATCHLEVEL;
-
- DRM_COPY(version.name, I810_NAME);
- DRM_COPY(version.date, I810_DATE);
- DRM_COPY(version.desc, I810_DESC);
-
- if (copy_to_user((drm_version_t *)arg,
- &version,
- sizeof(version)))
- return -EFAULT;
- return 0;
-}
-
-int i810_open(struct inode *inode, struct file *filp)
-{
- drm_device_t *dev = &i810_device;
- int retcode = 0;
-
- DRM_DEBUG("open_count = %d\n", dev->open_count);
- if (!(retcode = drm_open_helper(inode, filp, dev))) {
-#if LINUX_VERSION_CODE < 0x020333
- MOD_INC_USE_COUNT; /* Needed before Linux 2.3.51 */
-#endif
- atomic_inc(&dev->total_open);
- spin_lock(&dev->count_lock);
- if (!dev->open_count++) {
- spin_unlock(&dev->count_lock);
- return i810_setup(dev);
- }
- spin_unlock(&dev->count_lock);
- }
- return retcode;
-}
-
-int i810_release(struct inode *inode, struct file *filp)
-{
- drm_file_t *priv = filp->private_data;
- drm_device_t *dev;
- int retcode = 0;
-
- lock_kernel();
- dev = priv->dev;
- DRM_DEBUG("pid = %d, device = 0x%x, open_count = %d\n",
- current->pid, dev->device, dev->open_count);
-
- if (dev->lock.hw_lock && _DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock)
- && dev->lock.pid == current->pid) {
- i810_reclaim_buffers(dev, priv->pid);
- DRM_ERROR("Process %d dead, freeing lock for context %d\n",
- current->pid,
- _DRM_LOCKING_CONTEXT(dev->lock.hw_lock->lock));
- drm_lock_free(dev,
- &dev->lock.hw_lock->lock,
- _DRM_LOCKING_CONTEXT(dev->lock.hw_lock->lock));
-
- /* FIXME: may require heavy-handed reset of
- hardware at this point, possibly
- processed via a callback to the X
- server. */
- } else if (dev->lock.hw_lock) {
- /* The lock is required to reclaim buffers */
- DECLARE_WAITQUEUE(entry, current);
- add_wait_queue(&dev->lock.lock_queue, &entry);
- for (;;) {
- current->state = TASK_INTERRUPTIBLE;
- if (!dev->lock.hw_lock) {
- /* Device has been unregistered */
- retcode = -EINTR;
- break;
- }
- if (drm_lock_take(&dev->lock.hw_lock->lock,
- DRM_KERNEL_CONTEXT)) {
- dev->lock.pid = priv->pid;
- dev->lock.lock_time = jiffies;
- atomic_inc(&dev->total_locks);
- break; /* Got lock */
- }
- /* Contention */
- atomic_inc(&dev->total_sleeps);
- schedule();
- if (signal_pending(current)) {
- retcode = -ERESTARTSYS;
- break;
- }
- }
- current->state = TASK_RUNNING;
- remove_wait_queue(&dev->lock.lock_queue, &entry);
- if(!retcode) {
- i810_reclaim_buffers(dev, priv->pid);
- drm_lock_free(dev, &dev->lock.hw_lock->lock,
- DRM_KERNEL_CONTEXT);
- }
- }
- drm_fasync(-1, filp, 0);
-
- down(&dev->struct_sem);
- if (priv->prev) priv->prev->next = priv->next;
- else dev->file_first = priv->next;
- if (priv->next) priv->next->prev = priv->prev;
- else dev->file_last = priv->prev;
- up(&dev->struct_sem);
-
- drm_free(priv, sizeof(*priv), DRM_MEM_FILES);
-#if LINUX_VERSION_CODE < 0x020333
- MOD_DEC_USE_COUNT; /* Needed before Linux 2.3.51 */
-#endif
- atomic_inc(&dev->total_close);
- spin_lock(&dev->count_lock);
- if (!--dev->open_count) {
- if (atomic_read(&dev->ioctl_count) || dev->blocked) {
- DRM_ERROR("Device busy: %d %d\n",
- atomic_read(&dev->ioctl_count),
- dev->blocked);
- spin_unlock(&dev->count_lock);
- unlock_kernel();
- return -EBUSY;
- }
- spin_unlock(&dev->count_lock);
- unlock_kernel();
- return i810_takedown(dev);
- }
- spin_unlock(&dev->count_lock);
- unlock_kernel();
- return retcode;
-}
-
-/* drm_ioctl is called whenever a process performs an ioctl on /dev/drm. */
-
-int i810_ioctl(struct inode *inode, struct file *filp, unsigned int cmd,
- unsigned long arg)
-{
- int nr = DRM_IOCTL_NR(cmd);
- drm_file_t *priv = filp->private_data;
- drm_device_t *dev = priv->dev;
- int retcode = 0;
- drm_ioctl_desc_t *ioctl;
- drm_ioctl_t *func;
-
- atomic_inc(&dev->ioctl_count);
- atomic_inc(&dev->total_ioctl);
- ++priv->ioctl_count;
-
- DRM_DEBUG("pid = %d, cmd = 0x%02x, nr = 0x%02x, dev 0x%x, auth = %d\n",
- current->pid, cmd, nr, dev->device, priv->authenticated);
-
- if (nr >= I810_IOCTL_COUNT) {
- retcode = -EINVAL;
- } else {
- ioctl = &i810_ioctls[nr];
- func = ioctl->func;
-
- if (!func) {
- DRM_DEBUG("no function\n");
- retcode = -EINVAL;
- } else if ((ioctl->root_only && !capable(CAP_SYS_ADMIN))
- || (ioctl->auth_needed && !priv->authenticated)) {
- retcode = -EACCES;
- } else {
- retcode = (func)(inode, filp, cmd, arg);
- }
- }
-
- atomic_dec(&dev->ioctl_count);
- return retcode;
-}
-
-int i810_unlock(struct inode *inode, struct file *filp, unsigned int cmd,
- unsigned long arg)
-{
- drm_file_t *priv = filp->private_data;
- drm_device_t *dev = priv->dev;
- drm_lock_t lock;
-
- if (copy_from_user(&lock, (drm_lock_t *)arg, sizeof(lock)))
- return -EFAULT;
-
- if (lock.context == DRM_KERNEL_CONTEXT) {
- DRM_ERROR("Process %d using kernel context %d\n",
- current->pid, lock.context);
- return -EINVAL;
- }
-
- DRM_DEBUG("%d frees lock (%d holds)\n",
- lock.context,
- _DRM_LOCKING_CONTEXT(dev->lock.hw_lock->lock));
- atomic_inc(&dev->total_unlocks);
- if (_DRM_LOCK_IS_CONT(dev->lock.hw_lock->lock))
- atomic_inc(&dev->total_contends);
- drm_lock_transfer(dev, &dev->lock.hw_lock->lock, DRM_KERNEL_CONTEXT);
- if (!dev->context_flag) {
- if (drm_lock_free(dev, &dev->lock.hw_lock->lock,
- DRM_KERNEL_CONTEXT)) {
- DRM_ERROR("\n");
- }
- }
-#if DRM_DMA_HISTOGRAM
- atomic_inc(&dev->histo.lhld[drm_histogram_slot(get_cycles()
- - dev->lck_start)]);
-#endif
-
- unblock_all_signals();
- return 0;
-}
+#define DRIVER_AUTHOR "VA Linux Systems Inc."
+
+#define DRIVER_NAME "i810"
+#define DRIVER_DESC "Intel i810"
+#define DRIVER_DATE "20010215"
+
+#define DRIVER_MAJOR 1
+#define DRIVER_MINOR 1
+#define DRIVER_PATCHLEVEL 0
+
+#define DRIVER_IOCTLS \
+ [DRM_IOCTL_NR(DRM_IOCTL_I810_INIT)] = { i810_dma_init, 1, 1 }, \
+ [DRM_IOCTL_NR(DRM_IOCTL_I810_VERTEX)] = { i810_dma_vertex, 1, 0 }, \
+ [DRM_IOCTL_NR(DRM_IOCTL_I810_CLEAR)] = { i810_clear_bufs, 1, 0 }, \
+ [DRM_IOCTL_NR(DRM_IOCTL_I810_FLUSH)] = { i810_flush_ioctl, 1, 0 }, \
+ [DRM_IOCTL_NR(DRM_IOCTL_I810_GETAGE)] = { i810_getage, 1, 0 }, \
+ [DRM_IOCTL_NR(DRM_IOCTL_I810_GETBUF)] = { i810_getbuf, 1, 0 }, \
+ [DRM_IOCTL_NR(DRM_IOCTL_I810_SWAP)] = { i810_swap_bufs, 1, 0 }, \
+ [DRM_IOCTL_NR(DRM_IOCTL_I810_COPY)] = { i810_copybuf, 1, 0 }, \
+ [DRM_IOCTL_NR(DRM_IOCTL_I810_DOCOPY)] = { i810_docopy, 1, 0 },
+
+
+#define __HAVE_COUNTERS 4
+#define __HAVE_COUNTER6 _DRM_STAT_IRQ
+#define __HAVE_COUNTER7 _DRM_STAT_PRIMARY
+#define __HAVE_COUNTER8 _DRM_STAT_SECONDARY
+#define __HAVE_COUNTER9 _DRM_STAT_DMA
+
+
+#include "drm_agpsupport.h"
+#include "drm_auth.h"
+#include "drm_bufs.h"
+#include "drm_context.h"
+#include "drm_dma.h"
+#include "drm_drawable.h"
+#include "drm_drv.h"
+#include "drm_fops.h"
+#include "drm_init.h"
+#include "drm_ioctl.h"
+#include "drm_lock.h"
+#include "drm_lists.h"
+#include "drm_memory.h"
+#include "drm_proc.h"
+#include "drm_vm.h"
+#include "drm_stub.h"
diff --git a/linux/i810_drv.h b/linux/i810_drv.h
index 1c957401..e1b17148 100644
--- a/linux/i810_drv.h
+++ b/linux/i810_drv.h
@@ -11,11 +11,11 @@
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
- *
+ *
* The above copyright notice and this permission notice (including the next
* paragraph) shall be included in all copies or substantial portions of the
* Software.
- *
+ *
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
@@ -54,11 +54,12 @@ typedef struct _drm_i810_ring_buffer{
} drm_i810_ring_buffer_t;
typedef struct drm_i810_private {
- int ring_map_idx;
- int buffer_map_idx;
+ drm_map_t *sarea_map;
+ drm_map_t *buffer_map;
+ drm_map_t *mmio_map;
- drm_i810_ring_buffer_t ring;
drm_i810_sarea_t *sarea_priv;
+ drm_i810_ring_buffer_t ring;
unsigned long hw_status_page;
unsigned long counter;
@@ -67,78 +68,33 @@ typedef struct drm_i810_private {
wait_queue_head_t flush_queue; /* Processes waiting until flush */
drm_buf_t *mmap_buffer;
-
+
u32 front_di1, back_di1, zi1;
-
+
int back_offset;
int depth_offset;
int w, h;
int pitch;
} drm_i810_private_t;
- /* i810_drv.c */
-extern int i810_version(struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg);
-extern int i810_open(struct inode *inode, struct file *filp);
-extern int i810_release(struct inode *inode, struct file *filp);
-extern int i810_ioctl(struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg);
-extern int i810_unlock(struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg);
-
/* i810_dma.c */
extern int i810_dma_schedule(drm_device_t *dev, int locked);
extern int i810_getbuf(struct inode *inode, struct file *filp,
unsigned int cmd, unsigned long arg);
-extern int i810_irq_install(drm_device_t *dev, int irq);
-extern int i810_irq_uninstall(drm_device_t *dev);
-extern int i810_control(struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg);
-extern int i810_lock(struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg);
extern int i810_dma_init(struct inode *inode, struct file *filp,
unsigned int cmd, unsigned long arg);
extern int i810_flush_ioctl(struct inode *inode, struct file *filp,
unsigned int cmd, unsigned long arg);
extern void i810_reclaim_buffers(drm_device_t *dev, pid_t pid);
-extern int i810_getage(struct inode *inode, struct file *filp, unsigned int cmd,
- unsigned long arg);
-extern int i810_mmap_buffers(struct file *filp, struct vm_area_struct *vma);
-extern int i810_copybuf(struct inode *inode, struct file *filp,
+extern int i810_getage(struct inode *inode, struct file *filp,
unsigned int cmd, unsigned long arg);
-extern int i810_docopy(struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg);
-
- /* i810_bufs.c */
-extern int i810_addbufs(struct inode *inode, struct file *filp,
+extern int i810_mmap_buffers(struct file *filp, struct vm_area_struct *vma);
+extern int i810_copybuf(struct inode *inode, struct file *filp,
unsigned int cmd, unsigned long arg);
-extern int i810_infobufs(struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg);
-extern int i810_markbufs(struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg);
-extern int i810_freebufs(struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg);
-extern int i810_addmap(struct inode *inode, struct file *filp,
+extern int i810_docopy(struct inode *inode, struct file *filp,
unsigned int cmd, unsigned long arg);
- /* i810_context.c */
-extern int i810_resctx(struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg);
-extern int i810_addctx(struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg);
-extern int i810_modctx(struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg);
-extern int i810_getctx(struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg);
-extern int i810_switchctx(struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg);
-extern int i810_newctx(struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg);
-extern int i810_rmctx(struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg);
-
-extern int i810_context_switch(drm_device_t *dev, int old, int new);
-extern int i810_context_switch_complete(drm_device_t *dev, int new);
+extern void i810_dma_quiescent(drm_device_t *dev);
#define I810_VERBOSE 0
@@ -152,6 +108,18 @@ int i810_swap_bufs(struct inode *inode, struct file *filp,
int i810_clear_bufs(struct inode *inode, struct file *filp,
unsigned int cmd, unsigned long arg);
+
+#define I810_BASE(reg) ((unsigned long) \
+ dev_priv->mmio_map->handle)
+#define I810_ADDR(reg) (I810_BASE(reg) + reg)
+#define I810_DEREF(reg) *(__volatile__ int *)I810_ADDR(reg)
+#define I810_READ(reg) I810_DEREF(reg)
+#define I810_WRITE(reg,val) do { I810_DEREF(reg) = val; } while (0)
+#define I810_DEREF16(reg) *(__volatile__ u16 *)I810_ADDR(reg)
+#define I810_READ16(reg) I810_DEREF16(reg)
+#define I810_WRITE16(reg,val) do { I810_DEREF16(reg) = val; } while (0)
+
+
#define GFX_OP_USER_INTERRUPT ((0<<29)|(2<<23))
#define GFX_OP_BREAKPOINT_INTERRUPT ((0<<29)|(1<<23))
#define CMD_REPORT_HEAD (7<<23)
@@ -184,7 +152,7 @@ int i810_clear_bufs(struct inode *inode, struct file *filp,
#define RING_START 0x08
#define START_ADDR 0x00FFFFF8
#define RING_LEN 0x0C
-#define RING_NR_PAGES 0x000FF000
+#define RING_NR_PAGES 0x000FF000
#define RING_REPORT_MASK 0x00000006
#define RING_REPORT_64K 0x00000002
#define RING_REPORT_128K 0x00000004
@@ -222,4 +190,3 @@ int i810_clear_bufs(struct inode *inode, struct file *filp,
#endif
-
diff --git a/linux/mga_dma.c b/linux/mga_dma.c
index 356376ca..8b0a67a2 100644
--- a/linux/mga_dma.c
+++ b/linux/mga_dma.c
@@ -24,1028 +24,695 @@
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
* DEALINGS IN THE SOFTWARE.
*
- * Authors: Rickard E. (Rik) Faith <faith@valinux.com>
- * Jeff Hartmann <jhartmann@valinux.com>
- * Keith Whitwell <keithw@valinux.com>
+ * Authors:
+ * Rickard E. (Rik) Faith <faith@valinux.com>
+ * Jeff Hartmann <jhartmann@valinux.com>
+ * Keith Whitwell <keithw@valinux.com>
*
+ * Rewritten by:
+ * Gareth Hughes <gareth@valinux.com>
*/
#define __NO_VERSION__
+#include "mga.h"
#include "drmP.h"
#include "mga_drv.h"
#include <linux/interrupt.h> /* For task queue support */
+#include <linux/delay.h>
-#define MGA_REG(reg) 2
-#define MGA_BASE(reg) ((unsigned long) \
- ((drm_device_t *)dev)->maplist[MGA_REG(reg)]->handle)
-#define MGA_ADDR(reg) (MGA_BASE(reg) + reg)
-#define MGA_DEREF(reg) *(__volatile__ int *)MGA_ADDR(reg)
-#define MGA_READ(reg) MGA_DEREF(reg)
-#define MGA_WRITE(reg,val) do { MGA_DEREF(reg) = val; } while (0)
+#define MGA_DEFAULT_USEC_TIMEOUT 10000
-#define PDEA_pagpxfer_enable 0x2
-static int mga_flush_queue(drm_device_t *dev);
+/* ================================================================
+ * Engine control
+ */
-static unsigned long mga_alloc_page(drm_device_t *dev)
+int mga_do_wait_for_idle( drm_mga_private_t *dev_priv )
{
- unsigned long address;
+ u32 status = 0;
+ int i;
+ DRM_DEBUG( "%s\n", __FUNCTION__ );
- address = __get_free_page(GFP_KERNEL);
- if(address == 0UL) {
- return 0;
+ for ( i = 0 ; i < dev_priv->usec_timeout ; i++ ) {
+ status = MGA_READ( MGA_STATUS ) & MGA_ENGINE_IDLE_MASK;
+ if ( status == MGA_ENDPRDMASTS ) {
+ MGA_WRITE8( MGA_CRTC_INDEX, 0 );
+ return 0;
+ }
+ udelay( 1 );
}
- atomic_inc(&virt_to_page(address)->count);
- set_bit(PG_reserved, &virt_to_page(address)->flags);
- return address;
+ DRM_DEBUG( "failed! status=0x%08x\n", status );
+ return -EBUSY;
}
-static void mga_free_page(drm_device_t *dev, unsigned long page)
+int mga_do_dma_idle( drm_mga_private_t *dev_priv )
{
- if(!page) return;
- atomic_dec(&virt_to_page(page)->count);
- clear_bit(PG_reserved, &virt_to_page(page)->flags);
- free_page(page);
- return;
+ u32 status = 0;
+ int i;
+ DRM_DEBUG( "%s\n", __FUNCTION__ );
+
+ for ( i = 0 ; i < dev_priv->usec_timeout ; i++ ) {
+ status = MGA_READ( MGA_STATUS ) & MGA_DMA_IDLE_MASK;
+ if ( status == MGA_ENDPRDMASTS ) return 0;
+ udelay( 1 );
+ }
+
+ DRM_DEBUG( "failed! status=0x%08x\n", status );
+ return -EBUSY;
}
-static void mga_delay(void)
+int mga_do_dma_reset( drm_mga_private_t *dev_priv )
{
- return;
-}
+ drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
+ drm_mga_primary_buffer_t *primary = &dev_priv->prim;
-/* These are two age tags that will never be sent to
- * the hardware */
-#define MGA_BUF_USED 0xffffffff
-#define MGA_BUF_FREE 0
+ DRM_DEBUG( "%s\n", __FUNCTION__ );
-static int mga_freelist_init(drm_device_t *dev)
-{
- drm_device_dma_t *dma = dev->dma;
- drm_buf_t *buf;
- drm_mga_buf_priv_t *buf_priv;
- drm_mga_private_t *dev_priv = (drm_mga_private_t *)dev->dev_private;
- drm_mga_freelist_t *item;
- int i;
-
- dev_priv->head = drm_alloc(sizeof(drm_mga_freelist_t), DRM_MEM_DRIVER);
- if(dev_priv->head == NULL) return -ENOMEM;
- memset(dev_priv->head, 0, sizeof(drm_mga_freelist_t));
- dev_priv->head->age = MGA_BUF_USED;
-
- for (i = 0; i < dma->buf_count; i++) {
- buf = dma->buflist[ i ];
- buf_priv = buf->dev_private;
- item = drm_alloc(sizeof(drm_mga_freelist_t),
- DRM_MEM_DRIVER);
- if(item == NULL) return -ENOMEM;
- memset(item, 0, sizeof(drm_mga_freelist_t));
- item->age = MGA_BUF_FREE;
- item->prev = dev_priv->head;
- item->next = dev_priv->head->next;
- if(dev_priv->head->next != NULL)
- dev_priv->head->next->prev = item;
- if(item->next == NULL) dev_priv->tail = item;
- item->buf = buf;
- buf_priv->my_freelist = item;
- buf_priv->discard = 0;
- buf_priv->dispatched = 0;
- dev_priv->head->next = item;
- }
+ /* The primary DMA stream should look like new right about now.
+ */
+ primary->tail = 0;
+ primary->space = primary->size;
+ primary->last_flush = 0;
- return 0;
-}
+ sarea_priv->last_wrap = 0;
-static void mga_freelist_cleanup(drm_device_t *dev)
-{
- drm_mga_private_t *dev_priv = (drm_mga_private_t *)dev->dev_private;
- drm_mga_freelist_t *item;
- drm_mga_freelist_t *prev;
-
- item = dev_priv->head;
- while(item) {
- prev = item;
- item = item->next;
- drm_free(prev, sizeof(drm_mga_freelist_t), DRM_MEM_DRIVER);
- }
+ /* FIXME: Reset counters, buffer ages etc...
+ */
+
+ /* FIXME: What else do we need to reinitialize? WARP stuff?
+ */
- dev_priv->head = dev_priv->tail = NULL;
+ return 0;
}
-/* Frees dispatch lock */
-static inline void mga_dma_quiescent(drm_device_t *dev)
+int mga_do_engine_reset( drm_mga_private_t *dev_priv )
{
- drm_device_dma_t *dma = dev->dma;
- drm_mga_private_t *dev_priv = (drm_mga_private_t *)dev->dev_private;
- drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
- unsigned long end;
- int i;
+ DRM_DEBUG( "%s\n", __FUNCTION__ );
- DRM_DEBUG("dispatch_status = 0x%02lx\n", dev_priv->dispatch_status);
- end = jiffies + (HZ*3);
- while(1) {
- if(!test_and_set_bit(MGA_IN_DISPATCH,
- &dev_priv->dispatch_status)) {
- break;
- }
- if((signed)(end - jiffies) <= 0) {
- DRM_ERROR("irqs: %d wanted %d\n",
- atomic_read(&dev->total_irq),
- atomic_read(&dma->total_lost));
- DRM_ERROR("lockup: dispatch_status = 0x%02lx,"
- " jiffies = %lu, end = %lu\n",
- dev_priv->dispatch_status, jiffies, end);
- return;
- }
- for (i = 0 ; i < 2000 ; i++) mga_delay();
- }
- end = jiffies + (HZ*3);
- DRM_DEBUG("quiescent status : %x\n", MGA_READ(MGAREG_STATUS));
- while((MGA_READ(MGAREG_STATUS) & 0x00030001) != 0x00020000) {
- if((signed)(end - jiffies) <= 0) {
- DRM_ERROR("irqs: %d wanted %d\n",
- atomic_read(&dev->total_irq),
- atomic_read(&dma->total_lost));
- DRM_ERROR("lockup\n");
- clear_bit(MGA_IN_DISPATCH, &dev_priv->dispatch_status);
- return;
- }
- for (i = 0 ; i < 2000 ; i++) mga_delay();
- }
- sarea_priv->dirty |= MGA_DMA_FLUSH;
+ /* Okay, so we've completely screwed up and locked the engine.
+ * How about we clean up after ourselves?
+ */
+ MGA_WRITE( MGA_RST, MGA_SOFTRESET );
+ udelay( 15 ); /* Wait at least 10 usecs */
+ MGA_WRITE( MGA_RST, 0 );
+
+ /* Initialize the registers that get clobbered by the soft
+ * reset. Many of the core register values survive a reset,
+ * but the drawing registers are basically all gone.
+ *
+ * 3D clients should probably die after calling this. The X
+ * server should reset the engine state to known values.
+ */
+#if 0
+ MGA_WRITE( MGA_PRIMPTR,
+ virt_to_bus((void *)dev_priv->prim.status_page) |
+ MGA_PRIMPTREN0 |
+ MGA_PRIMPTREN1 );
+#endif
- clear_bit(MGA_IN_DISPATCH, &dev_priv->dispatch_status);
- DRM_DEBUG("exit, dispatch_status = 0x%02lx\n",
- dev_priv->dispatch_status);
-}
+ MGA_WRITE( MGA_ICLEAR, MGA_SOFTRAPICLR );
+ MGA_WRITE( MGA_IEN, MGA_SOFTRAPIEN );
-static void mga_reset_freelist(drm_device_t *dev)
-{
- drm_device_dma_t *dma = dev->dma;
- drm_buf_t *buf;
- drm_mga_buf_priv_t *buf_priv;
- int i;
+ /* The primary DMA stream should look like new right about now.
+ */
+ mga_do_dma_reset( dev_priv );
- for (i = 0; i < dma->buf_count; i++) {
- buf = dma->buflist[ i ];
- buf_priv = buf->dev_private;
- buf_priv->my_freelist->age = MGA_BUF_FREE;
- }
+ /* This bad boy will never fail.
+ */
+ return 0;
}
-/* Least recently used :
- * These operations are not atomic b/c they are protected by the
- * hardware lock */
-drm_buf_t *mga_freelist_get(drm_device_t *dev)
+/* ================================================================
+ * Primary DMA stream
+ */
+
+void mga_do_dma_flush( drm_mga_private_t *dev_priv )
{
- DECLARE_WAITQUEUE(entry, current);
- drm_mga_private_t *dev_priv =
- (drm_mga_private_t *) dev->dev_private;
- drm_mga_freelist_t *prev;
- drm_mga_freelist_t *next;
- static int failed = 0;
- int return_null = 0;
-
- if(failed >= 1000 && dev_priv->tail->age >= dev_priv->last_prim_age) {
- DRM_DEBUG("Waiting on freelist,"
- " tail->age = %d, last_prim_age= %d\n",
- dev_priv->tail->age,
- dev_priv->last_prim_age);
- add_wait_queue(&dev_priv->buf_queue, &entry);
- set_bit(MGA_IN_GETBUF, &dev_priv->dispatch_status);
- for (;;) {
- current->state = TASK_INTERRUPTIBLE;
- mga_dma_schedule(dev, 0);
- if(dev_priv->tail->age < dev_priv->last_prim_age)
- break;
- atomic_inc(&dev->total_sleeps);
- schedule();
- if (signal_pending(current)) {
- ++return_null;
- break;
- }
- }
- clear_bit(MGA_IN_GETBUF, &dev_priv->dispatch_status);
- current->state = TASK_RUNNING;
- remove_wait_queue(&dev_priv->buf_queue, &entry);
- if (return_null) return NULL;
- }
+ drm_mga_primary_buffer_t *primary = &dev_priv->prim;
+ u32 head, tail;
+ DMA_LOCALS;
+ DRM_DEBUG( "%s:\n", __FUNCTION__ );
- if(dev_priv->tail->age < dev_priv->last_prim_age) {
- prev = dev_priv->tail->prev;
- next = dev_priv->tail;
- prev->next = NULL;
- next->prev = next->next = NULL;
- dev_priv->tail = prev;
- next->age = MGA_BUF_USED;
- failed = 0;
- return next->buf;
+ if ( primary->tail == primary->last_flush ) {
+ DRM_DEBUG( " bailing out...\n" );
+ return;
}
- failed++;
- return NULL;
-}
+ tail = primary->tail + dev_priv->primary->offset;
-int mga_freelist_put(drm_device_t *dev, drm_buf_t *buf)
-{
- drm_mga_private_t *dev_priv =
- (drm_mga_private_t *) dev->dev_private;
- drm_mga_buf_priv_t *buf_priv = buf->dev_private;
- drm_mga_freelist_t *prev;
- drm_mga_freelist_t *head;
- drm_mga_freelist_t *next;
+ /* We need to pad the stream between flushes, as the card
+ * actually (partially?) reads the first of these commands.
+ * See page 4-16 in the G400 manual, middle of the page or so.
+ */
+ BEGIN_DMA( 1 );
- if(buf_priv->my_freelist->age == MGA_BUF_USED) {
- /* Discarded buffer, put it on the tail */
- next = buf_priv->my_freelist;
- next->age = MGA_BUF_FREE;
- prev = dev_priv->tail;
- prev->next = next;
- next->prev = prev;
- next->next = NULL;
- dev_priv->tail = next;
+ DMA_BLOCK( MGA_DMAPAD, 0x00000000,
+ MGA_DMAPAD, 0x00000000,
+ MGA_DMAPAD, 0x00000000,
+ MGA_DMAPAD, 0x00000000 );
+
+ ADVANCE_DMA();
+
+ primary->last_flush = primary->tail;
+
+ head = MGA_READ( MGA_PRIMADDRESS );
+
+ if ( head <= tail ) {
+ primary->space = primary->size - primary->tail;
} else {
- /* Normally aged buffer, put it on the head + 1,
- * as the real head is a sentinal element
- */
- next = buf_priv->my_freelist;
- head = dev_priv->head;
- prev = head->next;
- head->next = next;
- prev->prev = next;
- next->prev = head;
- next->next = prev;
+ primary->space = head - tail;
}
- return 0;
+ DRM_DEBUG( " head = 0x%06lx\n", head - dev_priv->primary->offset );
+ DRM_DEBUG( " tail = 0x%06lx\n", tail - dev_priv->primary->offset );
+ DRM_DEBUG( " space = 0x%06x\n", primary->space );
+
+ mga_flush_write_combine();
+ MGA_WRITE( MGA_PRIMEND, tail | MGA_PAGPXFER );
+
+ DRM_DEBUG( "%s: done.\n", __FUNCTION__ );
}
-static int mga_init_primary_bufs(drm_device_t *dev, drm_mga_init_t *init)
+void mga_do_dma_wrap_start( drm_mga_private_t *dev_priv )
{
- drm_mga_private_t *dev_priv = dev->dev_private;
- drm_mga_prim_buf_t *prim_buffer;
- int i, temp, size_of_buf;
- int offset = init->reserved_map_agpstart;
-
- dev_priv->primary_size = ((init->primary_size + PAGE_SIZE - 1) /
- PAGE_SIZE) * PAGE_SIZE;
- size_of_buf = dev_priv->primary_size / MGA_NUM_PRIM_BUFS;
- dev_priv->warp_ucode_size = init->warp_ucode_size;
- dev_priv->prim_bufs = drm_alloc(sizeof(drm_mga_prim_buf_t *) *
- (MGA_NUM_PRIM_BUFS + 1),
- DRM_MEM_DRIVER);
- if(dev_priv->prim_bufs == NULL) {
- DRM_ERROR("Unable to allocate memory for prim_buf\n");
- return -ENOMEM;
- }
- memset(dev_priv->prim_bufs,
- 0, sizeof(drm_mga_prim_buf_t *) * (MGA_NUM_PRIM_BUFS + 1));
+ drm_mga_primary_buffer_t *primary = &dev_priv->prim;
+ u32 head, tail;
+ DMA_LOCALS;
+ DRM_DEBUG( "%s:\n", __FUNCTION__ );
- temp = init->warp_ucode_size + dev_priv->primary_size;
- temp = ((temp + PAGE_SIZE - 1) / PAGE_SIZE) * PAGE_SIZE;
+ BEGIN_DMA_WRAP();
- dev_priv->ioremap = drm_ioremap(dev->agp->base + offset,
- temp);
- if(dev_priv->ioremap == NULL) {
- DRM_ERROR("Ioremap failed\n");
- return -ENOMEM;
- }
- init_waitqueue_head(&dev_priv->wait_queue);
-
- for(i = 0; i < MGA_NUM_PRIM_BUFS; i++) {
- prim_buffer = drm_alloc(sizeof(drm_mga_prim_buf_t),
- DRM_MEM_DRIVER);
- if(prim_buffer == NULL) return -ENOMEM;
- memset(prim_buffer, 0, sizeof(drm_mga_prim_buf_t));
- prim_buffer->phys_head = offset + dev->agp->base;
- prim_buffer->current_dma_ptr =
- prim_buffer->head =
- (u32 *) (dev_priv->ioremap +
- offset -
- init->reserved_map_agpstart);
- prim_buffer->num_dwords = 0;
- prim_buffer->max_dwords = size_of_buf / sizeof(u32);
- prim_buffer->max_dwords -= 5; /* Leave room for the softrap */
- prim_buffer->sec_used = 0;
- prim_buffer->idx = i;
- prim_buffer->prim_age = i + 1;
- offset = offset + size_of_buf;
- dev_priv->prim_bufs[i] = prim_buffer;
- }
- dev_priv->current_prim_idx = 0;
- dev_priv->next_prim =
- dev_priv->last_prim =
- dev_priv->current_prim =
- dev_priv->prim_bufs[0];
- dev_priv->next_prim_age = 2;
- dev_priv->last_prim_age = 1;
- set_bit(MGA_BUF_IN_USE, &dev_priv->current_prim->buffer_status);
- return 0;
-}
+ DMA_BLOCK( MGA_DMAPAD, 0x00000000,
+ MGA_DMAPAD, 0x00000000,
+ MGA_DMAPAD, 0x00000000,
+ MGA_DWGSYNC, 0x12345678 );
-void mga_fire_primary(drm_device_t *dev, drm_mga_prim_buf_t *prim)
-{
- drm_mga_private_t *dev_priv = dev->dev_private;
- drm_device_dma_t *dma = dev->dma;
- drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
- int use_agp = PDEA_pagpxfer_enable;
- unsigned long end;
- int i;
- int next_idx;
- PRIMLOCALS;
-
- dev_priv->last_prim = prim;
-
- /* We never check for overflow, b/c there is always room */
- PRIMPTR(prim);
- if(num_dwords <= 0) {
- DRM_ERROR("num_dwords == 0 when dispatched\n");
- goto out_prim_wait;
- }
- PRIMOUTREG( MGAREG_DMAPAD, 0);
- PRIMOUTREG( MGAREG_DMAPAD, 0);
- PRIMOUTREG( MGAREG_DMAPAD, 0);
- PRIMOUTREG( MGAREG_SOFTRAP, 0);
- PRIMFINISH(prim);
-
- end = jiffies + (HZ*3);
- if(sarea_priv->dirty & MGA_DMA_FLUSH) {
- while((MGA_READ(MGAREG_STATUS) & 0x00030001) != 0x00020000) {
- if((signed)(end - jiffies) <= 0) {
- DRM_ERROR("irqs: %d wanted %d\n",
- atomic_read(&dev->total_irq),
- atomic_read(&dma->total_lost));
- DRM_ERROR("lockup (flush)\n");
- goto out_prim_wait;
- }
-
- for (i = 0 ; i < 4096 ; i++) mga_delay();
- }
- sarea_priv->dirty &= ~(MGA_DMA_FLUSH);
- } else {
- while((MGA_READ(MGAREG_STATUS) & 0x00020001) != 0x00020000) {
- if((signed)(end - jiffies) <= 0) {
- DRM_ERROR("irqs: %d wanted %d\n",
- atomic_read(&dev->total_irq),
- atomic_read(&dma->total_lost));
- DRM_ERROR("lockup (wait)\n");
- goto out_prim_wait;
- }
-
- for (i = 0 ; i < 4096 ; i++) mga_delay();
- }
- }
+ ADVANCE_DMA();
- mga_flush_write_combine();
- atomic_inc(&dev_priv->pending_bufs);
- MGA_WRITE(MGAREG_PRIMADDRESS, phys_head | TT_GENERAL);
- MGA_WRITE(MGAREG_PRIMEND, (phys_head + num_dwords * 4) | use_agp);
- prim->num_dwords = 0;
- sarea_priv->last_enqueue = prim->prim_age;
-
- next_idx = prim->idx + 1;
- if(next_idx >= MGA_NUM_PRIM_BUFS)
- next_idx = 0;
-
- dev_priv->next_prim = dev_priv->prim_bufs[next_idx];
- return;
-
- out_prim_wait:
- prim->num_dwords = 0;
- prim->sec_used = 0;
- clear_bit(MGA_BUF_IN_USE, &prim->buffer_status);
- wake_up_interruptible(&dev_priv->wait_queue);
- clear_bit(MGA_BUF_SWAP_PENDING, &prim->buffer_status);
- clear_bit(MGA_IN_DISPATCH, &dev_priv->dispatch_status);
-}
+ tail = primary->tail + dev_priv->primary->offset;
-int mga_advance_primary(drm_device_t *dev)
-{
- DECLARE_WAITQUEUE(entry, current);
- drm_mga_private_t *dev_priv = dev->dev_private;
- drm_mga_prim_buf_t *prim_buffer;
- drm_device_dma_t *dma = dev->dma;
- int next_prim_idx;
- int ret = 0;
-
- /* This needs to reset the primary buffer if available,
- * we should collect stats on how many times it bites
- * it's tail */
-
- next_prim_idx = dev_priv->current_prim_idx + 1;
- if(next_prim_idx >= MGA_NUM_PRIM_BUFS)
- next_prim_idx = 0;
- prim_buffer = dev_priv->prim_bufs[next_prim_idx];
- set_bit(MGA_IN_WAIT, &dev_priv->dispatch_status);
-
- /* In use is cleared in interrupt handler */
-
- if(test_and_set_bit(MGA_BUF_IN_USE, &prim_buffer->buffer_status)) {
- add_wait_queue(&dev_priv->wait_queue, &entry);
- for (;;) {
- current->state = TASK_INTERRUPTIBLE;
- mga_dma_schedule(dev, 0);
- if(!test_and_set_bit(MGA_BUF_IN_USE,
- &prim_buffer->buffer_status))
- break;
- atomic_inc(&dev->total_sleeps);
- atomic_inc(&dma->total_missed_sched);
- schedule();
- if (signal_pending(current)) {
- ret = -ERESTARTSYS;
- break;
- }
- }
- current->state = TASK_RUNNING;
- remove_wait_queue(&dev_priv->wait_queue, &entry);
- if(ret) return ret;
- }
- clear_bit(MGA_IN_WAIT, &dev_priv->dispatch_status);
-
- /* This primary buffer is now free to use */
- prim_buffer->current_dma_ptr = prim_buffer->head;
- prim_buffer->num_dwords = 0;
- prim_buffer->sec_used = 0;
- prim_buffer->prim_age = dev_priv->next_prim_age++;
- if(prim_buffer->prim_age == 0 || prim_buffer->prim_age == 0xffffffff) {
- mga_flush_queue(dev);
- mga_dma_quiescent(dev);
- mga_reset_freelist(dev);
- prim_buffer->prim_age = (dev_priv->next_prim_age += 2);
+ primary->tail = 0;
+ primary->last_flush = 0;
+ primary->last_wrap++;
+
+ head = MGA_READ( MGA_PRIMADDRESS );
+
+ if ( head == dev_priv->primary->offset ) {
+ primary->space = primary->size;
+ } else {
+ primary->space = head - dev_priv->primary->offset;
}
- /* Reset all buffer status stuff */
- clear_bit(MGA_BUF_NEEDS_OVERFLOW, &prim_buffer->buffer_status);
- clear_bit(MGA_BUF_FORCE_FIRE, &prim_buffer->buffer_status);
- clear_bit(MGA_BUF_SWAP_PENDING, &prim_buffer->buffer_status);
+ DRM_DEBUG( " head = 0x%06lx\n",
+ head - dev_priv->primary->offset );
+ DRM_DEBUG( " tail = 0x%06x\n", primary->tail );
+ DRM_DEBUG( " wrap = %d\n", primary->last_wrap );
+ DRM_DEBUG( " space = 0x%06x\n", primary->space );
+
+ mga_flush_write_combine();
+ MGA_WRITE( MGA_PRIMEND, tail | MGA_PAGPXFER );
- dev_priv->current_prim = prim_buffer;
- dev_priv->current_prim_idx = next_prim_idx;
- return 0;
+ DRM_DEBUG( "%s: done.\n", __FUNCTION__ );
}
-/* More dynamic performance decisions */
-static inline int mga_decide_to_fire(drm_device_t *dev)
+void mga_do_dma_wrap_end( drm_mga_private_t *dev_priv )
{
- drm_mga_private_t *dev_priv = (drm_mga_private_t *)dev->dev_private;
+ drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
+ u32 head = dev_priv->primary->offset;
+ DRM_DEBUG( "%s:\n", __FUNCTION__ );
- if(test_bit(MGA_BUF_FORCE_FIRE, &dev_priv->next_prim->buffer_status)) {
- return 1;
- }
+ sarea_priv->last_wrap++;
+ DRM_DEBUG( " wrap = %d\n", sarea_priv->last_wrap );
- if (test_bit(MGA_IN_GETBUF, &dev_priv->dispatch_status) &&
- dev_priv->next_prim->num_dwords) {
- return 1;
- }
+ mga_flush_write_combine();
+ MGA_WRITE( MGA_PRIMADDRESS, head | MGA_DMA_GENERAL );
- if (test_bit(MGA_IN_FLUSH, &dev_priv->dispatch_status) &&
- dev_priv->next_prim->num_dwords) {
- return 1;
- }
+ DRM_DEBUG( "%s: done.\n", __FUNCTION__ );
+}
- if(atomic_read(&dev_priv->pending_bufs) <= MGA_NUM_PRIM_BUFS - 1) {
- if(test_bit(MGA_BUF_SWAP_PENDING,
- &dev_priv->next_prim->buffer_status)) {
- return 1;
- }
- }
- if(atomic_read(&dev_priv->pending_bufs) <= MGA_NUM_PRIM_BUFS / 2) {
- if(dev_priv->next_prim->sec_used >= MGA_DMA_BUF_NR / 8) {
- return 1;
- }
- }
+/* ================================================================
+ * Freelist management
+ */
- if(atomic_read(&dev_priv->pending_bufs) >= MGA_NUM_PRIM_BUFS / 2) {
- if(dev_priv->next_prim->sec_used >= MGA_DMA_BUF_NR / 4) {
- return 1;
- }
- }
+#define MGA_BUFFER_USED ~0
+#define MGA_BUFFER_FREE 0
- return 0;
+static void mga_freelist_print( drm_device_t *dev )
+{
+ drm_mga_private_t *dev_priv = dev->dev_private;
+ drm_mga_freelist_t *entry;
+
+ DRM_INFO( "\n" );
+ DRM_INFO( "current dispatch: last=0x%x done=0x%x\n",
+ dev_priv->sarea_priv->last_dispatch,
+ (unsigned int)(MGA_READ( MGA_PRIMADDRESS ) -
+ dev_priv->primary->offset) );
+ DRM_INFO( "current freelist:\n" );
+
+ for ( entry = dev_priv->head->next ; entry ; entry = entry->next ) {
+ DRM_INFO( " %p idx=%2d age=0x%x 0x%06lx\n",
+ entry, entry->buf->idx, entry->age.head,
+ entry->age.head - dev_priv->primary->offset );
+ }
+ DRM_INFO( "\n" );
}
-int mga_dma_schedule(drm_device_t *dev, int locked)
+static int mga_freelist_init( drm_device_t *dev )
{
- drm_mga_private_t *dev_priv = (drm_mga_private_t *)dev->dev_private;
- int retval = 0;
-
- if (!dev_priv) return -EBUSY;
-
- if (test_and_set_bit(0, &dev->dma_flag)) {
- retval = -EBUSY;
- goto sch_out_wakeup;
- }
+ drm_device_dma_t *dma = dev->dma;
+ drm_mga_private_t *dev_priv = dev->dev_private;
+ drm_buf_t *buf;
+ drm_mga_buf_priv_t *buf_priv;
+ drm_mga_freelist_t *entry;
+ int i;
+ DRM_DEBUG( "%s: count=%d\n",
+ __FUNCTION__, dma->buf_count );
- if(test_bit(MGA_IN_FLUSH, &dev_priv->dispatch_status) ||
- test_bit(MGA_IN_WAIT, &dev_priv->dispatch_status) ||
- test_bit(MGA_IN_GETBUF, &dev_priv->dispatch_status)) {
- locked = 1;
- }
+ dev_priv->head = DRM(alloc)( sizeof(drm_mga_freelist_t),
+ DRM_MEM_DRIVER );
+ if ( dev_priv->head == NULL )
+ return -ENOMEM;
- if (!locked &&
- !drm_lock_take(&dev->lock.hw_lock->lock, DRM_KERNEL_CONTEXT)) {
- clear_bit(0, &dev->dma_flag);
- retval = -EBUSY;
- goto sch_out_wakeup;
- }
+ memset( dev_priv->head, 0, sizeof(drm_mga_freelist_t) );
+ SET_AGE( &dev_priv->head->age, MGA_BUFFER_USED, 0 );
- if(!test_and_set_bit(MGA_IN_DISPATCH, &dev_priv->dispatch_status)) {
- /* Fire dma buffer */
- if(mga_decide_to_fire(dev)) {
- clear_bit(MGA_BUF_FORCE_FIRE,
- &dev_priv->next_prim->buffer_status);
- if(dev_priv->current_prim == dev_priv->next_prim) {
- /* Schedule overflow for a later time */
- set_bit(MGA_BUF_NEEDS_OVERFLOW,
- &dev_priv->next_prim->buffer_status);
- }
- mga_fire_primary(dev, dev_priv->next_prim);
- } else {
- clear_bit(MGA_IN_DISPATCH, &dev_priv->dispatch_status);
- }
- }
+ for ( i = 0 ; i < dma->buf_count ; i++ ) {
+ buf = dma->buflist[i];
+ buf_priv = buf->dev_private;
- if (!locked) {
- if (drm_lock_free(dev, &dev->lock.hw_lock->lock,
- DRM_KERNEL_CONTEXT)) {
- DRM_ERROR("\n");
- }
- }
+ entry = DRM(alloc)( sizeof(drm_mga_freelist_t),
+ DRM_MEM_DRIVER );
+ if ( entry == NULL )
+ return -ENOMEM;
- clear_bit(0, &dev->dma_flag);
+ memset( entry, 0, sizeof(drm_mga_freelist_t) );
-sch_out_wakeup:
- if(test_bit(MGA_IN_FLUSH, &dev_priv->dispatch_status) &&
- atomic_read(&dev_priv->pending_bufs) == 0) {
- /* Everything has been processed by the hardware */
- clear_bit(MGA_IN_FLUSH, &dev_priv->dispatch_status);
- wake_up_interruptible(&dev_priv->flush_queue);
- }
+ entry->next = dev_priv->head->next;
+ entry->prev = dev_priv->head;
+ SET_AGE( &entry->age, MGA_BUFFER_FREE, 0 );
+ entry->buf = buf;
+
+ if ( dev_priv->head->next != NULL )
+ dev_priv->head->next->prev = entry;
+ if ( entry->next == NULL )
+ dev_priv->tail = entry;
+
+ buf_priv->list_entry = entry;
+ buf_priv->discard = 0;
+ buf_priv->dispatched = 0;
- if(test_bit(MGA_IN_GETBUF, &dev_priv->dispatch_status)
- && dev_priv->tail->age < dev_priv->last_prim_age)
- wake_up_interruptible(&dev_priv->buf_queue);
+ dev_priv->head->next = entry;
+ }
- return retval;
+ return 0;
}
-static void mga_dma_service(int irq, void *device, struct pt_regs *regs)
+static void mga_freelist_cleanup( drm_device_t *dev )
{
- drm_device_t *dev = (drm_device_t *)device;
- drm_mga_private_t *dev_priv = (drm_mga_private_t *)dev->dev_private;
- drm_mga_prim_buf_t *last_prim_buffer;
-
- atomic_inc(&dev->total_irq);
- if((MGA_READ(MGAREG_STATUS) & 0x00000001) != 0x00000001) return;
- MGA_WRITE(MGAREG_ICLEAR, 0x00000001);
- last_prim_buffer = dev_priv->last_prim;
- last_prim_buffer->num_dwords = 0;
- last_prim_buffer->sec_used = 0;
- dev_priv->sarea_priv->last_dispatch =
- dev_priv->last_prim_age = last_prim_buffer->prim_age;
- clear_bit(MGA_BUF_IN_USE, &last_prim_buffer->buffer_status);
- clear_bit(MGA_BUF_SWAP_PENDING, &last_prim_buffer->buffer_status);
- clear_bit(MGA_IN_DISPATCH, &dev_priv->dispatch_status);
- atomic_dec(&dev_priv->pending_bufs);
- queue_task(&dev->tq, &tq_immediate);
- mark_bh(IMMEDIATE_BH);
- wake_up_interruptible(&dev_priv->wait_queue);
+ drm_mga_private_t *dev_priv = dev->dev_private;
+ drm_mga_freelist_t *entry;
+ drm_mga_freelist_t *next;
+ DRM_DEBUG( "%s\n", __FUNCTION__ );
+
+ entry = dev_priv->head;
+ while ( entry ) {
+ next = entry->next;
+ DRM(free)( entry, sizeof(drm_mga_freelist_t), DRM_MEM_DRIVER );
+ entry = next;
+ }
+
+ dev_priv->head = dev_priv->tail = NULL;
}
-static void mga_dma_task_queue(void *device)
+static void mga_freelist_reset( drm_device_t *dev )
{
- mga_dma_schedule((drm_device_t *)device, 0);
+ drm_device_dma_t *dma = dev->dma;
+ drm_buf_t *buf;
+ drm_mga_buf_priv_t *buf_priv;
+ int i;
+
+ for ( i = 0 ; i < dma->buf_count ; i++ ) {
+ buf = dma->buflist[i];
+ buf_priv = buf->dev_private;
+ SET_AGE( &buf_priv->list_entry->age,
+ MGA_BUFFER_FREE, 0 );
+ }
}
-int mga_dma_cleanup(drm_device_t *dev)
+static drm_buf_t *mga_freelist_get( drm_device_t *dev )
{
- if(dev->dev_private) {
- drm_mga_private_t *dev_priv =
- (drm_mga_private_t *) dev->dev_private;
+ drm_mga_private_t *dev_priv = dev->dev_private;
+ drm_mga_freelist_t *next;
+ drm_mga_freelist_t *prev;
+ drm_mga_freelist_t *tail = dev_priv->tail;
+ u32 head, wrap;
+ DRM_DEBUG( "%s:\n", __FUNCTION__ );
- if (dev->irq) mga_flush_queue(dev);
- mga_dma_quiescent(dev);
+ head = MGA_READ( MGA_PRIMADDRESS );
+ wrap = dev_priv->sarea_priv->last_wrap;
- if(dev_priv->ioremap) {
- int temp = (dev_priv->warp_ucode_size +
- dev_priv->primary_size +
- PAGE_SIZE - 1) / PAGE_SIZE * PAGE_SIZE;
+ DRM_DEBUG( " tail=0x%06lx %d\n",
+ tail->age.head ?
+ tail->age.head - dev_priv->primary->offset : 0,
+ tail->age.wrap );
+ DRM_DEBUG( " head=0x%06lx %d\n",
+ head - dev_priv->primary->offset, wrap );
- drm_ioremapfree((void *) dev_priv->ioremap, temp);
- }
- if(dev_priv->status_page != NULL) {
- iounmap(dev_priv->status_page);
- }
- if(dev_priv->real_status_page != 0UL) {
- mga_free_page(dev, dev_priv->real_status_page);
- }
- if(dev_priv->prim_bufs != NULL) {
- int i;
- for(i = 0; i < MGA_NUM_PRIM_BUFS; i++) {
- if(dev_priv->prim_bufs[i] != NULL) {
- drm_free(dev_priv->prim_bufs[i],
- sizeof(drm_mga_prim_buf_t),
- DRM_MEM_DRIVER);
- }
- }
- drm_free(dev_priv->prim_bufs, sizeof(void *) *
- (MGA_NUM_PRIM_BUFS + 1),
- DRM_MEM_DRIVER);
- }
- if(dev_priv->head != NULL) {
- mga_freelist_cleanup(dev);
- }
+ if ( TEST_AGE( &tail->age, head, wrap ) ) {
+ prev = dev_priv->tail->prev;
+ next = dev_priv->tail;
+ prev->next = NULL;
+ next->prev = next->next = NULL;
+ dev_priv->tail = prev;
+ SET_AGE( &next->age, MGA_BUFFER_USED, 0 );
+ return next->buf;
+ }
+ DRM_DEBUG( "returning NULL!\n" );
+ return NULL;
+}
- drm_free(dev->dev_private, sizeof(drm_mga_private_t),
- DRM_MEM_DRIVER);
- dev->dev_private = NULL;
+int mga_freelist_put( drm_device_t *dev, drm_buf_t *buf )
+{
+ drm_mga_private_t *dev_priv = dev->dev_private;
+ drm_mga_buf_priv_t *buf_priv = buf->dev_private;
+ drm_mga_freelist_t *head, *entry, *prev;
+
+ DRM_DEBUG( "%s: age=0x%06lx wrap=%d\n",
+ __FUNCTION__,
+ buf_priv->list_entry->age.head -
+ dev_priv->primary->offset,
+ buf_priv->list_entry->age.wrap );
+
+ entry = buf_priv->list_entry;
+ head = dev_priv->head;
+
+ if ( buf_priv->list_entry->age.head == MGA_BUFFER_USED ) {
+ SET_AGE( &entry->age, MGA_BUFFER_FREE, 0 );
+ prev = dev_priv->tail;
+ prev->next = entry;
+ entry->prev = prev;
+ entry->next = NULL;
+ } else {
+ prev = head->next;
+ head->next = entry;
+ prev->prev = entry;
+ entry->prev = head;
+ entry->next = prev;
}
return 0;
}
-static int mga_dma_initialize(drm_device_t *dev, drm_mga_init_t *init) {
- drm_mga_private_t *dev_priv;
- drm_map_t *sarea_map = NULL;
- dev_priv = drm_alloc(sizeof(drm_mga_private_t), DRM_MEM_DRIVER);
- if(dev_priv == NULL) return -ENOMEM;
- dev->dev_private = (void *) dev_priv;
+/* ================================================================
+ * DMA initialization, cleanup
+ */
- memset(dev_priv, 0, sizeof(drm_mga_private_t));
+static int mga_do_init_dma( drm_device_t *dev, drm_mga_init_t *init )
+{
+ drm_mga_private_t *dev_priv;
+ struct list_head *list;
+ int ret;
+ DRM_DEBUG( "%s\n", __FUNCTION__ );
- if((init->reserved_map_idx >= dev->map_count) ||
- (init->buffer_map_idx >= dev->map_count)) {
- mga_dma_cleanup(dev);
- return -EINVAL;
- }
+ dev_priv = DRM(alloc)( sizeof(drm_mga_private_t), DRM_MEM_DRIVER );
+ if ( !dev_priv )
+ return -ENOMEM;
+ dev->dev_private = (void *)dev_priv;
- dev_priv->reserved_map_idx = init->reserved_map_idx;
- dev_priv->buffer_map_idx = init->buffer_map_idx;
- sarea_map = dev->maplist[0];
- dev_priv->sarea_priv = (drm_mga_sarea_t *)
- ((u8 *)sarea_map->handle +
- init->sarea_priv_offset);
+ memset( dev_priv, 0, sizeof(drm_mga_private_t) );
- /* Scale primary size to the next page */
dev_priv->chipset = init->chipset;
- dev_priv->frontOffset = init->frontOffset;
- dev_priv->backOffset = init->backOffset;
- dev_priv->depthOffset = init->depthOffset;
- dev_priv->textureOffset = init->textureOffset;
- dev_priv->textureSize = init->textureSize;
- dev_priv->cpp = init->cpp;
- dev_priv->sgram = init->sgram;
- dev_priv->stride = init->stride;
-
- dev_priv->mAccess = init->mAccess;
- init_waitqueue_head(&dev_priv->flush_queue);
- init_waitqueue_head(&dev_priv->buf_queue);
- dev_priv->WarpPipe = 0xff000000;
- dev_priv->vertexsize = 0;
-
- DRM_DEBUG("chipset=%d ucode_size=%d backOffset=%x depthOffset=%x\n",
- dev_priv->chipset, dev_priv->warp_ucode_size,
- dev_priv->backOffset, dev_priv->depthOffset);
- DRM_DEBUG("cpp: %d sgram: %d stride: %d maccess: %x\n",
- dev_priv->cpp, dev_priv->sgram, dev_priv->stride,
- dev_priv->mAccess);
-
- memcpy(&dev_priv->WarpIndex, &init->WarpIndex,
- sizeof(drm_mga_warp_index_t) * MGA_MAX_WARP_PIPES);
-
- if(mga_init_primary_bufs(dev, init) != 0) {
- DRM_ERROR("Can not initialize primary buffers\n");
- mga_dma_cleanup(dev);
- return -ENOMEM;
+
+ dev_priv->usec_timeout = MGA_DEFAULT_USEC_TIMEOUT;
+
+ if ( init->sgram ) {
+ dev_priv->clear_cmd = MGA_DWGCTL_CLEAR | MGA_ATYPE_BLK;
+ } else {
+ dev_priv->clear_cmd = MGA_DWGCTL_CLEAR | MGA_ATYPE_RSTR;
+ }
+ dev_priv->maccess = init->maccess;
+
+ dev_priv->fb_cpp = init->fb_cpp;
+ dev_priv->front_offset = init->front_offset;
+ dev_priv->front_pitch = init->front_pitch;
+ dev_priv->back_offset = init->back_offset;
+ dev_priv->back_pitch = init->back_pitch;
+
+ dev_priv->depth_cpp = init->depth_cpp;
+ dev_priv->depth_offset = init->depth_offset;
+ dev_priv->depth_pitch = init->depth_pitch;
+
+ list_for_each( list, &dev->maplist->head ) {
+ drm_map_list_t *entry = (drm_map_list_t *)list;
+ if ( entry->map &&
+ entry->map->type == _DRM_SHM &&
+ (entry->map->flags & _DRM_CONTAINS_LOCK) ) {
+ dev_priv->sarea = entry->map;
+ break;
+ }
+ }
+
+ DRM_FIND_MAP( dev_priv->fb, init->fb_offset );
+ DRM_FIND_MAP( dev_priv->mmio, init->mmio_offset );
+ DRM_FIND_MAP( dev_priv->status, init->status_offset );
+
+ DRM_FIND_MAP( dev_priv->warp, init->warp_offset );
+ DRM_FIND_MAP( dev_priv->primary, init->primary_offset );
+ DRM_FIND_MAP( dev_priv->buffers, init->buffers_offset );
+
+ dev_priv->sarea_priv =
+ (drm_mga_sarea_t *)((u8 *)dev_priv->sarea->handle +
+ init->sarea_priv_offset);
+
+ DRM_IOREMAP( dev_priv->warp );
+ DRM_IOREMAP( dev_priv->primary );
+ DRM_IOREMAP( dev_priv->buffers );
+
+ ret = mga_warp_install_microcode( dev );
+ if ( ret < 0 ) {
+ DRM_ERROR( "failed to install WARP ucode!\n" );
+ mga_do_cleanup_dma( dev );
+ return ret;
}
- dev_priv->real_status_page = mga_alloc_page(dev);
- if(dev_priv->real_status_page == 0UL) {
- mga_dma_cleanup(dev);
- DRM_ERROR("Can not allocate status page\n");
- return -ENOMEM;
+
+ ret = mga_warp_init( dev );
+ if ( ret < 0 ) {
+ DRM_ERROR( "failed to init WARP engine!\n" );
+ mga_do_cleanup_dma( dev );
+ return ret;
}
- dev_priv->status_page =
- ioremap_nocache(virt_to_bus((void *)dev_priv->real_status_page),
- PAGE_SIZE);
+ dev_priv->prim.status = (u32 *)dev_priv->status->handle;
- if(dev_priv->status_page == NULL) {
- mga_dma_cleanup(dev);
- DRM_ERROR("Can not remap status page\n");
- return -ENOMEM;
- }
+ mga_do_wait_for_idle( dev_priv );
+
+ /* Init the primary DMA registers.
+ */
+ MGA_WRITE( MGA_PRIMADDRESS,
+ dev_priv->primary->offset | MGA_DMA_GENERAL );
+#if 0
+ MGA_WRITE( MGA_PRIMPTR,
+ virt_to_bus((void *)dev_priv->prim.status) |
+ MGA_PRIMPTREN0 | /* Soft trap, SECEND, SETUPEND */
+ MGA_PRIMPTREN1 ); /* DWGSYNC */
+#endif
+
+ dev_priv->prim.start = (u8 *)dev_priv->primary->handle;
+ dev_priv->prim.end = ((u8 *)dev_priv->primary->handle
+ + dev_priv->primary->size);
+ dev_priv->prim.size = dev_priv->primary->size;
- /* Write status page when secend or softrap occurs */
- MGA_WRITE(MGAREG_PRIMPTR,
- virt_to_bus((void *)dev_priv->real_status_page) | 0x00000003);
+ dev_priv->prim.tail = 0;
+ dev_priv->prim.space = dev_priv->prim.size;
+ dev_priv->prim.last_flush = 0;
+ dev_priv->prim.last_wrap = 0;
- /* Private is now filled in, initialize the hardware */
- {
- PRIMLOCALS;
- PRIMGETPTR( dev_priv );
+ dev_priv->prim.high_mark = 256 * DMA_BLOCK_SIZE;
- PRIMOUTREG(MGAREG_DMAPAD, 0);
- PRIMOUTREG(MGAREG_DMAPAD, 0);
- PRIMOUTREG(MGAREG_DWGSYNC, 0x0100);
- PRIMOUTREG(MGAREG_SOFTRAP, 0);
- /* Poll for the first buffer to insure that
- * the status register will be correct
- */
+ spin_lock_init( &dev_priv->prim.list_lock );
- mga_flush_write_combine();
- MGA_WRITE(MGAREG_PRIMADDRESS, phys_head | TT_GENERAL);
+ dev_priv->prim.status[0] = dev_priv->primary->offset;
+ dev_priv->prim.status[1] = 0;
- MGA_WRITE(MGAREG_PRIMEND, ((phys_head + num_dwords * 4) |
- PDEA_pagpxfer_enable));
+ dev_priv->sarea_priv->last_wrap = 0;
+ dev_priv->sarea_priv->last_frame.head = 0;
+ dev_priv->sarea_priv->last_frame.wrap = 0;
- while(MGA_READ(MGAREG_DWGSYNC) != 0x0100) ;
+ if ( mga_freelist_init( dev ) < 0 ) {
+ DRM_ERROR( "could not initialize freelist\n" );
+ mga_do_cleanup_dma( dev );
+ return -ENOMEM;
}
- if(mga_freelist_init(dev) != 0) {
- DRM_ERROR("Could not initialize freelist\n");
- mga_dma_cleanup(dev);
- return -ENOMEM;
+ return 0;
+}
+
+int mga_do_cleanup_dma( drm_device_t *dev )
+{
+ DRM_DEBUG( "%s\n", __FUNCTION__ );
+
+ if ( dev->dev_private ) {
+ drm_mga_private_t *dev_priv = dev->dev_private;
+
+ DRM_IOREMAPFREE( dev_priv->warp );
+ DRM_IOREMAPFREE( dev_priv->primary );
+ DRM_IOREMAPFREE( dev_priv->buffers );
+
+ if ( dev_priv->head != NULL ) {
+ mga_freelist_cleanup( dev );
+ }
+
+ DRM(free)( dev->dev_private, sizeof(drm_mga_private_t),
+ DRM_MEM_DRIVER );
+ dev->dev_private = NULL;
}
+
return 0;
}
-int mga_dma_init(struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg)
+int mga_dma_init( struct inode *inode, struct file *filp,
+ unsigned int cmd, unsigned long arg )
{
drm_file_t *priv = filp->private_data;
drm_device_t *dev = priv->dev;
drm_mga_init_t init;
- if (copy_from_user(&init, (drm_mga_init_t *)arg, sizeof(init)))
+ if ( copy_from_user( &init, (drm_mga_init_t *)arg, sizeof(init) ) )
return -EFAULT;
- switch(init.func) {
+ switch ( init.func ) {
case MGA_INIT_DMA:
- return mga_dma_initialize(dev, &init);
+ return mga_do_init_dma( dev, &init );
case MGA_CLEANUP_DMA:
- return mga_dma_cleanup(dev);
+ return mga_do_cleanup_dma( dev );
}
return -EINVAL;
}
-int mga_irq_install(drm_device_t *dev, int irq)
-{
- int retcode;
-
- if (!irq) return -EINVAL;
- down(&dev->struct_sem);
- if (dev->irq) {
- up(&dev->struct_sem);
- return -EBUSY;
- }
- dev->irq = irq;
- up(&dev->struct_sem);
-
- DRM_DEBUG("install irq handler %d\n", irq);
-
- dev->context_flag = 0;
- dev->interrupt_flag = 0;
- dev->dma_flag = 0;
- dev->dma->next_buffer = NULL;
- dev->dma->next_queue = NULL;
- dev->dma->this_buffer = NULL;
- INIT_LIST_HEAD(&dev->tq.list);
- dev->tq.sync = 0;
- dev->tq.routine = mga_dma_task_queue;
- dev->tq.data = dev;
-
- /* Before installing handler */
- MGA_WRITE(MGAREG_IEN, 0);
- /* Install handler */
- if ((retcode = request_irq(dev->irq,
- mga_dma_service,
- SA_SHIRQ,
- dev->devname,
- dev))) {
- down(&dev->struct_sem);
- dev->irq = 0;
- up(&dev->struct_sem);
- return retcode;
- }
- /* After installing handler */
- MGA_WRITE(MGAREG_ICLEAR, 0x00000001);
- MGA_WRITE(MGAREG_IEN, 0x00000001);
- return 0;
-}
+/* ================================================================
+ * Primary DMA stream management
+ */
-int mga_irq_uninstall(drm_device_t *dev)
+int mga_dma_flush( struct inode *inode, struct file *filp,
+ unsigned int cmd, unsigned long arg )
{
- int irq;
-
- down(&dev->struct_sem);
- irq = dev->irq;
- dev->irq = 0;
- up(&dev->struct_sem);
-
- if (!irq) return -EINVAL;
- DRM_DEBUG("remove irq handler %d\n", irq);
- MGA_WRITE(MGAREG_ICLEAR, 0x00000001);
- MGA_WRITE(MGAREG_IEN, 0);
- free_irq(irq, dev);
- return 0;
-}
+ drm_file_t *priv = filp->private_data;
+ drm_device_t *dev = priv->dev;
+ drm_mga_private_t *dev_priv = (drm_mga_private_t *)dev->dev_private;
+ drm_lock_t lock;
-int mga_control(struct inode *inode, struct file *filp, unsigned int cmd,
- unsigned long arg)
-{
- drm_file_t *priv = filp->private_data;
- drm_device_t *dev = priv->dev;
- drm_control_t ctl;
+ LOCK_TEST_WITH_RETURN( dev );
- if (copy_from_user(&ctl, (drm_control_t *)arg, sizeof(ctl)))
+ if ( copy_from_user( &lock, (drm_lock_t *)arg, sizeof(lock) ) )
return -EFAULT;
- switch (ctl.func) {
- case DRM_INST_HANDLER:
- return mga_irq_install(dev, ctl.irq);
- case DRM_UNINST_HANDLER:
- return mga_irq_uninstall(dev);
- default:
- return -EINVAL;
- }
-}
+ DRM_DEBUG( "%s: %s%s%s\n",
+ __FUNCTION__,
+ (lock.flags & _DRM_LOCK_FLUSH) ? "flush, " : "",
+ (lock.flags & _DRM_LOCK_FLUSH_ALL) ? "flush all, " : "",
+ (lock.flags & _DRM_LOCK_QUIESCENT) ? "idle, " : "" );
-static int mga_flush_queue(drm_device_t *dev)
-{
- DECLARE_WAITQUEUE(entry, current);
- drm_mga_private_t *dev_priv = (drm_mga_private_t *)dev->dev_private;
- int ret = 0;
-
- if(!dev_priv) return 0;
-
- if(dev_priv->next_prim->num_dwords != 0) {
- add_wait_queue(&dev_priv->flush_queue, &entry);
- if (test_bit(MGA_IN_FLUSH, &dev_priv->dispatch_status))
- DRM_ERROR("Incorrect mga_flush_queue logic\n");
- set_bit(MGA_IN_FLUSH, &dev_priv->dispatch_status);
- mga_dma_schedule(dev, 0);
- for (;;) {
- current->state = TASK_INTERRUPTIBLE;
- if (!test_bit(MGA_IN_FLUSH,
- &dev_priv->dispatch_status))
- break;
- atomic_inc(&dev->total_sleeps);
- schedule();
- if (signal_pending(current)) {
- ret = -EINTR; /* Can't restart */
- clear_bit(MGA_IN_FLUSH,
- &dev_priv->dispatch_status);
- break;
- }
- }
- current->state = TASK_RUNNING;
- remove_wait_queue(&dev_priv->flush_queue, &entry);
+ WRAP_TEST_WITH_RETURN( dev_priv );
+
+#if 0
+ if ( lock.flags & (_DRM_LOCK_FLUSH | _DRM_LOCK_FLUSH_ALL) ) {
+ mga_do_dma_flush( dev_priv );
+ }
+#endif
+ if ( lock.flags & _DRM_LOCK_QUIESCENT ) {
+ return mga_do_wait_for_idle( dev_priv );
+ } else {
+ return 0;
}
- return ret;
}
-/* Must be called with the lock held */
-void mga_reclaim_buffers(drm_device_t *dev, pid_t pid)
+int mga_dma_reset( struct inode *inode, struct file *filp,
+ unsigned int cmd, unsigned long arg )
{
- drm_device_dma_t *dma = dev->dma;
- int i;
-
- if (!dma) return;
- if(dev->dev_private == NULL) return;
- if(dma->buflist == NULL) return;
-
- DRM_DEBUG("buf_count=%d\n", dma->buf_count);
-
- mga_flush_queue(dev);
-
- for (i = 0; i < dma->buf_count; i++) {
- drm_buf_t *buf = dma->buflist[ i ];
- drm_mga_buf_priv_t *buf_priv = buf->dev_private;
-
- /* Only buffers that need to get reclaimed ever
- * get set to free
- */
- if (buf->pid == pid && buf_priv) {
- if(buf_priv->my_freelist->age == MGA_BUF_USED)
- buf_priv->my_freelist->age = MGA_BUF_FREE;
- }
- }
+ drm_file_t *priv = filp->private_data;
+ drm_device_t *dev = priv->dev;
+ drm_mga_private_t *dev_priv = (drm_mga_private_t *)dev->dev_private;
+
+ LOCK_TEST_WITH_RETURN( dev );
+
+ return mga_do_dma_reset( dev_priv );
}
-int mga_lock(struct inode *inode, struct file *filp, unsigned int cmd,
- unsigned long arg)
-{
- drm_file_t *priv = filp->private_data;
- drm_device_t *dev = priv->dev;
- DECLARE_WAITQUEUE(entry, current);
- int ret = 0;
- drm_lock_t lock;
- if (copy_from_user(&lock, (drm_lock_t *)arg, sizeof(lock)))
- return -EFAULT;
+/* ================================================================
+ * DMA buffer management
+ */
- if (lock.context == DRM_KERNEL_CONTEXT) {
- DRM_ERROR("Process %d using kernel context %d\n",
- current->pid, lock.context);
- return -EINVAL;
- }
+static int mga_dma_get_buffers( drm_device_t *dev, drm_dma_t *d )
+{
+ drm_buf_t *buf;
+ int i;
- if (lock.context < 0) return -EINVAL;
+ for ( i = d->granted_count ; i < d->request_count ; i++ ) {
+ buf = mga_freelist_get( dev );
+ if ( !buf ) return -EAGAIN;
- /* Only one queue:
- */
+ buf->pid = current->pid;
- if (!ret) {
- add_wait_queue(&dev->lock.lock_queue, &entry);
- for (;;) {
- current->state = TASK_INTERRUPTIBLE;
- if (!dev->lock.hw_lock) {
- /* Device has been unregistered */
- ret = -EINTR;
- break;
- }
- if (drm_lock_take(&dev->lock.hw_lock->lock,
- lock.context)) {
- dev->lock.pid = current->pid;
- dev->lock.lock_time = jiffies;
- atomic_inc(&dev->total_locks);
- break; /* Got lock */
- }
-
- /* Contention */
- atomic_inc(&dev->total_sleeps);
- schedule();
- if (signal_pending(current)) {
- ret = -ERESTARTSYS;
- break;
- }
- }
- current->state = TASK_RUNNING;
- remove_wait_queue(&dev->lock.lock_queue, &entry);
- }
+ if ( copy_to_user( &d->request_indices[i],
+ &buf->idx, sizeof(buf->idx) ) )
+ return -EFAULT;
+ if ( copy_to_user( &d->request_sizes[i],
+ &buf->total, sizeof(buf->total) ) )
+ return -EFAULT;
- if (!ret) {
- sigemptyset(&dev->sigmask);
- sigaddset(&dev->sigmask, SIGSTOP);
- sigaddset(&dev->sigmask, SIGTSTP);
- sigaddset(&dev->sigmask, SIGTTIN);
- sigaddset(&dev->sigmask, SIGTTOU);
- dev->sigdata.context = lock.context;
- dev->sigdata.lock = dev->lock.hw_lock;
- block_all_signals(drm_notifier, &dev->sigdata, &dev->sigmask);
-
- if (lock.flags & _DRM_LOCK_QUIESCENT) {
- DRM_DEBUG("_DRM_LOCK_QUIESCENT\n");
- mga_flush_queue(dev);
- mga_dma_quiescent(dev);
- }
+ d->granted_count++;
}
-
- if (ret) DRM_DEBUG("%d %s\n", lock.context,
- ret ? "interrupted" : "has lock");
- return ret;
+ return 0;
}
-int mga_flush_ioctl(struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg)
+int mga_dma_buffers( struct inode *inode, struct file *filp,
+ unsigned int cmd, unsigned long arg )
{
- drm_file_t *priv = filp->private_data;
- drm_device_t *dev = priv->dev;
- drm_lock_t lock;
- drm_mga_private_t *dev_priv = (drm_mga_private_t *)dev->dev_private;
+ drm_file_t *priv = filp->private_data;
+ drm_device_t *dev = priv->dev;
+ drm_device_dma_t *dma = dev->dma;
+ drm_dma_t d;
+ int ret = 0;
- if (copy_from_user(&lock, (drm_lock_t *)arg, sizeof(lock)))
+ LOCK_TEST_WITH_RETURN( dev );
+
+ if ( copy_from_user( &d, (drm_dma_t *)arg, sizeof(d) ) )
return -EFAULT;
- if(!_DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock)) {
- DRM_ERROR("lock not held\n");
+ /* Please don't send us buffers.
+ */
+ if ( d.send_count != 0 ) {
+ DRM_ERROR( "Process %d trying to send %d buffers via drmDMA\n",
+ current->pid, d.send_count );
return -EINVAL;
}
- if(lock.flags & _DRM_LOCK_FLUSH || lock.flags & _DRM_LOCK_FLUSH_ALL) {
- drm_mga_prim_buf_t *temp_buf;
+ /* We'll send you buffers.
+ */
+ if ( d.request_count < 0 || d.request_count > dma->buf_count ) {
+ DRM_ERROR( "Process %d trying to get %d buffers (of %d max)\n",
+ current->pid, d.request_count, dma->buf_count );
+ return -EINVAL;
+ }
- temp_buf = dev_priv->current_prim;
+ d.granted_count = 0;
- if(temp_buf && temp_buf->num_dwords) {
- set_bit(MGA_BUF_FORCE_FIRE, &temp_buf->buffer_status);
- mga_advance_primary(dev);
- }
- mga_dma_schedule(dev, 1);
- }
- if(lock.flags & _DRM_LOCK_QUIESCENT) {
- mga_flush_queue(dev);
- mga_dma_quiescent(dev);
+ if ( d.request_count ) {
+ ret = mga_dma_get_buffers( dev, &d );
}
- return 0;
+ if ( copy_to_user( (drm_dma_t *)arg, &d, sizeof(d) ) )
+ return -EFAULT;
+
+ return ret;
}
diff --git a/linux/mga_drm.h b/linux/mga_drm.h
index 53813393..066b4e48 100644
--- a/linux/mga_drm.h
+++ b/linux/mga_drm.h
@@ -11,197 +11,178 @@
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
- *
+ *
* The above copyright notice and this permission notice (including the next
* paragraph) shall be included in all copies or substantial portions of the
* Software.
- *
+ *
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
- * DEALINGS IN THE SOFTWARE.
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
*
- * Authors: Jeff Hartmann <jhartmann@valinux.com>
- * Keith Whitwell <keithw@valinux.com>
+ * Authors:
+ * Jeff Hartmann <jhartmann@valinux.com>
+ * Keith Whitwell <keithw@valinux.com>
*
+ * Rewritten by:
+ * Gareth Hughes <gareth@valinux.com>
*/
-#ifndef _MGA_DRM_H_
-#define _MGA_DRM_H_
+#ifndef __MGA_DRM_H__
+#define __MGA_DRM_H__
/* WARNING: If you change any of these defines, make sure to change the
- * defines in the Xserver file (xf86drmMga.h)
- */
-#ifndef _MGA_DEFINES_
-#define _MGA_DEFINES_
-
-#define MGA_F 0x1 /* fog */
-#define MGA_A 0x2 /* alpha */
-#define MGA_S 0x4 /* specular */
-#define MGA_T2 0x8 /* multitexture */
-
-#define MGA_WARP_TGZ 0
-#define MGA_WARP_TGZF (MGA_F)
-#define MGA_WARP_TGZA (MGA_A)
-#define MGA_WARP_TGZAF (MGA_F|MGA_A)
-#define MGA_WARP_TGZS (MGA_S)
-#define MGA_WARP_TGZSF (MGA_S|MGA_F)
-#define MGA_WARP_TGZSA (MGA_S|MGA_A)
-#define MGA_WARP_TGZSAF (MGA_S|MGA_F|MGA_A)
-#define MGA_WARP_T2GZ (MGA_T2)
-#define MGA_WARP_T2GZF (MGA_T2|MGA_F)
-#define MGA_WARP_T2GZA (MGA_T2|MGA_A)
-#define MGA_WARP_T2GZAF (MGA_T2|MGA_A|MGA_F)
-#define MGA_WARP_T2GZS (MGA_T2|MGA_S)
-#define MGA_WARP_T2GZSF (MGA_T2|MGA_S|MGA_F)
-#define MGA_WARP_T2GZSA (MGA_T2|MGA_S|MGA_A)
-#define MGA_WARP_T2GZSAF (MGA_T2|MGA_S|MGA_F|MGA_A)
-
-#define MGA_MAX_G400_PIPES 16
-#define MGA_MAX_G200_PIPES 8 /* no multitex */
-#define MGA_MAX_WARP_PIPES MGA_MAX_G400_PIPES
-
-#define MGA_CARD_TYPE_G200 1
-#define MGA_CARD_TYPE_G400 2
-
-#define MGA_FRONT 0x1
-#define MGA_BACK 0x2
-#define MGA_DEPTH 0x4
-
-/* 3d state excluding texture units:
- */
-#define MGA_CTXREG_DSTORG 0 /* validated */
-#define MGA_CTXREG_MACCESS 1
-#define MGA_CTXREG_PLNWT 2
-#define MGA_CTXREG_DWGCTL 3
-#define MGA_CTXREG_ALPHACTRL 4
-#define MGA_CTXREG_FOGCOLOR 5
-#define MGA_CTXREG_WFLAG 6
-#define MGA_CTXREG_TDUAL0 7
-#define MGA_CTXREG_TDUAL1 8
-#define MGA_CTXREG_FCOL 9
-#define MGA_CTXREG_STENCIL 10
-#define MGA_CTXREG_STENCILCTL 11
-#define MGA_CTX_SETUP_SIZE 12
-
-/* 2d state
+ * defines in the Xserver file (mga_sarea.h)
*/
-#define MGA_2DREG_PITCH 0
-#define MGA_2D_SETUP_SIZE 1
+#ifndef __MGA_SAREA_DEFINES__
+#define __MGA_SAREA_DEFINES__
-/* Each texture unit has a state:
+/* WARP pipe flags
*/
-#define MGA_TEXREG_CTL 0
-#define MGA_TEXREG_CTL2 1
-#define MGA_TEXREG_FILTER 2
-#define MGA_TEXREG_BORDERCOL 3
-#define MGA_TEXREG_ORG 4 /* validated */
-#define MGA_TEXREG_ORG1 5
-#define MGA_TEXREG_ORG2 6
-#define MGA_TEXREG_ORG3 7
-#define MGA_TEXREG_ORG4 8
-#define MGA_TEXREG_WIDTH 9
-#define MGA_TEXREG_HEIGHT 10
-#define MGA_TEX_SETUP_SIZE 11
+#define MGA_F 0x1 /* fog */
+#define MGA_A 0x2 /* alpha */
+#define MGA_S 0x4 /* specular */
+#define MGA_T2 0x8 /* multitexture */
+
+#define MGA_WARP_TGZ 0
+#define MGA_WARP_TGZF (MGA_F)
+#define MGA_WARP_TGZA (MGA_A)
+#define MGA_WARP_TGZAF (MGA_F|MGA_A)
+#define MGA_WARP_TGZS (MGA_S)
+#define MGA_WARP_TGZSF (MGA_S|MGA_F)
+#define MGA_WARP_TGZSA (MGA_S|MGA_A)
+#define MGA_WARP_TGZSAF (MGA_S|MGA_F|MGA_A)
+#define MGA_WARP_T2GZ (MGA_T2)
+#define MGA_WARP_T2GZF (MGA_T2|MGA_F)
+#define MGA_WARP_T2GZA (MGA_T2|MGA_A)
+#define MGA_WARP_T2GZAF (MGA_T2|MGA_A|MGA_F)
+#define MGA_WARP_T2GZS (MGA_T2|MGA_S)
+#define MGA_WARP_T2GZSF (MGA_T2|MGA_S|MGA_F)
+#define MGA_WARP_T2GZSA (MGA_T2|MGA_S|MGA_A)
+#define MGA_WARP_T2GZSAF (MGA_T2|MGA_S|MGA_F|MGA_A)
+
+#define MGA_MAX_G200_PIPES 8 /* no multitex */
+#define MGA_MAX_G400_PIPES 16
+#define MGA_MAX_WARP_PIPES MGA_MAX_G400_PIPES
+#define MGA_WARP_UCODE_SIZE 32768 /* in bytes */
+
+#define MGA_CARD_TYPE_G200 1
+#define MGA_CARD_TYPE_G400 2
+
+
+#define MGA_FRONT 0x1
+#define MGA_BACK 0x2
+#define MGA_DEPTH 0x4
/* What needs to be changed for the current vertex dma buffer?
*/
-#define MGA_UPLOAD_CTX 0x1
-#define MGA_UPLOAD_TEX0 0x2
-#define MGA_UPLOAD_TEX1 0x4
-#define MGA_UPLOAD_PIPE 0x8
-#define MGA_UPLOAD_TEX0IMAGE 0x10 /* handled client-side */
-#define MGA_UPLOAD_TEX1IMAGE 0x20 /* handled client-side */
-#define MGA_UPLOAD_2D 0x40
-#define MGA_WAIT_AGE 0x80 /* handled client-side */
-#define MGA_UPLOAD_CLIPRECTS 0x100 /* handled client-side */
-#define MGA_DMA_FLUSH 0x200 /* set when someone gets the lock
- quiescent */
+#define MGA_UPLOAD_CONTEXT 0x1
+#define MGA_UPLOAD_TEX0 0x2
+#define MGA_UPLOAD_TEX1 0x4
+#define MGA_UPLOAD_PIPE 0x8
+#define MGA_UPLOAD_TEX0IMAGE 0x10 /* handled client-side */
+#define MGA_UPLOAD_TEX1IMAGE 0x20 /* handled client-side */
+#define MGA_UPLOAD_2D 0x40
+#define MGA_WAIT_AGE 0x80 /* handled client-side */
+#define MGA_UPLOAD_CLIPRECTS 0x100 /* handled client-side */
+#if 0
+#define MGA_DMA_FLUSH 0x200 /* set when someone gets the lock
+ quiescent */
+#endif
/* 32 buffers of 64k each, total 2 meg.
*/
-#define MGA_DMA_BUF_ORDER 16
-#define MGA_DMA_BUF_SZ (1<<MGA_DMA_BUF_ORDER)
-#define MGA_DMA_BUF_NR 31
+#define MGA_BUFFER_SIZE (1 << 16)
+#define MGA_NUM_BUFFERS 128
/* Keep these small for testing.
*/
-#define MGA_NR_SAREA_CLIPRECTS 8
+#define MGA_NR_SAREA_CLIPRECTS 8
/* 2 heaps (1 for card, 1 for agp), each divided into upto 128
- * regions, subject to a minimum region size of (1<<16) == 64k.
+ * regions, subject to a minimum region size of (1<<16) == 64k.
*
* Clients may subdivide regions internally, but when sharing between
- * clients, the region size is the minimum granularity.
+ * clients, the region size is the minimum granularity.
*/
-#define MGA_CARD_HEAP 0
-#define MGA_AGP_HEAP 1
-#define MGA_NR_TEX_HEAPS 2
-#define MGA_NR_TEX_REGIONS 16
-#define MGA_LOG_MIN_TEX_REGION_SIZE 16
-#endif
+#define MGA_CARD_HEAP 0
+#define MGA_AGP_HEAP 1
+#define MGA_NR_TEX_HEAPS 2
+#define MGA_NR_TEX_REGIONS 16
+#define MGA_LOG_MIN_TEX_REGION_SIZE 16
-typedef struct _drm_mga_warp_index {
- int installed;
- unsigned long phys_addr;
- int size;
-} drm_mga_warp_index_t;
+#endif /* __MGA_SAREA_DEFINES__ */
-typedef struct drm_mga_init {
- enum {
- MGA_INIT_DMA = 0x01,
- MGA_CLEANUP_DMA = 0x02
- } func;
- int reserved_map_agpstart;
- int reserved_map_idx;
- int buffer_map_idx;
- int sarea_priv_offset;
- int primary_size;
- int warp_ucode_size;
- unsigned int frontOffset;
- unsigned int backOffset;
- unsigned int depthOffset;
- unsigned int textureOffset;
- unsigned int textureSize;
- unsigned int agpTextureOffset;
- unsigned int agpTextureSize;
- unsigned int cpp;
- unsigned int stride;
- int sgram;
- int chipset;
- drm_mga_warp_index_t WarpIndex[MGA_MAX_WARP_PIPES];
- unsigned int mAccess;
-} drm_mga_init_t;
-/* Warning: if you change the sarea structure, you must change the Xserver
- * structures as well */
+/* Setup registers for 3D context
+ */
+typedef struct {
+ unsigned int dstorg;
+ unsigned int maccess;
+ unsigned int plnwt;
+ unsigned int dwgctl;
+ unsigned int alphactrl;
+ unsigned int fogcolor;
+ unsigned int wflag;
+ unsigned int tdualstage0;
+ unsigned int tdualstage1;
+ unsigned int fcol;
+ unsigned int stencil;
+ unsigned int stencilctl;
+} drm_mga_context_regs_t;
+
+/* Setup registers for 2D, X server
+ */
+typedef struct {
+ unsigned int pitch;
+} drm_mga_server_regs_t;
-typedef struct _drm_mga_tex_region {
- unsigned char next, prev;
- unsigned char in_use;
- unsigned int age;
-} drm_mga_tex_region_t;
+/* Setup registers for each texture unit
+ */
+typedef struct {
+ unsigned int texctl;
+ unsigned int texctl2;
+ unsigned int texfilter;
+ unsigned int texbordercol;
+ unsigned int texorg;
+ unsigned int texwidth;
+ unsigned int texheight;
+ unsigned int texorg1;
+ unsigned int texorg2;
+ unsigned int texorg3;
+ unsigned int texorg4;
+} drm_mga_texture_regs_t;
+
+/* General aging mechanism
+ */
+typedef struct {
+ unsigned int head; /* Position of head pointer */
+ unsigned int wrap; /* Primary DMA wrap count */
+} drm_mga_age_t;
typedef struct _drm_mga_sarea {
/* The channel for communication of state information to the kernel
* on firing a vertex dma buffer.
*/
- unsigned int ContextState[MGA_CTX_SETUP_SIZE];
- unsigned int ServerState[MGA_2D_SETUP_SIZE];
- unsigned int TexState[2][MGA_TEX_SETUP_SIZE];
- unsigned int WarpPipe;
+ drm_mga_context_regs_t context_state;
+ drm_mga_server_regs_t server_state;
+ drm_mga_texture_regs_t tex_state[2];
+ unsigned int warp_pipe;
unsigned int dirty;
+ unsigned int vertsize;
- unsigned int nbox;
+ /* The current cliprects, or a subset thereof.
+ */
drm_clip_rect_t boxes[MGA_NR_SAREA_CLIPRECTS];
-
+ unsigned int nbox;
/* Information about the most recently used 3d drawable. The
- * client fills in the req_* fields, the server fills in the
+ * client fills in the req_* fields, the server fills in the
* exported_ fields and puts the cliprects into boxes, above.
*
* The client clears the exported_drawable field before
@@ -210,71 +191,116 @@ typedef struct _drm_mga_sarea {
unsigned int req_drawable; /* the X drawable id */
unsigned int req_draw_buffer; /* MGA_FRONT or MGA_BACK */
- unsigned int exported_drawable;
- unsigned int exported_index;
- unsigned int exported_stamp;
- unsigned int exported_buffers;
+ unsigned int exported_drawable;
+ unsigned int exported_index;
+ unsigned int exported_stamp;
+ unsigned int exported_buffers;
unsigned int exported_nfront;
unsigned int exported_nback;
- int exported_back_x, exported_front_x, exported_w;
+ int exported_back_x, exported_front_x, exported_w;
int exported_back_y, exported_front_y, exported_h;
drm_clip_rect_t exported_boxes[MGA_NR_SAREA_CLIPRECTS];
-
+
/* Counters for aging textures and for client-side throttling.
*/
+ unsigned int status[4];
+ unsigned int last_wrap;
+
+ drm_mga_age_t last_frame;
unsigned int last_enqueue; /* last time a buffer was enqueued */
unsigned int last_dispatch; /* age of the most recently dispatched buffer */
unsigned int last_quiescent; /* */
-
- /* LRU lists for texture memory in agp space and on the card
+ /* LRU lists for texture memory in agp space and on the card.
*/
- drm_mga_tex_region_t texList[MGA_NR_TEX_HEAPS][MGA_NR_TEX_REGIONS+1];
+ drm_tex_region_t texList[MGA_NR_TEX_HEAPS][MGA_NR_TEX_REGIONS+1];
unsigned int texAge[MGA_NR_TEX_HEAPS];
-
+
/* Mechanism to validate card state.
*/
int ctxOwner;
- int vertexsize;
-} drm_mga_sarea_t;
+} drm_mga_sarea_t;
-/* Device specific ioctls:
+
+/* WARNING: If you change any of these defines, make sure to change the
+ * defines in the Xserver file (xf86drmMga.h)
*/
-typedef struct _drm_mga_clear {
+typedef struct _drm_mga_warp_index {
+ int installed;
+ unsigned long phys_addr;
+ int size;
+} drm_mga_warp_index_t;
+
+typedef struct drm_mga_init {
+ enum {
+ MGA_INIT_DMA = 0x01,
+ MGA_CLEANUP_DMA = 0x02
+ } func;
+
+ int sarea_priv_offset;
+
+ int chipset;
+ int sgram;
+
+ unsigned int maccess;
+
+ unsigned int fb_cpp;
+ unsigned int front_offset, front_pitch;
+ unsigned int back_offset, back_pitch;
+
+ unsigned int depth_cpp;
+ unsigned int depth_offset, depth_pitch;
+
+ unsigned int texture_offset[MGA_NR_TEX_HEAPS];
+ unsigned int texture_size[MGA_NR_TEX_HEAPS];
+
+ unsigned int fb_offset;
+ unsigned int mmio_offset;
+ unsigned int status_offset;
+ unsigned int warp_offset;
+ unsigned int primary_offset;
+ unsigned int buffers_offset;
+} drm_mga_init_t;
+
+typedef struct drm_mga_fullscreen {
+ enum {
+ MGA_INIT_FULLSCREEN = 0x01,
+ MGA_CLEANUP_FULLSCREEN = 0x02
+ } func;
+} drm_mga_fullscreen_t;
+
+typedef struct drm_mga_clear {
+ unsigned int flags;
unsigned int clear_color;
unsigned int clear_depth;
- unsigned int flags;
- unsigned int clear_depth_mask;
- unsigned int clear_color_mask;
+ unsigned int color_mask;
+ unsigned int depth_mask;
} drm_mga_clear_t;
-typedef struct _drm_mga_swap {
- int dummy;
-} drm_mga_swap_t;
-
-typedef struct _drm_mga_iload {
- int idx;
- int length;
- unsigned int destOrg;
-} drm_mga_iload_t;
-
-typedef struct _drm_mga_vertex {
- int idx; /* buffer to queue */
- int used; /* bytes in use */
- int discard; /* client finished with buffer? */
+typedef struct drm_mga_vertex {
+ int idx; /* buffer to queue */
+ int used; /* bytes in use */
+ int discard; /* client finished with buffer? */
} drm_mga_vertex_t;
-typedef struct _drm_mga_indices {
- int idx; /* buffer to queue */
- unsigned int start;
- unsigned int end;
- int discard; /* client finished with buffer? */
+typedef struct drm_mga_indices {
+ int idx; /* buffer to queue */
+ unsigned int start;
+ unsigned int end;
+ int discard; /* client finished with buffer? */
} drm_mga_indices_t;
+typedef struct drm_mga_iload {
+ int idx;
+ unsigned int dstorg;
+ unsigned int length;
+} drm_mga_iload_t;
+
typedef struct _drm_mga_blit {
unsigned int planemask;
- unsigned int source;
- unsigned int dest;
+ unsigned int srcorg;
+ unsigned int dstorg;
+ int src_pitch, dst_pitch;
int delta_sx, delta_sy;
int delta_dx, delta_dy;
int height, ydir; /* flip image vertically */
diff --git a/linux/mga_drv.c b/linux/mga_drv.c
index d1c39e99..42794e82 100644
--- a/linux/mga_drv.c
+++ b/linux/mga_drv.c
@@ -1,4 +1,4 @@
-/* mga_drv.c -- Matrox g200/g400 driver -*- linux-c -*-
+/* mga_drv.c -- Matrox G200/G400 driver -*- linux-c -*-
* Created: Mon Dec 13 01:56:22 1999 by jhartmann@precisioninsight.com
*
* Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
@@ -19,648 +19,62 @@
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
- * DEALINGS IN THE SOFTWARE.
- *
- * Authors: Rickard E. (Rik) Faith <faith@valinux.com>
- * Jeff Hartmann <jhartmann@valinux.com>
- *
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
*
+ * Authors:
+ * Rickard E. (Rik) Faith <faith@valinux.com>
+ * Gareth Hughes <gareth@valinux.com>
*/
#include <linux/config.h>
+#include "mga.h"
#include "drmP.h"
#include "mga_drv.h"
-#define MGA_NAME "mga"
-#define MGA_DESC "Matrox G200/G400"
-#define MGA_DATE "20000928"
-#define MGA_MAJOR 2
-#define MGA_MINOR 1
-#define MGA_PATCHLEVEL 1
-
-static drm_device_t mga_device;
-drm_ctx_t mga_res_ctx;
-
-static struct file_operations mga_fops = {
-#if LINUX_VERSION_CODE >= 0x020400
- /* This started being used during 2.4.0-test */
- owner: THIS_MODULE,
-#endif
- open: mga_open,
- flush: drm_flush,
- release: mga_release,
- ioctl: mga_ioctl,
- mmap: drm_mmap,
- read: drm_read,
- fasync: drm_fasync,
- poll: drm_poll,
-};
-
-static struct miscdevice mga_misc = {
- minor: MISC_DYNAMIC_MINOR,
- name: MGA_NAME,
- fops: &mga_fops,
-};
-
-static drm_ioctl_desc_t mga_ioctls[] = {
- [DRM_IOCTL_NR(DRM_IOCTL_VERSION)] = { mga_version, 0, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_GET_UNIQUE)] = { drm_getunique, 0, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_GET_MAGIC)] = { drm_getmagic, 0, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_IRQ_BUSID)] = { drm_irq_busid, 0, 1 },
-
- [DRM_IOCTL_NR(DRM_IOCTL_SET_UNIQUE)] = { drm_setunique, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_BLOCK)] = { drm_block, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_UNBLOCK)] = { drm_unblock, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_CONTROL)] = { mga_control, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_AUTH_MAGIC)] = { drm_authmagic, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_ADD_MAP)] = { drm_addmap, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_ADD_BUFS)] = { mga_addbufs, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_MARK_BUFS)] = { mga_markbufs, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_INFO_BUFS)] = { mga_infobufs, 1, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_MAP_BUFS)] = { mga_mapbufs, 1, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_FREE_BUFS)] = { mga_freebufs, 1, 0 },
-
- [DRM_IOCTL_NR(DRM_IOCTL_ADD_CTX)] = { mga_addctx, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_RM_CTX)] = { mga_rmctx, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_MOD_CTX)] = { mga_modctx, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_GET_CTX)] = { mga_getctx, 1, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_SWITCH_CTX)] = { mga_switchctx, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_NEW_CTX)] = { mga_newctx, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_RES_CTX)] = { mga_resctx, 1, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_ADD_DRAW)] = { drm_adddraw, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_RM_DRAW)] = { drm_rmdraw, 1, 1 },
-
- [DRM_IOCTL_NR(DRM_IOCTL_DMA)] = { mga_dma, 1, 0 },
-
- [DRM_IOCTL_NR(DRM_IOCTL_LOCK)] = { mga_lock, 1, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_UNLOCK)] = { mga_unlock, 1, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_FINISH)] = { drm_finish, 1, 0 },
-
- [DRM_IOCTL_NR(DRM_IOCTL_AGP_ACQUIRE)] = { drm_agp_acquire, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_AGP_RELEASE)] = { drm_agp_release, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_AGP_ENABLE)] = { drm_agp_enable, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_AGP_INFO)] = { drm_agp_info, 1, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_AGP_ALLOC)] = { drm_agp_alloc, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_AGP_FREE)] = { drm_agp_free, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_AGP_BIND)] = { drm_agp_bind, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_AGP_UNBIND)] = { drm_agp_unbind, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_MGA_INIT)] = { mga_dma_init, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_MGA_SWAP)] = { mga_swap_bufs, 1, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_MGA_CLEAR)] = { mga_clear_bufs, 1, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_MGA_ILOAD)] = { mga_iload, 1, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_MGA_VERTEX)] = { mga_vertex, 1, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_MGA_FLUSH)] = { mga_flush_ioctl, 1, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_MGA_INDICES)] = { mga_indices, 1, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_MGA_BLIT)] = { mga_blit, 1, 0 },
-};
-
-#define MGA_IOCTL_COUNT DRM_ARRAY_SIZE(mga_ioctls)
-
-#ifdef MODULE
-static char *mga = NULL;
-#endif
-
-MODULE_AUTHOR("VA Linux Systems, Inc.");
-MODULE_DESCRIPTION("Matrox G200/G400");
-MODULE_PARM(mga, "s");
-
-#ifndef MODULE
-/* mga_options is called by the kernel to parse command-line options passed
- * via the boot-loader (e.g., LILO). It calls the insmod option routine,
- * drm_parse_drm.
- */
-
-static int __init mga_options(char *str)
-{
- drm_parse_options(str);
- return 1;
-}
-
-__setup("mga=", mga_options);
-#endif
-
-static int mga_setup(drm_device_t *dev)
-{
- int i;
-
- atomic_set(&dev->ioctl_count, 0);
- atomic_set(&dev->vma_count, 0);
- dev->buf_use = 0;
- atomic_set(&dev->buf_alloc, 0);
-
- drm_dma_setup(dev);
-
- atomic_set(&dev->total_open, 0);
- atomic_set(&dev->total_close, 0);
- atomic_set(&dev->total_ioctl, 0);
- atomic_set(&dev->total_irq, 0);
- atomic_set(&dev->total_ctx, 0);
- atomic_set(&dev->total_locks, 0);
- atomic_set(&dev->total_unlocks, 0);
- atomic_set(&dev->total_contends, 0);
- atomic_set(&dev->total_sleeps, 0);
-
- for (i = 0; i < DRM_HASH_SIZE; i++) {
- dev->magiclist[i].head = NULL;
- dev->magiclist[i].tail = NULL;
- }
- dev->maplist = NULL;
- dev->map_count = 0;
- dev->vmalist = NULL;
- dev->lock.hw_lock = NULL;
- init_waitqueue_head(&dev->lock.lock_queue);
- dev->queue_count = 0;
- dev->queue_reserved = 0;
- dev->queue_slots = 0;
- dev->queuelist = NULL;
- dev->irq = 0;
- dev->context_flag = 0;
- dev->interrupt_flag = 0;
- dev->dma_flag = 0;
- dev->last_context = 0;
- dev->last_switch = 0;
- dev->last_checked = 0;
- init_timer(&dev->timer);
- init_waitqueue_head(&dev->context_wait);
-
- dev->ctx_start = 0;
- dev->lck_start = 0;
-
- dev->buf_rp = dev->buf;
- dev->buf_wp = dev->buf;
- dev->buf_end = dev->buf + DRM_BSZ;
- dev->buf_async = NULL;
- init_waitqueue_head(&dev->buf_readers);
- init_waitqueue_head(&dev->buf_writers);
-
- DRM_DEBUG("\n");
-
- /* The kernel's context could be created here, but is now created
- in drm_dma_enqueue. This is more resource-efficient for
- hardware that does not do DMA, but may mean that
- drm_select_queue fails between the time the interrupt is
- initialized and the time the queues are initialized. */
-
- return 0;
-}
-
-
-static int mga_takedown(drm_device_t *dev)
-{
- int i;
- drm_magic_entry_t *pt, *next;
- drm_map_t *map;
- drm_vma_entry_t *vma, *vma_next;
-
- DRM_DEBUG("\n");
-
- if (dev->dev_private) mga_dma_cleanup(dev);
- if (dev->irq) mga_irq_uninstall(dev);
-
- down(&dev->struct_sem);
- del_timer(&dev->timer);
-
- if (dev->devname) {
- drm_free(dev->devname, strlen(dev->devname)+1, DRM_MEM_DRIVER);
- dev->devname = NULL;
- }
-
- if (dev->unique) {
- drm_free(dev->unique, strlen(dev->unique)+1, DRM_MEM_DRIVER);
- dev->unique = NULL;
- dev->unique_len = 0;
- }
- /* Clear pid list */
- for (i = 0; i < DRM_HASH_SIZE; i++) {
- for (pt = dev->magiclist[i].head; pt; pt = next) {
- next = pt->next;
- drm_free(pt, sizeof(*pt), DRM_MEM_MAGIC);
- }
- dev->magiclist[i].head = dev->magiclist[i].tail = NULL;
- }
- /* Clear AGP information */
- if (dev->agp) {
- drm_agp_mem_t *entry;
- drm_agp_mem_t *nexte;
-
- /* Remove AGP resources, but leave dev->agp
- intact until cleanup is called. */
- for (entry = dev->agp->memory; entry; entry = nexte) {
- nexte = entry->next;
- if (entry->bound) drm_unbind_agp(entry->memory);
- drm_free_agp(entry->memory, entry->pages);
- drm_free(entry, sizeof(*entry), DRM_MEM_AGPLISTS);
- }
- dev->agp->memory = NULL;
-
- if (dev->agp->acquired) _drm_agp_release();
-
- dev->agp->acquired = 0;
- dev->agp->enabled = 0;
- }
- /* Clear vma list (only built for debugging) */
- if (dev->vmalist) {
- for (vma = dev->vmalist; vma; vma = vma_next) {
- vma_next = vma->next;
- drm_free(vma, sizeof(*vma), DRM_MEM_VMAS);
- }
- dev->vmalist = NULL;
- }
-
- /* Clear map area and mtrr information */
- if (dev->maplist) {
- for (i = 0; i < dev->map_count; i++) {
- map = dev->maplist[i];
- switch (map->type) {
- case _DRM_REGISTERS:
- case _DRM_FRAME_BUFFER:
-#ifdef CONFIG_MTRR
- if (map->mtrr >= 0) {
- int retcode;
- retcode = mtrr_del(map->mtrr,
- map->offset,
- map->size);
- DRM_DEBUG("mtrr_del = %d\n", retcode);
- }
-#endif
- drm_ioremapfree(map->handle, map->size);
- break;
- case _DRM_SHM:
- drm_free_pages((unsigned long)map->handle,
- drm_order(map->size)
- - PAGE_SHIFT,
- DRM_MEM_SAREA);
- break;
- case _DRM_AGP:
- break;
- }
- drm_free(map, sizeof(*map), DRM_MEM_MAPS);
- }
- drm_free(dev->maplist,
- dev->map_count * sizeof(*dev->maplist),
- DRM_MEM_MAPS);
- dev->maplist = NULL;
- dev->map_count = 0;
- }
-
- if (dev->queuelist) {
- for (i = 0; i < dev->queue_count; i++) {
- drm_waitlist_destroy(&dev->queuelist[i]->waitlist);
- if (dev->queuelist[i]) {
- drm_free(dev->queuelist[i],
- sizeof(*dev->queuelist[0]),
- DRM_MEM_QUEUES);
- dev->queuelist[i] = NULL;
- }
- }
- drm_free(dev->queuelist,
- dev->queue_slots * sizeof(*dev->queuelist),
- DRM_MEM_QUEUES);
- dev->queuelist = NULL;
- }
-
- drm_dma_takedown(dev);
-
- dev->queue_count = 0;
- if (dev->lock.hw_lock) {
- dev->lock.hw_lock = NULL; /* SHM removed */
- dev->lock.pid = 0;
- wake_up_interruptible(&dev->lock.lock_queue);
- }
- up(&dev->struct_sem);
-
- return 0;
-}
-
-/* mga_init is called via init_module at module load time, or via
- * linux/init/main.c (this is not currently supported). */
-
-static int __init mga_init(void)
-{
- int retcode;
- drm_device_t *dev = &mga_device;
-
- DRM_DEBUG("\n");
-
- memset((void *)dev, 0, sizeof(*dev));
- dev->count_lock = SPIN_LOCK_UNLOCKED;
- sema_init(&dev->struct_sem, 1);
-
-#ifdef MODULE
- drm_parse_options(mga);
-#endif
- if ((retcode = misc_register(&mga_misc))) {
- DRM_ERROR("Cannot register \"%s\"\n", MGA_NAME);
- return retcode;
- }
- dev->device = MKDEV(MISC_MAJOR, mga_misc.minor);
- dev->name = MGA_NAME;
-
- drm_mem_init();
- drm_proc_init(dev);
- dev->agp = drm_agp_init();
- if(dev->agp == NULL) {
- DRM_INFO("The mga drm module requires the agpgart module"
- " to function correctly\nPlease load the agpgart"
- " module before you load the mga module\n");
- drm_proc_cleanup();
- misc_deregister(&mga_misc);
- mga_takedown(dev);
- return -ENOMEM;
- }
-#ifdef CONFIG_MTRR
- dev->agp->agp_mtrr = mtrr_add(dev->agp->agp_info.aper_base,
- dev->agp->agp_info.aper_size * 1024 * 1024,
- MTRR_TYPE_WRCOMB,
- 1);
-#endif
- if((retcode = drm_ctxbitmap_init(dev))) {
- DRM_ERROR("Cannot allocate memory for context bitmap.\n");
- drm_proc_cleanup();
- misc_deregister(&mga_misc);
- mga_takedown(dev);
- return retcode;
- }
-
- DRM_INFO("Initialized %s %d.%d.%d %s on minor %d\n",
- MGA_NAME,
- MGA_MAJOR,
- MGA_MINOR,
- MGA_PATCHLEVEL,
- MGA_DATE,
- mga_misc.minor);
-
- return 0;
-}
-
-/* mga_cleanup is called via cleanup_module at module unload time. */
-
-static void __exit mga_cleanup(void)
-{
- drm_device_t *dev = &mga_device;
-
- DRM_DEBUG("\n");
-
- drm_proc_cleanup();
- if (misc_deregister(&mga_misc)) {
- DRM_ERROR("Cannot unload module\n");
- } else {
- DRM_INFO("Module unloaded\n");
- }
- drm_ctxbitmap_cleanup(dev);
-#ifdef CONFIG_MTRR
- if(dev->agp && dev->agp->agp_mtrr) {
- int retval;
- retval = mtrr_del(dev->agp->agp_mtrr,
- dev->agp->agp_info.aper_base,
- dev->agp->agp_info.aper_size * 1024*1024);
- DRM_DEBUG("mtrr_del = %d\n", retval);
- }
-#endif
-
- mga_takedown(dev);
- if (dev->agp) {
- drm_agp_uninit();
- drm_free(dev->agp, sizeof(*dev->agp), DRM_MEM_AGPLISTS);
- dev->agp = NULL;
- }
-}
-
-module_init(mga_init);
-module_exit(mga_cleanup);
-
-
-int mga_version(struct inode *inode, struct file *filp, unsigned int cmd,
- unsigned long arg)
-{
- drm_version_t version;
- int len;
-
- if (copy_from_user(&version,
- (drm_version_t *)arg,
- sizeof(version)))
- return -EFAULT;
-
-#define DRM_COPY(name,value) \
- len = strlen(value); \
- if (len > name##_len) len = name##_len; \
- name##_len = strlen(value); \
- if (len && name) { \
- if (copy_to_user(name, value, len)) \
- return -EFAULT; \
- }
-
- version.version_major = MGA_MAJOR;
- version.version_minor = MGA_MINOR;
- version.version_patchlevel = MGA_PATCHLEVEL;
-
- DRM_COPY(version.name, MGA_NAME);
- DRM_COPY(version.date, MGA_DATE);
- DRM_COPY(version.desc, MGA_DESC);
-
- if (copy_to_user((drm_version_t *)arg,
- &version,
- sizeof(version)))
- return -EFAULT;
- return 0;
-}
-
-int mga_open(struct inode *inode, struct file *filp)
-{
- drm_device_t *dev = &mga_device;
- int retcode = 0;
-
- DRM_DEBUG("open_count = %d\n", dev->open_count);
- if (!(retcode = drm_open_helper(inode, filp, dev))) {
-#if LINUX_VERSION_CODE < 0x020333
- MOD_INC_USE_COUNT; /* Needed before Linux 2.3.51 */
-#endif
- atomic_inc(&dev->total_open);
- spin_lock(&dev->count_lock);
- if (!dev->open_count++) {
- spin_unlock(&dev->count_lock);
- return mga_setup(dev);
- }
- spin_unlock(&dev->count_lock);
- }
- return retcode;
-}
-
-int mga_release(struct inode *inode, struct file *filp)
-{
- drm_file_t *priv = filp->private_data;
- drm_device_t *dev;
- int retcode = 0;
-
- lock_kernel();
- dev = priv->dev;
- DRM_DEBUG("pid = %d, device = 0x%x, open_count = %d\n",
- current->pid, dev->device, dev->open_count);
-
- if (dev->lock.hw_lock && _DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock)
- && dev->lock.pid == current->pid) {
- mga_reclaim_buffers(dev, priv->pid);
- DRM_INFO("Process %d dead (ctx %d, d_s = 0x%02lx)\n",
- current->pid,
- _DRM_LOCKING_CONTEXT(dev->lock.hw_lock->lock),
- dev->dev_private ?
- ((drm_mga_private_t *)dev->dev_private)
- ->dispatch_status
- : 0);
-
- if (dev->dev_private)
- ((drm_mga_private_t *)dev->dev_private)
- ->dispatch_status &= MGA_IN_DISPATCH;
-
- drm_lock_free(dev,
- &dev->lock.hw_lock->lock,
- _DRM_LOCKING_CONTEXT(dev->lock.hw_lock->lock));
- } else if (dev->lock.hw_lock) {
- /* The lock is required to reclaim buffers */
- DECLARE_WAITQUEUE(entry, current);
- add_wait_queue(&dev->lock.lock_queue, &entry);
- for (;;) {
- current->state = TASK_INTERRUPTIBLE;
- if (!dev->lock.hw_lock) {
- /* Device has been unregistered */
- retcode = -EINTR;
- break;
- }
- if (drm_lock_take(&dev->lock.hw_lock->lock,
- DRM_KERNEL_CONTEXT)) {
- dev->lock.pid = priv->pid;
- dev->lock.lock_time = jiffies;
- atomic_inc(&dev->total_locks);
- break; /* Got lock */
- }
- /* Contention */
- atomic_inc(&dev->total_sleeps);
- schedule();
- if (signal_pending(current)) {
- retcode = -ERESTARTSYS;
- break;
- }
- }
- current->state = TASK_RUNNING;
- remove_wait_queue(&dev->lock.lock_queue, &entry);
- if(!retcode) {
- mga_reclaim_buffers(dev, priv->pid);
- if (dev->dev_private)
- ((drm_mga_private_t *)dev->dev_private)
- ->dispatch_status &= MGA_IN_DISPATCH;
- drm_lock_free(dev, &dev->lock.hw_lock->lock,
- DRM_KERNEL_CONTEXT);
- }
- }
- drm_fasync(-1, filp, 0);
-
- down(&dev->struct_sem);
- if (priv->remove_auth_on_close == 1) {
- drm_file_t *temp = dev->file_first;
- while(temp) {
- temp->authenticated = 0;
- temp = temp->next;
- }
- }
- if (priv->prev) priv->prev->next = priv->next;
- else dev->file_first = priv->next;
- if (priv->next) priv->next->prev = priv->prev;
- else dev->file_last = priv->prev;
- up(&dev->struct_sem);
-
- drm_free(priv, sizeof(*priv), DRM_MEM_FILES);
-#if LINUX_VERSION_CODE < 0x020333
- MOD_DEC_USE_COUNT; /* Needed before Linux 2.3.51 */
-#endif
- atomic_inc(&dev->total_close);
- spin_lock(&dev->count_lock);
- if (!--dev->open_count) {
- if (atomic_read(&dev->ioctl_count) || dev->blocked) {
- DRM_ERROR("Device busy: %d %d\n",
- atomic_read(&dev->ioctl_count),
- dev->blocked);
- spin_unlock(&dev->count_lock);
- unlock_kernel();
- return -EBUSY;
- }
- spin_unlock(&dev->count_lock);
- unlock_kernel();
- return mga_takedown(dev);
- }
- spin_unlock(&dev->count_lock);
- unlock_kernel();
- return retcode;
-}
-
-
-/* drm_ioctl is called whenever a process performs an ioctl on /dev/drm. */
-
-int mga_ioctl(struct inode *inode, struct file *filp, unsigned int cmd,
- unsigned long arg)
-{
- int nr = DRM_IOCTL_NR(cmd);
- drm_file_t *priv = filp->private_data;
- drm_device_t *dev = priv->dev;
- int retcode = 0;
- drm_ioctl_desc_t *ioctl;
- drm_ioctl_t *func;
-
- atomic_inc(&dev->ioctl_count);
- atomic_inc(&dev->total_ioctl);
- ++priv->ioctl_count;
-
- if (nr >= MGA_IOCTL_COUNT) {
- retcode = -EINVAL;
- } else {
- ioctl = &mga_ioctls[nr];
- func = ioctl->func;
-
- if (!func) {
- DRM_DEBUG("no function: pid = %d, cmd = 0x%02x,"
- " nr = 0x%02x, dev 0x%x, auth = %d\n",
- current->pid, cmd, nr, dev->device,
- priv->authenticated);
- retcode = -EINVAL;
- } else if ((ioctl->root_only && !capable(CAP_SYS_ADMIN))
- || (ioctl->auth_needed && !priv->authenticated)) {
- retcode = -EACCES;
- } else {
- retcode = (func)(inode, filp, cmd, arg);
- }
- }
-
- atomic_dec(&dev->ioctl_count);
- return retcode;
-}
-
-int mga_unlock(struct inode *inode, struct file *filp, unsigned int cmd,
- unsigned long arg)
-{
- drm_file_t *priv = filp->private_data;
- drm_device_t *dev = priv->dev;
- drm_lock_t lock;
-
- if (copy_from_user(&lock, (drm_lock_t *)arg, sizeof(lock)))
- return -EFAULT;
-
- if (lock.context == DRM_KERNEL_CONTEXT) {
- DRM_ERROR("Process %d using kernel context %d\n",
- current->pid, lock.context);
- return -EINVAL;
- }
-
- atomic_inc(&dev->total_unlocks);
- if (_DRM_LOCK_IS_CONT(dev->lock.hw_lock->lock))
- atomic_inc(&dev->total_contends);
- drm_lock_transfer(dev, &dev->lock.hw_lock->lock, DRM_KERNEL_CONTEXT);
- mga_dma_schedule(dev, 1);
-
- if (drm_lock_free(dev, &dev->lock.hw_lock->lock,
- DRM_KERNEL_CONTEXT)) DRM_ERROR("\n");
-
- unblock_all_signals();
- return 0;
-}
+#define DRIVER_AUTHOR "Gareth Hughes, VA Linux Systems Inc."
+
+#define DRIVER_NAME "mga"
+#define DRIVER_DESC "Matrox G200/G400"
+#define DRIVER_DATE "20010319"
+
+#define DRIVER_MAJOR 3
+#define DRIVER_MINOR 0
+#define DRIVER_PATCHLEVEL 1
+
+#define DRIVER_IOCTLS \
+ [DRM_IOCTL_NR(DRM_IOCTL_DMA)] = { mga_dma_buffers, 1, 0 }, \
+ [DRM_IOCTL_NR(DRM_IOCTL_MGA_INIT)] = { mga_dma_init, 1, 1 }, \
+ [DRM_IOCTL_NR(DRM_IOCTL_MGA_FLUSH)] = { mga_dma_flush, 1, 0 }, \
+ [DRM_IOCTL_NR(DRM_IOCTL_MGA_RESET)] = { mga_dma_reset, 1, 0 }, \
+ [DRM_IOCTL_NR(DRM_IOCTL_MGA_SWAP)] = { mga_dma_swap, 1, 0 }, \
+ [DRM_IOCTL_NR(DRM_IOCTL_MGA_CLEAR)] = { mga_dma_clear, 1, 0 }, \
+ [DRM_IOCTL_NR(DRM_IOCTL_MGA_VERTEX)] = { mga_dma_vertex, 1, 0 }, \
+ [DRM_IOCTL_NR(DRM_IOCTL_MGA_INDICES)] = { mga_dma_indices, 1, 0 }, \
+ [DRM_IOCTL_NR(DRM_IOCTL_MGA_ILOAD)] = { mga_dma_iload, 1, 0 }, \
+ [DRM_IOCTL_NR(DRM_IOCTL_MGA_BLIT)] = { mga_dma_blit, 1, 0 },
+
+
+#define __HAVE_COUNTERS 3
+#define __HAVE_COUNTER6 _DRM_STAT_IRQ
+#define __HAVE_COUNTER7 _DRM_STAT_PRIMARY
+#define __HAVE_COUNTER8 _DRM_STAT_SECONDARY
+
+
+#include "drm_agpsupport.h"
+#include "drm_auth.h"
+#include "drm_bufs.h"
+#include "drm_context.h"
+#include "drm_dma.h"
+#include "drm_drawable.h"
+#include "drm_drv.h"
+#include "drm_fops.h"
+#include "drm_init.h"
+#include "drm_ioctl.h"
+#include "drm_lock.h"
+#include "drm_memory.h"
+#include "drm_proc.h"
+#include "drm_vm.h"
+#include "drm_stub.h"
diff --git a/linux/mga_drv.h b/linux/mga_drv.h
index d7bf6326..bd33d9d1 100644
--- a/linux/mga_drv.h
+++ b/linux/mga_drv.h
@@ -1,4 +1,4 @@
-/* mga_drv.h -- Private header for the Matrox g200/g400 driver -*- linux-c -*-
+/* mga_drv.h -- Private header for the Matrox G200/G400 driver -*- linux-c -*-
* Created: Mon Dec 13 01:50:01 1999 by jhartmann@precisioninsight.com
*
* Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
@@ -19,182 +19,140 @@
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
- * DEALINGS IN THE SOFTWARE.
- *
- * Authors: Rickard E. (Rik) Faith <faith@valinux.com>
- * Jeff Hartmann <jhartmann@valinux.com>
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
*
+ * Authors:
+ * Gareth Hughes <gareth@valinux.com>
*/
-#ifndef _MGA_DRV_H_
-#define _MGA_DRV_H_
+#ifndef __MGA_DRV_H__
+#define __MGA_DRV_H__
-#define MGA_BUF_IN_USE 0
-#define MGA_BUF_SWAP_PENDING 1
-#define MGA_BUF_FORCE_FIRE 2
-#define MGA_BUF_NEEDS_OVERFLOW 3
+typedef struct drm_mga_primary_buffer {
+ u8 *start;
+ u8 *end;
+ int size;
-typedef struct {
- long buffer_status; /* long req'd for set_bit() --RR */
- int num_dwords;
- int max_dwords;
- u32 *current_dma_ptr;
- u32 *head;
- u32 phys_head;
- unsigned int prim_age;
- int sec_used;
- int idx;
-} drm_mga_prim_buf_t;
-
-typedef struct _drm_mga_freelist {
- __volatile__ unsigned int age;
+ u32 tail;
+ int space;
+
+ volatile u32 *status;
+
+ u32 last_flush;
+ u32 last_wrap;
+
+ u32 high_mark;
+
+ spinlock_t list_lock;
+} drm_mga_primary_buffer_t;
+
+typedef struct drm_mga_freelist {
+ struct drm_mga_freelist *next;
+ struct drm_mga_freelist *prev;
+ drm_mga_age_t age;
drm_buf_t *buf;
- struct _drm_mga_freelist *next;
- struct _drm_mga_freelist *prev;
} drm_mga_freelist_t;
-#define MGA_IN_DISPATCH 0
-#define MGA_IN_FLUSH 1
-#define MGA_IN_WAIT 2
-#define MGA_IN_GETBUF 3
-
-typedef struct _drm_mga_private {
- long dispatch_status; /* long req'd for set_bit() --RR */
- unsigned int next_prim_age;
- __volatile__ unsigned int last_prim_age;
- int reserved_map_idx;
- int buffer_map_idx;
- drm_mga_sarea_t *sarea_priv;
- int primary_size;
- int warp_ucode_size;
- int chipset;
- unsigned int frontOffset;
- unsigned int backOffset;
- unsigned int depthOffset;
- unsigned int textureOffset;
- unsigned int textureSize;
- int cpp;
- unsigned int stride;
- int sgram;
- int use_agp;
- drm_mga_warp_index_t WarpIndex[MGA_MAX_G400_PIPES];
- unsigned int WarpPipe;
- unsigned int vertexsize;
- atomic_t pending_bufs;
- void *status_page;
- unsigned long real_status_page;
- u8 *ioremap;
- drm_mga_prim_buf_t **prim_bufs;
- drm_mga_prim_buf_t *next_prim;
- drm_mga_prim_buf_t *last_prim;
- drm_mga_prim_buf_t *current_prim;
- int current_prim_idx;
+typedef struct {
+ drm_mga_freelist_t *list_entry;
+ int discard;
+ int dispatched;
+} drm_mga_buf_priv_t;
+
+typedef struct drm_mga_private {
+ drm_mga_primary_buffer_t prim;
+ drm_mga_sarea_t *sarea_priv;
+
drm_mga_freelist_t *head;
drm_mga_freelist_t *tail;
- wait_queue_head_t flush_queue; /* Processes waiting until flush */
- wait_queue_head_t wait_queue; /* Processes waiting until interrupt */
- wait_queue_head_t buf_queue; /* Processes waiting for a free buf */
- /* Some validated register values:
- */
- u32 mAccess;
-} drm_mga_private_t;
- /* mga_drv.c */
-extern int mga_version(struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg);
-extern int mga_open(struct inode *inode, struct file *filp);
-extern int mga_release(struct inode *inode, struct file *filp);
-extern int mga_ioctl(struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg);
-extern int mga_unlock(struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg);
+ unsigned int warp_pipe;
+ unsigned long warp_pipe_phys[MGA_MAX_WARP_PIPES];
+
+ int chipset;
+ int usec_timeout;
+
+ u32 clear_cmd;
+ u32 maccess;
+
+ unsigned int fb_cpp;
+ unsigned int front_offset;
+ unsigned int front_pitch;
+ unsigned int back_offset;
+ unsigned int back_pitch;
+
+ unsigned int depth_cpp;
+ unsigned int depth_offset;
+ unsigned int depth_pitch;
+
+ unsigned int texture_offset;
+ unsigned int texture_size;
+
+ drm_map_t *sarea;
+ drm_map_t *fb;
+ drm_map_t *mmio;
+ drm_map_t *status;
+ drm_map_t *warp;
+ drm_map_t *primary;
+ drm_map_t *buffers;
+ drm_map_t *agp_textures;
+} drm_mga_private_t;
/* mga_dma.c */
-extern int mga_dma_schedule(drm_device_t *dev, int locked);
-extern int mga_dma(struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg);
-extern int mga_irq_install(drm_device_t *dev, int irq);
-extern int mga_irq_uninstall(drm_device_t *dev);
-extern int mga_control(struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg);
-extern int mga_lock(struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg);
-
-/* mga_dma_init does init and release */
-extern int mga_dma_init(struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg);
-extern int mga_dma_cleanup(drm_device_t *dev);
-extern int mga_flush_ioctl(struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg);
-extern unsigned int mga_create_sync_tag(drm_device_t *dev);
-extern drm_buf_t *mga_freelist_get(drm_device_t *dev);
-extern int mga_freelist_put(drm_device_t *dev, drm_buf_t *buf);
-extern int mga_advance_primary(drm_device_t *dev);
-extern void mga_reclaim_buffers(drm_device_t *dev, pid_t pid);
-
-
- /* mga_bufs.c */
-extern int mga_addbufs(struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg);
-extern int mga_infobufs(struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg);
-extern int mga_markbufs(struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg);
-extern int mga_freebufs(struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg);
-extern int mga_mapbufs(struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg);
-extern int mga_addmap(struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg);
+extern int mga_dma_init( struct inode *inode, struct file *filp,
+ unsigned int cmd, unsigned long arg );
+extern int mga_dma_flush( struct inode *inode, struct file *filp,
+ unsigned int cmd, unsigned long arg );
+extern int mga_dma_reset( struct inode *inode, struct file *filp,
+ unsigned int cmd, unsigned long arg );
+extern int mga_dma_buffers( struct inode *inode, struct file *filp,
+ unsigned int cmd, unsigned long arg );
+
+extern int mga_do_wait_for_idle( drm_mga_private_t *dev_priv );
+extern int mga_do_dma_idle( drm_mga_private_t *dev_priv );
+extern int mga_do_dma_reset( drm_mga_private_t *dev_priv );
+extern int mga_do_engine_reset( drm_mga_private_t *dev_priv );
+extern int mga_do_cleanup_dma( drm_device_t *dev );
+
+extern void mga_do_dma_flush( drm_mga_private_t *dev_priv );
+extern void mga_do_dma_wrap_start( drm_mga_private_t *dev_priv );
+extern void mga_do_dma_wrap_end( drm_mga_private_t *dev_priv );
+
+extern int mga_freelist_put( drm_device_t *dev, drm_buf_t *buf );
+
+
/* mga_state.c */
-extern int mga_clear_bufs(struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg);
-extern int mga_swap_bufs(struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg);
-extern int mga_iload(struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg);
-extern int mga_vertex(struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg);
-extern int mga_indices(struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg);
-extern int mga_blit(struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg);
- /* mga_context.c */
-extern int mga_resctx(struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg);
-extern int mga_addctx(struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg);
-extern int mga_modctx(struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg);
-extern int mga_getctx(struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg);
-extern int mga_switchctx(struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg);
-extern int mga_newctx(struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg);
-extern int mga_rmctx(struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg);
-
-extern int mga_context_switch(drm_device_t *dev, int old, int new);
-extern int mga_context_switch_complete(drm_device_t *dev, int new);
+extern int mga_dma_clear( struct inode *inode, struct file *filp,
+ unsigned int cmd, unsigned long arg );
+extern int mga_dma_swap( struct inode *inode, struct file *filp,
+ unsigned int cmd, unsigned long arg );
+extern int mga_dma_vertex( struct inode *inode, struct file *filp,
+ unsigned int cmd, unsigned long arg );
+extern int mga_dma_indices( struct inode *inode, struct file *filp,
+ unsigned int cmd, unsigned long arg );
+extern int mga_dma_iload( struct inode *inode, struct file *filp,
+ unsigned int cmd, unsigned long arg );
+extern int mga_dma_blit( struct inode *inode, struct file *filp,
+ unsigned int cmd, unsigned long arg );
+
+ /* mga_warp.c */
+extern int mga_warp_install_microcode( drm_device_t *dev );
+extern int mga_warp_init( drm_device_t *dev );
#define mga_flush_write_combine() mb()
-typedef enum {
- TT_GENERAL,
- TT_BLIT,
- TT_VECTOR,
- TT_VERTEX
-} transferType_t;
-typedef struct {
- drm_mga_freelist_t *my_freelist;
- int discard;
- int dispatched;
-} drm_mga_buf_priv_t;
+#define MGA_BASE( reg ) ((u32)(dev_priv->mmio->handle))
+#define MGA_ADDR( reg ) (MGA_BASE(reg) + reg)
+
+#define MGA_DEREF( reg ) *(volatile u32 *)MGA_ADDR( reg )
+#define MGA_READ( reg ) MGA_DEREF( reg )
+#define MGA_WRITE( reg, val ) do { MGA_DEREF( reg ) = val; } while (0)
+#define MGA_DEREF8( reg ) *(volatile u8 *)MGA_ADDR( reg )
+#define MGA_WRITE8( reg, val ) do { MGA_DEREF8( reg ) = val; } while (0)
#define DWGREG0 0x1c00
#define DWGREG0_END 0x1dff
@@ -202,328 +160,443 @@ typedef struct {
#define DWGREG1_END 0x2dff
#define ISREG0(r) (r >= DWGREG0 && r <= DWGREG0_END)
-#define ADRINDEX0(r) (u8)((r - DWGREG0) >> 2)
-#define ADRINDEX1(r) (u8)(((r - DWGREG1) >> 2) | 0x80)
-#define ADRINDEX(r) (ISREG0(r) ? ADRINDEX0(r) : ADRINDEX1(r))
-
-#define MGA_VERBOSE 0
-#define MGA_NUM_PRIM_BUFS 8
-
-#define PRIMLOCALS u8 tempIndex[4]; u32 *dma_ptr; u32 phys_head; \
- int outcount, num_dwords
-
-#define PRIM_OVERFLOW(dev, dev_priv, length) do { \
- drm_mga_prim_buf_t *tmp_buf = \
- dev_priv->prim_bufs[dev_priv->current_prim_idx]; \
- if( test_bit(MGA_BUF_NEEDS_OVERFLOW, &tmp_buf->buffer_status)) { \
- mga_advance_primary(dev); \
- mga_dma_schedule(dev, 1); \
- tmp_buf = dev_priv->prim_bufs[dev_priv->current_prim_idx]; \
- } else if( tmp_buf->max_dwords - tmp_buf->num_dwords < length || \
- tmp_buf->sec_used > MGA_DMA_BUF_NR/2) { \
- set_bit(MGA_BUF_FORCE_FIRE, &tmp_buf->buffer_status); \
- mga_advance_primary(dev); \
- mga_dma_schedule(dev, 1); \
- tmp_buf = dev_priv->prim_bufs[dev_priv->current_prim_idx]; \
- } \
- if(MGA_VERBOSE) \
- DRM_DEBUG("PRIMGETPTR in %s\n", __FUNCTION__); \
- dma_ptr = tmp_buf->current_dma_ptr; \
- num_dwords = tmp_buf->num_dwords; \
- phys_head = tmp_buf->phys_head; \
- outcount = 0; \
-} while(0)
-
-#define PRIMGETPTR(dev_priv) do { \
- drm_mga_prim_buf_t *tmp_buf = \
- dev_priv->prim_bufs[dev_priv->current_prim_idx]; \
- if(MGA_VERBOSE) \
- DRM_DEBUG("PRIMGETPTR in %s\n", __FUNCTION__); \
- dma_ptr = tmp_buf->current_dma_ptr; \
- num_dwords = tmp_buf->num_dwords; \
- phys_head = tmp_buf->phys_head; \
- outcount = 0; \
-} while(0)
-
-#define PRIMPTR(prim_buf) do { \
- if(MGA_VERBOSE) \
- DRM_DEBUG("PRIMPTR in %s\n", __FUNCTION__); \
- dma_ptr = prim_buf->current_dma_ptr; \
- num_dwords = prim_buf->num_dwords; \
- phys_head = prim_buf->phys_head; \
- outcount = 0; \
-} while(0)
-
-#define PRIMFINISH(prim_buf) do { \
- if (MGA_VERBOSE) { \
- DRM_DEBUG( "PRIMFINISH in %s\n", __FUNCTION__); \
- if (outcount & 3) \
- DRM_DEBUG(" --- truncation\n"); \
- } \
- prim_buf->num_dwords = num_dwords; \
- prim_buf->current_dma_ptr = dma_ptr; \
-} while(0)
-
-#define PRIMADVANCE(dev_priv) do { \
-drm_mga_prim_buf_t *tmp_buf = \
- dev_priv->prim_bufs[dev_priv->current_prim_idx]; \
- if (MGA_VERBOSE) { \
- DRM_DEBUG("PRIMADVANCE in %s\n", __FUNCTION__); \
- if (outcount & 3) \
- DRM_DEBUG(" --- truncation\n"); \
- } \
- tmp_buf->num_dwords = num_dwords; \
- tmp_buf->current_dma_ptr = dma_ptr; \
+#define DMAREG0(r) (u8)((r - DWGREG0) >> 2)
+#define DMAREG1(r) (u8)(((r - DWGREG1) >> 2) | 0x80)
+#define DMAREG(r) (ISREG0(r) ? DMAREG0(r) : DMAREG1(r))
+
+
+
+/* ================================================================
+ * Helper macross...
+ */
+
+#define MGA_EMIT_STATE( dev_priv, dirty ) \
+do { \
+ if ( (dirty) & ~MGA_UPLOAD_CLIPRECTS ) { \
+ if ( dev_priv->chipset == MGA_CARD_TYPE_G400 ) { \
+ mga_g400_emit_state( dev_priv ); \
+ } else { \
+ mga_g200_emit_state( dev_priv ); \
+ } \
+ } \
+} while (0)
+
+#define LOCK_TEST_WITH_RETURN( dev ) \
+do { \
+ if ( !_DRM_LOCK_IS_HELD( dev->lock.hw_lock->lock ) || \
+ dev->lock.pid != current->pid ) { \
+ DRM_ERROR( "%s called without lock held\n", \
+ __FUNCTION__ ); \
+ return -EINVAL; \
+ } \
+} while (0)
+
+#define WRAP_TEST_WITH_RETURN( dev_priv ) \
+do { \
+ if ( dev_priv->sarea_priv->last_wrap < \
+ dev_priv->prim.last_wrap ) { \
+ if ( mga_do_wait_for_idle( dev_priv ) < 0 ) \
+ return -EBUSY; \
+ mga_do_dma_wrap_end( dev_priv ); \
+ } \
+} while (0)
+
+
+/* ================================================================
+ * Primary DMA command stream
+ */
+
+#define MGA_VERBOSE 0
+
+#define DMA_LOCALS unsigned int write; volatile u8 *prim;
+
+#define DMA_BLOCK_SIZE (5 * sizeof(u32))
+
+#define BEGIN_DMA( n ) \
+do { \
+ if ( MGA_VERBOSE ) { \
+ DRM_INFO( "BEGIN_DMA( %d ) in %s\n", \
+ (n), __FUNCTION__ ); \
+ DRM_INFO( " space=0x%x req=0x%x\n", \
+ dev_priv->prim.space, (n) * DMA_BLOCK_SIZE ); \
+ } \
+ prim = dev_priv->prim.start; \
+ write = dev_priv->prim.tail; \
+} while (0)
+
+#define BEGIN_DMA_WRAP() \
+do { \
+ if ( MGA_VERBOSE ) { \
+ DRM_INFO( "BEGIN_DMA() in %s\n", __FUNCTION__ ); \
+ DRM_INFO( " space=0x%x\n", dev_priv->prim.space ); \
+ } \
+ prim = dev_priv->prim.start; \
+ write = dev_priv->prim.tail; \
+} while (0)
+
+#define ADVANCE_DMA() \
+do { \
+ dev_priv->prim.tail = write; \
+ if ( MGA_VERBOSE ) { \
+ DRM_INFO( "ADVANCE_DMA() tail=0x%05x sp=0x%x\n", \
+ write, dev_priv->prim.space ); \
+ } \
+} while (0)
+
+#define FLUSH_DMA() \
+do { \
+ if ( 0 ) { \
+ DRM_INFO( __FUNCTION__ ":\n" ); \
+ DRM_INFO( " tail=0x%06x head=0x%06lx\n", \
+ dev_priv->prim.tail, \
+ MGA_READ( MGA_PRIMADDRESS ) - \
+ dev_priv->primary->offset ); \
+ } \
+ if ( dev_priv->prim.space < dev_priv->prim.high_mark ) { \
+ mga_do_dma_wrap_start( dev_priv ); \
+ } else { \
+ mga_do_dma_flush( dev_priv ); \
+ } \
} while (0)
-#define PRIMUPDATE(dev_priv) do { \
- drm_mga_prim_buf_t *tmp_buf = \
- dev_priv->prim_bufs[dev_priv->current_prim_idx]; \
- tmp_buf->sec_used++; \
+/* Never use this, always use DMA_BLOCK(...) for primary DMA output.
+ */
+#define DMA_WRITE( offset, val ) \
+do { \
+ if ( MGA_VERBOSE ) { \
+ DRM_INFO( " DMA_WRITE( 0x%08x ) at 0x%04x\n", \
+ (u32)(val), write + (offset) * sizeof(u32) ); \
+ } \
+ *(volatile u32 *)(prim + write + (offset) * sizeof(u32)) = val; \
} while (0)
-#define AGEBUF(dev_priv, buf_priv) do { \
- drm_mga_prim_buf_t *tmp_buf = \
- dev_priv->prim_bufs[dev_priv->current_prim_idx]; \
- buf_priv->my_freelist->age = tmp_buf->prim_age; \
+#define DMA_BLOCK( reg0, val0, reg1, val1, reg2, val2, reg3, val3 ) \
+do { \
+ DMA_WRITE( 0, ((DMAREG( reg0 ) << 0) | \
+ (DMAREG( reg1 ) << 8) | \
+ (DMAREG( reg2 ) << 16) | \
+ (DMAREG( reg3 ) << 24)) ); \
+ DMA_WRITE( 1, val0 ); \
+ DMA_WRITE( 2, val1 ); \
+ DMA_WRITE( 3, val2 ); \
+ DMA_WRITE( 4, val3 ); \
+ write += DMA_BLOCK_SIZE; \
} while (0)
-#define PRIMOUTREG(reg, val) do { \
- tempIndex[outcount]=ADRINDEX(reg); \
- dma_ptr[1+outcount] = val; \
- if (MGA_VERBOSE) \
- DRM_DEBUG(" PRIMOUT %d: 0x%x -- 0x%x\n", \
- num_dwords + 1 + outcount, ADRINDEX(reg), val); \
- if( ++outcount == 4) { \
- outcount = 0; \
- dma_ptr[0] = *(unsigned long *)tempIndex; \
- dma_ptr+=5; \
- num_dwords += 5; \
+/* Buffer aging via primary DMA stream head pointer.
+ */
+
+#define SET_AGE( age, h, w ) \
+do { \
+ (age)->head = h; \
+ (age)->wrap = w; \
+} while (0)
+
+#define TEST_AGE( age, h, w ) ( (age)->wrap < w || \
+ ( (age)->wrap == w && \
+ (age)->head < h ) )
+
+#define AGE_BUFFER( buf_priv ) \
+do { \
+ drm_mga_freelist_t *entry = (buf_priv)->list_entry; \
+ if ( (buf_priv)->dispatched ) { \
+ entry->age.head = (dev_priv->prim.tail + \
+ dev_priv->primary->offset); \
+ entry->age.wrap = dev_priv->sarea_priv->last_wrap; \
+ } else { \
+ entry->age.head = 0; \
+ entry->age.wrap = 0; \
} \
-}while (0)
+} while (0)
+
+
+#define MGA_ENGINE_IDLE_MASK (MGA_SOFTRAPEN | \
+ MGA_DWGENGSTS | \
+ MGA_ENDPRDMASTS)
+#define MGA_DMA_IDLE_MASK (MGA_SOFTRAPEN | \
+ MGA_ENDPRDMASTS)
+
+#define MGA_DMA_SOFTRAP_SIZE 32 * DMA_BLOCK_SIZE
+
+
/* A reduced set of the mga registers.
*/
+#define MGA_CRTC_INDEX 0x1fd4
+
+#define MGA_ALPHACTRL 0x2c7c
+#define MGA_AR0 0x1c60
+#define MGA_AR1 0x1c64
+#define MGA_AR2 0x1c68
+#define MGA_AR3 0x1c6c
+#define MGA_AR4 0x1c70
+#define MGA_AR5 0x1c74
+#define MGA_AR6 0x1c78
+
+#define MGA_CXBNDRY 0x1c80
+#define MGA_CXLEFT 0x1ca0
+#define MGA_CXRIGHT 0x1ca4
+
+#define MGA_DMAPAD 0x1c54
+#define MGA_DSTORG 0x2cb8
+#define MGA_DWGCTL 0x1c00
+# define MGA_OPCOD_MASK (15 << 0)
+# define MGA_OPCOD_TRAP (4 << 0)
+# define MGA_OPCOD_TEXTURE_TRAP (6 << 0)
+# define MGA_OPCOD_BITBLT (8 << 0)
+# define MGA_OPCOD_ILOAD (9 << 0)
+# define MGA_ATYPE_MASK (7 << 4)
+# define MGA_ATYPE_RPL (0 << 4)
+# define MGA_ATYPE_RSTR (1 << 4)
+# define MGA_ATYPE_ZI (3 << 4)
+# define MGA_ATYPE_BLK (4 << 4)
+# define MGA_ATYPE_I (7 << 4)
+# define MGA_LINEAR (1 << 7)
+# define MGA_ZMODE_MASK (7 << 8)
+# define MGA_ZMODE_NOZCMP (0 << 8)
+# define MGA_ZMODE_ZE (2 << 8)
+# define MGA_ZMODE_ZNE (3 << 8)
+# define MGA_ZMODE_ZLT (4 << 8)
+# define MGA_ZMODE_ZLTE (5 << 8)
+# define MGA_ZMODE_ZGT (6 << 8)
+# define MGA_ZMODE_ZGTE (7 << 8)
+# define MGA_SOLID (1 << 11)
+# define MGA_ARZERO (1 << 12)
+# define MGA_SGNZERO (1 << 13)
+# define MGA_SHIFTZERO (1 << 14)
+# define MGA_BOP_MASK (15 << 16)
+# define MGA_BOP_ZERO (0 << 16)
+# define MGA_BOP_DST (10 << 16)
+# define MGA_BOP_SRC (12 << 16)
+# define MGA_BOP_ONE (15 << 16)
+# define MGA_TRANS_SHIFT 20
+# define MGA_TRANS_MASK (15 << 20)
+# define MGA_BLTMOD_MASK (15 << 25)
+# define MGA_BLTMOD_BMONOLEF (0 << 25)
+# define MGA_BLTMOD_BMONOWF (4 << 25)
+# define MGA_BLTMOD_PLAN (1 << 25)
+# define MGA_BLTMOD_BFCOL (2 << 25)
+# define MGA_BLTMOD_BU32BGR (3 << 25)
+# define MGA_BLTMOD_BU32RGB (7 << 25)
+# define MGA_BLTMOD_BU24BGR (11 << 25)
+# define MGA_BLTMOD_BU24RGB (15 << 25)
+# define MGA_PATTERN (1 << 29)
+# define MGA_TRANSC (1 << 30)
+# define MGA_CLIPDIS (1 << 31)
+#define MGA_DWGSYNC 0x2c4c
+
+#define MGA_FCOL 0x1c24
+#define MGA_FIFOSTATUS 0x1e10
+#define MGA_FOGCOL 0x1cf4
+#define MGA_FXBNDRY 0x1c84
+#define MGA_FXLEFT 0x1ca8
+#define MGA_FXRIGHT 0x1cac
+
+#define MGA_ICLEAR 0x1e18
+# define MGA_SOFTRAPICLR (1 << 0)
+#define MGA_IEN 0x1e1c
+# define MGA_SOFTRAPIEN (1 << 0)
+
+#define MGA_LEN 0x1c5c
+
+#define MGA_MACCESS 0x1c04
+
+#define MGA_PITCH 0x1c8c
+#define MGA_PLNWT 0x1c1c
+#define MGA_PRIMADDRESS 0x1e58
+# define MGA_DMA_GENERAL (0 << 0)
+# define MGA_DMA_BLIT (1 << 0)
+# define MGA_DMA_VECTOR (2 << 0)
+# define MGA_DMA_VERTEX (3 << 0)
+#define MGA_PRIMEND 0x1e5c
+# define MGA_PRIMNOSTART (1 << 0)
+# define MGA_PAGPXFER (1 << 1)
+#define MGA_PRIMPTR 0x1e50
+# define MGA_PRIMPTREN0 (1 << 0)
+# define MGA_PRIMPTREN1 (1 << 1)
+
+#define MGA_RST 0x1e40
+# define MGA_SOFTRESET (1 << 0)
+# define MGA_SOFTEXTRST (1 << 1)
+
+#define MGA_SECADDRESS 0x2c40
+#define MGA_SECEND 0x2c44
+#define MGA_SETUPADDRESS 0x2cd0
+#define MGA_SETUPEND 0x2cd4
+#define MGA_SGN 0x1c58
+#define MGA_SOFTRAP 0x2c48
+#define MGA_SRCORG 0x2cb4
+# define MGA_SRMMAP_MASK (1 << 0)
+# define MGA_SRCMAP_FB (0 << 0)
+# define MGA_SRCMAP_SYSMEM (1 << 0)
+# define MGA_SRCACC_MASK (1 << 1)
+# define MGA_SRCACC_PCI (0 << 1)
+# define MGA_SRCACC_AGP (1 << 1)
+#define MGA_STATUS 0x1e14
+# define MGA_SOFTRAPEN (1 << 0)
+# define MGA_DWGENGSTS (1 << 16)
+# define MGA_ENDPRDMASTS (1 << 17)
+#define MGA_STENCIL 0x2cc8
+#define MGA_STENCILCTL 0x2ccc
+
+#define MGA_TDUALSTAGE0 0x2cf8
+#define MGA_TDUALSTAGE1 0x2cfc
+#define MGA_TEXBORDERCOL 0x2c5c
+#define MGA_TEXCTL 0x2c30
+#define MGA_TEXCTL2 0x2c3c
+# define MGA_DUALTEX (1 << 7)
+# define MGA_G400_TC2_MAGIC (1 << 15)
+# define MGA_MAP1_ENABLE (1 << 31)
+#define MGA_TEXFILTER 0x2c58
+#define MGA_TEXHEIGHT 0x2c2c
+#define MGA_TEXORG 0x2c24
+# define MGA_TEXORGMAP_MASK (1 << 0)
+# define MGA_TEXORGMAP_FB (0 << 0)
+# define MGA_TEXORGMAP_SYSMEM (1 << 0)
+# define MGA_TEXORGACC_MASK (1 << 1)
+# define MGA_TEXORGACC_PCI (0 << 1)
+# define MGA_TEXORGACC_AGP (1 << 1)
+#define MGA_TEXORG1 0x2ca4
+#define MGA_TEXORG2 0x2ca8
+#define MGA_TEXORG3 0x2cac
+#define MGA_TEXORG4 0x2cb0
+#define MGA_TEXTRANS 0x2c34
+#define MGA_TEXTRANSHIGH 0x2c38
+#define MGA_TEXWIDTH 0x2c28
+
+#define MGA_WACCEPTSEQ 0x1dd4
+#define MGA_WCODEADDR 0x1e6c
+#define MGA_WFLAG 0x1dc4
+#define MGA_WFLAG1 0x1de0
+#define MGA_WFLAGNB 0x1e64
+#define MGA_WFLAGNB1 0x1e08
+#define MGA_WGETMSB 0x1dc8
+#define MGA_WIADDR 0x1dc0
+#define MGA_WIADDR2 0x1dd8
+# define MGA_WMODE_SUSPEND (0 << 0)
+# define MGA_WMODE_RESUME (1 << 0)
+# define MGA_WMODE_JUMP (2 << 0)
+# define MGA_WMODE_START (3 << 0)
+# define MGA_WAGP_ENABLE (1 << 2)
+#define MGA_WMISC 0x1e70
+# define MGA_WUCODECACHE_ENABLE (1 << 0)
+# define MGA_WMASTER_ENABLE (1 << 1)
+# define MGA_WCACHEFLUSH_ENABLE (1 << 3)
+#define MGA_WVRTXSZ 0x1dcc
+
+#define MGA_YBOT 0x1c9c
+#define MGA_YDST 0x1c90
+#define MGA_YDSTLEN 0x1c88
+#define MGA_YDSTORG 0x1c94
+#define MGA_YTOP 0x1c98
+
+#define MGA_ZORG 0x1c0c
+
+/* This finishes the current batch of commands
+ */
+#define MGA_EXEC 0x0100
-#define MGAREG_MGA_EXEC 0x0100
-#define MGAREG_ALPHACTRL 0x2c7c
-#define MGAREG_AR0 0x1c60
-#define MGAREG_AR1 0x1c64
-#define MGAREG_AR2 0x1c68
-#define MGAREG_AR3 0x1c6c
-#define MGAREG_AR4 0x1c70
-#define MGAREG_AR5 0x1c74
-#define MGAREG_AR6 0x1c78
-#define MGAREG_CXBNDRY 0x1c80
-#define MGAREG_CXLEFT 0x1ca0
-#define MGAREG_CXRIGHT 0x1ca4
-#define MGAREG_DMAPAD 0x1c54
-#define MGAREG_DSTORG 0x2cb8
-#define MGAREG_DWGCTL 0x1c00
-#define MGAREG_DWGSYNC 0x2c4c
-#define MGAREG_FCOL 0x1c24
-#define MGAREG_FIFOSTATUS 0x1e10
-#define MGAREG_FOGCOL 0x1cf4
-#define MGAREG_FXBNDRY 0x1c84
-#define MGAREG_FXLEFT 0x1ca8
-#define MGAREG_FXRIGHT 0x1cac
-#define MGAREG_ICLEAR 0x1e18
-#define MGAREG_IEN 0x1e1c
-#define MGAREG_LEN 0x1c5c
-#define MGAREG_MACCESS 0x1c04
-#define MGAREG_PITCH 0x1c8c
-#define MGAREG_PLNWT 0x1c1c
-#define MGAREG_PRIMADDRESS 0x1e58
-#define MGAREG_PRIMEND 0x1e5c
-#define MGAREG_PRIMPTR 0x1e50
-#define MGAREG_SECADDRESS 0x2c40
-#define MGAREG_SECEND 0x2c44
-#define MGAREG_SETUPADDRESS 0x2cd0
-#define MGAREG_SETUPEND 0x2cd4
-#define MGAREG_SGN 0x1c58
-#define MGAREG_SOFTRAP 0x2c48
-#define MGAREG_SRCORG 0x2cb4
-#define MGAREG_STATUS 0x1e14
-#define MGAREG_STENCIL 0x2cc8
-#define MGAREG_STENCILCTL 0x2ccc
-#define MGAREG_TDUALSTAGE0 0x2cf8
-#define MGAREG_TDUALSTAGE1 0x2cfc
-#define MGAREG_TEXBORDERCOL 0x2c5c
-#define MGAREG_TEXCTL 0x2c30
-#define MGAREG_TEXCTL2 0x2c3c
-#define MGAREG_TEXFILTER 0x2c58
-#define MGAREG_TEXHEIGHT 0x2c2c
-#define MGAREG_TEXORG 0x2c24
-#define MGAREG_TEXORG1 0x2ca4
-#define MGAREG_TEXORG2 0x2ca8
-#define MGAREG_TEXORG3 0x2cac
-#define MGAREG_TEXORG4 0x2cb0
-#define MGAREG_TEXTRANS 0x2c34
-#define MGAREG_TEXTRANSHIGH 0x2c38
-#define MGAREG_TEXWIDTH 0x2c28
-#define MGAREG_WACCEPTSEQ 0x1dd4
-#define MGAREG_WCODEADDR 0x1e6c
-#define MGAREG_WFLAG 0x1dc4
-#define MGAREG_WFLAG1 0x1de0
-#define MGAREG_WFLAGNB 0x1e64
-#define MGAREG_WFLAGNB1 0x1e08
-#define MGAREG_WGETMSB 0x1dc8
-#define MGAREG_WIADDR 0x1dc0
-#define MGAREG_WIADDR2 0x1dd8
-#define MGAREG_WMISC 0x1e70
-#define MGAREG_WVRTXSZ 0x1dcc
-#define MGAREG_YBOT 0x1c9c
-#define MGAREG_YDST 0x1c90
-#define MGAREG_YDSTLEN 0x1c88
-#define MGAREG_YDSTORG 0x1c94
-#define MGAREG_YTOP 0x1c98
-#define MGAREG_ZORG 0x1c0c
-
-/* Warp registers */
-#define MGAREG_WR0 0x2d00
-#define MGAREG_WR1 0x2d04
-#define MGAREG_WR2 0x2d08
-#define MGAREG_WR3 0x2d0c
-#define MGAREG_WR4 0x2d10
-#define MGAREG_WR5 0x2d14
-#define MGAREG_WR6 0x2d18
-#define MGAREG_WR7 0x2d1c
-#define MGAREG_WR8 0x2d20
-#define MGAREG_WR9 0x2d24
-#define MGAREG_WR10 0x2d28
-#define MGAREG_WR11 0x2d2c
-#define MGAREG_WR12 0x2d30
-#define MGAREG_WR13 0x2d34
-#define MGAREG_WR14 0x2d38
-#define MGAREG_WR15 0x2d3c
-#define MGAREG_WR16 0x2d40
-#define MGAREG_WR17 0x2d44
-#define MGAREG_WR18 0x2d48
-#define MGAREG_WR19 0x2d4c
-#define MGAREG_WR20 0x2d50
-#define MGAREG_WR21 0x2d54
-#define MGAREG_WR22 0x2d58
-#define MGAREG_WR23 0x2d5c
-#define MGAREG_WR24 0x2d60
-#define MGAREG_WR25 0x2d64
-#define MGAREG_WR26 0x2d68
-#define MGAREG_WR27 0x2d6c
-#define MGAREG_WR28 0x2d70
-#define MGAREG_WR29 0x2d74
-#define MGAREG_WR30 0x2d78
-#define MGAREG_WR31 0x2d7c
-#define MGAREG_WR32 0x2d80
-#define MGAREG_WR33 0x2d84
-#define MGAREG_WR34 0x2d88
-#define MGAREG_WR35 0x2d8c
-#define MGAREG_WR36 0x2d90
-#define MGAREG_WR37 0x2d94
-#define MGAREG_WR38 0x2d98
-#define MGAREG_WR39 0x2d9c
-#define MGAREG_WR40 0x2da0
-#define MGAREG_WR41 0x2da4
-#define MGAREG_WR42 0x2da8
-#define MGAREG_WR43 0x2dac
-#define MGAREG_WR44 0x2db0
-#define MGAREG_WR45 0x2db4
-#define MGAREG_WR46 0x2db8
-#define MGAREG_WR47 0x2dbc
-#define MGAREG_WR48 0x2dc0
-#define MGAREG_WR49 0x2dc4
-#define MGAREG_WR50 0x2dc8
-#define MGAREG_WR51 0x2dcc
-#define MGAREG_WR52 0x2dd0
-#define MGAREG_WR53 0x2dd4
-#define MGAREG_WR54 0x2dd8
-#define MGAREG_WR55 0x2ddc
-#define MGAREG_WR56 0x2de0
-#define MGAREG_WR57 0x2de4
-#define MGAREG_WR58 0x2de8
-#define MGAREG_WR59 0x2dec
-#define MGAREG_WR60 0x2df0
-#define MGAREG_WR61 0x2df4
-#define MGAREG_WR62 0x2df8
-#define MGAREG_WR63 0x2dfc
-
-#define PDEA_pagpxfer_enable 0x2
-
-#define WIA_wmode_suspend 0x0
-#define WIA_wmode_start 0x3
-#define WIA_wagp_agp 0x4
-
-#define DC_opcod_line_open 0x0
-#define DC_opcod_autoline_open 0x1
-#define DC_opcod_line_close 0x2
-#define DC_opcod_autoline_close 0x3
-#define DC_opcod_trap 0x4
-#define DC_opcod_texture_trap 0x6
-#define DC_opcod_bitblt 0x8
-#define DC_opcod_iload 0x9
-#define DC_atype_rpl 0x0
-#define DC_atype_rstr 0x10
-#define DC_atype_zi 0x30
-#define DC_atype_blk 0x40
-#define DC_atype_i 0x70
-#define DC_linear_xy 0x0
-#define DC_linear_linear 0x80
-#define DC_zmode_nozcmp 0x0
-#define DC_zmode_ze 0x200
-#define DC_zmode_zne 0x300
-#define DC_zmode_zlt 0x400
-#define DC_zmode_zlte 0x500
-#define DC_zmode_zgt 0x600
-#define DC_zmode_zgte 0x700
-#define DC_solid_disable 0x0
-#define DC_solid_enable 0x800
-#define DC_arzero_disable 0x0
-#define DC_arzero_enable 0x1000
-#define DC_sgnzero_disable 0x0
-#define DC_sgnzero_enable 0x2000
-#define DC_shftzero_disable 0x0
-#define DC_shftzero_enable 0x4000
-#define DC_bop_SHIFT 16
-#define DC_trans_SHIFT 20
-#define DC_bltmod_bmonolef 0x0
-#define DC_bltmod_bmonowf 0x8000000
-#define DC_bltmod_bplan 0x2000000
-#define DC_bltmod_bfcol 0x4000000
-#define DC_bltmod_bu32bgr 0x6000000
-#define DC_bltmod_bu32rgb 0xe000000
-#define DC_bltmod_bu24bgr 0x16000000
-#define DC_bltmod_bu24rgb 0x1e000000
-#define DC_pattern_disable 0x0
-#define DC_pattern_enable 0x20000000
-#define DC_transc_disable 0x0
-#define DC_transc_enable 0x40000000
-#define DC_clipdis_disable 0x0
-#define DC_clipdis_enable 0x80000000
-
-
-#define SO_srcacc_pci 0x0
-#define SO_srcacc_agp 0x2
-#define SO_srcmap_fb 0x0
-#define SO_srcmap_sys 0x1
-
-
-#define SETADD_mode_vertlist 0x0
-
-
-#define MGA_CLEAR_CMD (DC_opcod_trap | DC_arzero_enable | \
- DC_sgnzero_enable | DC_shftzero_enable | \
- (0xC << DC_bop_SHIFT) | DC_clipdis_enable | \
- DC_solid_enable | DC_transc_enable)
-
-
-#define MGA_COPY_CMD (DC_opcod_bitblt | DC_atype_rpl | DC_linear_xy | \
- DC_solid_disable | DC_arzero_disable | \
- DC_sgnzero_enable | DC_shftzero_enable | \
- (0xC << DC_bop_SHIFT) | DC_bltmod_bfcol | \
- DC_pattern_disable | DC_transc_disable | \
- DC_clipdis_enable) \
-
-#define MGA_FLUSH_CMD (DC_opcod_texture_trap | (0xF << DC_trans_SHIFT) |\
- DC_arzero_enable | DC_sgnzero_enable | \
- DC_atype_i)
+/* Warp registers
+ */
+#define MGA_WR0 0x2d00
+#define MGA_WR1 0x2d04
+#define MGA_WR2 0x2d08
+#define MGA_WR3 0x2d0c
+#define MGA_WR4 0x2d10
+#define MGA_WR5 0x2d14
+#define MGA_WR6 0x2d18
+#define MGA_WR7 0x2d1c
+#define MGA_WR8 0x2d20
+#define MGA_WR9 0x2d24
+#define MGA_WR10 0x2d28
+#define MGA_WR11 0x2d2c
+#define MGA_WR12 0x2d30
+#define MGA_WR13 0x2d34
+#define MGA_WR14 0x2d38
+#define MGA_WR15 0x2d3c
+#define MGA_WR16 0x2d40
+#define MGA_WR17 0x2d44
+#define MGA_WR18 0x2d48
+#define MGA_WR19 0x2d4c
+#define MGA_WR20 0x2d50
+#define MGA_WR21 0x2d54
+#define MGA_WR22 0x2d58
+#define MGA_WR23 0x2d5c
+#define MGA_WR24 0x2d60
+#define MGA_WR25 0x2d64
+#define MGA_WR26 0x2d68
+#define MGA_WR27 0x2d6c
+#define MGA_WR28 0x2d70
+#define MGA_WR29 0x2d74
+#define MGA_WR30 0x2d78
+#define MGA_WR31 0x2d7c
+#define MGA_WR32 0x2d80
+#define MGA_WR33 0x2d84
+#define MGA_WR34 0x2d88
+#define MGA_WR35 0x2d8c
+#define MGA_WR36 0x2d90
+#define MGA_WR37 0x2d94
+#define MGA_WR38 0x2d98
+#define MGA_WR39 0x2d9c
+#define MGA_WR40 0x2da0
+#define MGA_WR41 0x2da4
+#define MGA_WR42 0x2da8
+#define MGA_WR43 0x2dac
+#define MGA_WR44 0x2db0
+#define MGA_WR45 0x2db4
+#define MGA_WR46 0x2db8
+#define MGA_WR47 0x2dbc
+#define MGA_WR48 0x2dc0
+#define MGA_WR49 0x2dc4
+#define MGA_WR50 0x2dc8
+#define MGA_WR51 0x2dcc
+#define MGA_WR52 0x2dd0
+#define MGA_WR53 0x2dd4
+#define MGA_WR54 0x2dd8
+#define MGA_WR55 0x2ddc
+#define MGA_WR56 0x2de0
+#define MGA_WR57 0x2de4
+#define MGA_WR58 0x2de8
+#define MGA_WR59 0x2dec
+#define MGA_WR60 0x2df0
+#define MGA_WR61 0x2df4
+#define MGA_WR62 0x2df8
+#define MGA_WR63 0x2dfc
+# define MGA_G400_WR_MAGIC (1 << 6)
+# define MGA_G400_WR56_MAGIC 0x46480000 /* 12800.0f */
+
+
+#define MGA_ILOAD_ALIGN 64
+#define MGA_ILOAD_MASK (MGA_ILOAD_ALIGN - 1)
+
+#define MGA_DWGCTL_FLUSH (MGA_OPCOD_TEXTURE_TRAP | \
+ MGA_ATYPE_I | \
+ MGA_ZMODE_NOZCMP | \
+ MGA_ARZERO | \
+ MGA_SGNZERO | \
+ MGA_BOP_SRC | \
+ (15 << MGA_TRANS_SHIFT))
+
+#define MGA_DWGCTL_CLEAR (MGA_OPCOD_TRAP | \
+ MGA_ZMODE_NOZCMP | \
+ MGA_SOLID | \
+ MGA_ARZERO | \
+ MGA_SGNZERO | \
+ MGA_SHIFTZERO | \
+ MGA_BOP_SRC | \
+ (0 << MGA_TRANS_SHIFT) | \
+ MGA_BLTMOD_BMONOLEF | \
+ MGA_TRANSC | \
+ MGA_CLIPDIS)
+
+#define MGA_DWGCTL_COPY (MGA_OPCOD_BITBLT | \
+ MGA_ATYPE_RPL | \
+ MGA_SGNZERO | \
+ MGA_SHIFTZERO | \
+ MGA_BOP_SRC | \
+ (0 << MGA_TRANS_SHIFT) | \
+ MGA_BLTMOD_BFCOL | \
+ MGA_CLIPDIS)
#endif
diff --git a/linux/mga_state.c b/linux/mga_state.c
index bba8fa35..4c9c9c05 100644
--- a/linux/mga_state.c
+++ b/linux/mga_state.c
@@ -1,4 +1,4 @@
-/* mga_state.c -- State support for mga g200/g400 -*- linux-c -*-
+/* mga_state.c -- State support for MGA G200/G400 -*- linux-c -*-
* Created: Thu Jan 27 02:53:43 2000 by jhartmann@precisioninsight.com
*
* Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
@@ -19,404 +19,400 @@
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
- * DEALINGS IN THE SOFTWARE.
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
*
- * Authors: Jeff Hartmann <jhartmann@valinux.com>
- * Keith Whitwell <keithw@valinux.com>
+ * Authors:
+ * Jeff Hartmann <jhartmann@valinux.com>
+ * Keith Whitwell <keithw@valinux.com>
*
+ * Rewritten by:
+ * Gareth Hughes <gareth@valinux.com>
*/
#define __NO_VERSION__
+#include "mga.h"
#include "drmP.h"
#include "mga_drv.h"
#include "drm.h"
-/* If you change the functions to set state, PLEASE
- * change these values
- */
-
-#define MGAEMITCLIP_SIZE 10
-#define MGAEMITCTX_SIZE 20
-#define MGAG200EMITTEX_SIZE 20
-#define MGAG400EMITTEX0_SIZE 30
-#define MGAG400EMITTEX1_SIZE 25
-#define MGAG400EMITPIPE_SIZE 50
-#define MGAG200EMITPIPE_SIZE 15
-#define MAX_STATE_SIZE ((MGAEMITCLIP_SIZE * MGA_NR_SAREA_CLIPRECTS) + \
- MGAEMITCTX_SIZE + MGAG400EMITTEX0_SIZE + \
- MGAG400EMITTEX1_SIZE + MGAG400EMITPIPE_SIZE)
+/* ================================================================
+ * DMA hardware state programming functions
+ */
-static void mgaEmitClipRect(drm_mga_private_t * dev_priv,
- drm_clip_rect_t * box)
+static void mga_emit_clip_rect( drm_mga_private_t *dev_priv,
+ drm_clip_rect_t *box )
{
drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
- unsigned int *regs = sarea_priv->ContextState;
- PRIMLOCALS;
-
- /* This takes 10 dwords */
- PRIMGETPTR(dev_priv);
-
- /* Force reset of dwgctl on G400 (eliminates clip disable bit) */
- if (dev_priv->chipset == MGA_CARD_TYPE_G400) {
-#if 0
- PRIMOUTREG(MGAREG_DMAPAD, 0);
- PRIMOUTREG(MGAREG_DWGSYNC, 0);
- PRIMOUTREG(MGAREG_DWGSYNC, 0);
- PRIMOUTREG(MGAREG_DWGCTL, regs[MGA_CTXREG_DWGCTL]);
-#else
- PRIMOUTREG(MGAREG_DWGCTL, regs[MGA_CTXREG_DWGCTL]);
- PRIMOUTREG(MGAREG_LEN + MGAREG_MGA_EXEC, 0x80000000);
- PRIMOUTREG(MGAREG_DWGCTL, regs[MGA_CTXREG_DWGCTL]);
- PRIMOUTREG(MGAREG_LEN + MGAREG_MGA_EXEC, 0x80000000);
-#endif
- }
- PRIMOUTREG(MGAREG_DMAPAD, 0);
- PRIMOUTREG(MGAREG_CXBNDRY, ((box->x2) << 16) | (box->x1));
- PRIMOUTREG(MGAREG_YTOP, box->y1 * dev_priv->stride / dev_priv->cpp);
- PRIMOUTREG(MGAREG_YBOT, box->y2 * dev_priv->stride / dev_priv->cpp);
+ drm_mga_context_regs_t *ctx = &sarea_priv->context_state;
+ unsigned int pitch = dev_priv->front_pitch;
+ DMA_LOCALS;
- PRIMADVANCE(dev_priv);
-}
+ BEGIN_DMA( 2 );
-static void mgaEmitContext(drm_mga_private_t * dev_priv)
-{
- drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
- unsigned int *regs = sarea_priv->ContextState;
- PRIMLOCALS;
-
- /* This takes a max of 20 dwords */
- PRIMGETPTR(dev_priv);
-
- PRIMOUTREG(MGAREG_DSTORG, regs[MGA_CTXREG_DSTORG]);
- PRIMOUTREG(MGAREG_MACCESS, regs[MGA_CTXREG_MACCESS]);
- PRIMOUTREG(MGAREG_PLNWT, regs[MGA_CTXREG_PLNWT]);
- PRIMOUTREG(MGAREG_DWGCTL, regs[MGA_CTXREG_DWGCTL]);
-
- PRIMOUTREG(MGAREG_ALPHACTRL, regs[MGA_CTXREG_ALPHACTRL]);
- PRIMOUTREG(MGAREG_FOGCOL, regs[MGA_CTXREG_FOGCOLOR]);
- PRIMOUTREG(MGAREG_WFLAG, regs[MGA_CTXREG_WFLAG]);
- PRIMOUTREG(MGAREG_ZORG, dev_priv->depthOffset); /* invarient */
-
- if (dev_priv->chipset == MGA_CARD_TYPE_G400) {
- PRIMOUTREG(MGAREG_WFLAG1, regs[MGA_CTXREG_WFLAG]);
- PRIMOUTREG(MGAREG_TDUALSTAGE0, regs[MGA_CTXREG_TDUAL0]);
- PRIMOUTREG(MGAREG_TDUALSTAGE1, regs[MGA_CTXREG_TDUAL1]);
- PRIMOUTREG(MGAREG_FCOL, regs[MGA_CTXREG_FCOL]);
-
- PRIMOUTREG(MGAREG_STENCIL, regs[MGA_CTXREG_STENCIL]);
- PRIMOUTREG(MGAREG_STENCILCTL, regs[MGA_CTXREG_STENCILCTL]);
- PRIMOUTREG(MGAREG_DMAPAD, 0);
- PRIMOUTREG(MGAREG_DMAPAD, 0);
- } else {
- PRIMOUTREG(MGAREG_FCOL, regs[MGA_CTXREG_FCOL]);
- PRIMOUTREG(MGAREG_DMAPAD, 0);
- PRIMOUTREG(MGAREG_DMAPAD, 0);
- PRIMOUTREG(MGAREG_DMAPAD, 0);
+ /* Force reset of DWGCTL on G400 (eliminates clip disable bit).
+ */
+ if ( dev_priv->chipset == MGA_CARD_TYPE_G400 ) {
+ DMA_BLOCK( MGA_DWGCTL, ctx->dwgctl,
+ MGA_LEN + MGA_EXEC, 0x80000000,
+ MGA_DWGCTL, ctx->dwgctl,
+ MGA_LEN + MGA_EXEC, 0x80000000 );
}
+ DMA_BLOCK( MGA_DMAPAD, 0x00000000,
+ MGA_CXBNDRY, (box->x2 << 16) | box->x1,
+ MGA_YTOP, box->y1 * pitch,
+ MGA_YBOT, box->y2 * pitch );
- PRIMADVANCE(dev_priv);
+ ADVANCE_DMA();
}
-static void mgaG200EmitTex(drm_mga_private_t * dev_priv)
+static inline void mga_g200_emit_context( drm_mga_private_t *dev_priv )
{
drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
- unsigned int *regs = sarea_priv->TexState[0];
- PRIMLOCALS;
-
- PRIMGETPTR(dev_priv);
+ drm_mga_context_regs_t *ctx = &sarea_priv->context_state;
+ DMA_LOCALS;
- /* This takes 20 dwords */
+ BEGIN_DMA( 3 );
- PRIMOUTREG(MGAREG_TEXCTL2, regs[MGA_TEXREG_CTL2]);
- PRIMOUTREG(MGAREG_TEXCTL, regs[MGA_TEXREG_CTL]);
- PRIMOUTREG(MGAREG_TEXFILTER, regs[MGA_TEXREG_FILTER]);
- PRIMOUTREG(MGAREG_TEXBORDERCOL, regs[MGA_TEXREG_BORDERCOL]);
+ DMA_BLOCK( MGA_DSTORG, ctx->dstorg,
+ MGA_MACCESS, ctx->maccess,
+ MGA_PLNWT, ctx->plnwt,
+ MGA_DWGCTL, ctx->dwgctl );
- PRIMOUTREG(MGAREG_TEXORG, regs[MGA_TEXREG_ORG]);
- PRIMOUTREG(MGAREG_TEXORG1, regs[MGA_TEXREG_ORG1]);
- PRIMOUTREG(MGAREG_TEXORG2, regs[MGA_TEXREG_ORG2]);
- PRIMOUTREG(MGAREG_TEXORG3, regs[MGA_TEXREG_ORG3]);
+ DMA_BLOCK( MGA_ALPHACTRL, ctx->alphactrl,
+ MGA_FOGCOL, ctx->fogcolor,
+ MGA_WFLAG, ctx->wflag,
+ MGA_ZORG, dev_priv->depth_offset );
- PRIMOUTREG(MGAREG_TEXORG4, regs[MGA_TEXREG_ORG4]);
- PRIMOUTREG(MGAREG_TEXWIDTH, regs[MGA_TEXREG_WIDTH]);
- PRIMOUTREG(MGAREG_TEXHEIGHT, regs[MGA_TEXREG_HEIGHT]);
- PRIMOUTREG(MGAREG_WR24, regs[MGA_TEXREG_WIDTH]);
+ DMA_BLOCK( MGA_FCOL, ctx->fcol,
+ MGA_DMAPAD, 0x00000000,
+ MGA_DMAPAD, 0x00000000,
+ MGA_DMAPAD, 0x00000000 );
- PRIMOUTREG(MGAREG_WR34, regs[MGA_TEXREG_HEIGHT]);
- PRIMOUTREG(MGAREG_TEXTRANS, 0xffff);
- PRIMOUTREG(MGAREG_TEXTRANSHIGH, 0xffff);
- PRIMOUTREG(MGAREG_DMAPAD, 0);
-
- PRIMADVANCE(dev_priv);
+ ADVANCE_DMA();
}
-#define TMC_dualtex_enable 0x80
-
-static void mgaG400EmitTex0(drm_mga_private_t * dev_priv)
+static inline void mga_g400_emit_context( drm_mga_private_t *dev_priv )
{
drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
- unsigned int *regs = sarea_priv->TexState[0];
- PRIMLOCALS;
+ drm_mga_context_regs_t *ctx = &sarea_priv->context_state;
+ DMA_LOCALS;
- PRIMGETPTR(dev_priv);
+ BEGIN_DMA( 4 );
- /* This takes 30 dwords */
+ DMA_BLOCK( MGA_DSTORG, ctx->dstorg,
+ MGA_MACCESS, ctx->maccess,
+ MGA_PLNWT, ctx->plnwt,
+ MGA_DWGCTL, ctx->dwgctl );
- PRIMOUTREG(MGAREG_TEXCTL2, regs[MGA_TEXREG_CTL2] | 0x00008000);
- PRIMOUTREG(MGAREG_TEXCTL, regs[MGA_TEXREG_CTL]);
- PRIMOUTREG(MGAREG_TEXFILTER, regs[MGA_TEXREG_FILTER]);
- PRIMOUTREG(MGAREG_TEXBORDERCOL, regs[MGA_TEXREG_BORDERCOL]);
+ DMA_BLOCK( MGA_ALPHACTRL, ctx->alphactrl,
+ MGA_FOGCOL, ctx->fogcolor,
+ MGA_WFLAG, ctx->wflag,
+ MGA_ZORG, dev_priv->depth_offset );
- PRIMOUTREG(MGAREG_TEXORG, regs[MGA_TEXREG_ORG]);
- PRIMOUTREG(MGAREG_TEXORG1, regs[MGA_TEXREG_ORG1]);
- PRIMOUTREG(MGAREG_TEXORG2, regs[MGA_TEXREG_ORG2]);
- PRIMOUTREG(MGAREG_TEXORG3, regs[MGA_TEXREG_ORG3]);
+ DMA_BLOCK( MGA_WFLAG1, ctx->wflag,
+ MGA_TDUALSTAGE0, ctx->tdualstage0,
+ MGA_TDUALSTAGE1, ctx->tdualstage1,
+ MGA_FCOL, ctx->fcol );
- PRIMOUTREG(MGAREG_TEXORG4, regs[MGA_TEXREG_ORG4]);
- PRIMOUTREG(MGAREG_TEXWIDTH, regs[MGA_TEXREG_WIDTH]);
- PRIMOUTREG(MGAREG_TEXHEIGHT, regs[MGA_TEXREG_HEIGHT]);
- PRIMOUTREG(MGAREG_WR49, 0);
+ DMA_BLOCK( MGA_STENCIL, ctx->stencil,
+ MGA_STENCILCTL, ctx->stencilctl,
+ MGA_DMAPAD, 0x00000000,
+ MGA_DMAPAD, 0x00000000 );
- PRIMOUTREG(MGAREG_WR57, 0);
- PRIMOUTREG(MGAREG_WR53, 0);
- PRIMOUTREG(MGAREG_WR61, 0);
- PRIMOUTREG(MGAREG_WR52, 0x40);
-
- PRIMOUTREG(MGAREG_WR60, 0x40);
- PRIMOUTREG(MGAREG_WR54, regs[MGA_TEXREG_WIDTH] | 0x40);
- PRIMOUTREG(MGAREG_WR62, regs[MGA_TEXREG_HEIGHT] | 0x40);
- PRIMOUTREG(MGAREG_DMAPAD, 0);
-
- PRIMOUTREG(MGAREG_DMAPAD, 0);
- PRIMOUTREG(MGAREG_DMAPAD, 0);
- PRIMOUTREG(MGAREG_TEXTRANS, 0xffff);
- PRIMOUTREG(MGAREG_TEXTRANSHIGH, 0xffff);
-
- PRIMADVANCE(dev_priv);
+ ADVANCE_DMA();
}
-#define TMC_map1_enable 0x80000000
-
-static void mgaG400EmitTex1(drm_mga_private_t * dev_priv)
+static inline void mga_g200_emit_tex0( drm_mga_private_t *dev_priv )
{
drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
- unsigned int *regs = sarea_priv->TexState[1];
- PRIMLOCALS;
+ drm_mga_texture_regs_t *tex = &sarea_priv->tex_state[0];
+ DMA_LOCALS;
- PRIMGETPTR(dev_priv);
+ BEGIN_DMA( 4 );
- /* This takes 25 dwords */
+ DMA_BLOCK( MGA_TEXCTL2, tex->texctl2,
+ MGA_TEXCTL, tex->texctl,
+ MGA_TEXFILTER, tex->texfilter,
+ MGA_TEXBORDERCOL, tex->texbordercol );
- PRIMOUTREG(MGAREG_TEXCTL2,
- regs[MGA_TEXREG_CTL2] | TMC_map1_enable | 0x00008000);
- PRIMOUTREG(MGAREG_TEXCTL, regs[MGA_TEXREG_CTL]);
- PRIMOUTREG(MGAREG_TEXFILTER, regs[MGA_TEXREG_FILTER]);
- PRIMOUTREG(MGAREG_TEXBORDERCOL, regs[MGA_TEXREG_BORDERCOL]);
+ DMA_BLOCK( MGA_TEXORG, tex->texorg,
+ MGA_TEXORG1, tex->texorg1,
+ MGA_TEXORG2, tex->texorg2,
+ MGA_TEXORG3, tex->texorg3 );
- PRIMOUTREG(MGAREG_TEXORG, regs[MGA_TEXREG_ORG]);
- PRIMOUTREG(MGAREG_TEXORG1, regs[MGA_TEXREG_ORG1]);
- PRIMOUTREG(MGAREG_TEXORG2, regs[MGA_TEXREG_ORG2]);
- PRIMOUTREG(MGAREG_TEXORG3, regs[MGA_TEXREG_ORG3]);
+ DMA_BLOCK( MGA_TEXORG4, tex->texorg4,
+ MGA_TEXWIDTH, tex->texwidth,
+ MGA_TEXHEIGHT, tex->texheight,
+ MGA_WR24, tex->texwidth );
- PRIMOUTREG(MGAREG_TEXORG4, regs[MGA_TEXREG_ORG4]);
- PRIMOUTREG(MGAREG_TEXWIDTH, regs[MGA_TEXREG_WIDTH]);
- PRIMOUTREG(MGAREG_TEXHEIGHT, regs[MGA_TEXREG_HEIGHT]);
- PRIMOUTREG(MGAREG_WR49, 0);
+ DMA_BLOCK( MGA_WR34, tex->texheight,
+ MGA_TEXTRANS, 0x0000ffff,
+ MGA_TEXTRANSHIGH, 0x0000ffff,
+ MGA_DMAPAD, 0x00000000 );
- PRIMOUTREG(MGAREG_WR57, 0);
- PRIMOUTREG(MGAREG_WR53, 0);
- PRIMOUTREG(MGAREG_WR61, 0);
- PRIMOUTREG(MGAREG_WR52, regs[MGA_TEXREG_WIDTH] | 0x40);
-
- PRIMOUTREG(MGAREG_WR60, regs[MGA_TEXREG_HEIGHT] | 0x40);
- PRIMOUTREG(MGAREG_TEXTRANS, 0xffff);
- PRIMOUTREG(MGAREG_TEXTRANSHIGH, 0xffff);
- PRIMOUTREG(MGAREG_TEXCTL2, regs[MGA_TEXREG_CTL2] | 0x00008000);
+ ADVANCE_DMA();
+}
- PRIMADVANCE(dev_priv);
+static inline void mga_g400_emit_tex0( drm_mga_private_t *dev_priv )
+{
+ drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
+ drm_mga_texture_regs_t *tex = &sarea_priv->tex_state[0];
+ DMA_LOCALS;
+
+ BEGIN_DMA( 6 );
+
+ DMA_BLOCK( MGA_TEXCTL2, tex->texctl2 | MGA_G400_TC2_MAGIC,
+ MGA_TEXCTL, tex->texctl,
+ MGA_TEXFILTER, tex->texfilter,
+ MGA_TEXBORDERCOL, tex->texbordercol );
+
+ DMA_BLOCK( MGA_TEXORG, tex->texorg,
+ MGA_TEXORG1, tex->texorg1,
+ MGA_TEXORG2, tex->texorg2,
+ MGA_TEXORG3, tex->texorg3 );
+
+ DMA_BLOCK( MGA_TEXORG4, tex->texorg4,
+ MGA_TEXWIDTH, tex->texwidth,
+ MGA_TEXHEIGHT, tex->texheight,
+ MGA_WR49, 0x00000000 );
+
+ DMA_BLOCK( MGA_WR57, 0x00000000,
+ MGA_WR53, 0x00000000,
+ MGA_WR61, 0x00000000,
+ MGA_WR52, MGA_G400_WR_MAGIC );
+
+ DMA_BLOCK( MGA_WR60, MGA_G400_WR_MAGIC,
+ MGA_WR54, tex->texwidth | MGA_G400_WR_MAGIC,
+ MGA_WR62, tex->texheight | MGA_G400_WR_MAGIC,
+ MGA_DMAPAD, 0x00000000 );
+
+ DMA_BLOCK( MGA_DMAPAD, 0x00000000,
+ MGA_DMAPAD, 0x00000000,
+ MGA_TEXTRANS, 0x0000ffff,
+ MGA_TEXTRANSHIGH, 0x0000ffff );
+
+ ADVANCE_DMA();
}
-#define MAGIC_FPARAM_HEX_VALUE 0x46480000
-/* This is the hex value of 12800.0f which is a magic value we must
- * set in wr56.
- */
+static inline void mga_g400_emit_tex1( drm_mga_private_t *dev_priv )
+{
+ drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
+ drm_mga_texture_regs_t *tex = &sarea_priv->tex_state[1];
+ DMA_LOCALS;
+
+ BEGIN_DMA( 5 );
+
+ DMA_BLOCK( MGA_TEXCTL2, (tex->texctl2 |
+ MGA_MAP1_ENABLE |
+ MGA_G400_TC2_MAGIC),
+ MGA_TEXCTL, tex->texctl,
+ MGA_TEXFILTER, tex->texfilter,
+ MGA_TEXBORDERCOL, tex->texbordercol );
+
+ DMA_BLOCK( MGA_TEXORG, tex->texorg,
+ MGA_TEXORG1, tex->texorg1,
+ MGA_TEXORG2, tex->texorg2,
+ MGA_TEXORG3, tex->texorg3 );
+
+ DMA_BLOCK( MGA_TEXORG4, tex->texorg4,
+ MGA_TEXWIDTH, tex->texwidth,
+ MGA_TEXHEIGHT, tex->texheight,
+ MGA_WR49, 0x00000000 );
+
+ DMA_BLOCK( MGA_WR57, 0x00000000,
+ MGA_WR53, 0x00000000,
+ MGA_WR61, 0x00000000,
+ MGA_WR52, tex->texwidth | MGA_G400_WR_MAGIC );
+
+ DMA_BLOCK( MGA_WR60, tex->texheight | MGA_G400_WR_MAGIC,
+ MGA_TEXTRANS, 0x0000ffff,
+ MGA_TEXTRANSHIGH, 0x0000ffff,
+ MGA_TEXCTL2, tex->texctl2 | MGA_G400_TC2_MAGIC );
+
+ ADVANCE_DMA();
+}
-static void mgaG400EmitPipe(drm_mga_private_t * dev_priv)
+static inline void mga_g200_emit_pipe( drm_mga_private_t *dev_priv )
{
drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
- unsigned int pipe = sarea_priv->WarpPipe;
- PRIMLOCALS;
+ unsigned int pipe = sarea_priv->warp_pipe;
+ DMA_LOCALS;
- PRIMGETPTR(dev_priv);
+ BEGIN_DMA( 3 );
- /* This takes 50 dwords */
+ DMA_BLOCK( MGA_WIADDR, MGA_WMODE_SUSPEND,
+ MGA_WVRTXSZ, 0x00000007,
+ MGA_WFLAG, 0x00000000,
+ MGA_WR24, 0x00000000 );
- /* Establish vertex size.
+ DMA_BLOCK( MGA_WR25, 0x00000100,
+ MGA_WR34, 0x00000000,
+ MGA_WR42, 0x0000ffff,
+ MGA_WR60, 0x0000ffff );
+
+ /* Padding required to to hardware bug.
*/
- PRIMOUTREG(MGAREG_WIADDR2, WIA_wmode_suspend);
- PRIMOUTREG(MGAREG_DMAPAD, 0);
- PRIMOUTREG(MGAREG_DMAPAD, 0);
- PRIMOUTREG(MGAREG_DMAPAD, 0);
-
- if (pipe & MGA_T2) {
- PRIMOUTREG(MGAREG_WVRTXSZ, 0x00001e09);
- PRIMOUTREG(MGAREG_DMAPAD, 0);
- PRIMOUTREG(MGAREG_DMAPAD, 0);
- PRIMOUTREG(MGAREG_DMAPAD, 0);
-
- PRIMOUTREG(MGAREG_WACCEPTSEQ, 0);
- PRIMOUTREG(MGAREG_WACCEPTSEQ, 0);
- PRIMOUTREG(MGAREG_WACCEPTSEQ, 0);
- PRIMOUTREG(MGAREG_WACCEPTSEQ, 0x1e000000);
+ DMA_BLOCK( MGA_DMAPAD, 0xffffffff,
+ MGA_DMAPAD, 0xffffffff,
+ MGA_DMAPAD, 0xffffffff,
+ MGA_WIADDR, (dev_priv->warp_pipe_phys[pipe] |
+ MGA_WMODE_START |
+ MGA_WAGP_ENABLE) );
+
+ ADVANCE_DMA();
+}
+
+static inline void mga_g400_emit_pipe( drm_mga_private_t *dev_priv )
+{
+ drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
+ unsigned int pipe = sarea_priv->warp_pipe;
+ DMA_LOCALS;
+
+ BEGIN_DMA( 10 );
+
+ DMA_BLOCK( MGA_WIADDR2, MGA_WMODE_SUSPEND,
+ MGA_DMAPAD, 0x00000000,
+ MGA_DMAPAD, 0x00000000,
+ MGA_DMAPAD, 0x00000000 );
+
+ if ( pipe & MGA_T2 ) {
+ DMA_BLOCK( MGA_WVRTXSZ, 0x00001e09,
+ MGA_DMAPAD, 0x00000000,
+ MGA_DMAPAD, 0x00000000,
+ MGA_DMAPAD, 0x00000000 );
+
+ DMA_BLOCK( MGA_WACCEPTSEQ, 0x00000000,
+ MGA_WACCEPTSEQ, 0x00000000,
+ MGA_WACCEPTSEQ, 0x00000000,
+ MGA_WACCEPTSEQ, 0x1e000000 );
} else {
- if (dev_priv->WarpPipe & MGA_T2) {
+ if ( dev_priv->warp_pipe & MGA_T2 ) {
/* Flush the WARP pipe */
- PRIMOUTREG(MGAREG_YDST, 0);
- PRIMOUTREG(MGAREG_FXLEFT, 0);
- PRIMOUTREG(MGAREG_FXRIGHT, 1);
- PRIMOUTREG(MGAREG_DWGCTL, MGA_FLUSH_CMD);
-
- PRIMOUTREG(MGAREG_LEN + MGAREG_MGA_EXEC, 1);
- PRIMOUTREG(MGAREG_DWGSYNC, 0x7000);
- PRIMOUTREG(MGAREG_TEXCTL2, 0x00008000);
- PRIMOUTREG(MGAREG_LEN + MGAREG_MGA_EXEC, 0);
-
- PRIMOUTREG(MGAREG_TEXCTL2, 0x80 | 0x00008000);
- PRIMOUTREG(MGAREG_LEN + MGAREG_MGA_EXEC, 0);
- PRIMOUTREG(MGAREG_TEXCTL2, 0x00008000);
- PRIMOUTREG(MGAREG_DMAPAD, 0);
+ DMA_BLOCK( MGA_YDST, 0x00000000,
+ MGA_FXLEFT, 0x00000000,
+ MGA_FXRIGHT, 0x00000001,
+ MGA_DWGCTL, MGA_DWGCTL_FLUSH );
+
+ DMA_BLOCK( MGA_LEN + MGA_EXEC, 0x00000001,
+ MGA_DWGSYNC, 0x00007000,
+ MGA_TEXCTL2, MGA_G400_TC2_MAGIC,
+ MGA_LEN + MGA_EXEC, 0x00000000 );
+
+ DMA_BLOCK( MGA_TEXCTL2, (MGA_DUALTEX |
+ MGA_G400_TC2_MAGIC),
+ MGA_LEN + MGA_EXEC, 0x00000000,
+ MGA_TEXCTL2, MGA_G400_TC2_MAGIC,
+ MGA_DMAPAD, 0x00000000 );
}
- PRIMOUTREG(MGAREG_WVRTXSZ, 0x00001807);
- PRIMOUTREG(MGAREG_DMAPAD, 0);
- PRIMOUTREG(MGAREG_DMAPAD, 0);
- PRIMOUTREG(MGAREG_DMAPAD, 0);
+ DMA_BLOCK( MGA_WVRTXSZ, 0x00001807,
+ MGA_DMAPAD, 0x00000000,
+ MGA_DMAPAD, 0x00000000,
+ MGA_DMAPAD, 0x00000000 );
- PRIMOUTREG(MGAREG_WACCEPTSEQ, 0);
- PRIMOUTREG(MGAREG_WACCEPTSEQ, 0);
- PRIMOUTREG(MGAREG_WACCEPTSEQ, 0);
- PRIMOUTREG(MGAREG_WACCEPTSEQ, 0x18000000);
+ DMA_BLOCK( MGA_WACCEPTSEQ, 0x00000000,
+ MGA_WACCEPTSEQ, 0x00000000,
+ MGA_WACCEPTSEQ, 0x00000000,
+ MGA_WACCEPTSEQ, 0x18000000 );
}
- PRIMOUTREG(MGAREG_WFLAG, 0);
- PRIMOUTREG(MGAREG_WFLAG1, 0);
- PRIMOUTREG(MGAREG_WR56, MAGIC_FPARAM_HEX_VALUE);
- PRIMOUTREG(MGAREG_DMAPAD, 0);
-
- PRIMOUTREG(MGAREG_WR49, 0); /* Tex stage 0 */
- PRIMOUTREG(MGAREG_WR57, 0); /* Tex stage 0 */
- PRIMOUTREG(MGAREG_WR53, 0); /* Tex stage 1 */
- PRIMOUTREG(MGAREG_WR61, 0); /* Tex stage 1 */
-
- PRIMOUTREG(MGAREG_WR54, 0x40); /* Tex stage 0 : w */
- PRIMOUTREG(MGAREG_WR62, 0x40); /* Tex stage 0 : h */
- PRIMOUTREG(MGAREG_WR52, 0x40); /* Tex stage 1 : w */
- PRIMOUTREG(MGAREG_WR60, 0x40); /* Tex stage 1 : h */
-
- /* Dma pading required due to hw bug */
- PRIMOUTREG(MGAREG_DMAPAD, 0xffffffff);
- PRIMOUTREG(MGAREG_DMAPAD, 0xffffffff);
- PRIMOUTREG(MGAREG_DMAPAD, 0xffffffff);
- PRIMOUTREG(MGAREG_WIADDR2,
- (u32) (dev_priv->WarpIndex[pipe].
- phys_addr | WIA_wmode_start | WIA_wagp_agp));
- PRIMADVANCE(dev_priv);
+ DMA_BLOCK( MGA_WFLAG, 0x00000000,
+ MGA_WFLAG1, 0x00000000,
+ MGA_WR56, MGA_G400_WR56_MAGIC,
+ MGA_DMAPAD, 0x00000000 );
+
+ DMA_BLOCK( MGA_WR49, 0x00000000, /* tex0 */
+ MGA_WR57, 0x00000000, /* tex0 */
+ MGA_WR53, 0x00000000, /* tex1 */
+ MGA_WR61, 0x00000000 ); /* tex1 */
+
+ DMA_BLOCK( MGA_WR54, MGA_G400_WR_MAGIC, /* tex0 width */
+ MGA_WR62, MGA_G400_WR_MAGIC, /* tex0 height */
+ MGA_WR52, MGA_G400_WR_MAGIC, /* tex1 width */
+ MGA_WR60, MGA_G400_WR_MAGIC ); /* tex1 height */
+
+ /* Padding required to to hardware bug */
+ DMA_BLOCK( MGA_DMAPAD, 0xffffffff,
+ MGA_DMAPAD, 0xffffffff,
+ MGA_DMAPAD, 0xffffffff,
+ MGA_WIADDR2, (dev_priv->warp_pipe_phys[pipe] |
+ MGA_WMODE_START |
+ MGA_WAGP_ENABLE) );
+
+ ADVANCE_DMA();
}
-static void mgaG200EmitPipe(drm_mga_private_t * dev_priv)
+static void mga_g200_emit_state( drm_mga_private_t *dev_priv )
{
drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
- unsigned int pipe = sarea_priv->WarpPipe;
- PRIMLOCALS;
-
- PRIMGETPTR(dev_priv);
-
- /* This takes 15 dwords */
-
- PRIMOUTREG(MGAREG_WIADDR, WIA_wmode_suspend);
- PRIMOUTREG(MGAREG_WVRTXSZ, 7);
- PRIMOUTREG(MGAREG_WFLAG, 0);
- PRIMOUTREG(MGAREG_WR24, 0); /* tex w/h */
+ unsigned int dirty = sarea_priv->dirty;
- PRIMOUTREG(MGAREG_WR25, 0x100);
- PRIMOUTREG(MGAREG_WR34, 0); /* tex w/h */
- PRIMOUTREG(MGAREG_WR42, 0xFFFF);
- PRIMOUTREG(MGAREG_WR60, 0xFFFF);
+ if ( sarea_priv->warp_pipe != dev_priv->warp_pipe ) {
+ mga_g200_emit_pipe( dev_priv );
+ dev_priv->warp_pipe = sarea_priv->warp_pipe;
+ }
- /* Dma pading required due to hw bug */
- PRIMOUTREG(MGAREG_DMAPAD, 0xffffffff);
- PRIMOUTREG(MGAREG_DMAPAD, 0xffffffff);
- PRIMOUTREG(MGAREG_DMAPAD, 0xffffffff);
- PRIMOUTREG(MGAREG_WIADDR,
- (u32) (dev_priv->WarpIndex[pipe].
- phys_addr | WIA_wmode_start | WIA_wagp_agp));
+ if ( dirty & MGA_UPLOAD_CONTEXT ) {
+ mga_g200_emit_context( dev_priv );
+ sarea_priv->dirty &= ~MGA_UPLOAD_CONTEXT;
+ }
- PRIMADVANCE( dev_priv );
+ if ( dirty & MGA_UPLOAD_TEX0 ) {
+ mga_g200_emit_tex0( dev_priv );
+ sarea_priv->dirty &= ~MGA_UPLOAD_TEX0;
+ }
}
-static void mgaEmitState(drm_mga_private_t * dev_priv)
+static void mga_g400_emit_state( drm_mga_private_t *dev_priv )
{
drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
unsigned int dirty = sarea_priv->dirty;
+ int multitex = sarea_priv->warp_pipe & MGA_T2;
- if (dev_priv->chipset == MGA_CARD_TYPE_G400) {
- int multitex = sarea_priv->WarpPipe & MGA_T2;
-
- if (sarea_priv->WarpPipe != dev_priv->WarpPipe) {
- mgaG400EmitPipe(dev_priv);
- dev_priv->WarpPipe = sarea_priv->WarpPipe;
- }
-
- if (dirty & MGA_UPLOAD_CTX) {
- mgaEmitContext(dev_priv);
- sarea_priv->dirty &= ~MGA_UPLOAD_CTX;
- }
-
- if (dirty & MGA_UPLOAD_TEX0) {
- mgaG400EmitTex0(dev_priv);
- sarea_priv->dirty &= ~MGA_UPLOAD_TEX0;
- }
+ if ( sarea_priv->warp_pipe != dev_priv->warp_pipe ) {
+ mga_g400_emit_pipe( dev_priv );
+ dev_priv->warp_pipe = sarea_priv->warp_pipe;
+ }
- if ((dirty & MGA_UPLOAD_TEX1) && multitex) {
- mgaG400EmitTex1(dev_priv);
- sarea_priv->dirty &= ~MGA_UPLOAD_TEX1;
- }
- } else {
- if (sarea_priv->WarpPipe != dev_priv->WarpPipe) {
- mgaG200EmitPipe(dev_priv);
- dev_priv->WarpPipe = sarea_priv->WarpPipe;
- }
+ if ( dirty & MGA_UPLOAD_CONTEXT ) {
+ mga_g400_emit_context( dev_priv );
+ sarea_priv->dirty &= ~MGA_UPLOAD_CONTEXT;
+ }
- if (dirty & MGA_UPLOAD_CTX) {
- mgaEmitContext(dev_priv);
- sarea_priv->dirty &= ~MGA_UPLOAD_CTX;
- }
+ if ( dirty & MGA_UPLOAD_TEX0 ) {
+ mga_g400_emit_tex0( dev_priv );
+ sarea_priv->dirty &= ~MGA_UPLOAD_TEX0;
+ }
- if (dirty & MGA_UPLOAD_TEX0) {
- mgaG200EmitTex(dev_priv);
- sarea_priv->dirty &= ~MGA_UPLOAD_TEX0;
- }
+ if ( (dirty & MGA_UPLOAD_TEX1) && multitex ) {
+ mga_g400_emit_tex1( dev_priv );
+ sarea_priv->dirty &= ~MGA_UPLOAD_TEX1;
}
}
+
+/* ================================================================
+ * SAREA state verification
+ */
+
/* Disallow all write destinations except the front and backbuffer.
*/
-static int mgaVerifyContext(drm_mga_private_t * dev_priv)
+static int mga_verify_context( drm_mga_private_t *dev_priv )
{
drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
- unsigned int *regs = sarea_priv->ContextState;
-
- if (regs[MGA_CTXREG_DSTORG] != dev_priv->frontOffset &&
- regs[MGA_CTXREG_DSTORG] != dev_priv->backOffset) {
- DRM_DEBUG("BAD DSTORG: %x (front %x, back %x)\n\n",
- regs[MGA_CTXREG_DSTORG], dev_priv->frontOffset,
- dev_priv->backOffset);
- regs[MGA_CTXREG_DSTORG] = 0;
- return -1;
+ drm_mga_context_regs_t *ctx = &sarea_priv->context_state;
+
+ if ( ctx->dstorg != dev_priv->front_offset &&
+ ctx->dstorg != dev_priv->back_offset ) {
+ DRM_DEBUG( "*** bad DSTORG: %x (front %x, back %x)\n\n",
+ ctx->dstorg, dev_priv->front_offset,
+ dev_priv->back_offset );
+ ctx->dstorg = 0;
+ return -EINVAL;
}
return 0;
@@ -424,720 +420,644 @@ static int mgaVerifyContext(drm_mga_private_t * dev_priv)
/* Disallow texture reads from PCI space.
*/
-static int mgaVerifyTex(drm_mga_private_t * dev_priv, int unit)
+static int mga_verify_tex( drm_mga_private_t *dev_priv, int unit )
{
drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
+ drm_mga_texture_regs_t *tex = &sarea_priv->tex_state[unit];
+ unsigned int org;
- if ((sarea_priv->TexState[unit][MGA_TEXREG_ORG] & 0x3) == 0x1) {
- DRM_DEBUG("BAD TEXREG_ORG: %x, unit %d\n",
- sarea_priv->TexState[unit][MGA_TEXREG_ORG],
- unit);
- sarea_priv->TexState[unit][MGA_TEXREG_ORG] = 0;
- return -1;
+ org = tex->texorg & (MGA_TEXORGMAP_MASK | MGA_TEXORGACC_MASK);
+
+ if ( org == (MGA_TEXORGMAP_SYSMEM | MGA_TEXORGACC_PCI) ) {
+ DRM_DEBUG( "*** bad TEXORG: 0x%x, unit %d\n",
+ tex->texorg, unit );
+ tex->texorg = 0;
+ return -EINVAL;
}
return 0;
}
-static int mgaVerifyState(drm_mga_private_t * dev_priv)
+static int mga_verify_state( drm_mga_private_t *dev_priv )
{
drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
unsigned int dirty = sarea_priv->dirty;
- int rv = 0;
+ int ret = 0;
- if (sarea_priv->nbox > MGA_NR_SAREA_CLIPRECTS)
+ if ( sarea_priv->nbox > MGA_NR_SAREA_CLIPRECTS )
sarea_priv->nbox = MGA_NR_SAREA_CLIPRECTS;
- if (dirty & MGA_UPLOAD_CTX)
- rv |= mgaVerifyContext(dev_priv);
+ if ( dirty & MGA_UPLOAD_CONTEXT )
+ ret |= mga_verify_context( dev_priv );
- if (dirty & MGA_UPLOAD_TEX0)
- rv |= mgaVerifyTex(dev_priv, 0);
+ if ( dirty & MGA_UPLOAD_TEX0 )
+ ret |= mga_verify_tex( dev_priv, 0 );
- if (dev_priv->chipset == MGA_CARD_TYPE_G400) {
- if (dirty & MGA_UPLOAD_TEX1)
- rv |= mgaVerifyTex(dev_priv, 1);
+ if ( dev_priv->chipset == MGA_CARD_TYPE_G400 ) {
+ if ( dirty & MGA_UPLOAD_TEX1 )
+ ret |= mga_verify_tex( dev_priv, 1 );
- if (dirty & MGA_UPLOAD_PIPE)
- rv |= (sarea_priv->WarpPipe > MGA_MAX_G400_PIPES);
+ if ( dirty & MGA_UPLOAD_PIPE )
+ ret |= ( sarea_priv->warp_pipe > MGA_MAX_G400_PIPES );
} else {
- if (dirty & MGA_UPLOAD_PIPE)
- rv |= (sarea_priv->WarpPipe > MGA_MAX_G200_PIPES);
+ if ( dirty & MGA_UPLOAD_PIPE )
+ ret |= ( sarea_priv->warp_pipe > MGA_MAX_G200_PIPES );
}
- return rv == 0;
+ return ( ret == 0 );
}
-static int mgaVerifyIload(drm_mga_private_t * dev_priv,
- unsigned long bus_address,
- unsigned int dstOrg, int length)
+static int mga_verify_iload( drm_mga_private_t *dev_priv,
+ unsigned int dstorg, unsigned int length )
{
- if (dstOrg < dev_priv->textureOffset ||
- dstOrg + length >
- (dev_priv->textureOffset + dev_priv->textureSize)) {
+ if ( dstorg < dev_priv->texture_offset ||
+ dstorg + length > (dev_priv->texture_offset +
+ dev_priv->texture_size) ) {
return -EINVAL;
}
- if (length % 64) {
+
+ if ( length & MGA_ILOAD_MASK ) {
+ return -EINVAL;
+ }
+
+ return 0;
+}
+
+static int mga_verify_blit( drm_mga_private_t *dev_priv,
+ unsigned int srcorg, unsigned int dstorg )
+{
+ if ( (srcorg & 0x3) == (MGA_SRCACC_PCI | MGA_SRCMAP_SYSMEM) ||
+ (dstorg & 0x3) == (MGA_SRCACC_PCI | MGA_SRCMAP_SYSMEM) ) {
return -EINVAL;
}
return 0;
}
-/* This copies a 64 byte aligned agp region to the frambuffer
- * with a standard blit, the ioctl needs to do checking */
-static void mga_dma_dispatch_tex_blit(drm_device_t * dev,
- unsigned long bus_address,
- int length, unsigned int destOrg)
+/* ================================================================
+ *
+ */
+
+static void mga_dma_dispatch_clear( drm_device_t *dev,
+ drm_mga_clear_t *clear )
{
drm_mga_private_t *dev_priv = dev->dev_private;
drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
- unsigned int *regs = sarea_priv->ContextState;
- int use_agp = PDEA_pagpxfer_enable | 0x00000001;
- u16 y2;
- PRIMLOCALS;
+ drm_mga_context_regs_t *ctx = &sarea_priv->context_state;
+ drm_clip_rect_t *pbox = sarea_priv->boxes;
+ int nbox = sarea_priv->nbox;
+ int i;
+ DMA_LOCALS;
+ DRM_DEBUG( __FUNCTION__ ":\n" );
- y2 = length / 64;
+ for ( i = 0 ; i < nbox ; i++ ) {
+ drm_clip_rect_t *box = &pbox[i];
+ u32 height = box->y2 - box->y1;
+
+ DRM_DEBUG( " from=%d,%d to=%d,%d\n",
+ box->x1, box->y1, box->x2, box->y2 );
+
+ if ( clear->flags & MGA_FRONT ) {
+ BEGIN_DMA( 2 );
+
+ DMA_BLOCK( MGA_DMAPAD, 0x00000000,
+ MGA_PLNWT, clear->color_mask,
+ MGA_YDSTLEN, (box->y1 << 16) | height,
+ MGA_FXBNDRY, (box->x2 << 16) | box->x1 );
+
+ DMA_BLOCK( MGA_DMAPAD, 0x00000000,
+ MGA_FCOL, clear->clear_color,
+ MGA_DSTORG, dev_priv->front_offset,
+ MGA_DWGCTL + MGA_EXEC,
+ dev_priv->clear_cmd );
+
+ ADVANCE_DMA();
+ }
+
+
+ if ( clear->flags & MGA_BACK ) {
+ BEGIN_DMA( 2 );
+
+ DMA_BLOCK( MGA_DMAPAD, 0x00000000,
+ MGA_PLNWT, clear->color_mask,
+ MGA_YDSTLEN, (box->y1 << 16) | height,
+ MGA_FXBNDRY, (box->x2 << 16) | box->x1 );
+
+ DMA_BLOCK( MGA_DMAPAD, 0x00000000,
+ MGA_FCOL, clear->clear_color,
+ MGA_DSTORG, dev_priv->back_offset,
+ MGA_DWGCTL + MGA_EXEC,
+ dev_priv->clear_cmd );
+
+ ADVANCE_DMA();
+ }
+
+ if ( clear->flags & MGA_DEPTH ) {
+ BEGIN_DMA( 2 );
- PRIM_OVERFLOW(dev, dev_priv, 30);
+ DMA_BLOCK( MGA_DMAPAD, 0x00000000,
+ MGA_PLNWT, clear->depth_mask,
+ MGA_YDSTLEN, (box->y1 << 16) | height,
+ MGA_FXBNDRY, (box->x2 << 16) | box->x1 );
- PRIMOUTREG(MGAREG_DSTORG, destOrg);
- PRIMOUTREG(MGAREG_MACCESS, 0x00000000);
- PRIMOUTREG(MGAREG_SRCORG, (u32) bus_address | use_agp);
- PRIMOUTREG(MGAREG_AR5, 64);
+ DMA_BLOCK( MGA_DMAPAD, 0x00000000,
+ MGA_FCOL, clear->clear_depth,
+ MGA_DSTORG, dev_priv->depth_offset,
+ MGA_DWGCTL + MGA_EXEC,
+ dev_priv->clear_cmd );
- PRIMOUTREG(MGAREG_PITCH, 64);
- PRIMOUTREG(MGAREG_PLNWT, ~0);
- PRIMOUTREG(MGAREG_DMAPAD, 0);
- PRIMOUTREG(MGAREG_DWGCTL, MGA_COPY_CMD);
+ ADVANCE_DMA();
+ }
+
+ }
+
+ BEGIN_DMA( 1 );
- PRIMOUTREG(MGAREG_AR0, 63);
- PRIMOUTREG(MGAREG_AR3, 0);
- PRIMOUTREG(MGAREG_FXBNDRY, (63 << 16));
- PRIMOUTREG(MGAREG_YDSTLEN + MGAREG_MGA_EXEC, y2);
+ /* Force reset of DWGCTL */
+ DMA_BLOCK( MGA_DMAPAD, 0x00000000,
+ MGA_DMAPAD, 0x00000000,
+ MGA_PLNWT, ctx->plnwt,
+ MGA_DWGCTL, ctx->dwgctl );
+
+ ADVANCE_DMA();
- PRIMOUTREG(MGAREG_PLNWT, regs[MGA_CTXREG_PLNWT]);
- PRIMOUTREG(MGAREG_SRCORG, 0);
- PRIMOUTREG(MGAREG_PITCH, dev_priv->stride / dev_priv->cpp);
- PRIMOUTREG(MGAREG_DWGSYNC, 0x7000);
- PRIMADVANCE(dev_priv);
+ FLUSH_DMA();
}
-static void mga_dma_dispatch_vertex(drm_device_t * dev, drm_buf_t * buf)
+static void mga_dma_dispatch_swap( drm_device_t *dev )
+{
+ drm_mga_private_t *dev_priv = dev->dev_private;
+ drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
+ drm_mga_context_regs_t *ctx = &sarea_priv->context_state;
+ drm_clip_rect_t *pbox = sarea_priv->boxes;
+ int nbox = sarea_priv->nbox;
+ int i;
+ DMA_LOCALS;
+ DRM_DEBUG( __FUNCTION__ ":\n" );
+
+ sarea_priv->last_frame.head = dev_priv->prim.tail;
+ sarea_priv->last_frame.wrap = dev_priv->prim.last_wrap;
+
+ BEGIN_DMA( 4 + nbox );
+
+ DMA_BLOCK( MGA_DMAPAD, 0x00000000,
+ MGA_DMAPAD, 0x00000000,
+ MGA_DWGSYNC, 0x00007100,
+ MGA_DWGSYNC, 0x00007000 );
+
+ DMA_BLOCK( MGA_DSTORG, dev_priv->front_offset,
+ MGA_MACCESS, dev_priv->maccess,
+ MGA_SRCORG, dev_priv->back_offset,
+ MGA_AR5, dev_priv->front_pitch );
+
+ DMA_BLOCK( MGA_DMAPAD, 0x00000000,
+ MGA_DMAPAD, 0x00000000,
+ MGA_PLNWT, 0xffffffff,
+ MGA_DWGCTL, MGA_DWGCTL_COPY );
+
+ for ( i = 0 ; i < nbox ; i++ ) {
+ drm_clip_rect_t *box = &pbox[i];
+ u32 height = box->y2 - box->y1;
+ u32 start = box->y1 * dev_priv->front_pitch;
+
+ DRM_DEBUG( " from=%d,%d to=%d,%d\n",
+ box->x1, box->y1, box->x2, box->y2 );
+
+ DMA_BLOCK( MGA_AR0, start + box->x2 - 1,
+ MGA_AR3, start + box->x1,
+ MGA_FXBNDRY, ((box->x2 - 1) << 16) | box->x1,
+ MGA_YDSTLEN + MGA_EXEC,
+ (box->y1 << 16) | height );
+ }
+
+ DMA_BLOCK( MGA_DMAPAD, 0x00000000,
+ MGA_PLNWT, ctx->plnwt,
+ MGA_SRCORG, dev_priv->front_offset,
+ MGA_DWGCTL, ctx->dwgctl );
+
+ ADVANCE_DMA();
+
+ FLUSH_DMA();
+
+ DRM_DEBUG( "%s... done.\n", __FUNCTION__ );
+}
+
+static void mga_dma_dispatch_vertex( drm_device_t *dev, drm_buf_t *buf )
{
drm_mga_private_t *dev_priv = dev->dev_private;
drm_mga_buf_priv_t *buf_priv = buf->dev_private;
drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
- unsigned long address = (unsigned long) buf->bus_address;
- int length = buf->used;
- int use_agp = PDEA_pagpxfer_enable;
+ u32 address = (u32) buf->bus_address;
+ u32 length = (u32) buf->used;
int i = 0;
- PRIMLOCALS;
+ DMA_LOCALS;
+ DRM_DEBUG( "vertex: buf=%d used=%d\n", buf->idx, buf->used );
- if (buf->used) {
- /* WARNING: if you change any of the state functions verify
- * these numbers (Overestimating this doesn't hurt).
- */
+ if ( buf->used ) {
buf_priv->dispatched = 1;
- PRIM_OVERFLOW(dev, dev_priv,
- (MAX_STATE_SIZE + (5 * MGA_NR_SAREA_CLIPRECTS)));
- mgaEmitState(dev_priv);
-#if 0
- length = dev_priv->vertexsize * 3 * 4;
-#endif
+ MGA_EMIT_STATE( dev_priv, sarea_priv->dirty );
do {
- if (i < sarea_priv->nbox) {
- mgaEmitClipRect(dev_priv,
- &sarea_priv->boxes[i]);
+ if ( i < sarea_priv->nbox ) {
+ mga_emit_clip_rect( dev_priv,
+ &sarea_priv->boxes[i] );
}
- PRIMGETPTR(dev_priv);
- PRIMOUTREG(MGAREG_DMAPAD, 0);
- PRIMOUTREG(MGAREG_DMAPAD, 0);
- PRIMOUTREG(MGAREG_SECADDRESS,
- ((u32) address) | TT_VERTEX);
- PRIMOUTREG(MGAREG_SECEND,
- (((u32) (address + length)) | use_agp));
- PRIMADVANCE(dev_priv);
- } while (++i < sarea_priv->nbox);
+ BEGIN_DMA( 1 );
+
+ DMA_BLOCK( MGA_DMAPAD, 0x00000000,
+ MGA_DMAPAD, 0x00000000,
+ MGA_SECADDRESS, (address |
+ MGA_DMA_VERTEX),
+ MGA_SECEND, ((address + length) |
+ MGA_PAGPXFER) );
+
+ ADVANCE_DMA();
+ } while ( ++i < sarea_priv->nbox );
}
- if (buf_priv->discard) {
- if (buf_priv->dispatched == 1)
- AGEBUF(dev_priv, buf_priv);
+
+ if ( buf_priv->discard ) {
+ AGE_BUFFER( buf_priv );
+ buf->pending = 0;
+ buf->used = 0;
buf_priv->dispatched = 0;
- mga_freelist_put(dev, buf);
- }
+ mga_freelist_put( dev, buf );
+ }
+ FLUSH_DMA();
}
-
-static void mga_dma_dispatch_indices(drm_device_t * dev,
- drm_buf_t * buf,
- unsigned int start, unsigned int end)
+static void mga_dma_dispatch_indices( drm_device_t *dev, drm_buf_t *buf,
+ unsigned int start, unsigned int end )
{
drm_mga_private_t *dev_priv = dev->dev_private;
drm_mga_buf_priv_t *buf_priv = buf->dev_private;
drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
- unsigned int address = (unsigned int) buf->bus_address;
- int use_agp = PDEA_pagpxfer_enable;
+ u32 address = (u32) buf->bus_address;
int i = 0;
- PRIMLOCALS;
+ DMA_LOCALS;
+ DRM_DEBUG( "indices: buf=%d start=%d end=%d\n", buf->idx, start, end );
- if (start != end) {
- /* WARNING: if you change any of the state functions verify
- * these numbers (Overestimating this doesn't hurt).
- */
+ if ( start != end ) {
buf_priv->dispatched = 1;
- PRIM_OVERFLOW(dev, dev_priv,
- (MAX_STATE_SIZE + (5 * MGA_NR_SAREA_CLIPRECTS)));
- mgaEmitState(dev_priv);
+
+ MGA_EMIT_STATE( dev_priv, sarea_priv->dirty );
do {
- if (i < sarea_priv->nbox) {
- mgaEmitClipRect(dev_priv,
- &sarea_priv->boxes[i]);
+ if ( i < sarea_priv->nbox ) {
+ mga_emit_clip_rect( dev_priv,
+ &sarea_priv->boxes[i] );
}
- PRIMGETPTR(dev_priv);
- PRIMOUTREG(MGAREG_DMAPAD, 0);
- PRIMOUTREG(MGAREG_DMAPAD, 0);
- PRIMOUTREG(MGAREG_SETUPADDRESS,
- ((address + start) |
- SETADD_mode_vertlist));
- PRIMOUTREG(MGAREG_SETUPEND,
- ((address + end) | use_agp));
-/* ((address + start + 12) | use_agp)); */
- PRIMADVANCE(dev_priv);
- } while (++i < sarea_priv->nbox);
- }
- if (buf_priv->discard) {
- if (buf_priv->dispatched == 1)
- AGEBUF(dev_priv, buf_priv);
- buf_priv->dispatched = 0;
- mga_freelist_put(dev, buf);
- }
-}
+ BEGIN_DMA( 1 );
+ DMA_BLOCK( MGA_DMAPAD, 0x00000000,
+ MGA_DMAPAD, 0x00000000,
+ MGA_SETUPADDRESS, address + start,
+ MGA_SETUPEND, ((address + end) |
+ MGA_PAGPXFER) );
-static void mga_dma_dispatch_clear(drm_device_t * dev, int flags,
- unsigned int clear_color,
- unsigned int clear_zval,
- unsigned int clear_colormask,
- unsigned int clear_depthmask)
-{
- drm_mga_private_t *dev_priv = dev->dev_private;
- drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
- unsigned int *regs = sarea_priv->ContextState;
- int nbox = sarea_priv->nbox;
- drm_clip_rect_t *pbox = sarea_priv->boxes;
- unsigned int cmd;
- int i;
- PRIMLOCALS;
-
- if (dev_priv->sgram)
- cmd = MGA_CLEAR_CMD | DC_atype_blk;
- else
- cmd = MGA_CLEAR_CMD | DC_atype_rstr;
-
- PRIM_OVERFLOW(dev, dev_priv, 35 * MGA_NR_SAREA_CLIPRECTS);
-
- for (i = 0; i < nbox; i++) {
- unsigned int height = pbox[i].y2 - pbox[i].y1;
-
- if (flags & MGA_FRONT) {
- PRIMOUTREG(MGAREG_DMAPAD, 0);
- PRIMOUTREG(MGAREG_PLNWT, clear_colormask);
- PRIMOUTREG(MGAREG_YDSTLEN,
- (pbox[i].y1 << 16) | height);
- PRIMOUTREG(MGAREG_FXBNDRY,
- (pbox[i].x2 << 16) | pbox[i].x1);
-
- PRIMOUTREG(MGAREG_DMAPAD, 0);
- PRIMOUTREG(MGAREG_FCOL, clear_color);
- PRIMOUTREG(MGAREG_DSTORG, dev_priv->frontOffset);
- PRIMOUTREG(MGAREG_DWGCTL + MGAREG_MGA_EXEC, cmd);
- }
+ ADVANCE_DMA();
+ } while ( ++i < sarea_priv->nbox );
+ }
- if (flags & MGA_BACK) {
- PRIMOUTREG(MGAREG_DMAPAD, 0);
- PRIMOUTREG(MGAREG_PLNWT, clear_colormask);
- PRIMOUTREG(MGAREG_YDSTLEN,
- (pbox[i].y1 << 16) | height);
- PRIMOUTREG(MGAREG_FXBNDRY,
- (pbox[i].x2 << 16) | pbox[i].x1);
-
- PRIMOUTREG(MGAREG_DMAPAD, 0);
- PRIMOUTREG(MGAREG_FCOL, clear_color);
- PRIMOUTREG(MGAREG_DSTORG, dev_priv->backOffset);
- PRIMOUTREG(MGAREG_DWGCTL + MGAREG_MGA_EXEC, cmd);
- }
+ if ( buf_priv->discard ) {
+ AGE_BUFFER( buf_priv );
+ buf->pending = 0;
+ buf->used = 0;
+ buf_priv->dispatched = 0;
- if (flags & MGA_DEPTH) {
- PRIMOUTREG(MGAREG_DMAPAD, 0);
- PRIMOUTREG(MGAREG_PLNWT, clear_depthmask);
- PRIMOUTREG(MGAREG_YDSTLEN,
- (pbox[i].y1 << 16) | height);
- PRIMOUTREG(MGAREG_FXBNDRY,
- (pbox[i].x2 << 16) | pbox[i].x1);
-
- PRIMOUTREG(MGAREG_DMAPAD, 0);
- PRIMOUTREG(MGAREG_FCOL, clear_zval);
- PRIMOUTREG(MGAREG_DSTORG, dev_priv->depthOffset);
- PRIMOUTREG(MGAREG_DWGCTL + MGAREG_MGA_EXEC, cmd);
- }
+ mga_freelist_put( dev, buf );
}
- /* Force reset of DWGCTL */
- PRIMOUTREG(MGAREG_DMAPAD, 0);
- PRIMOUTREG(MGAREG_DMAPAD, 0);
- PRIMOUTREG(MGAREG_PLNWT, regs[MGA_CTXREG_PLNWT]);
- PRIMOUTREG(MGAREG_DWGCTL, regs[MGA_CTXREG_DWGCTL]);
- PRIMADVANCE(dev_priv);
+ FLUSH_DMA();
}
-static void mga_dma_dispatch_swap(drm_device_t * dev)
+/* This copies a 64 byte aligned agp region to the frambuffer with a
+ * standard blit, the ioctl needs to do checking.
+ */
+static void mga_dma_dispatch_iload( drm_device_t *dev, drm_buf_t *buf,
+ unsigned int dstorg, unsigned int length )
{
drm_mga_private_t *dev_priv = dev->dev_private;
- drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
- unsigned int *regs = sarea_priv->ContextState;
- int nbox = sarea_priv->nbox;
- drm_clip_rect_t *pbox = sarea_priv->boxes;
- int i;
- int pixel_stride = dev_priv->stride / dev_priv->cpp;
+ drm_mga_buf_priv_t *buf_priv = buf->dev_private;
+ drm_mga_context_regs_t *ctx = &dev_priv->sarea_priv->context_state;
+ u32 srcorg = buf->bus_address | MGA_SRCACC_AGP | MGA_SRCMAP_SYSMEM;
+ u32 y2;
+ DMA_LOCALS;
+ DRM_DEBUG( "%s: buf=%d used=%d\n",
+ __FUNCTION__, buf->idx, buf->used );
+
+ y2 = length / 64;
- PRIMLOCALS;
+ BEGIN_DMA( 4 );
- PRIM_OVERFLOW(dev, dev_priv, (MGA_NR_SAREA_CLIPRECTS * 5) + 20);
+ DMA_BLOCK( MGA_DSTORG, dstorg,
+ MGA_MACCESS, 0x00000000,
+ MGA_SRCORG, srcorg,
+ MGA_AR5, 64 );
- PRIMOUTREG(MGAREG_DMAPAD, 0);
- PRIMOUTREG(MGAREG_DMAPAD, 0);
- PRIMOUTREG(MGAREG_DWGSYNC, 0x7100);
- PRIMOUTREG(MGAREG_DWGSYNC, 0x7000);
+ DMA_BLOCK( MGA_PITCH, 64,
+ MGA_PLNWT, 0xffffffff,
+ MGA_DMAPAD, 0x00000000,
+ MGA_DWGCTL, MGA_DWGCTL_COPY );
- PRIMOUTREG(MGAREG_DSTORG, dev_priv->frontOffset);
- PRIMOUTREG(MGAREG_MACCESS, dev_priv->mAccess);
- PRIMOUTREG(MGAREG_SRCORG, dev_priv->backOffset);
- PRIMOUTREG(MGAREG_AR5, pixel_stride);
+ DMA_BLOCK( MGA_AR0, 63,
+ MGA_AR3, 0,
+ MGA_FXBNDRY, (63 << 16) | 0,
+ MGA_YDSTLEN + MGA_EXEC, y2 );
- PRIMOUTREG(MGAREG_DMAPAD, 0);
- PRIMOUTREG(MGAREG_DMAPAD, 0);
- PRIMOUTREG(MGAREG_PLNWT, ~0);
- PRIMOUTREG(MGAREG_DWGCTL, MGA_COPY_CMD);
+ DMA_BLOCK( MGA_PLNWT, ctx->plnwt,
+ MGA_SRCORG, dev_priv->front_offset,
+ MGA_PITCH, dev_priv->front_pitch,
+ MGA_DWGSYNC, 0x00007000 );
- for (i = 0; i < nbox; i++) {
- unsigned int h = pbox[i].y2 - pbox[i].y1;
- unsigned int start = pbox[i].y1 * pixel_stride;
+ ADVANCE_DMA();
- PRIMOUTREG(MGAREG_AR0, start + pbox[i].x2 - 1);
- PRIMOUTREG(MGAREG_AR3, start + pbox[i].x1);
- PRIMOUTREG(MGAREG_FXBNDRY,
- pbox[i].x1 | ((pbox[i].x2 - 1) << 16));
- PRIMOUTREG(MGAREG_YDSTLEN + MGAREG_MGA_EXEC,
- (pbox[i].y1 << 16) | h);
- }
+ AGE_BUFFER( buf_priv );
- /* Force reset of DWGCTL */
- PRIMOUTREG(MGAREG_DMAPAD, 0);
- PRIMOUTREG(MGAREG_PLNWT, regs[MGA_CTXREG_PLNWT]);
- PRIMOUTREG(MGAREG_SRCORG, 0);
- PRIMOUTREG(MGAREG_DWGCTL, regs[MGA_CTXREG_DWGCTL]);
+ buf->pending = 0;
+ buf->used = 0;
+ buf_priv->dispatched = 0;
+
+ mga_freelist_put( dev, buf );
- PRIMADVANCE(dev_priv);
+ FLUSH_DMA();
}
-/* #define BLIT_LEFT 1 */
-/* #define BLIT_UP 4 */
-
-static void mga_dma_dispatch_blit(drm_device_t * dev,
- unsigned int planemask,
- unsigned int source,
- unsigned int dest,
- int delta_sx, int delta_sy,
- int delta_dx, int delta_dy,
- int source_pitch,
- int dest_pitch,
- int height,
- int ydir)
+static void mga_dma_dispatch_blit( drm_device_t *dev,
+ drm_mga_blit_t *blit )
{
drm_mga_private_t *dev_priv = dev->dev_private;
drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
- unsigned int *regs = sarea_priv->ContextState;
- int nbox = sarea_priv->nbox;
+ drm_mga_context_regs_t *ctx = &sarea_priv->context_state;
drm_clip_rect_t *pbox = sarea_priv->boxes;
- int pixel_stride = dev_priv->stride / dev_priv->cpp;
+ int nbox = sarea_priv->nbox;
u32 scandir = 0, i;
-
- PRIMLOCALS;
-
- PRIM_OVERFLOW(dev, dev_priv, (MGA_NR_SAREA_CLIPRECTS * 5) + 20);
-
- PRIMOUTREG(MGAREG_DMAPAD, 0);
- PRIMOUTREG(MGAREG_DMAPAD, 0);
- PRIMOUTREG(MGAREG_DWGSYNC, 0x7100);
- PRIMOUTREG(MGAREG_DWGSYNC, 0x7000);
-
- PRIMOUTREG(MGAREG_DWGCTL, MGA_COPY_CMD);
- PRIMOUTREG(MGAREG_PLNWT, planemask);
- PRIMOUTREG(MGAREG_SRCORG, source);
- PRIMOUTREG(MGAREG_DSTORG, dest);
-
- PRIMOUTREG(MGAREG_SGN, scandir);
- PRIMOUTREG(MGAREG_MACCESS, dev_priv->mAccess);
- PRIMOUTREG(MGAREG_AR5, ydir * source_pitch);
- PRIMOUTREG(MGAREG_PITCH, dest_pitch);
-
- for (i = 0; i < nbox; i++) {
- int srcx = pbox[i].x1 + delta_sx;
- int srcy = pbox[i].y1 + delta_sy;
- int dstx = pbox[i].x1 + delta_dx;
- int dsty = pbox[i].y1 + delta_dy;
+ DMA_LOCALS;
+ DRM_DEBUG( __FUNCTION__ ":\n" );
+
+ BEGIN_DMA( 4 + nbox );
+
+ DMA_BLOCK( MGA_DMAPAD, 0x00000000,
+ MGA_DMAPAD, 0x00000000,
+ MGA_DWGSYNC, 0x00007100,
+ MGA_DWGSYNC, 0x00007000 );
+
+ DMA_BLOCK( MGA_DWGCTL, MGA_DWGCTL_COPY,
+ MGA_PLNWT, blit->planemask,
+ MGA_SRCORG, blit->srcorg,
+ MGA_DSTORG, blit->dstorg );
+
+ DMA_BLOCK( MGA_SGN, scandir,
+ MGA_MACCESS, dev_priv->maccess,
+ MGA_AR5, blit->ydir * blit->src_pitch,
+ MGA_PITCH, blit->dst_pitch );
+
+ for ( i = 0 ; i < nbox ; i++ ) {
+ int srcx = pbox[i].x1 + blit->delta_sx;
+ int srcy = pbox[i].y1 + blit->delta_sy;
+ int dstx = pbox[i].x1 + blit->delta_dx;
+ int dsty = pbox[i].y1 + blit->delta_dy;
int h = pbox[i].y2 - pbox[i].y1;
int w = pbox[i].x2 - pbox[i].x1 - 1;
int start;
- if (ydir == -1) {
- srcy = height - srcy - 1;
+ if ( blit->ydir == -1 ) {
+ srcy = blit->height - srcy - 1;
}
- start = srcy * source_pitch + srcx;
+ start = srcy * blit->src_pitch + srcx;
- PRIMOUTREG(MGAREG_AR0, start + w);
- PRIMOUTREG(MGAREG_AR3, start);
- PRIMOUTREG(MGAREG_FXBNDRY, ((dstx+w) << 16) | (dstx & 0xffff));
- PRIMOUTREG(MGAREG_YDSTLEN + MGAREG_MGA_EXEC, (dsty << 16) | h);
+ DMA_BLOCK( MGA_AR0, start + w,
+ MGA_AR3, start,
+ MGA_FXBNDRY, ((dstx + w) << 16) | (dstx & 0xffff),
+ MGA_YDSTLEN + MGA_EXEC, (dsty << 16) | h );
}
/* Do something to flush AGP?
*/
/* Force reset of DWGCTL */
- PRIMOUTREG(MGAREG_DMAPAD, 0);
- PRIMOUTREG(MGAREG_PLNWT, regs[MGA_CTXREG_PLNWT]);
- PRIMOUTREG(MGAREG_PITCH, pixel_stride);
- PRIMOUTREG(MGAREG_DWGCTL, regs[MGA_CTXREG_DWGCTL]);
+ DMA_BLOCK( MGA_DMAPAD, 0x00000000,
+ MGA_PLNWT, ctx->plnwt,
+ MGA_PITCH, dev_priv->front_pitch,
+ MGA_DWGCTL, ctx->dwgctl );
- PRIMADVANCE(dev_priv);
+ ADVANCE_DMA();
}
-int mga_blit(struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg)
+/* ================================================================
+ *
+ */
+
+int mga_dma_clear( struct inode *inode, struct file *filp,
+ unsigned int cmd, unsigned long arg )
{
drm_file_t *priv = filp->private_data;
drm_device_t *dev = priv->dev;
- drm_mga_private_t *dev_priv =
- (drm_mga_private_t *) dev->dev_private;
+ drm_mga_private_t *dev_priv = dev->dev_private;
drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
- drm_mga_blit_t blit;
+ drm_mga_clear_t clear;
- if (copy_from_user(&blit, (drm_mga_blit_t *) arg, sizeof(blit)))
- return -EFAULT;
-
- DRM_DEBUG("%s\n", __FUNCTION__);
+ LOCK_TEST_WITH_RETURN( dev );
- if (!_DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock)) {
- DRM_ERROR("mga_blit_bufs called without lock held\n");
- return -EINVAL;
- }
+ if ( copy_from_user( &clear, (drm_mga_clear_t *) arg, sizeof(clear) ) )
+ return -EFAULT;
- if (sarea_priv->nbox > MGA_NR_SAREA_CLIPRECTS)
+ if ( sarea_priv->nbox > MGA_NR_SAREA_CLIPRECTS )
sarea_priv->nbox = MGA_NR_SAREA_CLIPRECTS;
- /* Make sure we restore the 3D state next time.
- */
- dev_priv->sarea_priv->dirty |= MGA_UPLOAD_CTX;
-
- if ((blit.source & 0x3) != (SO_srcmap_sys|SO_srcacc_pci) &&
- (blit.dest & 0x3) != (SO_srcmap_sys|SO_srcacc_pci))
- {
- mga_dma_dispatch_blit(dev,
- blit.planemask,
- blit.source,
- blit.dest,
- blit.delta_sx, blit.delta_sy,
- blit.delta_dx, blit.delta_dy,
- blit.source_pitch,
- blit.dest_pitch,
- blit.height,
- blit.ydir);
- }
+ WRAP_TEST_WITH_RETURN( dev_priv );
+ mga_dma_dispatch_clear( dev, &clear );
- PRIMUPDATE(dev_priv);
+ /* Make sure we restore the 3D state next time.
+ */
+ dev_priv->sarea_priv->dirty |= MGA_UPLOAD_CONTEXT;
-#ifdef __i386__
- mga_flush_write_combine();
-#endif
- mga_dma_schedule(dev, 1);
return 0;
}
-
-int mga_clear_bufs(struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg)
+int mga_dma_swap( struct inode *inode, struct file *filp,
+ unsigned int cmd, unsigned long arg )
{
drm_file_t *priv = filp->private_data;
drm_device_t *dev = priv->dev;
- drm_mga_private_t *dev_priv =
- (drm_mga_private_t *) dev->dev_private;
+ drm_mga_private_t *dev_priv = dev->dev_private;
drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
- drm_mga_clear_t clear;
-
- if (copy_from_user(&clear, (drm_mga_clear_t *) arg, sizeof(clear)))
- return -EFAULT;
- if (!_DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock)) {
- DRM_ERROR("mga_clear_bufs called without lock held\n");
- return -EINVAL;
- }
+ LOCK_TEST_WITH_RETURN( dev );
- if (sarea_priv->nbox > MGA_NR_SAREA_CLIPRECTS)
+ if ( sarea_priv->nbox > MGA_NR_SAREA_CLIPRECTS )
sarea_priv->nbox = MGA_NR_SAREA_CLIPRECTS;
- /* Make sure we restore the 3D state next time.
- */
- dev_priv->sarea_priv->dirty |= MGA_UPLOAD_CTX;
- mga_dma_dispatch_clear(dev, clear.flags,
- clear.clear_color,
- clear.clear_depth,
- clear.clear_color_mask,
- clear.clear_depth_mask);
- PRIMUPDATE(dev_priv);
- mga_flush_write_combine();
- mga_dma_schedule(dev, 1);
- return 0;
-}
-
-int mga_swap_bufs(struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg)
-{
- drm_file_t *priv = filp->private_data;
- drm_device_t *dev = priv->dev;
- drm_mga_private_t *dev_priv =
- (drm_mga_private_t *) dev->dev_private;
- drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
-
- if (!_DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock)) {
- DRM_ERROR("mga_swap_bufs called without lock held\n");
- return -EINVAL;
- }
+ WRAP_TEST_WITH_RETURN( dev_priv );
- if (sarea_priv->nbox > MGA_NR_SAREA_CLIPRECTS)
- sarea_priv->nbox = MGA_NR_SAREA_CLIPRECTS;
+ mga_dma_dispatch_swap( dev );
/* Make sure we restore the 3D state next time.
*/
- dev_priv->sarea_priv->dirty |= MGA_UPLOAD_CTX;
- mga_dma_dispatch_swap(dev);
- PRIMUPDATE(dev_priv);
- set_bit(MGA_BUF_SWAP_PENDING,
- &dev_priv->current_prim->buffer_status);
- mga_flush_write_combine();
- mga_dma_schedule(dev, 1);
+ dev_priv->sarea_priv->dirty |= MGA_UPLOAD_CONTEXT;
+
return 0;
}
-int mga_iload(struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg)
+int mga_dma_vertex( struct inode *inode, struct file *filp,
+ unsigned int cmd, unsigned long arg )
{
drm_file_t *priv = filp->private_data;
drm_device_t *dev = priv->dev;
+ drm_mga_private_t *dev_priv = dev->dev_private;
drm_device_dma_t *dma = dev->dma;
- drm_mga_private_t *dev_priv =
- (drm_mga_private_t *) dev->dev_private;
- drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
drm_buf_t *buf;
drm_mga_buf_priv_t *buf_priv;
- drm_mga_iload_t iload;
- unsigned long bus_address;
+ drm_mga_vertex_t vertex;
- if (copy_from_user(&iload, (drm_mga_iload_t *) arg, sizeof(iload)))
- return -EFAULT;
+ LOCK_TEST_WITH_RETURN( dev );
- if (!_DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock)) {
- DRM_ERROR("mga_iload called without lock held\n");
- return -EINVAL;
- }
+ if ( copy_from_user( &vertex,
+ (drm_mga_vertex_t *)arg,
+ sizeof(vertex) ) )
+ return -EFAULT;
- buf = dma->buflist[iload.idx];
+ buf = dma->buflist[vertex.idx];
buf_priv = buf->dev_private;
- bus_address = buf->bus_address;
- if (mgaVerifyIload(dev_priv,
- bus_address, iload.destOrg, iload.length)) {
- mga_freelist_put(dev, buf);
+ buf->used = vertex.used;
+ buf_priv->discard = vertex.discard;
+
+ if ( !mga_verify_state( dev_priv ) ) {
+ if ( vertex.discard ) {
+ if ( buf_priv->dispatched == 1 )
+ AGE_BUFFER( buf_priv );
+ buf_priv->dispatched = 0;
+ mga_freelist_put( dev, buf );
+ }
return -EINVAL;
}
- sarea_priv->dirty |= MGA_UPLOAD_CTX;
+ WRAP_TEST_WITH_RETURN( dev_priv );
+
+ mga_dma_dispatch_vertex( dev, buf );
- mga_dma_dispatch_tex_blit(dev, bus_address, iload.length,
- iload.destOrg);
- AGEBUF(dev_priv, buf_priv);
- buf_priv->discard = 1;
- mga_freelist_put(dev, buf);
- mga_flush_write_combine();
- mga_dma_schedule(dev, 1);
return 0;
}
-int mga_vertex(struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg)
+int mga_dma_indices( struct inode *inode, struct file *filp,
+ unsigned int cmd, unsigned long arg )
{
drm_file_t *priv = filp->private_data;
drm_device_t *dev = priv->dev;
- drm_mga_private_t *dev_priv =
- (drm_mga_private_t *) dev->dev_private;
+ drm_mga_private_t *dev_priv = dev->dev_private;
drm_device_dma_t *dma = dev->dma;
drm_buf_t *buf;
drm_mga_buf_priv_t *buf_priv;
- drm_mga_vertex_t vertex;
+ drm_mga_indices_t indices;
- if (copy_from_user(&vertex, (drm_mga_vertex_t *) arg, sizeof(vertex)))
- return -EFAULT;
+ LOCK_TEST_WITH_RETURN( dev );
- if (!_DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock)) {
- DRM_ERROR("mga_vertex called without lock held\n");
- return -EINVAL;
- }
+ if ( copy_from_user( &indices,
+ (drm_mga_indices_t *)arg,
+ sizeof(indices) ) )
+ return -EFAULT;
- buf = dma->buflist[vertex.idx];
+ buf = dma->buflist[indices.idx];
buf_priv = buf->dev_private;
- buf->used = vertex.used;
- buf_priv->discard = vertex.discard;
+ buf_priv->discard = indices.discard;
- if (!mgaVerifyState(dev_priv)) {
- if (vertex.discard) {
- if (buf_priv->dispatched == 1)
- AGEBUF(dev_priv, buf_priv);
+ if ( !mga_verify_state( dev_priv ) ) {
+ if ( indices.discard ) {
+ if ( buf_priv->dispatched == 1 )
+ AGE_BUFFER( buf_priv );
buf_priv->dispatched = 0;
- mga_freelist_put(dev, buf);
+ mga_freelist_put( dev, buf );
}
return -EINVAL;
}
- mga_dma_dispatch_vertex(dev, buf);
+ WRAP_TEST_WITH_RETURN( dev_priv );
+
+ mga_dma_dispatch_indices( dev, buf, indices.start, indices.end );
- PRIMUPDATE(dev_priv);
- mga_flush_write_combine();
- mga_dma_schedule(dev, 1);
return 0;
}
-
-int mga_indices(struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg)
+int mga_dma_iload( struct inode *inode, struct file *filp,
+ unsigned int cmd, unsigned long arg )
{
drm_file_t *priv = filp->private_data;
drm_device_t *dev = priv->dev;
- drm_mga_private_t *dev_priv =
- (drm_mga_private_t *) dev->dev_private;
drm_device_dma_t *dma = dev->dma;
+ drm_mga_private_t *dev_priv = dev->dev_private;
drm_buf_t *buf;
drm_mga_buf_priv_t *buf_priv;
- drm_mga_indices_t indices;
+ drm_mga_iload_t iload;
+ DRM_DEBUG( __FUNCTION__ ":\n" );
- if (copy_from_user(&indices,
- (drm_mga_indices_t *)arg, sizeof(indices)))
+ LOCK_TEST_WITH_RETURN( dev );
+
+ if ( copy_from_user( &iload, (drm_mga_iload_t *)arg, sizeof(iload) ) )
return -EFAULT;
- if (!_DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock)) {
- DRM_ERROR("mga_indices called without lock held\n");
- return -EINVAL;
- }
+ if ( mga_do_wait_for_idle( dev_priv ) < 0 )
+ return -EBUSY;
- buf = dma->buflist[indices.idx];
+ buf = dma->buflist[iload.idx];
buf_priv = buf->dev_private;
- buf_priv->discard = indices.discard;
-
- if (!mgaVerifyState(dev_priv)) {
- if (indices.discard) {
- if (buf_priv->dispatched == 1)
- AGEBUF(dev_priv, buf_priv);
- buf_priv->dispatched = 0;
- mga_freelist_put(dev, buf);
- }
+#if 0
+ DRM_INFO( " verifying iload...\n" );
+ if ( mga_verify_iload( dev_priv, iload.dstorg, iload.length ) ) {
+ mga_freelist_put( dev, buf );
return -EINVAL;
}
+ DRM_INFO( " verifying iload... done.\n" );
+#endif
- mga_dma_dispatch_indices(dev, buf, indices.start, indices.end);
-
- PRIMUPDATE(dev_priv);
- mga_flush_write_combine();
- mga_dma_schedule(dev, 1);
- return 0;
-}
-
+ WRAP_TEST_WITH_RETURN( dev_priv );
+ mga_dma_dispatch_iload( dev, buf, iload.dstorg, iload.length );
-static int mga_dma_get_buffers(drm_device_t * dev, drm_dma_t * d)
-{
- int i;
- drm_buf_t *buf;
+ /* Make sure we restore the 3D state next time.
+ */
+ dev_priv->sarea_priv->dirty |= MGA_UPLOAD_CONTEXT;
- for (i = d->granted_count; i < d->request_count; i++) {
- buf = mga_freelist_get(dev);
- if (!buf)
- break;
- buf->pid = current->pid;
- if (copy_to_user(&d->request_indices[i],
- &buf->idx, sizeof(buf->idx)))
- return -EFAULT;
- if (copy_to_user(&d->request_sizes[i],
- &buf->total, sizeof(buf->total)))
- return -EFAULT;
- ++d->granted_count;
- }
return 0;
}
-int mga_dma(struct inode *inode, struct file *filp, unsigned int cmd,
- unsigned long arg)
+int mga_dma_blit( struct inode *inode, struct file *filp,
+ unsigned int cmd, unsigned long arg )
{
drm_file_t *priv = filp->private_data;
drm_device_t *dev = priv->dev;
- drm_device_dma_t *dma = dev->dma;
- int retcode = 0;
- drm_dma_t d;
+ drm_mga_private_t *dev_priv = dev->dev_private;
+ drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
+ drm_mga_blit_t blit;
+ DRM_DEBUG( "%s\n", __FUNCTION__ );
+
+ LOCK_TEST_WITH_RETURN( dev );
- if (copy_from_user(&d, (drm_dma_t *) arg, sizeof(d)))
+ if ( copy_from_user( &blit, (drm_mga_blit_t *)arg, sizeof(blit) ) )
return -EFAULT;
- if (!_DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock)) {
- DRM_ERROR("mga_dma called without lock held\n");
- return -EINVAL;
- }
+ if ( sarea_priv->nbox > MGA_NR_SAREA_CLIPRECTS )
+ sarea_priv->nbox = MGA_NR_SAREA_CLIPRECTS;
- /* Please don't send us buffers.
- */
- if (d.send_count != 0) {
- DRM_ERROR
- ("Process %d trying to send %d buffers via drmDMA\n",
- current->pid, d.send_count);
+ if ( mga_verify_blit( dev_priv, blit.srcorg, blit.dstorg ) )
return -EINVAL;
- }
- /* We'll send you buffers.
- */
- if (d.request_count < 0 || d.request_count > dma->buf_count) {
- DRM_ERROR
- ("Process %d trying to get %d buffers (of %d max)\n",
- current->pid, d.request_count, dma->buf_count);
- return -EINVAL;
- }
+ WRAP_TEST_WITH_RETURN( dev_priv );
- d.granted_count = 0;
+ mga_dma_dispatch_blit( dev, &blit );
- if (d.request_count) {
- retcode = mga_dma_get_buffers(dev, &d);
- }
+ /* Make sure we restore the 3D state next time.
+ */
+ dev_priv->sarea_priv->dirty |= MGA_UPLOAD_CONTEXT;
- if (copy_to_user((drm_dma_t *) arg, &d, sizeof(d)))
- return -EFAULT;
- return retcode;
+ return 0;
}
diff --git a/linux/mga_warp.c b/linux/mga_warp.c
new file mode 100644
index 00000000..5994ab0c
--- /dev/null
+++ b/linux/mga_warp.c
@@ -0,0 +1,215 @@
+/* mga_warp.c -- Matrox G200/G400 WARP engine management -*- linux-c -*-
+ * Created: Thu Jan 11 21:29:32 2001 by gareth@valinux.com
+ *
+ * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Authors:
+ * Gareth Hughes <gareth@valinux.com>
+ */
+
+#define __NO_VERSION__
+#include "mga.h"
+#include "drmP.h"
+#include "mga_drv.h"
+#include "mga_ucode.h"
+
+
+#define MGA_WARP_CODE_ALIGN 256 /* in bytes */
+
+#define WARP_UCODE_SIZE( which ) \
+ ((sizeof(which) / MGA_WARP_CODE_ALIGN + 1) * MGA_WARP_CODE_ALIGN)
+
+#define WARP_UCODE_INSTALL( which, where ) \
+do { \
+ DRM_DEBUG( " pcbase = 0x%08lx vcbase = %p\n", pcbase, vcbase );\
+ dev_priv->warp_pipe_phys[where] = pcbase; \
+ memcpy( vcbase, which, sizeof(which) ); \
+ pcbase += WARP_UCODE_SIZE( which ); \
+ vcbase += WARP_UCODE_SIZE( which ); \
+} while (0)
+
+
+static unsigned int mga_warp_g400_microcode_size( drm_mga_private_t *dev_priv )
+{
+ unsigned int size;
+
+ size = ( WARP_UCODE_SIZE( warp_g400_tgz ) +
+ WARP_UCODE_SIZE( warp_g400_tgza ) +
+ WARP_UCODE_SIZE( warp_g400_tgzaf ) +
+ WARP_UCODE_SIZE( warp_g400_tgzf ) +
+ WARP_UCODE_SIZE( warp_g400_tgzs ) +
+ WARP_UCODE_SIZE( warp_g400_tgzsa ) +
+ WARP_UCODE_SIZE( warp_g400_tgzsaf ) +
+ WARP_UCODE_SIZE( warp_g400_tgzsf ) +
+ WARP_UCODE_SIZE( warp_g400_t2gz ) +
+ WARP_UCODE_SIZE( warp_g400_t2gza ) +
+ WARP_UCODE_SIZE( warp_g400_t2gzaf ) +
+ WARP_UCODE_SIZE( warp_g400_t2gzf ) +
+ WARP_UCODE_SIZE( warp_g400_t2gzs ) +
+ WARP_UCODE_SIZE( warp_g400_t2gzsa ) +
+ WARP_UCODE_SIZE( warp_g400_t2gzsaf ) +
+ WARP_UCODE_SIZE( warp_g400_t2gzsf ) );
+
+ size = PAGE_ALIGN( size );
+
+ DRM_DEBUG( "G400 ucode size = %d bytes\n", size );
+ return size;
+}
+
+static unsigned int mga_warp_g200_microcode_size( drm_mga_private_t *dev_priv )
+{
+ unsigned int size;
+
+ size = ( WARP_UCODE_SIZE( warp_g200_tgz ) +
+ WARP_UCODE_SIZE( warp_g200_tgza ) +
+ WARP_UCODE_SIZE( warp_g200_tgzaf ) +
+ WARP_UCODE_SIZE( warp_g200_tgzf ) +
+ WARP_UCODE_SIZE( warp_g200_tgzs ) +
+ WARP_UCODE_SIZE( warp_g200_tgzsa ) +
+ WARP_UCODE_SIZE( warp_g200_tgzsaf ) +
+ WARP_UCODE_SIZE( warp_g200_tgzsf ) );
+
+ size = PAGE_ALIGN( size );
+
+ DRM_DEBUG( "G200 ucode size = %d bytes\n", size );
+ return size;
+}
+
+static int mga_warp_install_g400_microcode( drm_mga_private_t *dev_priv )
+{
+ unsigned char *vcbase = dev_priv->warp->handle;
+ unsigned long pcbase = dev_priv->warp->offset;
+ unsigned int size;
+
+ size = mga_warp_g400_microcode_size( dev_priv );
+ if ( size > dev_priv->warp->size ) {
+ DRM_ERROR( "microcode too large! (%u > %lu)\n",
+ size, dev_priv->warp->size );
+ return -ENOMEM;
+ }
+
+ memset( dev_priv->warp_pipe_phys, 0,
+ sizeof(dev_priv->warp_pipe_phys) );
+
+ WARP_UCODE_INSTALL( warp_g400_tgz, MGA_WARP_TGZ );
+ WARP_UCODE_INSTALL( warp_g400_tgzf, MGA_WARP_TGZF );
+ WARP_UCODE_INSTALL( warp_g400_tgza, MGA_WARP_TGZA );
+ WARP_UCODE_INSTALL( warp_g400_tgzaf, MGA_WARP_TGZAF );
+ WARP_UCODE_INSTALL( warp_g400_tgzs, MGA_WARP_TGZS );
+ WARP_UCODE_INSTALL( warp_g400_tgzsf, MGA_WARP_TGZSF );
+ WARP_UCODE_INSTALL( warp_g400_tgzsa, MGA_WARP_TGZSA );
+ WARP_UCODE_INSTALL( warp_g400_tgzsaf, MGA_WARP_TGZSAF );
+
+ WARP_UCODE_INSTALL( warp_g400_t2gz, MGA_WARP_T2GZ );
+ WARP_UCODE_INSTALL( warp_g400_t2gzf, MGA_WARP_T2GZF );
+ WARP_UCODE_INSTALL( warp_g400_t2gza, MGA_WARP_T2GZA );
+ WARP_UCODE_INSTALL( warp_g400_t2gzaf, MGA_WARP_T2GZAF );
+ WARP_UCODE_INSTALL( warp_g400_t2gzs, MGA_WARP_T2GZS );
+ WARP_UCODE_INSTALL( warp_g400_t2gzsf, MGA_WARP_T2GZSF );
+ WARP_UCODE_INSTALL( warp_g400_t2gzsa, MGA_WARP_T2GZSA );
+ WARP_UCODE_INSTALL( warp_g400_t2gzsaf, MGA_WARP_T2GZSAF );
+
+ return 0;
+}
+
+static int mga_warp_install_g200_microcode( drm_mga_private_t *dev_priv )
+{
+ unsigned char *vcbase = dev_priv->warp->handle;
+ unsigned long pcbase = dev_priv->warp->offset;
+ unsigned int size;
+
+ size = mga_warp_g200_microcode_size( dev_priv );
+ if ( size > dev_priv->warp->size ) {
+ DRM_ERROR( "microcode too large! (%u > %lu)\n",
+ size, dev_priv->warp->size );
+ return -ENOMEM;
+ }
+
+ memset( dev_priv->warp_pipe_phys, 0,
+ sizeof(dev_priv->warp_pipe_phys) );
+
+ WARP_UCODE_INSTALL( warp_g200_tgz, MGA_WARP_TGZ );
+ WARP_UCODE_INSTALL( warp_g200_tgzf, MGA_WARP_TGZF );
+ WARP_UCODE_INSTALL( warp_g200_tgza, MGA_WARP_TGZA );
+ WARP_UCODE_INSTALL( warp_g200_tgzaf, MGA_WARP_TGZAF );
+ WARP_UCODE_INSTALL( warp_g200_tgzs, MGA_WARP_TGZS );
+ WARP_UCODE_INSTALL( warp_g200_tgzsf, MGA_WARP_TGZSF );
+ WARP_UCODE_INSTALL( warp_g200_tgzsa, MGA_WARP_TGZSA );
+ WARP_UCODE_INSTALL( warp_g200_tgzsaf, MGA_WARP_TGZSAF );
+
+ return 0;
+}
+
+int mga_warp_install_microcode( drm_device_t *dev )
+{
+ drm_mga_private_t *dev_priv = dev->dev_private;
+ DRM_DEBUG( "%s\n", __FUNCTION__ );
+
+ switch ( dev_priv->chipset ) {
+ case MGA_CARD_TYPE_G400:
+ return mga_warp_install_g400_microcode( dev_priv );
+ case MGA_CARD_TYPE_G200:
+ return mga_warp_install_g200_microcode( dev_priv );
+ default:
+ return -EINVAL;
+ }
+}
+
+#define WMISC_EXPECTED (MGA_WUCODECACHE_ENABLE | MGA_WMASTER_ENABLE)
+
+int mga_warp_init( drm_device_t *dev )
+{
+ drm_mga_private_t *dev_priv = dev->dev_private;
+ u32 wmisc;
+ DRM_DEBUG( "%s\n", __FUNCTION__ );
+
+ /* FIXME: Get rid of these damned magic numbers...
+ */
+ switch ( dev_priv->chipset ) {
+ case MGA_CARD_TYPE_G400:
+ MGA_WRITE( MGA_WIADDR2, MGA_WMODE_SUSPEND );
+ MGA_WRITE( MGA_WGETMSB, 0x00000E00 );
+ MGA_WRITE( MGA_WVRTXSZ, 0x00001807 );
+ MGA_WRITE( MGA_WACCEPTSEQ, 0x18000000 );
+ break;
+ case MGA_CARD_TYPE_G200:
+ MGA_WRITE( MGA_WIADDR, MGA_WMODE_SUSPEND );
+ MGA_WRITE( MGA_WGETMSB, 0x1606 );
+ MGA_WRITE( MGA_WVRTXSZ, 7 );
+ break;
+ default:
+ return -EINVAL;
+ }
+
+ MGA_WRITE( MGA_WMISC, (MGA_WUCODECACHE_ENABLE |
+ MGA_WMASTER_ENABLE |
+ MGA_WCACHEFLUSH_ENABLE) );
+ wmisc = MGA_READ( MGA_WMISC );
+ if ( wmisc != WMISC_EXPECTED ) {
+ DRM_ERROR( "WARP engine config failed! 0x%x != 0x%x\n",
+ wmisc, WMISC_EXPECTED );
+ return -EINVAL;
+ }
+
+ return 0;
+}
diff --git a/linux/r128_cce.c b/linux/r128_cce.c
index 6df2b45a..c0e20c21 100644
--- a/linux/r128_cce.c
+++ b/linux/r128_cce.c
@@ -25,11 +25,11 @@
* DEALINGS IN THE SOFTWARE.
*
* Authors:
- * Gareth Hughes <gareth@valinux.com>
- *
+ * Gareth Hughes <gareth@valinux.com>
*/
#define __NO_VERSION__
+#include "r128.h"
#include "drmP.h"
#include "r128_drv.h"
@@ -85,26 +85,6 @@ static u32 r128_cce_microcode[] = {
};
-#define DO_IOREMAP(_m) (_m)->handle = drm_ioremap((_m)->offset, (_m)->size)
-
-#define DO_IOREMAPFREE(_m) \
- do { \
- if ((_m)->handle && (_m)->size) \
- drm_ioremapfree((_m)->handle, (_m)->size); \
- } while (0)
-
-#define DO_FIND_MAP(_m, _o) \
- do { \
- int _i; \
- for (_i = 0; _i < dev->map_count; _i++) { \
- if (dev->maplist[_i]->offset == _o) { \
- _m = dev->maplist[_i]; \
- break; \
- } \
- } \
- } while (0)
-
-
int R128_READ_PLL(drm_device_t *dev, int addr)
{
drm_r128_private_t *dev_priv = dev->dev_private;
@@ -169,7 +149,7 @@ static int r128_do_wait_for_fifo( drm_r128_private_t *dev_priv, int entries )
return -EBUSY;
}
-static int r128_do_wait_for_idle( drm_r128_private_t *dev_priv )
+int r128_do_wait_for_idle( drm_r128_private_t *dev_priv )
{
int i, ret;
@@ -223,7 +203,7 @@ static void r128_do_cce_flush( drm_r128_private_t *dev_priv )
/* Wait for the CCE to go idle.
*/
-static int r128_do_cce_idle( drm_r128_private_t *dev_priv )
+int r128_do_cce_idle( drm_r128_private_t *dev_priv )
{
int i;
@@ -364,9 +344,9 @@ static void r128_cce_init_ring_buffer( drm_device_t *dev )
static int r128_do_init_cce( drm_device_t *dev, drm_r128_init_t *init )
{
drm_r128_private_t *dev_priv;
- int i;
+ struct list_head *list;
- dev_priv = drm_alloc( sizeof(drm_r128_private_t), DRM_MEM_DRIVER );
+ dev_priv = DRM(alloc)( sizeof(drm_r128_private_t), DRM_MEM_DRIVER );
if ( dev_priv == NULL )
return -ENOMEM;
dev->dev_private = (void *)dev_priv;
@@ -380,7 +360,7 @@ static int r128_do_init_cce( drm_device_t *dev, drm_r128_init_t *init )
* the CCE ring code.
*/
if ( dev_priv->is_pci ) {
- drm_free( dev_priv, sizeof(*dev_priv), DRM_MEM_DRIVER );
+ DRM(free)( dev_priv, sizeof(*dev_priv), DRM_MEM_DRIVER );
dev->dev_private = NULL;
return -EINVAL;
}
@@ -388,7 +368,7 @@ static int r128_do_init_cce( drm_device_t *dev, drm_r128_init_t *init )
dev_priv->usec_timeout = init->usec_timeout;
if ( dev_priv->usec_timeout < 1 ||
dev_priv->usec_timeout > R128_MAX_USEC_TIMEOUT ) {
- drm_free( dev_priv, sizeof(*dev_priv), DRM_MEM_DRIVER );
+ DRM(free)( dev_priv, sizeof(*dev_priv), DRM_MEM_DRIVER );
dev->dev_private = NULL;
return -EINVAL;
}
@@ -407,7 +387,7 @@ static int r128_do_init_cce( drm_device_t *dev, drm_r128_init_t *init )
( init->cce_mode != R128_PM4_128BM_64INDBM ) &&
( init->cce_mode != R128_PM4_64BM_128INDBM ) &&
( init->cce_mode != R128_PM4_64BM_64VCBM_64INDBM ) ) {
- drm_free( dev_priv, sizeof(*dev_priv), DRM_MEM_DRIVER );
+ DRM(free)( dev_priv, sizeof(*dev_priv), DRM_MEM_DRIVER );
dev->dev_private = NULL;
return -EINVAL;
}
@@ -433,13 +413,30 @@ static int r128_do_init_cce( drm_device_t *dev, drm_r128_init_t *init )
break;
}
- dev_priv->fb_bpp = init->fb_bpp;
+ switch ( init->fb_bpp ) {
+ case 16:
+ dev_priv->color_fmt = R128_DATATYPE_RGB565;
+ break;
+ case 32:
+ default:
+ dev_priv->color_fmt = R128_DATATYPE_ARGB8888;
+ break;
+ }
dev_priv->front_offset = init->front_offset;
dev_priv->front_pitch = init->front_pitch;
dev_priv->back_offset = init->back_offset;
dev_priv->back_pitch = init->back_pitch;
- dev_priv->depth_bpp = init->depth_bpp;
+ switch ( init->depth_bpp ) {
+ case 16:
+ dev_priv->depth_fmt = R128_DATATYPE_RGB565;
+ break;
+ case 24:
+ case 32:
+ default:
+ dev_priv->depth_fmt = R128_DATATYPE_ARGB8888;
+ break;
+ }
dev_priv->depth_offset = init->depth_offset;
dev_priv->depth_pitch = init->depth_pitch;
dev_priv->span_offset = init->span_offset;
@@ -454,39 +451,34 @@ static int r128_do_init_cce( drm_device_t *dev, drm_r128_init_t *init )
dev_priv->span_pitch_offset_c = (((dev_priv->depth_pitch/8) << 21) |
(dev_priv->span_offset >> 5));
- /* FIXME: We want multiple shared areas, including one shared
- * only by the X Server and kernel module.
- */
- for ( i = 0 ; i < dev->map_count ; i++ ) {
- if ( dev->maplist[i]->type == _DRM_SHM ) {
- dev_priv->sarea = dev->maplist[i];
- break;
- }
- }
-
- DO_FIND_MAP( dev_priv->fb, init->fb_offset );
- DO_FIND_MAP( dev_priv->mmio, init->mmio_offset );
- DO_FIND_MAP( dev_priv->cce_ring, init->ring_offset );
- DO_FIND_MAP( dev_priv->ring_rptr, init->ring_rptr_offset );
- DO_FIND_MAP( dev_priv->buffers, init->buffers_offset );
+ list_for_each(list, &dev->maplist->head) {
+ drm_map_list_t *r_list = (drm_map_list_t *)list;
+ if( r_list->map &&
+ r_list->map->type == _DRM_SHM &&
+ r_list->map->flags & _DRM_CONTAINS_LOCK ) {
+ dev_priv->sarea = r_list->map;
+ break;
+ }
+ }
+
+ DRM_FIND_MAP( dev_priv->fb, init->fb_offset );
+ DRM_FIND_MAP( dev_priv->mmio, init->mmio_offset );
+ DRM_FIND_MAP( dev_priv->cce_ring, init->ring_offset );
+ DRM_FIND_MAP( dev_priv->ring_rptr, init->ring_rptr_offset );
+ DRM_FIND_MAP( dev_priv->buffers, init->buffers_offset );
if ( !dev_priv->is_pci ) {
- DO_FIND_MAP( dev_priv->agp_textures,
- init->agp_textures_offset );
+ DRM_FIND_MAP( dev_priv->agp_textures,
+ init->agp_textures_offset );
}
dev_priv->sarea_priv =
(drm_r128_sarea_t *)((u8 *)dev_priv->sarea->handle +
init->sarea_priv_offset);
- DO_IOREMAP( dev_priv->cce_ring );
- DO_IOREMAP( dev_priv->ring_rptr );
- DO_IOREMAP( dev_priv->buffers );
-#if 0
- if ( !dev_priv->is_pci ) {
- DO_IOREMAP( dev_priv->agp_textures );
- }
-#endif
+ DRM_IOREMAP( dev_priv->cce_ring );
+ DRM_IOREMAP( dev_priv->ring_rptr );
+ DRM_IOREMAP( dev_priv->buffers );
dev_priv->ring.head = ((__volatile__ u32 *)
dev_priv->ring_rptr->handle);
@@ -495,11 +487,13 @@ static int r128_do_init_cce( drm_device_t *dev, drm_r128_init_t *init )
dev_priv->ring.end = ((u32 *)dev_priv->cce_ring->handle
+ init->ring_size / sizeof(u32));
dev_priv->ring.size = init->ring_size;
- dev_priv->ring.size_l2qw = drm_order( init->ring_size / 8 );
+ dev_priv->ring.size_l2qw = DRM(order)( init->ring_size / 8 );
dev_priv->ring.tail_mask =
(dev_priv->ring.size / sizeof(u32)) - 1;
+ dev_priv->ring.high_mark = 128;
+
dev_priv->sarea_priv->last_frame = 0;
R128_WRITE( R128_LAST_FRAME_REG, dev_priv->sarea_priv->last_frame );
@@ -514,22 +508,17 @@ static int r128_do_init_cce( drm_device_t *dev, drm_r128_init_t *init )
return 0;
}
-static int r128_do_cleanup_cce( drm_device_t *dev )
+int r128_do_cleanup_cce( drm_device_t *dev )
{
if ( dev->dev_private ) {
drm_r128_private_t *dev_priv = dev->dev_private;
- DO_IOREMAPFREE( dev_priv->cce_ring );
- DO_IOREMAPFREE( dev_priv->ring_rptr );
- DO_IOREMAPFREE( dev_priv->buffers );
-#if 0
- if ( !dev_priv->is_pci ) {
- DO_IOREMAPFREE( dev_priv->agp_textures );
- }
-#endif
+ DRM_IOREMAPFREE( dev_priv->cce_ring );
+ DRM_IOREMAPFREE( dev_priv->ring_rptr );
+ DRM_IOREMAPFREE( dev_priv->buffers );
- drm_free( dev->dev_private, sizeof(drm_r128_private_t),
- DRM_MEM_DRIVER );
+ DRM(free)( dev->dev_private, sizeof(drm_r128_private_t),
+ DRM_MEM_DRIVER );
dev->dev_private = NULL;
}
@@ -564,11 +553,8 @@ int r128_cce_start( struct inode *inode, struct file *filp,
drm_r128_private_t *dev_priv = dev->dev_private;
DRM_DEBUG( "%s\n", __FUNCTION__ );
- if ( !_DRM_LOCK_IS_HELD( dev->lock.hw_lock->lock ) ||
- dev->lock.pid != current->pid ) {
- DRM_ERROR( "%s called without lock held\n", __FUNCTION__ );
- return -EINVAL;
- }
+ LOCK_TEST_WITH_RETURN( dev );
+
if ( dev_priv->cce_running || dev_priv->cce_mode == R128_PM4_NONPM4 ) {
DRM_DEBUG( "%s while CCE running\n", __FUNCTION__ );
return 0;
@@ -592,11 +578,7 @@ int r128_cce_stop( struct inode *inode, struct file *filp,
int ret;
DRM_DEBUG( "%s\n", __FUNCTION__ );
- if ( !_DRM_LOCK_IS_HELD( dev->lock.hw_lock->lock ) ||
- dev->lock.pid != current->pid ) {
- DRM_ERROR( "%s called without lock held\n", __FUNCTION__ );
- return -EINVAL;
- }
+ LOCK_TEST_WITH_RETURN( dev );
if ( copy_from_user( &stop, (drm_r128_init_t *)arg, sizeof(stop) ) )
return -EFAULT;
@@ -638,11 +620,8 @@ int r128_cce_reset( struct inode *inode, struct file *filp,
drm_r128_private_t *dev_priv = dev->dev_private;
DRM_DEBUG( "%s\n", __FUNCTION__ );
- if ( !_DRM_LOCK_IS_HELD( dev->lock.hw_lock->lock ) ||
- dev->lock.pid != current->pid ) {
- DRM_ERROR( "%s called without lock held\n", __FUNCTION__ );
- return -EINVAL;
- }
+ LOCK_TEST_WITH_RETURN( dev );
+
if ( !dev_priv ) {
DRM_DEBUG( "%s called before init done\n", __FUNCTION__ );
return -EINVAL;
@@ -664,11 +643,7 @@ int r128_cce_idle( struct inode *inode, struct file *filp,
drm_r128_private_t *dev_priv = dev->dev_private;
DRM_DEBUG( "%s\n", __FUNCTION__ );
- if ( !_DRM_LOCK_IS_HELD( dev->lock.hw_lock->lock ) ||
- dev->lock.pid != current->pid ) {
- DRM_ERROR( "%s called without lock held\n", __FUNCTION__ );
- return -EINVAL;
- }
+ LOCK_TEST_WITH_RETURN( dev );
if ( dev_priv->cce_running ) {
r128_do_cce_flush( dev_priv );
@@ -684,11 +659,7 @@ int r128_engine_reset( struct inode *inode, struct file *filp,
drm_device_t *dev = priv->dev;
DRM_DEBUG( "%s\n", __FUNCTION__ );
- if ( !_DRM_LOCK_IS_HELD( dev->lock.hw_lock->lock ) ||
- dev->lock.pid != current->pid ) {
- DRM_ERROR( "%s called without lock held\n", __FUNCTION__ );
- return -EINVAL;
- }
+ LOCK_TEST_WITH_RETURN( dev );
return r128_do_engine_reset( dev );
}
@@ -737,11 +708,7 @@ int r128_fullscreen( struct inode *inode, struct file *filp,
drm_device_t *dev = priv->dev;
drm_r128_fullscreen_t fs;
- if ( !_DRM_LOCK_IS_HELD( dev->lock.hw_lock->lock ) ||
- dev->lock.pid != current->pid ) {
- DRM_ERROR( "%s called without lock held\n", __FUNCTION__ );
- return -EINVAL;
- }
+ LOCK_TEST_WITH_RETURN( dev );
if ( copy_from_user( &fs, (drm_r128_fullscreen_t *)arg, sizeof(fs) ) )
return -EFAULT;
@@ -773,8 +740,8 @@ static int r128_freelist_init( drm_device_t *dev )
drm_r128_freelist_t *entry;
int i;
- dev_priv->head = drm_alloc( sizeof(drm_r128_freelist_t),
- DRM_MEM_DRIVER );
+ dev_priv->head = DRM(alloc)( sizeof(drm_r128_freelist_t),
+ DRM_MEM_DRIVER );
if ( dev_priv->head == NULL )
return -ENOMEM;
@@ -785,8 +752,8 @@ static int r128_freelist_init( drm_device_t *dev )
buf = dma->buflist[i];
buf_priv = buf->dev_private;
- entry = drm_alloc( sizeof(drm_r128_freelist_t),
- DRM_MEM_DRIVER );
+ entry = DRM(alloc)( sizeof(drm_r128_freelist_t),
+ DRM_MEM_DRIVER );
if ( !entry ) return -ENOMEM;
entry->age = R128_BUFFER_FREE;
@@ -872,13 +839,9 @@ int r128_wait_ring( drm_r128_private_t *dev_priv, int n )
int i;
for ( i = 0 ; i < dev_priv->usec_timeout ; i++ ) {
- ring->space = *ring->head - ring->tail;
- if ( ring->space <= 0 )
- ring->space += ring->size;
-
+ r128_update_ring_snapshot( ring );
if ( ring->space >= n )
return 0;
-
udelay( 1 );
}
@@ -887,19 +850,6 @@ int r128_wait_ring( drm_r128_private_t *dev_priv, int n )
return -EBUSY;
}
-void r128_update_ring_snapshot( drm_r128_private_t *dev_priv )
-{
- drm_r128_ring_buffer_t *ring = &dev_priv->ring;
-
- ring->space = *ring->head - ring->tail;
-#if R128_PERFORMANCE_BOXES
- if ( ring->space == 0 )
- atomic_inc( &dev_priv->idle_count );
-#endif
- if ( ring->space <= 0 )
- ring->space += ring->size;
-}
-
static int r128_cce_get_buffers( drm_device_t *dev, drm_dma_t *d )
{
int i;
@@ -932,15 +882,11 @@ int r128_cce_buffers( struct inode *inode, struct file *filp,
int ret = 0;
drm_dma_t d;
+ LOCK_TEST_WITH_RETURN( dev );
+
if ( copy_from_user( &d, (drm_dma_t *) arg, sizeof(d) ) )
return -EFAULT;
- if ( !_DRM_LOCK_IS_HELD( dev->lock.hw_lock->lock ) ||
- dev->lock.pid != current->pid ) {
- DRM_ERROR( "%s called without lock held\n", __FUNCTION__ );
- return -EINVAL;
- }
-
/* Please don't send us buffers.
*/
if ( d.send_count != 0 ) {
diff --git a/linux/r128_drm.h b/linux/r128_drm.h
index 94dba1ed..86aba175 100644
--- a/linux/r128_drm.h
+++ b/linux/r128_drm.h
@@ -25,9 +25,8 @@
* DEALINGS IN THE SOFTWARE.
*
* Authors:
- * Kevin E. Martin <martin@valinux.com>
* Gareth Hughes <gareth@valinux.com>
- *
+ * Kevin E. Martin <martin@valinux.com>
*/
#ifndef __R128_DRM_H__
@@ -142,12 +141,6 @@ typedef struct {
} drm_r128_texture_regs_t;
-typedef struct drm_tex_region {
- unsigned char next, prev;
- unsigned char in_use;
- int age;
-} drm_tex_region_t;
-
typedef struct drm_r128_sarea {
/* The channel for communication of state information to the kernel
* on firing a vertex buffer.
@@ -218,9 +211,10 @@ typedef struct drm_r128_fullscreen {
typedef struct drm_r128_clear {
unsigned int flags;
- int x, y, w, h;
unsigned int clear_color;
unsigned int clear_depth;
+ unsigned int color_mask;
+ unsigned int depth_mask;
} drm_r128_clear_t;
typedef struct drm_r128_vertex {
diff --git a/linux/r128_drv.c b/linux/r128_drv.c
index cf258925..daae0f87 100644
--- a/linux/r128_drv.c
+++ b/linux/r128_drv.c
@@ -1,7 +1,7 @@
/* r128_drv.c -- ATI Rage 128 driver -*- linux-c -*-
* Created: Mon Dec 13 09:47:27 1999 by faith@precisioninsight.com
*
- * Copyright 1999, 2000 Precision Insight, Inc., Cedar Park, Texas.
+ * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
* Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
* All Rights Reserved.
*
@@ -19,693 +19,72 @@
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
- * DEALINGS IN THE SOFTWARE.
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
*
* Authors:
* Rickard E. (Rik) Faith <faith@valinux.com>
- * Kevin E. Martin <martin@valinux.com>
* Gareth Hughes <gareth@valinux.com>
- *
*/
#include <linux/config.h>
+#include "r128.h"
#include "drmP.h"
#include "r128_drv.h"
-#define R128_NAME "r128"
-#define R128_DESC "ATI Rage 128"
-#define R128_DATE "20010101"
-#define R128_MAJOR 2
-#define R128_MINOR 1
-#define R128_PATCHLEVEL 4
-
-static drm_device_t r128_device;
-drm_ctx_t r128_res_ctx;
-
-static struct file_operations r128_fops = {
-#if LINUX_VERSION_CODE >= 0x020400
- /* This started being used during 2.4.0-test */
- owner: THIS_MODULE,
-#endif
- open: r128_open,
- flush: drm_flush,
- release: r128_release,
- ioctl: r128_ioctl,
- mmap: drm_mmap,
- read: drm_read,
- fasync: drm_fasync,
- poll: drm_poll,
-};
-
-static struct miscdevice r128_misc = {
- minor: MISC_DYNAMIC_MINOR,
- name: R128_NAME,
- fops: &r128_fops,
-};
-
-static drm_ioctl_desc_t r128_ioctls[] = {
- [DRM_IOCTL_NR(DRM_IOCTL_VERSION)] = { r128_version, 0, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_GET_UNIQUE)] = { drm_getunique, 0, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_GET_MAGIC)] = { drm_getmagic, 0, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_IRQ_BUSID)] = { drm_irq_busid, 0, 1 },
-
- [DRM_IOCTL_NR(DRM_IOCTL_SET_UNIQUE)] = { drm_setunique, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_BLOCK)] = { drm_block, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_UNBLOCK)] = { drm_unblock, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_AUTH_MAGIC)] = { drm_authmagic, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_ADD_MAP)] = { drm_addmap, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_ADD_BUFS)] = { r128_addbufs, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_MARK_BUFS)] = { drm_markbufs, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_INFO_BUFS)] = { drm_infobufs, 1, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_MAP_BUFS)] = { r128_mapbufs, 1, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_FREE_BUFS)] = { drm_freebufs, 1, 0 },
-
- [DRM_IOCTL_NR(DRM_IOCTL_ADD_CTX)] = { r128_addctx, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_RM_CTX)] = { r128_rmctx, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_MOD_CTX)] = { r128_modctx, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_GET_CTX)] = { r128_getctx, 1, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_SWITCH_CTX)] = { r128_switchctx, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_NEW_CTX)] = { r128_newctx, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_RES_CTX)] = { r128_resctx, 1, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_ADD_DRAW)] = { drm_adddraw, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_RM_DRAW)] = { drm_rmdraw, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_DMA)] = { r128_cce_buffers, 1, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_LOCK)] = { r128_lock, 1, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_UNLOCK)] = { r128_unlock, 1, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_FINISH)] = { drm_finish, 1, 0 },
-
-#if defined(CONFIG_AGP) || defined(CONFIG_AGP_MODULE)
- [DRM_IOCTL_NR(DRM_IOCTL_AGP_ACQUIRE)] = { drm_agp_acquire, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_AGP_RELEASE)] = { drm_agp_release, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_AGP_ENABLE)] = { drm_agp_enable, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_AGP_INFO)] = { drm_agp_info, 1, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_AGP_ALLOC)] = { drm_agp_alloc, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_AGP_FREE)] = { drm_agp_free, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_AGP_BIND)] = { drm_agp_bind, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_AGP_UNBIND)] = { drm_agp_unbind, 1, 1 },
-#endif
-
- [DRM_IOCTL_NR(DRM_IOCTL_R128_INIT)] = { r128_cce_init, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_R128_CCE_START)] = { r128_cce_start, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_R128_CCE_STOP)] = { r128_cce_stop, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_R128_CCE_RESET)] = { r128_cce_reset, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_R128_CCE_IDLE)] = { r128_cce_idle, 1, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_R128_RESET)] = { r128_engine_reset, 1, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_R128_FULLSCREEN)]= { r128_fullscreen, 1, 0 },
-
- [DRM_IOCTL_NR(DRM_IOCTL_R128_SWAP)] = { r128_cce_swap, 1, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_R128_CLEAR)] = { r128_cce_clear, 1, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_R128_VERTEX)] = { r128_cce_vertex, 1, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_R128_INDICES)] = { r128_cce_indices, 1, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_R128_BLIT)] = { r128_cce_blit, 1, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_R128_DEPTH)] = { r128_cce_depth, 1, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_R128_STIPPLE)] = { r128_cce_stipple, 1, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_R128_INDIRECT)] = { r128_cce_indirect, 1, 1 },
-};
-#define R128_IOCTL_COUNT DRM_ARRAY_SIZE(r128_ioctls)
-
-#ifdef MODULE
-static char *r128 = NULL;
-#endif
-
-MODULE_AUTHOR("VA Linux Systems, Inc.");
-MODULE_DESCRIPTION("r128");
-MODULE_PARM(r128, "s");
-
-#ifndef MODULE
-/* r128_options is called by the kernel to parse command-line options
- * passed via the boot-loader (e.g., LILO). It calls the insmod option
- * routine, drm_parse_drm.
- */
-
-static int __init r128_options(char *str)
-{
- drm_parse_options(str);
- return 1;
-}
-
-__setup("r128=", r128_options);
-#endif
-
-static int r128_setup(drm_device_t *dev)
-{
- int i;
-
- atomic_set(&dev->ioctl_count, 0);
- atomic_set(&dev->vma_count, 0);
- dev->buf_use = 0;
- atomic_set(&dev->buf_alloc, 0);
-
- drm_dma_setup(dev);
-
- atomic_set(&dev->total_open, 0);
- atomic_set(&dev->total_close, 0);
- atomic_set(&dev->total_ioctl, 0);
- atomic_set(&dev->total_irq, 0);
- atomic_set(&dev->total_ctx, 0);
- atomic_set(&dev->total_locks, 0);
- atomic_set(&dev->total_unlocks, 0);
- atomic_set(&dev->total_contends, 0);
- atomic_set(&dev->total_sleeps, 0);
-
- for (i = 0; i < DRM_HASH_SIZE; i++) {
- dev->magiclist[i].head = NULL;
- dev->magiclist[i].tail = NULL;
- }
- dev->maplist = NULL;
- dev->map_count = 0;
- dev->vmalist = NULL;
- dev->lock.hw_lock = NULL;
- init_waitqueue_head(&dev->lock.lock_queue);
- dev->queue_count = 0;
- dev->queue_reserved = 0;
- dev->queue_slots = 0;
- dev->queuelist = NULL;
- dev->irq = 0;
- dev->context_flag = 0;
- dev->interrupt_flag = 0;
- dev->dma_flag = 0;
- dev->last_context = 0;
- dev->last_switch = 0;
- dev->last_checked = 0;
- init_timer(&dev->timer);
- init_waitqueue_head(&dev->context_wait);
-
- dev->ctx_start = 0;
- dev->lck_start = 0;
-
- dev->buf_rp = dev->buf;
- dev->buf_wp = dev->buf;
- dev->buf_end = dev->buf + DRM_BSZ;
- dev->buf_async = NULL;
- init_waitqueue_head(&dev->buf_readers);
- init_waitqueue_head(&dev->buf_writers);
-
- r128_res_ctx.handle=-1;
-
- DRM_DEBUG("\n");
-
- /* The kernel's context could be created here, but is now created
- in drm_dma_enqueue. This is more resource-efficient for
- hardware that does not do DMA, but may mean that
- drm_select_queue fails between the time the interrupt is
- initialized and the time the queues are initialized. */
-
- return 0;
-}
-
-
-static int r128_takedown(drm_device_t *dev)
-{
- int i;
- drm_magic_entry_t *pt, *next;
- drm_map_t *map;
- drm_vma_entry_t *vma, *vma_next;
-
- DRM_DEBUG("\n");
-
- down(&dev->struct_sem);
- del_timer(&dev->timer);
-
- if (dev->devname) {
- drm_free(dev->devname, strlen(dev->devname)+1, DRM_MEM_DRIVER);
- dev->devname = NULL;
- }
-
- if (dev->unique) {
- drm_free(dev->unique, strlen(dev->unique)+1, DRM_MEM_DRIVER);
- dev->unique = NULL;
- dev->unique_len = 0;
- }
- /* Clear pid list */
- for (i = 0; i < DRM_HASH_SIZE; i++) {
- for (pt = dev->magiclist[i].head; pt; pt = next) {
- next = pt->next;
- drm_free(pt, sizeof(*pt), DRM_MEM_MAGIC);
- }
- dev->magiclist[i].head = dev->magiclist[i].tail = NULL;
- }
-
-#if defined(CONFIG_AGP) || defined(CONFIG_AGP_MODULE)
- /* Clear AGP information */
- if (dev->agp) {
- drm_agp_mem_t *entry;
- drm_agp_mem_t *nexte;
-
- /* Remove AGP resources, but leave dev->agp
- intact until r128_cleanup is called. */
- for (entry = dev->agp->memory; entry; entry = nexte) {
- nexte = entry->next;
- if (entry->bound) drm_unbind_agp(entry->memory);
- drm_free_agp(entry->memory, entry->pages);
- drm_free(entry, sizeof(*entry), DRM_MEM_AGPLISTS);
- }
- dev->agp->memory = NULL;
-
- if (dev->agp->acquired) _drm_agp_release();
-
- dev->agp->acquired = 0;
- dev->agp->enabled = 0;
- }
-#endif
-
- /* Clear vma list (only built for debugging) */
- if (dev->vmalist) {
- for (vma = dev->vmalist; vma; vma = vma_next) {
- vma_next = vma->next;
- drm_free(vma, sizeof(*vma), DRM_MEM_VMAS);
- }
- dev->vmalist = NULL;
- }
-
- /* Clear map area and mtrr information */
- if (dev->maplist) {
- for (i = 0; i < dev->map_count; i++) {
- map = dev->maplist[i];
- switch (map->type) {
- case _DRM_REGISTERS:
- case _DRM_FRAME_BUFFER:
-#ifdef CONFIG_MTRR
- if (map->mtrr >= 0) {
- int retcode;
- retcode = mtrr_del(map->mtrr,
- map->offset,
- map->size);
- DRM_DEBUG("mtrr_del = %d\n", retcode);
- }
-#endif
- drm_ioremapfree(map->handle, map->size);
- break;
- case _DRM_SHM:
- drm_free_pages((unsigned long)map->handle,
- drm_order(map->size)
- - PAGE_SHIFT,
- DRM_MEM_SAREA);
- break;
- case _DRM_AGP:
- /* Do nothing here, because this is all
- handled in the AGP/GART driver. */
- break;
- }
- drm_free(map, sizeof(*map), DRM_MEM_MAPS);
- }
- drm_free(dev->maplist,
- dev->map_count * sizeof(*dev->maplist),
- DRM_MEM_MAPS);
- dev->maplist = NULL;
- dev->map_count = 0;
- }
-
- drm_dma_takedown(dev);
-
- dev->queue_count = 0;
- if (dev->lock.hw_lock) {
- dev->lock.hw_lock = NULL; /* SHM removed */
- dev->lock.pid = 0;
- wake_up_interruptible(&dev->lock.lock_queue);
- }
- up(&dev->struct_sem);
-
- return 0;
-}
-
-/* r128_init is called via init_module at module load time, or via
- * linux/init/main.c (this is not currently supported). */
-
-static int __init r128_init(void)
-{
- int retcode;
- drm_device_t *dev = &r128_device;
-
- DRM_DEBUG("\n");
-
- memset((void *)dev, 0, sizeof(*dev));
- dev->count_lock = SPIN_LOCK_UNLOCKED;
- sema_init(&dev->struct_sem, 1);
-
-#ifdef MODULE
- drm_parse_options(r128);
-#endif
-
- if ((retcode = misc_register(&r128_misc))) {
- DRM_ERROR("Cannot register \"%s\"\n", R128_NAME);
- return retcode;
- }
- dev->device = MKDEV(MISC_MAJOR, r128_misc.minor);
- dev->name = R128_NAME;
-
- drm_mem_init();
- drm_proc_init(dev);
-
-#if defined(CONFIG_AGP) || defined(CONFIG_AGP_MODULE)
- dev->agp = drm_agp_init();
- if (dev->agp == NULL) {
- DRM_ERROR("Cannot initialize agpgart module.\n");
- drm_proc_cleanup();
- misc_deregister(&r128_misc);
- r128_takedown(dev);
- return -ENOMEM;
- }
-
-#ifdef CONFIG_MTRR
- dev->agp->agp_mtrr = mtrr_add(dev->agp->agp_info.aper_base,
- dev->agp->agp_info.aper_size*1024*1024,
- MTRR_TYPE_WRCOMB,
- 1);
-#endif
-#endif
-
- if((retcode = drm_ctxbitmap_init(dev))) {
- DRM_ERROR("Cannot allocate memory for context bitmap.\n");
- drm_proc_cleanup();
- misc_deregister(&r128_misc);
- r128_takedown(dev);
- return retcode;
- }
-
- DRM_INFO("Initialized %s %d.%d.%d %s on minor %d\n",
- R128_NAME,
- R128_MAJOR,
- R128_MINOR,
- R128_PATCHLEVEL,
- R128_DATE,
- r128_misc.minor);
-
- return 0;
-}
-
-/* r128_cleanup is called via cleanup_module at module unload time. */
-
-static void __exit r128_cleanup(void)
-{
- drm_device_t *dev = &r128_device;
-
- DRM_DEBUG("\n");
-
- drm_proc_cleanup();
- if (misc_deregister(&r128_misc)) {
- DRM_ERROR("Cannot unload module\n");
- } else {
- DRM_INFO("Module unloaded\n");
- }
- drm_ctxbitmap_cleanup(dev);
- r128_takedown(dev);
-#if defined(CONFIG_AGP) || defined(CONFIG_AGP_MODULE)
- if (dev->agp) {
- drm_agp_uninit();
- drm_free(dev->agp, sizeof(*dev->agp), DRM_MEM_AGPLISTS);
- dev->agp = NULL;
- }
-#endif
-}
-
-module_init(r128_init);
-module_exit(r128_cleanup);
-
-
-int r128_version(struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg)
-{
- drm_version_t version;
- int len;
-
- if (copy_from_user(&version,
- (drm_version_t *)arg,
- sizeof(version)))
- return -EFAULT;
-
-#define DRM_COPY(name,value) \
- len = strlen(value); \
- if (len > name##_len) len = name##_len; \
- name##_len = strlen(value); \
- if (len && name) { \
- if (copy_to_user(name, value, len)) \
- return -EFAULT; \
- }
-
- version.version_major = R128_MAJOR;
- version.version_minor = R128_MINOR;
- version.version_patchlevel = R128_PATCHLEVEL;
-
- DRM_COPY(version.name, R128_NAME);
- DRM_COPY(version.date, R128_DATE);
- DRM_COPY(version.desc, R128_DESC);
-
- if (copy_to_user((drm_version_t *)arg,
- &version,
- sizeof(version)))
- return -EFAULT;
- return 0;
-}
-
-int r128_open(struct inode *inode, struct file *filp)
-{
- drm_device_t *dev = &r128_device;
- int retcode = 0;
-
- DRM_DEBUG("open_count = %d\n", dev->open_count);
- if (!(retcode = drm_open_helper(inode, filp, dev))) {
-#if LINUX_VERSION_CODE < 0x020333
- MOD_INC_USE_COUNT; /* Needed before Linux 2.3.51 */
-#endif
- atomic_inc(&dev->total_open);
- spin_lock(&dev->count_lock);
- if (!dev->open_count++) {
- spin_unlock(&dev->count_lock);
- return r128_setup(dev);
- }
- spin_unlock(&dev->count_lock);
- }
-
- return retcode;
-}
-
-int r128_release(struct inode *inode, struct file *filp)
-{
- drm_file_t *priv = filp->private_data;
- drm_device_t *dev;
- int retcode = 0;
-
- lock_kernel();
- dev = priv->dev;
-
- DRM_DEBUG("open_count = %d\n", dev->open_count);
-
- /* Force the cleanup of page flipping when required */
- if ( dev->dev_private ) {
- drm_r128_private_t *dev_priv = dev->dev_private;
- if ( dev_priv->page_flipping ) {
- r128_do_cleanup_pageflip( dev );
- }
- }
-
- if (!(retcode = drm_release(inode, filp))) {
-#if LINUX_VERSION_CODE < 0x020333
- MOD_DEC_USE_COUNT; /* Needed before Linux 2.3.51 */
-#endif
- atomic_inc(&dev->total_close);
- spin_lock(&dev->count_lock);
- if (!--dev->open_count) {
- if (atomic_read(&dev->ioctl_count) || dev->blocked) {
- DRM_ERROR("Device busy: %d %d\n",
- atomic_read(&dev->ioctl_count),
- dev->blocked);
- spin_unlock(&dev->count_lock);
- unlock_kernel();
- return -EBUSY;
- }
- spin_unlock(&dev->count_lock);
- unlock_kernel();
- return r128_takedown(dev);
- }
- spin_unlock(&dev->count_lock);
- }
-
- unlock_kernel();
- return retcode;
-}
-
-/* r128_ioctl is called whenever a process performs an ioctl on /dev/drm. */
-int r128_ioctl(struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg)
-{
- int nr = DRM_IOCTL_NR(cmd);
- drm_file_t *priv = filp->private_data;
- drm_device_t *dev = priv->dev;
- int retcode = 0;
- drm_ioctl_desc_t *ioctl;
- drm_ioctl_t *func;
-
- atomic_inc(&dev->ioctl_count);
- atomic_inc(&dev->total_ioctl);
- ++priv->ioctl_count;
+#define DRIVER_AUTHOR "Gareth Hughes, VA Linux Systems Inc."
+
+#define DRIVER_NAME "r128"
+#define DRIVER_DESC "ATI Rage 128"
+#define DRIVER_DATE "20010308"
+
+#define DRIVER_MAJOR 2
+#define DRIVER_MINOR 1
+#define DRIVER_PATCHLEVEL 5
+
+#define DRIVER_IOCTLS \
+ [DRM_IOCTL_NR(DRM_IOCTL_DMA)] = { r128_cce_buffers, 1, 0 }, \
+ [DRM_IOCTL_NR(DRM_IOCTL_R128_INIT)] = { r128_cce_init, 1, 1 }, \
+ [DRM_IOCTL_NR(DRM_IOCTL_R128_CCE_START)] = { r128_cce_start, 1, 1 }, \
+ [DRM_IOCTL_NR(DRM_IOCTL_R128_CCE_STOP)] = { r128_cce_stop, 1, 1 }, \
+ [DRM_IOCTL_NR(DRM_IOCTL_R128_CCE_RESET)] = { r128_cce_reset, 1, 1 }, \
+ [DRM_IOCTL_NR(DRM_IOCTL_R128_CCE_IDLE)] = { r128_cce_idle, 1, 0 }, \
+ [DRM_IOCTL_NR(DRM_IOCTL_R128_RESET)] = { r128_engine_reset, 1, 0 }, \
+ [DRM_IOCTL_NR(DRM_IOCTL_R128_FULLSCREEN)] = { r128_fullscreen, 1, 0 }, \
+ [DRM_IOCTL_NR(DRM_IOCTL_R128_SWAP)] = { r128_cce_swap, 1, 0 }, \
+ [DRM_IOCTL_NR(DRM_IOCTL_R128_CLEAR)] = { r128_cce_clear, 1, 0 }, \
+ [DRM_IOCTL_NR(DRM_IOCTL_R128_VERTEX)] = { r128_cce_vertex, 1, 0 }, \
+ [DRM_IOCTL_NR(DRM_IOCTL_R128_INDICES)] = { r128_cce_indices, 1, 0 }, \
+ [DRM_IOCTL_NR(DRM_IOCTL_R128_BLIT)] = { r128_cce_blit, 1, 0 }, \
+ [DRM_IOCTL_NR(DRM_IOCTL_R128_DEPTH)] = { r128_cce_depth, 1, 0 }, \
+ [DRM_IOCTL_NR(DRM_IOCTL_R128_STIPPLE)] = { r128_cce_stipple, 1, 0 }, \
+ [DRM_IOCTL_NR(DRM_IOCTL_R128_INDIRECT)] = { r128_cce_indirect, 1, 1 },
- DRM_DEBUG("pid = %d, cmd = 0x%02x, nr = 0x%02x, dev 0x%x, auth = %d\n",
- current->pid, cmd, nr, dev->device, priv->authenticated);
- if (nr >= R128_IOCTL_COUNT) {
- retcode = -EINVAL;
- } else {
- ioctl = &r128_ioctls[nr];
- func = ioctl->func;
-
- if (!func) {
- DRM_DEBUG("no function\n");
- retcode = -EINVAL;
- } else if ((ioctl->root_only && !capable(CAP_SYS_ADMIN))
- || (ioctl->auth_needed && !priv->authenticated)) {
- retcode = -EACCES;
- } else {
- retcode = (func)(inode, filp, cmd, arg);
- }
- }
-
-#if 0
- if ( retcode ) {
- DRM_INFO( "%s 0x%x ret = %d\n", __FUNCTION__, nr, retcode );
- }
-#endif
-
- atomic_dec(&dev->ioctl_count);
- return retcode;
-}
-
-int r128_lock(struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg)
-{
- drm_file_t *priv = filp->private_data;
- drm_device_t *dev = priv->dev;
- DECLARE_WAITQUEUE(entry, current);
- int ret = 0;
- drm_lock_t lock;
-#if DRM_DMA_HISTOGRAM
- cycles_t start;
-
- dev->lck_start = start = get_cycles();
-#endif
-
- if (copy_from_user(&lock, (drm_lock_t *)arg, sizeof(lock)))
- return -EFAULT;
-
- if (lock.context == DRM_KERNEL_CONTEXT) {
- DRM_ERROR("Process %d using kernel context %d\n",
- current->pid, lock.context);
- return -EINVAL;
- }
-
- DRM_DEBUG("%d (pid %d) requests lock (0x%08x), flags = 0x%08x\n",
- lock.context, current->pid, dev->lock.hw_lock->lock,
- lock.flags);
-
- if (lock.context < 0)
- return -EINVAL;
-
- if (!ret) {
- add_wait_queue(&dev->lock.lock_queue, &entry);
- for (;;) {
- current->state = TASK_INTERRUPTIBLE;
- if (!dev->lock.hw_lock) {
- /* Device has been unregistered */
- ret = -EINTR;
- break;
- }
- if (drm_lock_take(&dev->lock.hw_lock->lock,
- lock.context)) {
- dev->lock.pid = current->pid;
- dev->lock.lock_time = jiffies;
- atomic_inc(&dev->total_locks);
- break; /* Got lock */
- }
-
- /* Contention */
- atomic_inc(&dev->total_sleeps);
- schedule();
- if (signal_pending(current)) {
- ret = -ERESTARTSYS;
- break;
- }
- }
- current->state = TASK_RUNNING;
- remove_wait_queue(&dev->lock.lock_queue, &entry);
- }
-
- if (!ret) {
- sigemptyset(&dev->sigmask);
- sigaddset(&dev->sigmask, SIGSTOP);
- sigaddset(&dev->sigmask, SIGTSTP);
- sigaddset(&dev->sigmask, SIGTTIN);
- sigaddset(&dev->sigmask, SIGTTOU);
- dev->sigdata.context = lock.context;
- dev->sigdata.lock = dev->lock.hw_lock;
- block_all_signals(drm_notifier, &dev->sigdata, &dev->sigmask);
- if (lock.flags & _DRM_LOCK_READY) {
- /* Wait for space in DMA/FIFO */
- }
- if (lock.flags & _DRM_LOCK_QUIESCENT) {
- /* Make hardware quiescent */
- DRM_DEBUG( "not quiescent!\n" );
#if 0
- r128_quiescent(dev);
-#endif
- }
- }
-
-#if LINUX_VERSION_CODE < 0x020400
- if (lock.context != r128_res_ctx.handle) {
- current->counter = 5;
- current->priority = DEF_PRIORITY/4;
- }
-#endif
- DRM_DEBUG("%d %s\n", lock.context, ret ? "interrupted" : "has lock");
-
-#if DRM_DMA_HISTOGRAM
- atomic_inc(&dev->histo.lacq[drm_histogram_slot(get_cycles() - start)]);
-#endif
-
- return ret;
-}
-
-
-int r128_unlock(struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg)
-{
- drm_file_t *priv = filp->private_data;
- drm_device_t *dev = priv->dev;
- drm_lock_t lock;
-
- if (copy_from_user(&lock, (drm_lock_t *)arg, sizeof(lock)))
- return -EFAULT;
-
- if (lock.context == DRM_KERNEL_CONTEXT) {
- DRM_ERROR("Process %d using kernel context %d\n",
- current->pid, lock.context);
- return -EINVAL;
- }
-
- DRM_DEBUG("%d frees lock (%d holds)\n",
- lock.context,
- _DRM_LOCKING_CONTEXT(dev->lock.hw_lock->lock));
- atomic_inc(&dev->total_unlocks);
- if (_DRM_LOCK_IS_CONT(dev->lock.hw_lock->lock))
- atomic_inc(&dev->total_contends);
- drm_lock_transfer(dev, &dev->lock.hw_lock->lock, DRM_KERNEL_CONTEXT);
- /* FIXME: Try to send data to card here */
- if (!dev->context_flag) {
- if (drm_lock_free(dev, &dev->lock.hw_lock->lock,
- DRM_KERNEL_CONTEXT)) {
- DRM_ERROR("\n");
- }
- }
-
-#if LINUX_VERSION_CODE < 0x020400
- if (lock.context != r128_res_ctx.handle) {
- current->counter = 5;
- current->priority = DEF_PRIORITY;
- }
-#endif
- unblock_all_signals();
- return 0;
-}
+/* GH: Count data sent to card via ring or vertex/indirect buffers.
+ */
+#define __HAVE_COUNTERS 3
+#define __HAVE_COUNTER6 _DRM_STAT_IRQ
+#define __HAVE_COUNTER7 _DRM_STAT_PRIMARY
+#define __HAVE_COUNTER8 _DRM_STAT_SECONDARY
+#endif
+
+
+#include "drm_agpsupport.h"
+#include "drm_auth.h"
+#include "drm_bufs.h"
+#include "drm_context.h"
+#include "drm_dma.h"
+#include "drm_drawable.h"
+#include "drm_drv.h"
+#include "drm_fops.h"
+#include "drm_init.h"
+#include "drm_ioctl.h"
+#include "drm_lock.h"
+#include "drm_memory.h"
+#include "drm_proc.h"
+#include "drm_vm.h"
+#include "drm_stub.h"
diff --git a/linux/r128_drv.h b/linux/r128_drv.h
index 08ef5dc9..6216b9a1 100644
--- a/linux/r128_drv.h
+++ b/linux/r128_drv.h
@@ -25,10 +25,9 @@
* DEALINGS IN THE SOFTWARE.
*
* Authors:
- * Rickard E. (Rik) Faith <faith@valinux.com>
- * Kevin E. Martin <martin@valinux.com>
- * Gareth Hughes <gareth@valinux.com>
- *
+ * Rickard E. (Rik) Faith <faith@valinux.com>
+ * Kevin E. Martin <martin@valinux.com>
+ * Gareth Hughes <gareth@valinux.com>
*/
#ifndef __R128_DRV_H__
@@ -51,6 +50,8 @@ typedef struct drm_r128_ring_buffer {
u32 tail;
u32 tail_mask;
int space;
+
+ int high_mark;
} drm_r128_ring_buffer_t;
typedef struct drm_r128_private {
@@ -74,13 +75,13 @@ typedef struct drm_r128_private {
u32 crtc_offset;
u32 crtc_offset_cntl;
- unsigned int fb_bpp;
+ u32 color_fmt;
unsigned int front_offset;
unsigned int front_pitch;
unsigned int back_offset;
unsigned int back_pitch;
- unsigned int depth_bpp;
+ u32 depth_fmt;
unsigned int depth_offset;
unsigned int depth_pitch;
unsigned int span_offset;
@@ -107,18 +108,6 @@ typedef struct drm_r128_buf_priv {
drm_r128_freelist_t *list_entry;
} drm_r128_buf_priv_t;
- /* r128_drv.c */
-extern int r128_version( struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg );
-extern int r128_open( struct inode *inode, struct file *filp );
-extern int r128_release( struct inode *inode, struct file *filp );
-extern int r128_ioctl( struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg );
-extern int r128_lock( struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg );
-extern int r128_unlock( struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg );
-
/* r128_cce.c */
extern int r128_cce_init( struct inode *inode, struct file *filp,
unsigned int cmd, unsigned long arg );
@@ -141,8 +130,17 @@ extern void r128_freelist_reset( drm_device_t *dev );
extern drm_buf_t *r128_freelist_get( drm_device_t *dev );
extern int r128_wait_ring( drm_r128_private_t *dev_priv, int n );
-extern void r128_update_ring_snapshot( drm_r128_private_t *dev_priv );
+static inline void
+r128_update_ring_snapshot( drm_r128_ring_buffer_t *ring )
+{
+ ring->space = (*(volatile int *)ring->head - ring->tail) * sizeof(u32);
+ if ( ring->space <= 0 )
+ ring->space += ring->size;
+}
+
+extern int r128_do_cce_idle( drm_r128_private_t *dev_priv );
+extern int r128_do_cleanup_cce( drm_device_t *dev );
extern int r128_do_cleanup_pageflip( drm_device_t *dev );
/* r128_state.c */
@@ -163,31 +161,6 @@ extern int r128_cce_stipple( struct inode *inode, struct file *filp,
extern int r128_cce_indirect( struct inode *inode, struct file *filp,
unsigned int cmd, unsigned long arg );
- /* r128_bufs.c */
-extern int r128_addbufs(struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg);
-extern int r128_mapbufs(struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg);
-
- /* r128_context.c */
-extern int r128_resctx(struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg);
-extern int r128_addctx(struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg);
-extern int r128_modctx(struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg);
-extern int r128_getctx(struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg);
-extern int r128_switchctx(struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg);
-extern int r128_newctx(struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg);
-extern int r128_rmctx(struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg);
-
-extern int r128_context_switch(drm_device_t *dev, int old, int new);
-extern int r128_context_switch_complete(drm_device_t *dev, int new);
-
/* Register definitions, register access macros and drmAddMap constants
* for Rage 128 kernel driver.
@@ -286,6 +259,8 @@ extern int r128_context_switch_complete(drm_device_t *dev, int new);
#define R128_TEX_CNTL_C 0x1c9c
# define R128_TEX_CACHE_FLUSH (1 << 23)
+#define R128_WAIT_UNTIL 0x1720
+# define R128_EVENT_CRTC_OFFSET (1 << 0)
#define R128_WINDOW_XY_OFFSET 0x1bcc
@@ -386,25 +361,29 @@ extern int r128_context_switch_complete(drm_device_t *dev, int new);
#define R128_WATERMARK_N 8
#define R128_WATERMARK_K 128
-#define R128_MAX_USEC_TIMEOUT 100000 /* 100 ms */
+#define R128_MAX_USEC_TIMEOUT 100000 /* 100 ms */
#define R128_LAST_FRAME_REG R128_GUI_SCRATCH_REG0
#define R128_LAST_DISPATCH_REG R128_GUI_SCRATCH_REG1
#define R128_MAX_VB_AGE 0xffffffff
-
#define R128_MAX_VB_VERTS (0xffff)
+#define R128_RING_HIGH_MARK 128
+
+#define R128_PERFORMANCE_BOXES 0
+
#define R128_BASE(reg) ((u32)(dev_priv->mmio->handle))
-#define R128_ADDR(reg) (R128_BASE(reg) + reg)
+#define R128_ADDR(reg) (R128_BASE( reg ) + reg)
-#define R128_DEREF(reg) *(__volatile__ int *)R128_ADDR(reg)
-#define R128_READ(reg) R128_DEREF(reg)
-#define R128_WRITE(reg,val) do { R128_DEREF(reg) = val; } while (0)
+#define R128_DEREF(reg) *(volatile u32 *)R128_ADDR( reg )
+#define R128_READ(reg) R128_DEREF( reg )
+#define R128_WRITE(reg,val) do { R128_DEREF( reg ) = val; } while (0)
+
+#define R128_DEREF8(reg) *(volatile u8 *)R128_ADDR( reg )
+#define R128_READ8(reg) R128_DEREF8( reg )
+#define R128_WRITE8(reg,val) do { R128_DEREF8( reg ) = val; } while (0)
-#define R128_DEREF8(reg) *(__volatile__ char *)R128_ADDR(reg)
-#define R128_READ8(reg) R128_DEREF8(reg)
-#define R128_WRITE8(reg,val) do { R128_DEREF8(reg) = val; } while (0)
#define R128_WRITE_PLL(addr,val) \
do { \
@@ -414,13 +393,6 @@ do { \
extern int R128_READ_PLL(drm_device_t *dev, int addr);
-#define R128CCE0(p,r,n) ((p) | ((n) << 16) | ((r) >> 2))
-#define R128CCE1(p,r1,r2) ((p) | (((r2) >> 2) << 11) | ((r1) >> 2))
-#define R128CCE2(p) ((p))
-#define R128CCE3(p,n) ((p) | ((n) << 16))
-
-
-
#define CCE_PACKET0( reg, n ) (R128_CCE_PACKET0 | \
((n) << 16) | ((reg) >> 2))
@@ -431,19 +403,71 @@ extern int R128_READ_PLL(drm_device_t *dev, int addr);
(pkt) | ((n) << 16))
-#define r128_flush_write_combine() mb()
+/* ================================================================
+ * Misc helper macros
+ */
+
+#define LOCK_TEST_WITH_RETURN( dev ) \
+do { \
+ if ( !_DRM_LOCK_IS_HELD( dev->lock.hw_lock->lock ) || \
+ dev->lock.pid != current->pid ) { \
+ DRM_ERROR( "%s called without lock held\n", \
+ __FUNCTION__ ); \
+ return -EINVAL; \
+ } \
+} while (0)
+
+#define RING_SPACE_TEST_WITH_RETURN( dev_priv ) \
+do { \
+ drm_r128_ring_buffer_t *ring = &dev_priv->ring; int i; \
+ if ( ring->space < ring->high_mark ) { \
+ for ( i = 0 ; i < dev_priv->usec_timeout ; i++ ) { \
+ r128_update_ring_snapshot( ring ); \
+ if ( ring->space >= ring->high_mark ) \
+ goto __ring_space_done; \
+ udelay( 1 ); \
+ } \
+ DRM_ERROR( "ring space check failed!\n" ); \
+ return -EBUSY; \
+ } \
+ __ring_space_done: \
+} while (0)
+
+#define VB_AGE_TEST_WITH_RETURN( dev_priv ) \
+do { \
+ drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv; \
+ if ( sarea_priv->last_dispatch >= R128_MAX_VB_AGE ) { \
+ int __ret = r128_do_cce_idle( dev_priv ); \
+ if ( __ret < 0 ) return __ret; \
+ sarea_priv->last_dispatch = 0; \
+ r128_freelist_reset( dev ); \
+ } \
+} while (0)
+
+#define R128_WAIT_UNTIL_PAGE_FLIPPED() do { \
+ OUT_RING( CCE_PACKET0( R128_WAIT_UNTIL, 0 ) ); \
+ OUT_RING( R128_EVENT_CRTC_OFFSET ); \
+} while (0)
+
+
+/* ================================================================
+ * Ring control
+ */
+
+#define r128_flush_write_combine() mb()
#define R128_VERBOSE 0
-#define RING_LOCALS int write; unsigned int tail_mask; volatile u32 *ring;
+#define RING_LOCALS \
+ int write; unsigned int tail_mask; volatile u32 *ring;
#define BEGIN_RING( n ) do { \
if ( R128_VERBOSE ) { \
DRM_INFO( "BEGIN_RING( %d ) in %s\n", \
(n), __FUNCTION__ ); \
} \
- if ( dev_priv->ring.space < (n) * sizeof(u32) ) { \
+ if ( dev_priv->ring.space <= (n) * sizeof(u32) ) { \
r128_wait_ring( dev_priv, (n) * sizeof(u32) ); \
} \
dev_priv->ring.space -= (n) * sizeof(u32); \
@@ -452,11 +476,23 @@ extern int R128_READ_PLL(drm_device_t *dev, int addr);
tail_mask = dev_priv->ring.tail_mask; \
} while (0)
+/* You can set this to zero if you want. If the card locks up, you'll
+ * need to keep this set. It works around a bug in early revs of the
+ * Rage 128 chipset, where the CCE would read 32 dwords past the end of
+ * the ring buffer before wrapping around.
+ */
+#define R128_BROKEN_CCE 1
+
#define ADVANCE_RING() do { \
if ( R128_VERBOSE ) { \
DRM_INFO( "ADVANCE_RING() tail=0x%06x wr=0x%06x\n", \
write, dev_priv->ring.tail ); \
} \
+ if ( R128_BROKEN_CCE && write < 32 ) { \
+ memcpy( dev_priv->ring.end, \
+ dev_priv->ring.start, \
+ write * sizeof(u32) ); \
+ } \
r128_flush_write_combine(); \
dev_priv->ring.tail = write; \
R128_WRITE( R128_PM4_BUFFER_DL_WPTR, write ); \
@@ -471,6 +507,4 @@ extern int R128_READ_PLL(drm_device_t *dev, int addr);
write &= tail_mask; \
} while (0)
-#define R128_PERFORMANCE_BOXES 0
-
#endif /* __R128_DRV_H__ */
diff --git a/linux/r128_state.c b/linux/r128_state.c
index ba003929..9fc6b485 100644
--- a/linux/r128_state.c
+++ b/linux/r128_state.c
@@ -25,13 +25,14 @@
*
* Authors:
* Gareth Hughes <gareth@valinux.com>
- *
*/
#define __NO_VERSION__
+#include "r128.h"
#include "drmP.h"
#include "r128_drv.h"
#include "drm.h"
+#include <linux/delay.h>
/* ================================================================
@@ -360,45 +361,18 @@ static void r128_print_dirty( const char *msg, unsigned int flags )
}
static void r128_cce_dispatch_clear( drm_device_t *dev,
- unsigned int flags,
- int cx, int cy, int cw, int ch,
- unsigned int clear_color,
- unsigned int clear_depth )
+ drm_r128_clear_t *clear )
{
drm_r128_private_t *dev_priv = dev->dev_private;
drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv;
int nbox = sarea_priv->nbox;
drm_clip_rect_t *pbox = sarea_priv->boxes;
- u32 fb_bpp, depth_bpp;
+ unsigned int flags = clear->flags;
int i;
RING_LOCALS;
DRM_DEBUG( "%s\n", __FUNCTION__ );
- r128_update_ring_snapshot( dev_priv );
-
- switch ( dev_priv->fb_bpp ) {
- case 16:
- fb_bpp = R128_GMC_DST_16BPP;
- break;
- case 32:
- fb_bpp = R128_GMC_DST_32BPP;
- break;
- default:
- return;
- }
- switch ( dev_priv->depth_bpp ) {
- case 16:
- depth_bpp = R128_GMC_DST_16BPP;
- break;
- case 24:
- case 32:
- depth_bpp = R128_GMC_DST_32BPP;
- break;
- default:
- return;
- }
-
- if ( dev_priv->page_flipping && dev_priv->current_page == 1) {
+ if ( dev_priv->page_flipping && dev_priv->current_page == 1 ) {
unsigned int tmp = flags;
flags &= ~(R128_FRONT | R128_BACK);
@@ -420,7 +394,7 @@ static void r128_cce_dispatch_clear( drm_device_t *dev,
BEGIN_RING( 2 );
OUT_RING( CCE_PACKET0( R128_DP_WRITE_MASK, 0 ) );
- OUT_RING( sarea_priv->context_state.plane_3d_mask_c );
+ OUT_RING( clear->color_mask );
ADVANCE_RING();
}
@@ -431,14 +405,14 @@ static void r128_cce_dispatch_clear( drm_device_t *dev,
OUT_RING( CCE_PACKET3( R128_CNTL_PAINT_MULTI, 4 ) );
OUT_RING( R128_GMC_DST_PITCH_OFFSET_CNTL |
R128_GMC_BRUSH_SOLID_COLOR |
- fb_bpp |
+ (dev_priv->color_fmt << 8) |
R128_GMC_SRC_DATATYPE_COLOR |
R128_ROP3_P |
R128_GMC_CLR_CMP_CNTL_DIS |
R128_GMC_AUX_CLIP_DIS );
OUT_RING( dev_priv->front_pitch_offset_c );
- OUT_RING( clear_color );
+ OUT_RING( clear->clear_color );
OUT_RING( (x << 16) | y );
OUT_RING( (w << 16) | h );
@@ -452,14 +426,14 @@ static void r128_cce_dispatch_clear( drm_device_t *dev,
OUT_RING( CCE_PACKET3( R128_CNTL_PAINT_MULTI, 4 ) );
OUT_RING( R128_GMC_DST_PITCH_OFFSET_CNTL |
R128_GMC_BRUSH_SOLID_COLOR |
- fb_bpp |
+ (dev_priv->color_fmt << 8) |
R128_GMC_SRC_DATATYPE_COLOR |
R128_ROP3_P |
R128_GMC_CLR_CMP_CNTL_DIS |
R128_GMC_AUX_CLIP_DIS );
OUT_RING( dev_priv->back_pitch_offset_c );
- OUT_RING( clear_color );
+ OUT_RING( clear->clear_color );
OUT_RING( (x << 16) | y );
OUT_RING( (w << 16) | h );
@@ -473,7 +447,7 @@ static void r128_cce_dispatch_clear( drm_device_t *dev,
OUT_RING( CCE_PACKET3( R128_CNTL_PAINT_MULTI, 4 ) );
OUT_RING( R128_GMC_DST_PITCH_OFFSET_CNTL |
R128_GMC_BRUSH_SOLID_COLOR |
- depth_bpp |
+ (dev_priv->depth_fmt << 8) |
R128_GMC_SRC_DATATYPE_COLOR |
R128_ROP3_P |
R128_GMC_CLR_CMP_CNTL_DIS |
@@ -481,7 +455,7 @@ static void r128_cce_dispatch_clear( drm_device_t *dev,
R128_GMC_WR_MSK_DIS );
OUT_RING( dev_priv->depth_pitch_offset_c );
- OUT_RING( clear_depth );
+ OUT_RING( clear->clear_depth );
OUT_RING( (x << 16) | y );
OUT_RING( (w << 16) | h );
@@ -497,29 +471,16 @@ static void r128_cce_dispatch_swap( drm_device_t *dev )
drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv;
int nbox = sarea_priv->nbox;
drm_clip_rect_t *pbox = sarea_priv->boxes;
- u32 fb_bpp;
int i;
RING_LOCALS;
DRM_DEBUG( "%s\n", __FUNCTION__ );
- r128_update_ring_snapshot( dev_priv );
-
#if R128_PERFORMANCE_BOXES
/* Do some trivial performance monitoring...
*/
r128_cce_performance_boxes( dev_priv );
#endif
- switch ( dev_priv->fb_bpp ) {
- case 16:
- fb_bpp = R128_GMC_DST_16BPP;
- break;
- case 32:
- default:
- fb_bpp = R128_GMC_DST_32BPP;
- break;
- }
-
for ( i = 0 ; i < nbox ; i++ ) {
int x = pbox[i].x1;
int y = pbox[i].y1;
@@ -532,7 +493,7 @@ static void r128_cce_dispatch_swap( drm_device_t *dev )
OUT_RING( R128_GMC_SRC_PITCH_OFFSET_CNTL |
R128_GMC_DST_PITCH_OFFSET_CNTL |
R128_GMC_BRUSH_NONE |
- fb_bpp |
+ (dev_priv->color_fmt << 8) |
R128_GMC_SRC_DATATYPE_COLOR |
R128_ROP3_S |
R128_DP_SRC_SOURCE_MEMORY |
@@ -570,16 +531,15 @@ static void r128_cce_dispatch_flip( drm_device_t *dev )
RING_LOCALS;
DRM_DEBUG( "%s: page=%d\n", __FUNCTION__, dev_priv->current_page );
- r128_update_ring_snapshot( dev_priv );
-
#if R128_PERFORMANCE_BOXES
/* Do some trivial performance monitoring...
*/
r128_cce_performance_boxes( dev_priv );
#endif
- BEGIN_RING( 2 );
+ BEGIN_RING( 4 );
+ R128_WAIT_UNTIL_PAGE_FLIPPED();
OUT_RING( CCE_PACKET0( R128_CRTC_OFFSET, 0 ) );
if ( dev_priv->current_page == 0 ) {
@@ -613,7 +573,7 @@ static void r128_cce_dispatch_vertex( drm_device_t *dev,
drm_r128_buf_priv_t *buf_priv = buf->dev_private;
drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv;
int format = sarea_priv->vc_format;
- int offset = dev_priv->buffers->offset + buf->offset - dev->agp->base;
+ int offset = buf->bus_address;
int size = buf->used;
int prim = buf_priv->prim;
int i = 0;
@@ -621,8 +581,6 @@ static void r128_cce_dispatch_vertex( drm_device_t *dev,
DRM_DEBUG( "%s: buf=%d nbox=%d\n",
__FUNCTION__, buf->idx, sarea_priv->nbox );
- r128_update_ring_snapshot( dev_priv );
-
if ( 0 )
r128_print_dirty( "dispatch_vertex", sarea_priv->dirty );
@@ -676,22 +634,10 @@ static void r128_cce_dispatch_vertex( drm_device_t *dev,
dev_priv->sarea_priv->last_dispatch++;
-#if 0
- if ( dev_priv->submit_age == R128_MAX_VB_AGE ) {
- ret = r128_do_cce_idle( dev_priv );
- if ( ret < 0 ) return ret;
- dev_priv->submit_age = 0;
- r128_freelist_reset( dev );
- }
-#endif
-
sarea_priv->dirty &= ~R128_UPLOAD_CLIPRECTS;
sarea_priv->nbox = 0;
}
-
-
-
static void r128_cce_dispatch_indirect( drm_device_t *dev,
drm_buf_t *buf,
int start, int end )
@@ -702,11 +648,8 @@ static void r128_cce_dispatch_indirect( drm_device_t *dev,
DRM_DEBUG( "indirect: buf=%d s=0x%x e=0x%x\n",
buf->idx, start, end );
- r128_update_ring_snapshot( dev_priv );
-
if ( start != end ) {
- int offset = (dev_priv->buffers->offset - dev->agp->base
- + buf->offset + start);
+ int offset = buf->bus_address + start;
int dwords = (end - start + 3) / sizeof(u32);
/* Indirect buffer data must be an even number of
@@ -750,15 +693,6 @@ static void r128_cce_dispatch_indirect( drm_device_t *dev,
}
dev_priv->sarea_priv->last_dispatch++;
-
-#if 0
- if ( dev_priv->submit_age == R128_MAX_VB_AGE ) {
- ret = r128_do_cce_idle( dev_priv );
- if ( ret < 0 ) return ret;
- dev_priv->submit_age = 0;
- r128_freelist_reset( dev );
- }
-#endif
}
static void r128_cce_dispatch_indices( drm_device_t *dev,
@@ -778,8 +712,6 @@ static void r128_cce_dispatch_indices( drm_device_t *dev,
RING_LOCALS;
DRM_DEBUG( "indices: s=%d e=%d c=%d\n", start, end, count );
- r128_update_ring_snapshot( dev_priv );
-
if ( 0 )
r128_print_dirty( "dispatch_indices", sarea_priv->dirty );
@@ -839,15 +771,6 @@ static void r128_cce_dispatch_indices( drm_device_t *dev,
dev_priv->sarea_priv->last_dispatch++;
-#if 0
- if ( dev_priv->submit_age == R128_MAX_VB_AGE ) {
- ret = r128_do_cce_idle( dev_priv );
- if ( ret < 0 ) return ret;
- dev_priv->submit_age = 0;
- r128_freelist_reset( dev );
- }
-#endif
-
sarea_priv->dirty &= ~R128_UPLOAD_CLIPRECTS;
sarea_priv->nbox = 0;
}
@@ -864,8 +787,6 @@ static int r128_cce_dispatch_blit( drm_device_t *dev,
RING_LOCALS;
DRM_DEBUG( "%s\n", __FUNCTION__ );
- r128_update_ring_snapshot( dev_priv );
-
/* The compiler won't optimize away a division by a variable,
* even if the only legal values are powers of two. Thus, we'll
* use a shift instead.
@@ -972,25 +893,10 @@ static int r128_cce_dispatch_write_span( drm_device_t *dev,
int count, x, y;
u32 *buffer;
u8 *mask;
- u32 depth_bpp;
int i;
RING_LOCALS;
DRM_DEBUG( "%s\n", __FUNCTION__ );
- r128_update_ring_snapshot( dev_priv );
-
- switch ( dev_priv->depth_bpp ) {
- case 16:
- depth_bpp = R128_GMC_DST_16BPP;
- break;
- case 24:
- case 32:
- depth_bpp = R128_GMC_DST_32BPP;
- break;
- default:
- return -EINVAL;
- }
-
count = depth->n;
if ( copy_from_user( &x, depth->x, sizeof(x) ) ) {
return -EFAULT;
@@ -1028,7 +934,7 @@ static int r128_cce_dispatch_write_span( drm_device_t *dev,
OUT_RING( CCE_PACKET3( R128_CNTL_PAINT_MULTI, 4 ) );
OUT_RING( R128_GMC_DST_PITCH_OFFSET_CNTL |
R128_GMC_BRUSH_SOLID_COLOR |
- depth_bpp |
+ (dev_priv->depth_fmt << 8) |
R128_GMC_SRC_DATATYPE_COLOR |
R128_ROP3_P |
R128_GMC_CLR_CMP_CNTL_DIS |
@@ -1052,7 +958,7 @@ static int r128_cce_dispatch_write_span( drm_device_t *dev,
OUT_RING( CCE_PACKET3( R128_CNTL_PAINT_MULTI, 4 ) );
OUT_RING( R128_GMC_DST_PITCH_OFFSET_CNTL |
R128_GMC_BRUSH_SOLID_COLOR |
- depth_bpp |
+ (dev_priv->depth_fmt << 8) |
R128_GMC_SRC_DATATYPE_COLOR |
R128_ROP3_P |
R128_GMC_CLR_CMP_CNTL_DIS |
@@ -1080,25 +986,10 @@ static int r128_cce_dispatch_write_pixels( drm_device_t *dev,
int count, *x, *y;
u32 *buffer;
u8 *mask;
- u32 depth_bpp;
int i;
RING_LOCALS;
DRM_DEBUG( "%s\n", __FUNCTION__ );
- r128_update_ring_snapshot( dev_priv );
-
- switch ( dev_priv->depth_bpp ) {
- case 16:
- depth_bpp = R128_GMC_DST_16BPP;
- break;
- case 24:
- case 32:
- depth_bpp = R128_GMC_DST_32BPP;
- break;
- default:
- return -EINVAL;
- }
-
count = depth->n;
x = kmalloc( count * sizeof(*x), 0 );
@@ -1159,7 +1050,7 @@ static int r128_cce_dispatch_write_pixels( drm_device_t *dev,
OUT_RING( CCE_PACKET3( R128_CNTL_PAINT_MULTI, 4 ) );
OUT_RING( R128_GMC_DST_PITCH_OFFSET_CNTL |
R128_GMC_BRUSH_SOLID_COLOR |
- depth_bpp |
+ (dev_priv->depth_fmt << 8) |
R128_GMC_SRC_DATATYPE_COLOR |
R128_ROP3_P |
R128_GMC_CLR_CMP_CNTL_DIS |
@@ -1183,7 +1074,7 @@ static int r128_cce_dispatch_write_pixels( drm_device_t *dev,
OUT_RING( CCE_PACKET3( R128_CNTL_PAINT_MULTI, 4 ) );
OUT_RING( R128_GMC_DST_PITCH_OFFSET_CNTL |
R128_GMC_BRUSH_SOLID_COLOR |
- depth_bpp |
+ (dev_priv->depth_fmt << 8) |
R128_GMC_SRC_DATATYPE_COLOR |
R128_ROP3_P |
R128_GMC_CLR_CMP_CNTL_DIS |
@@ -1211,24 +1102,9 @@ static int r128_cce_dispatch_read_span( drm_device_t *dev,
{
drm_r128_private_t *dev_priv = dev->dev_private;
int count, x, y;
- u32 depth_bpp;
RING_LOCALS;
DRM_DEBUG( "%s\n", __FUNCTION__ );
- r128_update_ring_snapshot( dev_priv );
-
- switch ( dev_priv->depth_bpp ) {
- case 16:
- depth_bpp = R128_GMC_DST_16BPP;
- break;
- case 24:
- case 32:
- depth_bpp = R128_GMC_DST_32BPP;
- break;
- default:
- return -EINVAL;
- }
-
count = depth->n;
if ( copy_from_user( &x, depth->x, sizeof(x) ) ) {
return -EFAULT;
@@ -1243,7 +1119,7 @@ static int r128_cce_dispatch_read_span( drm_device_t *dev,
OUT_RING( R128_GMC_SRC_PITCH_OFFSET_CNTL |
R128_GMC_DST_PITCH_OFFSET_CNTL |
R128_GMC_BRUSH_NONE |
- depth_bpp |
+ (dev_priv->depth_fmt << 8) |
R128_GMC_SRC_DATATYPE_COLOR |
R128_ROP3_S |
R128_DP_SRC_SOURCE_MEMORY |
@@ -1267,25 +1143,10 @@ static int r128_cce_dispatch_read_pixels( drm_device_t *dev,
{
drm_r128_private_t *dev_priv = dev->dev_private;
int count, *x, *y;
- u32 depth_bpp;
int i;
RING_LOCALS;
DRM_DEBUG( "%s\n", __FUNCTION__ );
- r128_update_ring_snapshot( dev_priv );
-
- switch ( dev_priv->depth_bpp ) {
- case 16:
- depth_bpp = R128_GMC_DST_16BPP;
- break;
- case 24:
- case 32:
- depth_bpp = R128_GMC_DST_32BPP;
- break;
- default:
- return -EINVAL;
- }
-
count = depth->n;
if ( count > dev_priv->depth_pitch ) {
count = dev_priv->depth_pitch;
@@ -1318,7 +1179,7 @@ static int r128_cce_dispatch_read_pixels( drm_device_t *dev,
OUT_RING( R128_GMC_SRC_PITCH_OFFSET_CNTL |
R128_GMC_DST_PITCH_OFFSET_CNTL |
R128_GMC_BRUSH_NONE |
- depth_bpp |
+ (dev_priv->depth_fmt << 8) |
R128_GMC_SRC_DATATYPE_COLOR |
R128_ROP3_S |
R128_DP_SRC_SOURCE_MEMORY |
@@ -1353,8 +1214,6 @@ static void r128_cce_dispatch_stipple( drm_device_t *dev, u32 *stipple )
RING_LOCALS;
DRM_DEBUG( "%s\n", __FUNCTION__ );
- r128_update_ring_snapshot( dev_priv );
-
BEGIN_RING( 33 );
OUT_RING( CCE_PACKET0( R128_BRUSH_DATA0, 31 ) );
@@ -1380,22 +1239,18 @@ int r128_cce_clear( struct inode *inode, struct file *filp,
drm_r128_clear_t clear;
DRM_DEBUG( "%s\n", __FUNCTION__ );
- if ( !_DRM_LOCK_IS_HELD( dev->lock.hw_lock->lock ) ||
- dev->lock.pid != current->pid ) {
- DRM_ERROR( "r128_cce_clear called without lock held\n" );
- return -EINVAL;
- }
+ LOCK_TEST_WITH_RETURN( dev );
if ( copy_from_user( &clear, (drm_r128_clear_t *) arg,
sizeof(clear) ) )
return -EFAULT;
+ RING_SPACE_TEST_WITH_RETURN( dev_priv );
+
if ( sarea_priv->nbox > R128_NR_SAREA_CLIPRECTS )
sarea_priv->nbox = R128_NR_SAREA_CLIPRECTS;
- r128_cce_dispatch_clear( dev, clear.flags,
- clear.x, clear.y, clear.w, clear.h,
- clear.clear_color, clear.clear_depth );
+ r128_cce_dispatch_clear( dev, &clear );
/* Make sure we restore the 3D state next time.
*/
@@ -1413,11 +1268,9 @@ int r128_cce_swap( struct inode *inode, struct file *filp,
drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv;
DRM_DEBUG( "%s\n", __FUNCTION__ );
- if ( !_DRM_LOCK_IS_HELD( dev->lock.hw_lock->lock ) ||
- dev->lock.pid != current->pid ) {
- DRM_ERROR( "r128_cce_swap called without lock held\n" );
- return -EINVAL;
- }
+ LOCK_TEST_WITH_RETURN( dev );
+
+ RING_SPACE_TEST_WITH_RETURN( dev_priv );
if ( sarea_priv->nbox > R128_NR_SAREA_CLIPRECTS )
sarea_priv->nbox = R128_NR_SAREA_CLIPRECTS;
@@ -1444,11 +1297,8 @@ int r128_cce_vertex( struct inode *inode, struct file *filp,
drm_r128_buf_priv_t *buf_priv;
drm_r128_vertex_t vertex;
- if ( !_DRM_LOCK_IS_HELD( dev->lock.hw_lock->lock ) ||
- dev->lock.pid != current->pid ) {
- DRM_ERROR( "%s called without lock held\n", __FUNCTION__ );
- return -EINVAL;
- }
+ LOCK_TEST_WITH_RETURN( dev );
+
if ( !dev_priv || dev_priv->is_pci ) {
DRM_ERROR( "%s called with a PCI card\n", __FUNCTION__ );
return -EINVAL;
@@ -1473,6 +1323,9 @@ int r128_cce_vertex( struct inode *inode, struct file *filp,
return -EINVAL;
}
+ RING_SPACE_TEST_WITH_RETURN( dev_priv );
+ VB_AGE_TEST_WITH_RETURN( dev_priv );
+
buf = dma->buflist[vertex.idx];
buf_priv = buf->dev_private;
@@ -1507,11 +1360,8 @@ int r128_cce_indices( struct inode *inode, struct file *filp,
drm_r128_indices_t elts;
int count;
- if ( !_DRM_LOCK_IS_HELD( dev->lock.hw_lock->lock ) ||
- dev->lock.pid != current->pid ) {
- DRM_ERROR( "%s called without lock held\n", __FUNCTION__ );
- return -EINVAL;
- }
+ LOCK_TEST_WITH_RETURN( dev );
+
if ( !dev_priv || dev_priv->is_pci ) {
DRM_ERROR( "%s called with a PCI card\n", __FUNCTION__ );
return -EINVAL;
@@ -1536,6 +1386,9 @@ int r128_cce_indices( struct inode *inode, struct file *filp,
return -EINVAL;
}
+ RING_SPACE_TEST_WITH_RETURN( dev_priv );
+ VB_AGE_TEST_WITH_RETURN( dev_priv );
+
buf = dma->buflist[elts.idx];
buf_priv = buf->dev_private;
@@ -1576,13 +1429,10 @@ int r128_cce_blit( struct inode *inode, struct file *filp,
drm_file_t *priv = filp->private_data;
drm_device_t *dev = priv->dev;
drm_device_dma_t *dma = dev->dma;
+ drm_r128_private_t *dev_priv = dev->dev_private;
drm_r128_blit_t blit;
- if ( !_DRM_LOCK_IS_HELD( dev->lock.hw_lock->lock ) ||
- dev->lock.pid != current->pid ) {
- DRM_ERROR( "%s called without lock held\n", __FUNCTION__ );
- return -EINVAL;
- }
+ LOCK_TEST_WITH_RETURN( dev );
if ( copy_from_user( &blit, (drm_r128_blit_t *)arg,
sizeof(blit) ) )
@@ -1597,6 +1447,9 @@ int r128_cce_blit( struct inode *inode, struct file *filp,
return -EINVAL;
}
+ RING_SPACE_TEST_WITH_RETURN( dev_priv );
+ VB_AGE_TEST_WITH_RETURN( dev_priv );
+
return r128_cce_dispatch_blit( dev, &blit );
}
@@ -1605,18 +1458,17 @@ int r128_cce_depth( struct inode *inode, struct file *filp,
{
drm_file_t *priv = filp->private_data;
drm_device_t *dev = priv->dev;
+ drm_r128_private_t *dev_priv = dev->dev_private;
drm_r128_depth_t depth;
- if ( !_DRM_LOCK_IS_HELD( dev->lock.hw_lock->lock ) ||
- dev->lock.pid != current->pid ) {
- DRM_ERROR( "%s called without lock held\n", __FUNCTION__ );
- return -EINVAL;
- }
+ LOCK_TEST_WITH_RETURN( dev );
if ( copy_from_user( &depth, (drm_r128_depth_t *)arg,
sizeof(depth) ) )
return -EFAULT;
+ RING_SPACE_TEST_WITH_RETURN( dev_priv );
+
switch ( depth.func ) {
case R128_WRITE_SPAN:
return r128_cce_dispatch_write_span( dev, &depth );
@@ -1636,14 +1488,11 @@ int r128_cce_stipple( struct inode *inode, struct file *filp,
{
drm_file_t *priv = filp->private_data;
drm_device_t *dev = priv->dev;
+ drm_r128_private_t *dev_priv = dev->dev_private;
drm_r128_stipple_t stipple;
u32 mask[32];
- if ( !_DRM_LOCK_IS_HELD( dev->lock.hw_lock->lock ) ||
- dev->lock.pid != current->pid ) {
- DRM_ERROR( "%s called without lock held\n", __FUNCTION__ );
- return -EINVAL;
- }
+ LOCK_TEST_WITH_RETURN( dev );
if ( copy_from_user( &stipple, (drm_r128_stipple_t *)arg,
sizeof(stipple) ) )
@@ -1653,6 +1502,8 @@ int r128_cce_stipple( struct inode *inode, struct file *filp,
32 * sizeof(u32) ) )
return -EFAULT;
+ RING_SPACE_TEST_WITH_RETURN( dev_priv );
+
r128_cce_dispatch_stipple( dev, mask );
return 0;
@@ -1664,11 +1515,7 @@ int r128_cce_indirect( struct inode *inode, struct file *filp,
drm_file_t *priv = filp->private_data;
drm_device_t *dev = priv->dev;
- if ( !_DRM_LOCK_IS_HELD( dev->lock.hw_lock->lock ) ||
- dev->lock.pid != current->pid ) {
- DRM_ERROR( "%s called without lock held\n", __FUNCTION__ );
- return -EINVAL;
- }
+ LOCK_TEST_WITH_RETURN( dev );
/* Indirect buffer firing is not supported at this time.
*/
diff --git a/linux/radeon_cp.c b/linux/radeon_cp.c
index 5d662bc0..ed8b1bbc 100644
--- a/linux/radeon_cp.c
+++ b/linux/radeon_cp.c
@@ -24,12 +24,12 @@
* DEALINGS IN THE SOFTWARE.
*
* Authors:
- * Kevin E. Martin <martin@valinux.com>
- * Gareth Hughes <gareth@valinux.com>
- *
+ * Kevin E. Martin <martin@valinux.com>
+ * Gareth Hughes <gareth@valinux.com>
*/
#define __NO_VERSION__
+#include "radeon.h"
#include "drmP.h"
#include "radeon_drv.h"
@@ -300,26 +300,6 @@ static u32 radeon_cp_microcode[][2] = {
};
-#define DO_IOREMAP(_m) (_m)->handle = drm_ioremap((_m)->offset, (_m)->size)
-
-#define DO_IOREMAPFREE(_m) \
- do { \
- if ((_m)->handle && (_m)->size) \
- drm_ioremapfree((_m)->handle, (_m)->size); \
- } while (0)
-
-#define DO_FIND_MAP(_m, _o) \
- do { \
- int _i; \
- for (_i = 0; _i < dev->map_count; _i++) { \
- if (dev->maplist[_i]->offset == _o) { \
- _m = dev->maplist[_i]; \
- break; \
- } \
- } \
- } while (0)
-
-
int RADEON_READ_PLL(drm_device_t *dev, int addr)
{
drm_radeon_private_t *dev_priv = dev->dev_private;
@@ -621,9 +601,9 @@ static void radeon_cp_init_ring_buffer( drm_device_t *dev )
static int radeon_do_init_cp( drm_device_t *dev, drm_radeon_init_t *init )
{
drm_radeon_private_t *dev_priv;
- int i;
+ struct list_head *list;
- dev_priv = drm_alloc( sizeof(drm_radeon_private_t), DRM_MEM_DRIVER );
+ dev_priv = DRM(alloc)( sizeof(drm_radeon_private_t), DRM_MEM_DRIVER );
if ( dev_priv == NULL )
return -ENOMEM;
dev->dev_private = (void *)dev_priv;
@@ -637,7 +617,7 @@ static int radeon_do_init_cp( drm_device_t *dev, drm_radeon_init_t *init )
* the CP ring code.
*/
if ( dev_priv->is_pci ) {
- drm_free( dev_priv, sizeof(*dev_priv), DRM_MEM_DRIVER );
+ DRM(free)( dev_priv, sizeof(*dev_priv), DRM_MEM_DRIVER );
dev->dev_private = NULL;
return -EINVAL;
}
@@ -645,7 +625,7 @@ static int radeon_do_init_cp( drm_device_t *dev, drm_radeon_init_t *init )
dev_priv->usec_timeout = init->usec_timeout;
if ( dev_priv->usec_timeout < 1 ||
dev_priv->usec_timeout > RADEON_MAX_USEC_TIMEOUT ) {
- drm_free( dev_priv, sizeof(*dev_priv), DRM_MEM_DRIVER );
+ DRM(free)( dev_priv, sizeof(*dev_priv), DRM_MEM_DRIVER );
dev->dev_private = NULL;
return -EINVAL;
}
@@ -662,7 +642,7 @@ static int radeon_do_init_cp( drm_device_t *dev, drm_radeon_init_t *init )
*/
if ( ( init->cp_mode != RADEON_CSQ_PRIBM_INDDIS ) &&
( init->cp_mode != RADEON_CSQ_PRIBM_INDBM ) ) {
- drm_free( dev_priv, sizeof(*dev_priv), DRM_MEM_DRIVER );
+ DRM(free)( dev_priv, sizeof(*dev_priv), DRM_MEM_DRIVER );
dev->dev_private = NULL;
return -EINVAL;
}
@@ -722,49 +702,42 @@ static int radeon_do_init_cp( drm_device_t *dev, drm_radeon_init_t *init )
RADEON_BFACE_SOLID |
RADEON_FFACE_SOLID |
RADEON_FLAT_SHADE_VTX_LAST |
-
RADEON_DIFFUSE_SHADE_FLAT |
RADEON_ALPHA_SHADE_FLAT |
RADEON_SPECULAR_SHADE_FLAT |
RADEON_FOG_SHADE_FLAT |
-
RADEON_VTX_PIX_CENTER_OGL |
RADEON_ROUND_MODE_TRUNC |
RADEON_ROUND_PREC_8TH_PIX);
- /* FIXME: We want multiple shared areas, including one shared
- * only by the X Server and kernel module.
- */
- for ( i = 0 ; i < dev->map_count ; i++ ) {
- if ( dev->maplist[i]->type == _DRM_SHM ) {
- dev_priv->sarea = dev->maplist[i];
- break;
- }
- }
-
- DO_FIND_MAP( dev_priv->fb, init->fb_offset );
- DO_FIND_MAP( dev_priv->mmio, init->mmio_offset );
- DO_FIND_MAP( dev_priv->cp_ring, init->ring_offset );
- DO_FIND_MAP( dev_priv->ring_rptr, init->ring_rptr_offset );
- DO_FIND_MAP( dev_priv->buffers, init->buffers_offset );
+ list_for_each(list, &dev->maplist->head) {
+ drm_map_list_t *r_list = (drm_map_list_t *)list;
+ if( r_list->map &&
+ r_list->map->type == _DRM_SHM &&
+ r_list->map->flags & _DRM_CONTAINS_LOCK ) {
+ dev_priv->sarea = r_list->map;
+ break;
+ }
+ }
+
+ DRM_FIND_MAP( dev_priv->fb, init->fb_offset );
+ DRM_FIND_MAP( dev_priv->mmio, init->mmio_offset );
+ DRM_FIND_MAP( dev_priv->cp_ring, init->ring_offset );
+ DRM_FIND_MAP( dev_priv->ring_rptr, init->ring_rptr_offset );
+ DRM_FIND_MAP( dev_priv->buffers, init->buffers_offset );
if ( !dev_priv->is_pci ) {
- DO_FIND_MAP( dev_priv->agp_textures,
- init->agp_textures_offset );
+ DRM_FIND_MAP( dev_priv->agp_textures,
+ init->agp_textures_offset );
}
dev_priv->sarea_priv =
(drm_radeon_sarea_t *)((u8 *)dev_priv->sarea->handle +
init->sarea_priv_offset);
- DO_IOREMAP( dev_priv->cp_ring );
- DO_IOREMAP( dev_priv->ring_rptr );
- DO_IOREMAP( dev_priv->buffers );
-#if 0
- if ( !dev_priv->is_pci ) {
- DO_IOREMAP( dev_priv->agp_textures );
- }
-#endif
+ DRM_IOREMAP( dev_priv->cp_ring );
+ DRM_IOREMAP( dev_priv->ring_rptr );
+ DRM_IOREMAP( dev_priv->buffers );
dev_priv->agp_size = init->agp_size;
dev_priv->agp_vm_start = RADEON_READ( RADEON_CONFIG_APER_SIZE );
@@ -779,11 +752,13 @@ static int radeon_do_init_cp( drm_device_t *dev, drm_radeon_init_t *init )
dev_priv->ring.end = ((u32 *)dev_priv->cp_ring->handle
+ init->ring_size / sizeof(u32));
dev_priv->ring.size = init->ring_size;
- dev_priv->ring.size_l2qw = drm_order( init->ring_size / 8 );
+ dev_priv->ring.size_l2qw = DRM(order)( init->ring_size / 8 );
dev_priv->ring.tail_mask =
(dev_priv->ring.size / sizeof(u32)) - 1;
+ dev_priv->ring.high_mark = RADEON_RING_HIGH_MARK;
+
#if 0
/* Initialize the scratch register pointer. This will cause
* the scratch register values to be written out to memory
@@ -823,22 +798,17 @@ static int radeon_do_init_cp( drm_device_t *dev, drm_radeon_init_t *init )
return 0;
}
-static int radeon_do_cleanup_cp( drm_device_t *dev )
+int radeon_do_cleanup_cp( drm_device_t *dev )
{
if ( dev->dev_private ) {
drm_radeon_private_t *dev_priv = dev->dev_private;
- DO_IOREMAPFREE( dev_priv->cp_ring );
- DO_IOREMAPFREE( dev_priv->ring_rptr );
- DO_IOREMAPFREE( dev_priv->buffers );
-#if 0
- if ( !dev_priv->is_pci ) {
- DO_IOREMAPFREE( dev_priv->agp_textures );
- }
-#endif
+ DRM_IOREMAPFREE( dev_priv->cp_ring );
+ DRM_IOREMAPFREE( dev_priv->ring_rptr );
+ DRM_IOREMAPFREE( dev_priv->buffers );
- drm_free( dev->dev_private, sizeof(drm_radeon_private_t),
- DRM_MEM_DRIVER );
+ DRM(free)( dev->dev_private, sizeof(drm_radeon_private_t),
+ DRM_MEM_DRIVER );
dev->dev_private = NULL;
}
@@ -873,11 +843,8 @@ int radeon_cp_start( struct inode *inode, struct file *filp,
drm_radeon_private_t *dev_priv = dev->dev_private;
DRM_DEBUG( "%s\n", __FUNCTION__ );
- if ( !_DRM_LOCK_IS_HELD( dev->lock.hw_lock->lock ) ||
- dev->lock.pid != current->pid ) {
- DRM_ERROR( "%s called without lock held\n", __FUNCTION__ );
- return -EINVAL;
- }
+ LOCK_TEST_WITH_RETURN( dev );
+
if ( dev_priv->cp_running ) {
DRM_DEBUG( "%s while CP running\n", __FUNCTION__ );
return 0;
@@ -906,11 +873,7 @@ int radeon_cp_stop( struct inode *inode, struct file *filp,
int ret;
DRM_DEBUG( "%s\n", __FUNCTION__ );
- if ( !_DRM_LOCK_IS_HELD( dev->lock.hw_lock->lock ) ||
- dev->lock.pid != current->pid ) {
- DRM_ERROR( "%s called without lock held\n", __FUNCTION__ );
- return -EINVAL;
- }
+ LOCK_TEST_WITH_RETURN( dev );
if ( copy_from_user( &stop, (drm_radeon_init_t *)arg, sizeof(stop) ) )
return -EFAULT;
@@ -952,11 +915,8 @@ int radeon_cp_reset( struct inode *inode, struct file *filp,
drm_radeon_private_t *dev_priv = dev->dev_private;
DRM_DEBUG( "%s\n", __FUNCTION__ );
- if ( !_DRM_LOCK_IS_HELD( dev->lock.hw_lock->lock ) ||
- dev->lock.pid != current->pid ) {
- DRM_ERROR( "%s called without lock held\n", __FUNCTION__ );
- return -EINVAL;
- }
+ LOCK_TEST_WITH_RETURN( dev );
+
if ( !dev_priv ) {
DRM_DEBUG( "%s called before init done\n", __FUNCTION__ );
return -EINVAL;
@@ -978,11 +938,7 @@ int radeon_cp_idle( struct inode *inode, struct file *filp,
drm_radeon_private_t *dev_priv = dev->dev_private;
DRM_DEBUG( "%s\n", __FUNCTION__ );
- if ( !_DRM_LOCK_IS_HELD( dev->lock.hw_lock->lock ) ||
- dev->lock.pid != current->pid ) {
- DRM_ERROR( "%s called without lock held\n", __FUNCTION__ );
- return -EINVAL;
- }
+ LOCK_TEST_WITH_RETURN( dev );
return radeon_do_cp_idle( dev_priv );
}
@@ -994,11 +950,7 @@ int radeon_engine_reset( struct inode *inode, struct file *filp,
drm_device_t *dev = priv->dev;
DRM_DEBUG( "%s\n", __FUNCTION__ );
- if ( !_DRM_LOCK_IS_HELD( dev->lock.hw_lock->lock ) ||
- dev->lock.pid != current->pid ) {
- DRM_ERROR( "%s called without lock held\n", __FUNCTION__ );
- return -EINVAL;
- }
+ LOCK_TEST_WITH_RETURN( dev );
return radeon_do_engine_reset( dev );
}
@@ -1048,11 +1000,7 @@ int radeon_fullscreen( struct inode *inode, struct file *filp,
drm_device_t *dev = priv->dev;
drm_radeon_fullscreen_t fs;
- if ( !_DRM_LOCK_IS_HELD( dev->lock.hw_lock->lock ) ||
- dev->lock.pid != current->pid ) {
- DRM_ERROR( "%s called without lock held\n", __FUNCTION__ );
- return -EINVAL;
- }
+ LOCK_TEST_WITH_RETURN( dev );
if ( copy_from_user( &fs, (drm_radeon_fullscreen_t *)arg,
sizeof(fs) ) )
@@ -1085,8 +1033,8 @@ static int radeon_freelist_init( drm_device_t *dev )
drm_radeon_freelist_t *entry;
int i;
- dev_priv->head = drm_alloc( sizeof(drm_radeon_freelist_t),
- DRM_MEM_DRIVER );
+ dev_priv->head = DRM(alloc)( sizeof(drm_radeon_freelist_t),
+ DRM_MEM_DRIVER );
if ( dev_priv->head == NULL )
return -ENOMEM;
@@ -1097,8 +1045,8 @@ static int radeon_freelist_init( drm_device_t *dev )
buf = dma->buflist[i];
buf_priv = buf->dev_private;
- entry = drm_alloc( sizeof(drm_radeon_freelist_t),
- DRM_MEM_DRIVER );
+ entry = DRM(alloc)( sizeof(drm_radeon_freelist_t),
+ DRM_MEM_DRIVER );
if ( !entry ) return -ENOMEM;
entry->age = RADEON_BUFFER_FREE;
@@ -1218,13 +1166,9 @@ int radeon_wait_ring( drm_radeon_private_t *dev_priv, int n )
int i;
for ( i = 0 ; i < dev_priv->usec_timeout ; i++ ) {
- ring->space = *ring->head - ring->tail;
- if ( ring->space <= 0 )
- ring->space += ring->size;
-
- if ( ring->space >= n )
+ radeon_update_ring_snapshot( ring );
+ if ( ring->space > n )
return 0;
-
udelay( 1 );
}
@@ -1233,17 +1177,6 @@ int radeon_wait_ring( drm_radeon_private_t *dev_priv, int n )
return -EBUSY;
}
-void radeon_update_ring_snapshot( drm_radeon_private_t *dev_priv )
-{
- drm_radeon_ring_buffer_t *ring = &dev_priv->ring;
-
- ring->space = *ring->head - ring->tail;
- if ( ring->space == 0 )
- atomic_inc( &dev_priv->idle_count );
- if ( ring->space <= 0 )
- ring->space += ring->size;
-}
-
static int radeon_cp_get_buffers( drm_device_t *dev, drm_dma_t *d )
{
int i;
@@ -1276,14 +1209,10 @@ int radeon_cp_buffers( struct inode *inode, struct file *filp,
int ret = 0;
drm_dma_t d;
- if ( copy_from_user( &d, (drm_dma_t *) arg, sizeof(d) ) )
- return -EFAULT;
+ LOCK_TEST_WITH_RETURN( dev );
- if ( !_DRM_LOCK_IS_HELD( dev->lock.hw_lock->lock ) ||
- dev->lock.pid != current->pid ) {
- DRM_ERROR( "%s called without lock held\n", __FUNCTION__ );
- return -EINVAL;
- }
+ if ( copy_from_user( &d, (drm_dma_t *)arg, sizeof(d) ) )
+ return -EFAULT;
/* Please don't send us buffers.
*/
@@ -1307,7 +1236,7 @@ int radeon_cp_buffers( struct inode *inode, struct file *filp,
ret = radeon_cp_get_buffers( dev, &d );
}
- if ( copy_to_user( (drm_dma_t *) arg, &d, sizeof(d) ) )
+ if ( copy_to_user( (drm_dma_t *)arg, &d, sizeof(d) ) )
return -EFAULT;
return ret;
diff --git a/linux/radeon_drm.h b/linux/radeon_drm.h
index c5f9f66d..50a7d6ed 100644
--- a/linux/radeon_drm.h
+++ b/linux/radeon_drm.h
@@ -26,7 +26,6 @@
* Authors:
* Kevin E. Martin <martin@valinux.com>
* Gareth Hughes <gareth@valinux.com>
- *
*/
#ifndef __RADEON_DRM_H__
@@ -74,7 +73,7 @@
/* Vertex/indirect buffer size
*/
-#define RADEON_BUFFER_SIZE 16384
+#define RADEON_BUFFER_SIZE 65536
/* Byte offsets for indirect buffer data
*/
@@ -276,15 +275,18 @@ typedef struct drm_radeon_fullscreen {
#define CLEAR_Y2 3
#define CLEAR_DEPTH 4
+typedef union drm_radeon_clear_rect {
+ float f[5];
+ unsigned int ui[5];
+} drm_radeon_clear_rect_t;
+
typedef struct drm_radeon_clear {
unsigned int flags;
- int x, y, w, h;
unsigned int clear_color;
unsigned int clear_depth;
- union {
- float f[5];
- unsigned int ui[5];
- } rect;
+ unsigned int color_mask;
+ unsigned int depth_mask;
+ drm_radeon_clear_rect_t *depth_boxes;
} drm_radeon_clear_t;
typedef struct drm_radeon_vertex {
@@ -302,14 +304,20 @@ typedef struct drm_radeon_indices {
int discard; /* Client finished with buffer? */
} drm_radeon_indices_t;
-typedef struct drm_radeon_blit {
- int idx;
- int pitch;
+typedef struct drm_radeon_tex_image {
+ unsigned int x, y; /* Blit coordinates */
+ unsigned int width, height;
+ const void *data;
+} drm_radeon_tex_image_t;
+
+typedef struct drm_radeon_texture {
int offset;
+ int pitch;
int format;
- unsigned short x, y;
- unsigned short width, height;
-} drm_radeon_blit_t;
+ int width; /* Texture image coordinates */
+ int height;
+ drm_radeon_tex_image_t *image;
+} drm_radeon_texture_t;
typedef struct drm_radeon_stipple {
unsigned int *mask;
diff --git a/linux/radeon_drv.c b/linux/radeon_drv.c
index 0113ed97..dba2037f 100644
--- a/linux/radeon_drv.c
+++ b/linux/radeon_drv.c
@@ -1,7 +1,7 @@
/* radeon_drv.c -- ATI Radeon driver -*- linux-c -*-
+ * Created: Wed Feb 14 17:10:04 2001 by gareth@valinux.com
*
- * Copyright 1999, 2000 Precision Insight, Inc., Cedar Park, Texas.
- * Copyright 2000 VA Linux Systems, Inc., Fremont, California.
+ * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
* All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
@@ -18,685 +18,70 @@
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
- * DEALINGS IN THE SOFTWARE.
- *
- * Authors: Kevin E. Martin <martin@valinux.com>
- * Rickard E. (Rik) Faith <faith@valinux.com>
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
*
+ * Authors:
+ * Gareth Hughes <gareth@valinux.com>
*/
#include <linux/config.h>
+#include "radeon.h"
#include "drmP.h"
#include "radeon_drv.h"
-#define RADEON_NAME "radeon"
-#define RADEON_DESC "ATI Radeon"
-#define RADEON_DATE "20010105"
-#define RADEON_MAJOR 1
-#define RADEON_MINOR 0
-#define RADEON_PATCHLEVEL 0
-
-static drm_device_t radeon_device;
-drm_ctx_t radeon_res_ctx;
-
-static struct file_operations radeon_fops = {
-#if LINUX_VERSION_CODE >= 0x020400
- /* This started being used during 2.4.0-test */
- owner: THIS_MODULE,
-#endif
- open: radeon_open,
- flush: drm_flush,
- release: radeon_release,
- ioctl: radeon_ioctl,
- mmap: drm_mmap,
- read: drm_read,
- fasync: drm_fasync,
- poll: drm_poll,
-};
-
-static struct miscdevice radeon_misc = {
- minor: MISC_DYNAMIC_MINOR,
- name: RADEON_NAME,
- fops: &radeon_fops,
-};
-
-static drm_ioctl_desc_t radeon_ioctls[] = {
- [DRM_IOCTL_NR(DRM_IOCTL_VERSION)] = { radeon_version, 0, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_GET_UNIQUE)] = { drm_getunique, 0, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_GET_MAGIC)] = { drm_getmagic, 0, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_IRQ_BUSID)] = { drm_irq_busid, 0, 1 },
-
- [DRM_IOCTL_NR(DRM_IOCTL_SET_UNIQUE)] = { drm_setunique, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_BLOCK)] = { drm_block, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_UNBLOCK)] = { drm_unblock, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_AUTH_MAGIC)] = { drm_authmagic, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_ADD_MAP)] = { drm_addmap, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_ADD_BUFS)] = { radeon_addbufs, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_MARK_BUFS)] = { drm_markbufs, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_INFO_BUFS)] = { drm_infobufs, 1, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_MAP_BUFS)] = { radeon_mapbufs, 1, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_FREE_BUFS)] = { drm_freebufs, 1, 0 },
-
- [DRM_IOCTL_NR(DRM_IOCTL_ADD_CTX)] = { radeon_addctx, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_RM_CTX)] = { radeon_rmctx, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_MOD_CTX)] = { radeon_modctx, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_GET_CTX)] = { radeon_getctx, 1, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_SWITCH_CTX)] = { radeon_switchctx, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_NEW_CTX)] = { radeon_newctx, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_RES_CTX)] = { radeon_resctx, 1, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_ADD_DRAW)] = { drm_adddraw, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_RM_DRAW)] = { drm_rmdraw, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_DMA)] = { radeon_cp_buffers, 1, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_LOCK)] = { radeon_lock, 1, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_UNLOCK)] = { radeon_unlock, 1, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_FINISH)] = { drm_finish, 1, 0 },
-
-#if defined(CONFIG_AGP) || defined(CONFIG_AGP_MODULE)
- [DRM_IOCTL_NR(DRM_IOCTL_AGP_ACQUIRE)] = { drm_agp_acquire, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_AGP_RELEASE)] = { drm_agp_release, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_AGP_ENABLE)] = { drm_agp_enable, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_AGP_INFO)] = { drm_agp_info, 1, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_AGP_ALLOC)] = { drm_agp_alloc, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_AGP_FREE)] = { drm_agp_free, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_AGP_BIND)] = { drm_agp_bind, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_AGP_UNBIND)] = { drm_agp_unbind, 1, 1 },
-#endif
-
- [DRM_IOCTL_NR(DRM_IOCTL_RADEON_CP_INIT)] = { radeon_cp_init, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_RADEON_CP_START)] = { radeon_cp_start, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_RADEON_CP_STOP)] = { radeon_cp_stop, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_RADEON_CP_RESET)] = { radeon_cp_reset, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_RADEON_CP_IDLE)] = { radeon_cp_idle, 1, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_RADEON_RESET)] = { radeon_engine_reset, 1, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_RADEON_FULLSCREEN)] = { radeon_fullscreen, 1, 0 },
-
- [DRM_IOCTL_NR(DRM_IOCTL_RADEON_SWAP)] = { radeon_cp_swap, 1, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_RADEON_CLEAR)] = { radeon_cp_clear, 1, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_RADEON_VERTEX)] = { radeon_cp_vertex, 1, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_RADEON_INDICES)] = { radeon_cp_indices, 1, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_RADEON_BLIT)] = { radeon_cp_blit, 1, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_RADEON_STIPPLE)] = { radeon_cp_stipple, 1, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_RADEON_INDIRECT)]= { radeon_cp_indirect,1, 1 },
-};
-#define RADEON_IOCTL_COUNT DRM_ARRAY_SIZE(radeon_ioctls)
-
-#ifdef MODULE
-static char *radeon = NULL;
-#endif
-
-MODULE_AUTHOR("VA Linux Systems, Inc.");
-MODULE_DESCRIPTION("radeon");
-MODULE_PARM(radeon, "s");
-
-#ifndef MODULE
-/* radeon_options is called by the kernel to parse command-line options
- * passed via the boot-loader (e.g., LILO). It calls the insmod option
- * routine, drm_parse_drm.
- */
-
-static int __init radeon_options(char *str)
-{
- drm_parse_options(str);
- return 1;
-}
-
-__setup("radeon=", radeon_options);
-#endif
-
-static int radeon_setup(drm_device_t *dev)
-{
- int i;
-
- atomic_set(&dev->ioctl_count, 0);
- atomic_set(&dev->vma_count, 0);
- dev->buf_use = 0;
- atomic_set(&dev->buf_alloc, 0);
-
- drm_dma_setup(dev);
-
- atomic_set(&dev->total_open, 0);
- atomic_set(&dev->total_close, 0);
- atomic_set(&dev->total_ioctl, 0);
- atomic_set(&dev->total_irq, 0);
- atomic_set(&dev->total_ctx, 0);
- atomic_set(&dev->total_locks, 0);
- atomic_set(&dev->total_unlocks, 0);
- atomic_set(&dev->total_contends, 0);
- atomic_set(&dev->total_sleeps, 0);
-
- for (i = 0; i < DRM_HASH_SIZE; i++) {
- dev->magiclist[i].head = NULL;
- dev->magiclist[i].tail = NULL;
- }
- dev->maplist = NULL;
- dev->map_count = 0;
- dev->vmalist = NULL;
- dev->lock.hw_lock = NULL;
- init_waitqueue_head(&dev->lock.lock_queue);
- dev->queue_count = 0;
- dev->queue_reserved = 0;
- dev->queue_slots = 0;
- dev->queuelist = NULL;
- dev->irq = 0;
- dev->context_flag = 0;
- dev->interrupt_flag = 0;
- dev->dma_flag = 0;
- dev->last_context = 0;
- dev->last_switch = 0;
- dev->last_checked = 0;
- init_timer(&dev->timer);
- init_waitqueue_head(&dev->context_wait);
-
- dev->ctx_start = 0;
- dev->lck_start = 0;
-
- dev->buf_rp = dev->buf;
- dev->buf_wp = dev->buf;
- dev->buf_end = dev->buf + DRM_BSZ;
- dev->buf_async = NULL;
- init_waitqueue_head(&dev->buf_readers);
- init_waitqueue_head(&dev->buf_writers);
-
- radeon_res_ctx.handle = -1;
-
- DRM_DEBUG("\n");
-
- /* The kernel's context could be created here, but is now created
- in drm_dma_enqueue. This is more resource-efficient for
- hardware that does not do DMA, but may mean that
- drm_select_queue fails between the time the interrupt is
- initialized and the time the queues are initialized. */
-
- return 0;
-}
-
-
-static int radeon_takedown(drm_device_t *dev)
-{
- int i;
- drm_magic_entry_t *pt, *next;
- drm_map_t *map;
- drm_vma_entry_t *vma, *vma_next;
-
- DRM_DEBUG("\n");
-
- down(&dev->struct_sem);
- del_timer(&dev->timer);
-
- if (dev->devname) {
- drm_free(dev->devname, strlen(dev->devname)+1, DRM_MEM_DRIVER);
- dev->devname = NULL;
- }
-
- if (dev->unique) {
- drm_free(dev->unique, strlen(dev->unique)+1, DRM_MEM_DRIVER);
- dev->unique = NULL;
- dev->unique_len = 0;
- }
- /* Clear pid list */
- for (i = 0; i < DRM_HASH_SIZE; i++) {
- for (pt = dev->magiclist[i].head; pt; pt = next) {
- next = pt->next;
- drm_free(pt, sizeof(*pt), DRM_MEM_MAGIC);
- }
- dev->magiclist[i].head = dev->magiclist[i].tail = NULL;
- }
-
-#if defined(CONFIG_AGP) || defined(CONFIG_AGP_MODULE)
- /* Clear AGP information */
- if (dev->agp) {
- drm_agp_mem_t *entry;
- drm_agp_mem_t *nexte;
-
- /* Remove AGP resources, but leave dev->agp
- intact until radeon_cleanup is called. */
- for (entry = dev->agp->memory; entry; entry = nexte) {
- nexte = entry->next;
- if (entry->bound) drm_unbind_agp(entry->memory);
- drm_free_agp(entry->memory, entry->pages);
- drm_free(entry, sizeof(*entry), DRM_MEM_AGPLISTS);
- }
- dev->agp->memory = NULL;
-
- if (dev->agp->acquired) _drm_agp_release();
-
- dev->agp->acquired = 0;
- dev->agp->enabled = 0;
- }
-#endif
-
- /* Clear vma list (only built for debugging) */
- if (dev->vmalist) {
- for (vma = dev->vmalist; vma; vma = vma_next) {
- vma_next = vma->next;
- drm_free(vma, sizeof(*vma), DRM_MEM_VMAS);
- }
- dev->vmalist = NULL;
- }
-
- /* Clear map area and mtrr information */
- if (dev->maplist) {
- for (i = 0; i < dev->map_count; i++) {
- map = dev->maplist[i];
- switch (map->type) {
- case _DRM_REGISTERS:
- case _DRM_FRAME_BUFFER:
-#ifdef CONFIG_MTRR
- if (map->mtrr >= 0) {
- int retcode;
- retcode = mtrr_del(map->mtrr,
- map->offset,
- map->size);
- DRM_DEBUG("mtrr_del = %d\n", retcode);
- }
-#endif
- drm_ioremapfree(map->handle, map->size);
- break;
- case _DRM_SHM:
- drm_free_pages((unsigned long)map->handle,
- drm_order(map->size)
- - PAGE_SHIFT,
- DRM_MEM_SAREA);
- break;
- case _DRM_AGP:
- /* Do nothing here, because this is all
- handled in the AGP/GART driver. */
- break;
- }
- drm_free(map, sizeof(*map), DRM_MEM_MAPS);
- }
- drm_free(dev->maplist,
- dev->map_count * sizeof(*dev->maplist),
- DRM_MEM_MAPS);
- dev->maplist = NULL;
- dev->map_count = 0;
- }
-
- drm_dma_takedown(dev);
-
- dev->queue_count = 0;
- if (dev->lock.hw_lock) {
- dev->lock.hw_lock = NULL; /* SHM removed */
- dev->lock.pid = 0;
- wake_up_interruptible(&dev->lock.lock_queue);
- }
- up(&dev->struct_sem);
-
- return 0;
-}
-
-/* radeon_init is called via init_module at module load time, or via
- * linux/init/main.c (this is not currently supported). */
-
-static int __init radeon_init(void)
-{
- int retcode;
- drm_device_t *dev = &radeon_device;
-
- DRM_DEBUG("\n");
-
- memset((void *)dev, 0, sizeof(*dev));
- dev->count_lock = SPIN_LOCK_UNLOCKED;
- sema_init(&dev->struct_sem, 1);
-
-#ifdef MODULE
- drm_parse_options(radeon);
-#endif
-
- if ((retcode = misc_register(&radeon_misc))) {
- DRM_ERROR("Cannot register \"%s\"\n", RADEON_NAME);
- return retcode;
- }
- dev->device = MKDEV(MISC_MAJOR, radeon_misc.minor);
- dev->name = RADEON_NAME;
-
- drm_mem_init();
- drm_proc_init(dev);
-
-#if defined(CONFIG_AGP) || defined(CONFIG_AGP_MODULE)
- dev->agp = drm_agp_init();
- if (dev->agp == NULL) {
- DRM_ERROR("Cannot initialize agpgart module.\n");
- drm_proc_cleanup();
- misc_deregister(&radeon_misc);
- radeon_takedown(dev);
- return -ENOMEM;
- }
-
-#ifdef CONFIG_MTRR
- dev->agp->agp_mtrr = mtrr_add(dev->agp->agp_info.aper_base,
- dev->agp->agp_info.aper_size*1024*1024,
- MTRR_TYPE_WRCOMB,
- 1);
-#endif
-#endif
-
- if((retcode = drm_ctxbitmap_init(dev))) {
- DRM_ERROR("Cannot allocate memory for context bitmap.\n");
- drm_proc_cleanup();
- misc_deregister(&radeon_misc);
- radeon_takedown(dev);
- return retcode;
- }
-
- DRM_INFO("Initialized %s %d.%d.%d %s on minor %d\n",
- RADEON_NAME,
- RADEON_MAJOR,
- RADEON_MINOR,
- RADEON_PATCHLEVEL,
- RADEON_DATE,
- radeon_misc.minor);
-
- return 0;
-}
-
-/* radeon_cleanup is called via cleanup_module at module unload time. */
-
-static void __exit radeon_cleanup(void)
-{
- drm_device_t *dev = &radeon_device;
-
- DRM_DEBUG("\n");
-
- drm_proc_cleanup();
- if (misc_deregister(&radeon_misc)) {
- DRM_ERROR("Cannot unload module\n");
- } else {
- DRM_INFO("Module unloaded\n");
- }
- drm_ctxbitmap_cleanup(dev);
- radeon_takedown(dev);
-#if defined(CONFIG_AGP) || defined(CONFIG_AGP_MODULE)
- if (dev->agp) {
- drm_agp_uninit();
- drm_free(dev->agp, sizeof(*dev->agp), DRM_MEM_AGPLISTS);
- dev->agp = NULL;
- }
-#endif
-}
-
-module_init(radeon_init);
-module_exit(radeon_cleanup);
-
-
-int radeon_version(struct inode *inode, struct file *filp, unsigned int cmd,
- unsigned long arg)
-{
- drm_version_t version;
- int len;
-
- if (copy_from_user(&version,
- (drm_version_t *)arg,
- sizeof(version)))
- return -EFAULT;
-
-#define DRM_COPY(name,value) \
- len = strlen(value); \
- if (len > name##_len) len = name##_len; \
- name##_len = strlen(value); \
- if (len && name) { \
- if (copy_to_user(name, value, len)) \
- return -EFAULT; \
- }
-
- version.version_major = RADEON_MAJOR;
- version.version_minor = RADEON_MINOR;
- version.version_patchlevel = RADEON_PATCHLEVEL;
-
- DRM_COPY(version.name, RADEON_NAME);
- DRM_COPY(version.date, RADEON_DATE);
- DRM_COPY(version.desc, RADEON_DESC);
-
- if (copy_to_user((drm_version_t *)arg,
- &version,
- sizeof(version)))
- return -EFAULT;
- return 0;
-}
-
-int radeon_open(struct inode *inode, struct file *filp)
-{
- drm_device_t *dev = &radeon_device;
- int retcode = 0;
-
- DRM_DEBUG("open_count = %d\n", dev->open_count);
- if (!(retcode = drm_open_helper(inode, filp, dev))) {
-#if LINUX_VERSION_CODE < 0x020333
- MOD_INC_USE_COUNT; /* Needed before Linux 2.3.51 */
-#endif
- atomic_inc(&dev->total_open);
- spin_lock(&dev->count_lock);
- if (!dev->open_count++) {
- spin_unlock(&dev->count_lock);
- return radeon_setup(dev);
- }
- spin_unlock(&dev->count_lock);
- }
-
- return retcode;
-}
-
-int radeon_release(struct inode *inode, struct file *filp)
-{
- drm_file_t *priv = filp->private_data;
- drm_device_t *dev;
- int retcode = 0;
-
- lock_kernel();
- dev = priv->dev;
-
- DRM_DEBUG("open_count = %d\n", dev->open_count);
-
- /* Force the cleanup of page flipping when required */
- if ( dev->dev_private ) {
- drm_radeon_private_t *dev_priv = dev->dev_private;
- if ( dev_priv->page_flipping ) {
- radeon_do_cleanup_pageflip( dev );
- }
- }
-
- if (!(retcode = drm_release(inode, filp))) {
-#if LINUX_VERSION_CODE < 0x020333
- MOD_DEC_USE_COUNT; /* Needed before Linux 2.3.51 */
-#endif
- atomic_inc(&dev->total_close);
- spin_lock(&dev->count_lock);
- if (!--dev->open_count) {
- if (atomic_read(&dev->ioctl_count) || dev->blocked) {
- DRM_ERROR("Device busy: %d %d\n",
- atomic_read(&dev->ioctl_count),
- dev->blocked);
- spin_unlock(&dev->count_lock);
- unlock_kernel();
- return -EBUSY;
- }
- spin_unlock(&dev->count_lock);
- unlock_kernel();
- return radeon_takedown(dev);
- }
- spin_unlock(&dev->count_lock);
- }
-
- unlock_kernel();
- return retcode;
-}
+#define DRIVER_AUTHOR "Gareth Hughes, VA Linux Systems Inc."
+
+#define DRIVER_NAME "radeon"
+#define DRIVER_DESC "ATI Radeon"
+#define DRIVER_DATE "20010308"
+
+#define DRIVER_MAJOR 1
+#define DRIVER_MINOR 0
+#define DRIVER_PATCHLEVEL 1
+
+#define DRIVER_IOCTLS \
+ [DRM_IOCTL_NR(DRM_IOCTL_DMA)] = { radeon_cp_buffers, 1, 0 }, \
+ [DRM_IOCTL_NR(DRM_IOCTL_RADEON_CP_INIT)] = { radeon_cp_init, 1, 1 }, \
+ [DRM_IOCTL_NR(DRM_IOCTL_RADEON_CP_START)] = { radeon_cp_start, 1, 1 }, \
+ [DRM_IOCTL_NR(DRM_IOCTL_RADEON_CP_STOP)] = { radeon_cp_stop, 1, 1 }, \
+ [DRM_IOCTL_NR(DRM_IOCTL_RADEON_CP_RESET)] = { radeon_cp_reset, 1, 1 }, \
+ [DRM_IOCTL_NR(DRM_IOCTL_RADEON_CP_IDLE)] = { radeon_cp_idle, 1, 0 }, \
+ [DRM_IOCTL_NR(DRM_IOCTL_RADEON_RESET)] = { radeon_engine_reset, 1, 0 }, \
+ [DRM_IOCTL_NR(DRM_IOCTL_RADEON_FULLSCREEN)] = { radeon_fullscreen, 1, 0 }, \
+ [DRM_IOCTL_NR(DRM_IOCTL_RADEON_SWAP)] = { radeon_cp_swap, 1, 0 }, \
+ [DRM_IOCTL_NR(DRM_IOCTL_RADEON_CLEAR)] = { radeon_cp_clear, 1, 0 }, \
+ [DRM_IOCTL_NR(DRM_IOCTL_RADEON_VERTEX)] = { radeon_cp_vertex, 1, 0 }, \
+ [DRM_IOCTL_NR(DRM_IOCTL_RADEON_INDICES)] = { radeon_cp_indices, 1, 0 }, \
+ [DRM_IOCTL_NR(DRM_IOCTL_RADEON_TEXTURE)] = { radeon_cp_texture, 1, 0 }, \
+ [DRM_IOCTL_NR(DRM_IOCTL_RADEON_STIPPLE)] = { radeon_cp_stipple, 1, 0 }, \
+ [DRM_IOCTL_NR(DRM_IOCTL_RADEON_INDIRECT)] = { radeon_cp_indirect, 1, 1 },
-/* radeon_ioctl is called whenever a process performs an ioctl on /dev/drm. */
-int radeon_ioctl(struct inode *inode, struct file *filp, unsigned int cmd,
- unsigned long arg)
-{
- int nr = DRM_IOCTL_NR(cmd);
- drm_file_t *priv = filp->private_data;
- drm_device_t *dev = priv->dev;
- int retcode = 0;
- drm_ioctl_desc_t *ioctl;
- drm_ioctl_t *func;
-
- atomic_inc(&dev->ioctl_count);
- atomic_inc(&dev->total_ioctl);
- ++priv->ioctl_count;
-
- DRM_DEBUG("pid = %d, cmd = 0x%02x, nr = 0x%02x, dev 0x%x, auth = %d\n",
- current->pid, cmd, nr, dev->device, priv->authenticated);
-
- if (nr >= RADEON_IOCTL_COUNT) {
- retcode = -EINVAL;
- } else {
- ioctl = &radeon_ioctls[nr];
- func = ioctl->func;
-
- if (!func) {
- DRM_DEBUG("no function\n");
- retcode = -EINVAL;
- } else if ((ioctl->root_only && !capable(CAP_SYS_ADMIN))
- || (ioctl->auth_needed && !priv->authenticated)) {
- retcode = -EACCES;
- } else {
- retcode = (func)(inode, filp, cmd, arg);
- }
- }
-
- atomic_dec(&dev->ioctl_count);
- return retcode;
-}
-
-int radeon_lock(struct inode *inode, struct file *filp, unsigned int cmd,
- unsigned long arg)
-{
- drm_file_t *priv = filp->private_data;
- drm_device_t *dev = priv->dev;
- DECLARE_WAITQUEUE(entry, current);
- int ret = 0;
- drm_lock_t lock;
-#if DRM_DMA_HISTOGRAM
- cycles_t start;
-
- dev->lck_start = start = get_cycles();
-#endif
-
- if (copy_from_user(&lock, (drm_lock_t *)arg, sizeof(lock)))
- return -EFAULT;
-
- if (lock.context == DRM_KERNEL_CONTEXT) {
- DRM_ERROR("Process %d using kernel context %d\n",
- current->pid, lock.context);
- return -EINVAL;
- }
-
- DRM_DEBUG("%d (pid %d) requests lock (0x%08x), flags = 0x%08x\n",
- lock.context, current->pid, dev->lock.hw_lock->lock,
- lock.flags);
-
- if (lock.context < 0 /* || lock.context >= dev->queue_count */)
- return -EINVAL;
-
- if (!ret) {
- add_wait_queue(&dev->lock.lock_queue, &entry);
- for (;;) {
- current->state = TASK_INTERRUPTIBLE;
- if (!dev->lock.hw_lock) {
- /* Device has been unregistered */
- ret = -EINTR;
- break;
- }
- if (drm_lock_take(&dev->lock.hw_lock->lock,
- lock.context)) {
- dev->lock.pid = current->pid;
- dev->lock.lock_time = jiffies;
- atomic_inc(&dev->total_locks);
- break; /* Got lock */
- }
-
- /* Contention */
- atomic_inc(&dev->total_sleeps);
- schedule();
- if (signal_pending(current)) {
- ret = -ERESTARTSYS;
- break;
- }
- }
- current->state = TASK_RUNNING;
- remove_wait_queue(&dev->lock.lock_queue, &entry);
- }
-
- if (!ret) {
- sigemptyset(&dev->sigmask);
- sigaddset(&dev->sigmask, SIGSTOP);
- sigaddset(&dev->sigmask, SIGTSTP);
- sigaddset(&dev->sigmask, SIGTTIN);
- sigaddset(&dev->sigmask, SIGTTOU);
- dev->sigdata.context = lock.context;
- dev->sigdata.lock = dev->lock.hw_lock;
- block_all_signals(drm_notifier, &dev->sigdata, &dev->sigmask);
- if (lock.flags & _DRM_LOCK_READY) {
- /* Wait for space in DMA/FIFO */
- }
- if (lock.flags & _DRM_LOCK_QUIESCENT) {
- /* Make hardware quiescent */
- DRM_DEBUG("not quiescent!\n");
#if 0
- radeon_quiescent(dev);
-#endif
- }
- }
-
-#if LINUX_VERSION_CODE < 0x020400
- if (lock.context != radeon_res_ctx.handle) {
- current->counter = 5;
- current->priority = DEF_PRIORITY/4;
- }
-#endif
- DRM_DEBUG("%d %s\n", lock.context, ret ? "interrupted" : "has lock");
-
-#if DRM_DMA_HISTOGRAM
- atomic_inc(&dev->histo.lacq[drm_histogram_slot(get_cycles() - start)]);
-#endif
-
- return ret;
-}
-
-
-int radeon_unlock(struct inode *inode, struct file *filp, unsigned int cmd,
- unsigned long arg)
-{
- drm_file_t *priv = filp->private_data;
- drm_device_t *dev = priv->dev;
- drm_lock_t lock;
-
- if (copy_from_user(&lock, (drm_lock_t *)arg, sizeof(lock)))
- return -EFAULT;
-
- if (lock.context == DRM_KERNEL_CONTEXT) {
- DRM_ERROR("Process %d using kernel context %d\n",
- current->pid, lock.context);
- return -EINVAL;
- }
-
- DRM_DEBUG("%d frees lock (%d holds)\n",
- lock.context,
- _DRM_LOCKING_CONTEXT(dev->lock.hw_lock->lock));
- atomic_inc(&dev->total_unlocks);
- if (_DRM_LOCK_IS_CONT(dev->lock.hw_lock->lock))
- atomic_inc(&dev->total_contends);
- drm_lock_transfer(dev, &dev->lock.hw_lock->lock, DRM_KERNEL_CONTEXT);
- /* FIXME: Try to send data to card here */
- if (!dev->context_flag) {
- if (drm_lock_free(dev, &dev->lock.hw_lock->lock,
- DRM_KERNEL_CONTEXT)) {
- DRM_ERROR("\n");
- }
- }
-
-#if LINUX_VERSION_CODE < 0x020400
- if (lock.context != radeon_res_ctx.handle) {
- current->counter = 5;
- current->priority = DEF_PRIORITY;
- }
-#endif
- unblock_all_signals();
- return 0;
-}
+/* GH: Count data sent to card via ring or vertex/indirect buffers.
+ */
+#define __HAVE_COUNTERS 3
+#define __HAVE_COUNTER6 _DRM_STAT_IRQ
+#define __HAVE_COUNTER7 _DRM_STAT_PRIMARY
+#define __HAVE_COUNTER8 _DRM_STAT_SECONDARY
+#endif
+
+
+#include "drm_agpsupport.h"
+#include "drm_auth.h"
+#include "drm_bufs.h"
+#include "drm_context.h"
+#include "drm_dma.h"
+#include "drm_drawable.h"
+#include "drm_drv.h"
+#include "drm_fops.h"
+#include "drm_init.h"
+#include "drm_ioctl.h"
+#include "drm_lock.h"
+#include "drm_memory.h"
+#include "drm_proc.h"
+#include "drm_vm.h"
+#include "drm_stub.h"
diff --git a/linux/radeon_drv.h b/linux/radeon_drv.h
index 06b54199..f176bb56 100644
--- a/linux/radeon_drv.h
+++ b/linux/radeon_drv.h
@@ -24,10 +24,8 @@
* DEALINGS IN THE SOFTWARE.
*
* Authors:
- * Rickard E. (Rik) Faith <faith@valinux.com>
- * Kevin E. Martin <martin@valinux.com>
- * Gareth Hughes <gareth@valinux.com>
- *
+ * Kevin E. Martin <martin@valinux.com>
+ * Gareth Hughes <gareth@valinux.com>
*/
#ifndef __RADEON_DRV_H__
@@ -50,6 +48,8 @@ typedef struct drm_radeon_ring_buffer {
u32 tail;
u32 tail_mask;
int space;
+
+ int high_mark;
} drm_radeon_ring_buffer_t;
typedef struct drm_radeon_depth_clear_t {
@@ -91,13 +91,13 @@ typedef struct drm_radeon_private {
u32 crtc_offset;
u32 crtc_offset_cntl;
- unsigned int color_fmt;
+ u32 color_fmt;
unsigned int front_offset;
unsigned int front_pitch;
unsigned int back_offset;
unsigned int back_pitch;
- unsigned int depth_fmt;
+ u32 depth_fmt;
unsigned int depth_offset;
unsigned int depth_pitch;
@@ -124,18 +124,6 @@ typedef struct drm_radeon_buf_priv {
drm_radeon_freelist_t *list_entry;
} drm_radeon_buf_priv_t;
- /* radeon_drv.c */
-extern int radeon_version( struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg );
-extern int radeon_open( struct inode *inode, struct file *filp );
-extern int radeon_release( struct inode *inode, struct file *filp );
-extern int radeon_ioctl( struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg );
-extern int radeon_lock( struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg );
-extern int radeon_unlock( struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg );
-
/* radeon_cp.c */
extern int radeon_cp_init( struct inode *inode, struct file *filp,
unsigned int cmd, unsigned long arg );
@@ -158,9 +146,17 @@ extern void radeon_freelist_reset( drm_device_t *dev );
extern drm_buf_t *radeon_freelist_get( drm_device_t *dev );
extern int radeon_wait_ring( drm_radeon_private_t *dev_priv, int n );
-extern void radeon_update_ring_snapshot( drm_radeon_private_t *dev_priv );
+
+static inline void
+radeon_update_ring_snapshot( drm_radeon_ring_buffer_t *ring )
+{
+ ring->space = (*(volatile int *)ring->head - ring->tail) * sizeof(u32);
+ if ( ring->space <= 0 )
+ ring->space += ring->size;
+}
extern int radeon_do_cp_idle( drm_radeon_private_t *dev_priv );
+extern int radeon_do_cleanup_cp( drm_device_t *dev );
extern int radeon_do_cleanup_pageflip( drm_device_t *dev );
/* radeon_state.c */
@@ -172,38 +168,13 @@ extern int radeon_cp_vertex( struct inode *inode, struct file *filp,
unsigned int cmd, unsigned long arg );
extern int radeon_cp_indices( struct inode *inode, struct file *filp,
unsigned int cmd, unsigned long arg );
-extern int radeon_cp_blit( struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg );
+extern int radeon_cp_texture( struct inode *inode, struct file *filp,
+ unsigned int cmd, unsigned long arg );
extern int radeon_cp_stipple( struct inode *inode, struct file *filp,
unsigned int cmd, unsigned long arg );
extern int radeon_cp_indirect( struct inode *inode, struct file *filp,
unsigned int cmd, unsigned long arg );
- /* radeon_bufs.c */
-extern int radeon_addbufs(struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg);
-extern int radeon_mapbufs(struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg);
-
- /* radeon_context.c */
-extern int radeon_resctx(struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg);
-extern int radeon_addctx(struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg);
-extern int radeon_modctx(struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg);
-extern int radeon_getctx(struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg);
-extern int radeon_switchctx(struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg);
-extern int radeon_newctx(struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg);
-extern int radeon_rmctx(struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg);
-
-extern int radeon_context_switch(drm_device_t *dev, int old, int new);
-extern int radeon_context_switch_complete(drm_device_t *dev, int new);
-
/* Register definitions, register access macros and drmAddMap constants
* for Radeon kernel driver.
@@ -514,14 +485,14 @@ extern int radeon_context_switch_complete(drm_device_t *dev, int new);
#define RADEON_COLOR_FORMAT_RGB8 9
#define RADEON_COLOR_FORMAT_ARGB4444 15
-#define RADEON_TXF_8BPP_I 0
-#define RADEON_TXF_16BPP_AI88 1
-#define RADEON_TXF_8BPP_RGB332 2
-#define RADEON_TXF_16BPP_ARGB1555 3
-#define RADEON_TXF_16BPP_RGB565 4
-#define RADEON_TXF_16BPP_ARGB4444 5
-#define RADEON_TXF_32BPP_ARGB8888 6
-#define RADEON_TXF_32BPP_RGBA8888 7
+#define RADEON_TXFORMAT_I8 0
+#define RADEON_TXFORMAT_AI88 1
+#define RADEON_TXFORMAT_RGB332 2
+#define RADEON_TXFORMAT_ARGB1555 3
+#define RADEON_TXFORMAT_RGB565 4
+#define RADEON_TXFORMAT_ARGB4444 5
+#define RADEON_TXFORMAT_ARGB8888 6
+#define RADEON_TXFORMAT_RGBA8888 7
/* Constants */
#define RADEON_MAX_USEC_TIMEOUT 100000 /* 100 ms */
@@ -534,27 +505,27 @@ extern int radeon_context_switch_complete(drm_device_t *dev, int new);
#define RADEON_MAX_VB_AGE 0x7fffffff
#define RADEON_MAX_VB_VERTS (0xffff)
+#define RADEON_RING_HIGH_MARK 128
+
#define RADEON_BASE(reg) ((u32)(dev_priv->mmio->handle))
-#define RADEON_ADDR(reg) (RADEON_BASE(reg) + reg)
+#define RADEON_ADDR(reg) (RADEON_BASE( reg ) + reg)
-#define RADEON_DEREF(reg) *(__volatile__ u32 *)RADEON_ADDR(reg)
-#define RADEON_READ(reg) RADEON_DEREF(reg)
-#define RADEON_WRITE(reg,val) do { RADEON_DEREF(reg) = val; } while (0)
+#define RADEON_DEREF(reg) *(volatile u32 *)RADEON_ADDR( reg )
+#define RADEON_READ(reg) RADEON_DEREF( reg )
+#define RADEON_WRITE(reg, val) do { RADEON_DEREF( reg ) = val; } while (0)
-#define RADEON_DEREF8(reg) *(__volatile__ u8 *)RADEON_ADDR(reg)
-#define RADEON_READ8(reg) RADEON_DEREF8(reg)
-#define RADEON_WRITE8(reg,val) do { RADEON_DEREF8(reg) = val; } while (0)
+#define RADEON_DEREF8(reg) *(volatile u8 *)RADEON_ADDR( reg )
+#define RADEON_READ8(reg) RADEON_DEREF8( reg )
+#define RADEON_WRITE8(reg, val) do { RADEON_DEREF8( reg ) = val; } while (0)
-#define RADEON_WRITE_PLL(addr,val) \
-do { \
- RADEON_WRITE8(RADEON_CLOCK_CNTL_INDEX, \
- ((addr) & 0x1f) | RADEON_PLL_WR_EN); \
- RADEON_WRITE(RADEON_CLOCK_CNTL_DATA, (val)); \
+#define RADEON_WRITE_PLL( addr, val ) do { \
+ RADEON_WRITE8( RADEON_CLOCK_CNTL_INDEX, \
+ ((addr) & 0x1f) | RADEON_PLL_WR_EN ); \
+ RADEON_WRITE( RADEON_CLOCK_CNTL_DATA, (val) ); \
} while (0)
-extern int RADEON_READ_PLL(drm_device_t *dev, int addr);
-
+extern int RADEON_READ_PLL( drm_device_t *dev, int addr );
#define CP_PACKET0( reg, n ) \
@@ -573,54 +544,46 @@ extern int RADEON_READ_PLL(drm_device_t *dev, int addr);
* Engine control helper macros
*/
-#define RADEON_WAIT_UNTIL_2D_IDLE() \
-do { \
+#define RADEON_WAIT_UNTIL_2D_IDLE() do { \
OUT_RING( CP_PACKET0( RADEON_WAIT_UNTIL, 0 ) ); \
OUT_RING( (RADEON_WAIT_2D_IDLECLEAN | \
RADEON_WAIT_HOST_IDLECLEAN) ); \
} while (0)
-#define RADEON_WAIT_UNTIL_3D_IDLE() \
-do { \
+#define RADEON_WAIT_UNTIL_3D_IDLE() do { \
OUT_RING( CP_PACKET0( RADEON_WAIT_UNTIL, 0 ) ); \
OUT_RING( (RADEON_WAIT_3D_IDLECLEAN | \
RADEON_WAIT_HOST_IDLECLEAN) ); \
} while (0)
-#define RADEON_WAIT_UNTIL_IDLE() \
-do { \
+#define RADEON_WAIT_UNTIL_IDLE() do { \
OUT_RING( CP_PACKET0( RADEON_WAIT_UNTIL, 0 ) ); \
OUT_RING( (RADEON_WAIT_2D_IDLECLEAN | \
RADEON_WAIT_3D_IDLECLEAN | \
RADEON_WAIT_HOST_IDLECLEAN) ); \
} while (0)
-#define RADEON_WAIT_UNTIL_PAGE_FLIPPED() \
-do { \
+#define RADEON_WAIT_UNTIL_PAGE_FLIPPED() do { \
OUT_RING( CP_PACKET0( RADEON_WAIT_UNTIL, 0 ) ); \
OUT_RING( RADEON_WAIT_CRTC_PFLIP ); \
} while (0)
-#define RADEON_FLUSH_CACHE() \
-do { \
+#define RADEON_FLUSH_CACHE() do { \
OUT_RING( CP_PACKET0( RADEON_RB2D_DSTCACHE_CTLSTAT, 0 ) ); \
OUT_RING( RADEON_RB2D_DC_FLUSH ); \
} while (0)
-#define RADEON_PURGE_CACHE() \
-do { \
+#define RADEON_PURGE_CACHE() do { \
OUT_RING( CP_PACKET0( RADEON_RB2D_DSTCACHE_CTLSTAT, 0 ) ); \
OUT_RING( RADEON_RB2D_DC_FLUSH_ALL ); \
} while (0)
-#define RADEON_FLUSH_ZCACHE() \
-do { \
+#define RADEON_FLUSH_ZCACHE() do { \
OUT_RING( CP_PACKET0( RADEON_RB3D_ZCACHE_CTLSTAT, 0 ) ); \
OUT_RING( RADEON_RB3D_ZC_FLUSH ); \
} while (0)
-#define RADEON_PURGE_ZCACHE() \
-do { \
+#define RADEON_PURGE_ZCACHE() do { \
OUT_RING( CP_PACKET0( RADEON_RB3D_ZCACHE_CTLSTAT, 0 ) ); \
OUT_RING( RADEON_RB3D_ZC_FLUSH_ALL ); \
} while (0)
@@ -630,7 +593,33 @@ do { \
* Misc helper macros
*/
-#define VB_AGE_CHECK_WITH_RET( dev_priv ) \
+#define LOCK_TEST_WITH_RETURN( dev ) \
+do { \
+ if ( !_DRM_LOCK_IS_HELD( dev->lock.hw_lock->lock ) || \
+ dev->lock.pid != current->pid ) { \
+ DRM_ERROR( "%s called without lock held\n", \
+ __FUNCTION__ ); \
+ return -EINVAL; \
+ } \
+} while (0)
+
+#define RING_SPACE_TEST_WITH_RETURN( dev_priv ) \
+do { \
+ drm_radeon_ring_buffer_t *ring = &dev_priv->ring; int i; \
+ if ( ring->space < ring->high_mark ) { \
+ for ( i = 0 ; i < dev_priv->usec_timeout ; i++ ) { \
+ radeon_update_ring_snapshot( ring ); \
+ if ( ring->space >= ring->high_mark ) \
+ goto __ring_space_done; \
+ udelay( 1 ); \
+ } \
+ DRM_ERROR( "ring space check failed!\n" ); \
+ return -EBUSY; \
+ } \
+ __ring_space_done: \
+} while (0)
+
+#define VB_AGE_TEST_WITH_RETURN( dev_priv ) \
do { \
drm_radeon_sarea_t *sarea_priv = dev_priv->sarea_priv; \
if ( sarea_priv->last_dispatch >= RADEON_MAX_VB_AGE ) { \
@@ -641,20 +630,17 @@ do { \
} \
} while (0)
-#define RADEON_DISPATCH_AGE( age ) \
-do { \
+#define RADEON_DISPATCH_AGE( age ) do { \
OUT_RING( CP_PACKET0( RADEON_LAST_DISPATCH_REG, 0 ) ); \
OUT_RING( age ); \
} while (0)
-#define RADEON_FRAME_AGE( age ) \
-do { \
+#define RADEON_FRAME_AGE( age ) do { \
OUT_RING( CP_PACKET0( RADEON_LAST_FRAME_REG, 0 ) ); \
OUT_RING( age ); \
} while (0)
-#define RADEON_CLEAR_AGE( age ) \
-do { \
+#define RADEON_CLEAR_AGE( age ) do { \
OUT_RING( CP_PACKET0( RADEON_LAST_CLEAR_REG, 0 ) ); \
OUT_RING( age ); \
} while (0)
@@ -676,7 +662,7 @@ do { \
DRM_INFO( "BEGIN_RING( %d ) in %s\n", \
n, __FUNCTION__ ); \
} \
- if ( dev_priv->ring.space < (n) * sizeof(u32) ) { \
+ if ( dev_priv->ring.space <= (n) * sizeof(u32) ) { \
radeon_wait_ring( dev_priv, (n) * sizeof(u32) ); \
} \
dev_priv->ring.space -= (n) * sizeof(u32); \
diff --git a/linux/radeon_state.c b/linux/radeon_state.c
index 7bfefb2c..9360c43b 100644
--- a/linux/radeon_state.c
+++ b/linux/radeon_state.c
@@ -23,12 +23,12 @@
* DEALINGS IN THE SOFTWARE.
*
* Authors:
- * Kevin E. Martin <martin@valinux.com>
* Gareth Hughes <gareth@valinux.com>
- *
+ * Kevin E. Martin <martin@valinux.com>
*/
#define __NO_VERSION__
+#include "radeon.h"
#include "drmP.h"
#include "radeon_drv.h"
#include "drm.h"
@@ -486,7 +486,8 @@ static void radeon_print_dirty( const char *msg, unsigned int flags )
}
static void radeon_cp_dispatch_clear( drm_device_t *dev,
- drm_radeon_clear_t *clear )
+ drm_radeon_clear_t *clear,
+ drm_radeon_clear_rect_t *depth_boxes )
{
drm_radeon_private_t *dev_priv = dev->dev_private;
drm_radeon_sarea_t *sarea_priv = dev_priv->sarea_priv;
@@ -497,8 +498,6 @@ static void radeon_cp_dispatch_clear( drm_device_t *dev,
RING_LOCALS;
DRM_DEBUG( "%s\n", __FUNCTION__ );
- radeon_update_ring_snapshot( dev_priv );
-
if ( dev_priv->page_flipping && dev_priv->current_page == 1 ) {
unsigned int tmp = flags;
@@ -525,7 +524,7 @@ static void radeon_cp_dispatch_clear( drm_device_t *dev,
RADEON_WAIT_UNTIL_3D_IDLE();
OUT_RING( CP_PACKET0( RADEON_DP_WRITE_MASK, 0 ) );
- OUT_RING( sarea_priv->context_state.rb3d_planemask );
+ OUT_RING( clear->color_mask );
ADVANCE_RING();
@@ -609,17 +608,17 @@ static void radeon_cp_dispatch_clear( drm_device_t *dev,
RADEON_VTX_FMT_RADEON_MODE |
(3 << RADEON_NUM_VERTICES_SHIFT)) );
- OUT_RING( clear->rect.ui[CLEAR_X1] );
- OUT_RING( clear->rect.ui[CLEAR_Y1] );
- OUT_RING( clear->rect.ui[CLEAR_DEPTH] );
+ OUT_RING( depth_boxes[i].ui[CLEAR_X1] );
+ OUT_RING( depth_boxes[i].ui[CLEAR_Y1] );
+ OUT_RING( depth_boxes[i].ui[CLEAR_DEPTH] );
- OUT_RING( clear->rect.ui[CLEAR_X1] );
- OUT_RING( clear->rect.ui[CLEAR_Y2] );
- OUT_RING( clear->rect.ui[CLEAR_DEPTH] );
+ OUT_RING( depth_boxes[i].ui[CLEAR_X1] );
+ OUT_RING( depth_boxes[i].ui[CLEAR_Y2] );
+ OUT_RING( depth_boxes[i].ui[CLEAR_DEPTH] );
- OUT_RING( clear->rect.ui[CLEAR_X2] );
- OUT_RING( clear->rect.ui[CLEAR_Y2] );
- OUT_RING( clear->rect.ui[CLEAR_DEPTH] );
+ OUT_RING( depth_boxes[i].ui[CLEAR_X2] );
+ OUT_RING( depth_boxes[i].ui[CLEAR_Y2] );
+ OUT_RING( depth_boxes[i].ui[CLEAR_DEPTH] );
ADVANCE_RING();
@@ -655,8 +654,6 @@ static void radeon_cp_dispatch_swap( drm_device_t *dev )
RING_LOCALS;
DRM_DEBUG( "%s\n", __FUNCTION__ );
- radeon_update_ring_snapshot( dev_priv );
-
#if RADEON_PERFORMANCE_BOXES
/* Do some trivial performance monitoring...
*/
@@ -724,8 +721,6 @@ static void radeon_cp_dispatch_flip( drm_device_t *dev )
RING_LOCALS;
DRM_DEBUG( "%s: page=%d\n", __FUNCTION__, dev_priv->current_page );
- radeon_update_ring_snapshot( dev_priv );
-
#if RADEON_PERFORMANCE_BOXES
/* Do some trivial performance monitoring...
*/
@@ -776,9 +771,7 @@ static void radeon_cp_dispatch_vertex( drm_device_t *dev,
RING_LOCALS;
DRM_DEBUG( "%s: nbox=%d\n", __FUNCTION__, sarea_priv->nbox );
- radeon_update_ring_snapshot( dev_priv );
-
- if ( 1 )
+ if ( 0 )
radeon_print_dirty( "dispatch_vertex", sarea_priv->dirty );
if ( buf->used ) {
@@ -844,8 +837,6 @@ static void radeon_cp_dispatch_indirect( drm_device_t *dev,
DRM_DEBUG( "indirect: buf=%d s=0x%x e=0x%x\n",
buf->idx, start, end );
- radeon_update_ring_snapshot( dev_priv );
-
if ( start != end ) {
int offset = (dev_priv->agp_buffers_offset
+ buf->offset + start);
@@ -908,8 +899,6 @@ static void radeon_cp_dispatch_indices( drm_device_t *dev,
RING_LOCALS;
DRM_DEBUG( "indices: s=%d e=%d c=%d\n", start, end, count );
- radeon_update_ring_snapshot( dev_priv );
-
if ( 0 )
radeon_print_dirty( "dispatch_indices", sarea_priv->dirty );
@@ -971,50 +960,67 @@ static void radeon_cp_dispatch_indices( drm_device_t *dev,
sarea_priv->nbox = 0;
}
-static int radeon_cp_dispatch_blit( drm_device_t *dev,
- drm_radeon_blit_t *blit )
+#define RADEON_MAX_TEXTURE_SIZE (RADEON_BUFFER_SIZE - 8 * sizeof(u32))
+
+static int radeon_cp_dispatch_texture( drm_device_t *dev,
+ drm_radeon_texture_t *tex,
+ drm_radeon_tex_image_t *image )
{
drm_radeon_private_t *dev_priv = dev->dev_private;
- drm_device_dma_t *dma = dev->dma;
drm_buf_t *buf;
drm_radeon_buf_priv_t *buf_priv;
u32 format;
- u32 *data;
- int dword_shift, dwords;
+ u32 *buffer;
+ u8 *data;
+ int size, dwords, tex_width, blit_width;
+ u32 y, height;
+ int ret = 0, i;
RING_LOCALS;
- DRM_DEBUG( "blit: ofs=0x%x p=%d f=%d x=%hd y=%hd w=%hd h=%hd\n",
- blit->offset >> 10, blit->pitch, blit->format,
- blit->x, blit->y, blit->width, blit->height );
- radeon_update_ring_snapshot( dev_priv );
+ /* FIXME: Be smarter about this...
+ */
+ buf = radeon_freelist_get( dev );
+ if ( !buf ) return -EAGAIN;
+
+ DRM_DEBUG( "tex: ofs=0x%x p=%d f=%d x=%hd y=%hd w=%hd h=%hd\n",
+ tex->offset >> 10, tex->pitch, tex->format,
+ image->x, image->y, image->width, image->height );
+
+ buf_priv = buf->dev_private;
/* The compiler won't optimize away a division by a variable,
* even if the only legal values are powers of two. Thus, we'll
* use a shift instead.
*/
- switch ( blit->format ) {
- case RADEON_TXF_32BPP_ARGB8888:
- case RADEON_TXF_32BPP_RGBA8888:
+ switch ( tex->format ) {
+ case RADEON_TXFORMAT_ARGB8888:
+ case RADEON_TXFORMAT_RGBA8888:
format = RADEON_COLOR_FORMAT_ARGB8888;
- dword_shift = 0;
+ tex_width = tex->width * 4;
+ blit_width = image->width * 4;
break;
- case RADEON_TXF_16BPP_AI88:
- case RADEON_TXF_16BPP_ARGB1555:
- case RADEON_TXF_16BPP_RGB565:
- case RADEON_TXF_16BPP_ARGB4444:
+ case RADEON_TXFORMAT_AI88:
+ case RADEON_TXFORMAT_ARGB1555:
+ case RADEON_TXFORMAT_RGB565:
+ case RADEON_TXFORMAT_ARGB4444:
format = RADEON_COLOR_FORMAT_RGB565;
- dword_shift = 1;
+ tex_width = tex->width * 2;
+ blit_width = image->width * 2;
break;
- case RADEON_TXF_8BPP_I:
- case RADEON_TXF_8BPP_RGB332:
+ case RADEON_TXFORMAT_I8:
+ case RADEON_TXFORMAT_RGB332:
format = RADEON_COLOR_FORMAT_CI8;
- dword_shift = 2;
+ tex_width = tex->width * 1;
+ blit_width = image->width * 1;
break;
default:
- DRM_ERROR( "invalid blit format %d\n", blit->format );
+ DRM_ERROR( "invalid texture format %d\n", tex->format );
return -EINVAL;
}
+ DRM_DEBUG( " tex=%dx%d blit=%d\n",
+ tex_width, tex->height, blit_width );
+
/* Flush the pixel cache. This ensures no pixel data gets mixed
* up with the texture data from the host data blit, otherwise
* part of the texture image may be corrupted.
@@ -1026,46 +1032,88 @@ static int radeon_cp_dispatch_blit( drm_device_t *dev,
ADVANCE_RING();
- /* Dispatch the indirect buffer.
+ /* Make a copy of the parameters in case we have to update them
+ * for a multi-pass texture blit.
*/
- buf = dma->buflist[blit->idx];
- buf_priv = buf->dev_private;
+ y = image->y;
+ height = image->height;
+ data = (u8 *)image->data;
- if ( buf->pid != current->pid ) {
- DRM_ERROR( "process %d using buffer owned by %d\n",
- current->pid, buf->pid );
- return -EINVAL;
- }
- if ( buf->pending ) {
- DRM_ERROR( "sending pending buffer %d\n", blit->idx );
- return -EINVAL;
- }
+ size = height * blit_width;
- buf_priv->discard = 1;
+ if ( size > RADEON_MAX_TEXTURE_SIZE ) {
+ /* Texture image is too large, do a multipass upload */
+ ret = -EAGAIN;
- dwords = (blit->width * blit->height) >> dword_shift;
- if ( !dwords ) dwords = 1;
+ /* Adjust the blit size to fit the indirect buffer */
+ height = RADEON_MAX_TEXTURE_SIZE / blit_width;
+ size = height * blit_width;
- data = (u32 *)((char *)dev_priv->buffers->handle + buf->offset);
+ /* Update the input parameters for next time */
+ image->y += height;
+ image->height -= height;
+ image->data = (char *)image->data + size;
- data[0] = CP_PACKET3( RADEON_CNTL_HOSTDATA_BLT, dwords + 6 );
- data[1] = (RADEON_GMC_DST_PITCH_OFFSET_CNTL |
- RADEON_GMC_BRUSH_NONE |
- (format << 8) |
- RADEON_GMC_SRC_DATATYPE_COLOR |
- RADEON_ROP3_S |
- RADEON_DP_SRC_SOURCE_HOST_DATA |
- RADEON_GMC_CLR_CMP_CNTL_DIS |
- RADEON_GMC_WR_MSK_DIS);
+ if ( copy_to_user( tex->image, image, sizeof(*image) ) ) {
+ DRM_ERROR( "EFAULT on tex->image\n" );
+ return -EFAULT;
+ }
+ } else if ( size < 4 ) {
+ size = 4;
+ }
- data[2] = (blit->pitch << 22) | (blit->offset >> 10);
- data[3] = 0xffffffff;
- data[4] = 0xffffffff;
- data[5] = (blit->y << 16) | blit->x;
- data[6] = (blit->height << 16) | blit->width;
- data[7] = dwords;
+ dwords = size / 4;
+ /* Dispatch the indirect buffer.
+ */
+ buffer = (u32 *)((char *)dev_priv->buffers->handle + buf->offset);
+
+ buffer[0] = CP_PACKET3( RADEON_CNTL_HOSTDATA_BLT, dwords + 6 );
+ buffer[1] = (RADEON_GMC_DST_PITCH_OFFSET_CNTL |
+ RADEON_GMC_BRUSH_NONE |
+ (format << 8) |
+ RADEON_GMC_SRC_DATATYPE_COLOR |
+ RADEON_ROP3_S |
+ RADEON_DP_SRC_SOURCE_HOST_DATA |
+ RADEON_GMC_CLR_CMP_CNTL_DIS |
+ RADEON_GMC_WR_MSK_DIS);
+
+ buffer[2] = (tex->pitch << 22) | (tex->offset >> 10);
+ buffer[3] = 0xffffffff;
+ buffer[4] = 0xffffffff;
+ buffer[5] = (y << 16) | image->x;
+ buffer[6] = (height << 16) | image->width;
+ buffer[7] = dwords;
+
+ buffer += 8;
+
+ if ( tex_width >= 32 ) {
+ /* Texture image width is larger than the minimum, so we
+ * can upload it directly.
+ */
+ if ( copy_from_user( buffer, data, dwords * sizeof(u32) ) ) {
+ DRM_ERROR( "EFAULT on data, %d dwords\n", dwords );
+ return -EFAULT;
+ }
+ } else {
+ /* Texture image width is less than the minimum, so we
+ * need to pad out each image scanline to the minimum
+ * width.
+ */
+ for ( i = 0 ; i < tex->height ; i++ ) {
+ if ( copy_from_user( buffer, data, tex_width ) ) {
+ DRM_ERROR( "EFAULT on pad, %d bytes\n",
+ tex_width );
+ return -EFAULT;
+ }
+ buffer += 8;
+ data += tex_width;
+ }
+ }
+
+ buf->pid = current->pid;
buf->used = (dwords + 8) * sizeof(u32);
+ buf_priv->discard = 1;
radeon_cp_dispatch_indirect( dev, buf, 0, buf->used );
@@ -1080,7 +1128,7 @@ static int radeon_cp_dispatch_blit( drm_device_t *dev,
ADVANCE_RING();
- return 0;
+ return ret;
}
static void radeon_cp_dispatch_stipple( drm_device_t *dev, u32 *stipple )
@@ -1090,8 +1138,6 @@ static void radeon_cp_dispatch_stipple( drm_device_t *dev, u32 *stipple )
RING_LOCALS;
DRM_DEBUG( "%s\n", __FUNCTION__ );
- radeon_update_ring_snapshot( dev_priv );
-
BEGIN_RING( 35 );
OUT_RING( CP_PACKET0( RADEON_RE_STIPPLE_ADDR, 0 ) );
@@ -1118,22 +1164,25 @@ int radeon_cp_clear( struct inode *inode, struct file *filp,
drm_radeon_private_t *dev_priv = dev->dev_private;
drm_radeon_sarea_t *sarea_priv = dev_priv->sarea_priv;
drm_radeon_clear_t clear;
+ drm_radeon_clear_rect_t depth_boxes[RADEON_NR_SAREA_CLIPRECTS];
DRM_DEBUG( "%s\n", __FUNCTION__ );
- if ( !_DRM_LOCK_IS_HELD( dev->lock.hw_lock->lock ) ||
- dev->lock.pid != current->pid ) {
- DRM_ERROR( "%s called without lock held\n", __FUNCTION__ );
- return -EINVAL;
- }
+ LOCK_TEST_WITH_RETURN( dev );
- if ( copy_from_user( &clear, (drm_radeon_clear_t *) arg,
+ if ( copy_from_user( &clear, (drm_radeon_clear_t *)arg,
sizeof(clear) ) )
return -EFAULT;
+ RING_SPACE_TEST_WITH_RETURN( dev_priv );
+
if ( sarea_priv->nbox > RADEON_NR_SAREA_CLIPRECTS )
sarea_priv->nbox = RADEON_NR_SAREA_CLIPRECTS;
- radeon_cp_dispatch_clear( dev, &clear );
+ if ( copy_from_user( &depth_boxes, clear.depth_boxes,
+ sarea_priv->nbox * sizeof(depth_boxes[0]) ) )
+ return -EFAULT;
+
+ radeon_cp_dispatch_clear( dev, &clear, depth_boxes );
return 0;
}
@@ -1147,11 +1196,9 @@ int radeon_cp_swap( struct inode *inode, struct file *filp,
drm_radeon_sarea_t *sarea_priv = dev_priv->sarea_priv;
DRM_DEBUG( "%s\n", __FUNCTION__ );
- if ( !_DRM_LOCK_IS_HELD( dev->lock.hw_lock->lock ) ||
- dev->lock.pid != current->pid ) {
- DRM_ERROR( "%s called without lock held\n", __FUNCTION__ );
- return -EINVAL;
- }
+ LOCK_TEST_WITH_RETURN( dev );
+
+ RING_SPACE_TEST_WITH_RETURN( dev_priv );
if ( sarea_priv->nbox > RADEON_NR_SAREA_CLIPRECTS )
sarea_priv->nbox = RADEON_NR_SAREA_CLIPRECTS;
@@ -1178,11 +1225,8 @@ int radeon_cp_vertex( struct inode *inode, struct file *filp,
drm_radeon_buf_priv_t *buf_priv;
drm_radeon_vertex_t vertex;
- if ( !_DRM_LOCK_IS_HELD( dev->lock.hw_lock->lock ) ||
- dev->lock.pid != current->pid ) {
- DRM_ERROR( "%s called without lock held\n", __FUNCTION__ );
- return -EINVAL;
- }
+ LOCK_TEST_WITH_RETURN( dev );
+
if ( !dev_priv || dev_priv->is_pci ) {
DRM_ERROR( "%s called with a PCI card\n", __FUNCTION__ );
return -EINVAL;
@@ -1207,7 +1251,8 @@ int radeon_cp_vertex( struct inode *inode, struct file *filp,
return -EINVAL;
}
- VB_AGE_CHECK_WITH_RET( dev_priv );
+ RING_SPACE_TEST_WITH_RETURN( dev_priv );
+ VB_AGE_TEST_WITH_RETURN( dev_priv );
buf = dma->buflist[vertex.idx];
buf_priv = buf->dev_private;
@@ -1243,11 +1288,8 @@ int radeon_cp_indices( struct inode *inode, struct file *filp,
drm_radeon_indices_t elts;
int count;
- if ( !_DRM_LOCK_IS_HELD( dev->lock.hw_lock->lock ) ||
- dev->lock.pid != current->pid ) {
- DRM_ERROR( "%s called without lock held\n", __FUNCTION__ );
- return -EINVAL;
- }
+ LOCK_TEST_WITH_RETURN( dev );
+
if ( !dev_priv || dev_priv->is_pci ) {
DRM_ERROR( "%s called with a PCI card\n", __FUNCTION__ );
return -EINVAL;
@@ -1272,7 +1314,8 @@ int radeon_cp_indices( struct inode *inode, struct file *filp,
return -EINVAL;
}
- VB_AGE_CHECK_WITH_RET( dev_priv );
+ RING_SPACE_TEST_WITH_RETURN( dev_priv );
+ VB_AGE_TEST_WITH_RETURN( dev_priv );
buf = dma->buflist[elts.idx];
buf_priv = buf->dev_private;
@@ -1308,37 +1351,34 @@ int radeon_cp_indices( struct inode *inode, struct file *filp,
return 0;
}
-int radeon_cp_blit( struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg )
+int radeon_cp_texture( struct inode *inode, struct file *filp,
+ unsigned int cmd, unsigned long arg )
{
drm_file_t *priv = filp->private_data;
drm_device_t *dev = priv->dev;
drm_radeon_private_t *dev_priv = dev->dev_private;
- drm_device_dma_t *dma = dev->dma;
- drm_radeon_blit_t blit;
+ drm_radeon_texture_t tex;
+ drm_radeon_tex_image_t image;
- if ( !_DRM_LOCK_IS_HELD( dev->lock.hw_lock->lock ) ||
- dev->lock.pid != current->pid ) {
- DRM_ERROR( "%s called without lock held\n", __FUNCTION__ );
- return -EINVAL;
- }
+ LOCK_TEST_WITH_RETURN( dev );
- if ( copy_from_user( &blit, (drm_radeon_blit_t *)arg,
- sizeof(blit) ) )
+ if ( copy_from_user( &tex, (drm_radeon_texture_t *)arg, sizeof(tex) ) )
return -EFAULT;
- DRM_DEBUG( "%s: pid=%d index=%d\n",
- __FUNCTION__, current->pid, blit.idx );
-
- if ( blit.idx < 0 || blit.idx > dma->buf_count ) {
- DRM_ERROR( "sending %d buffers (of %d max)\n",
- blit.idx, dma->buf_count );
+ if ( tex.image == NULL ) {
+ DRM_ERROR( "null texture image!\n" );
return -EINVAL;
}
- VB_AGE_CHECK_WITH_RET( dev_priv );
+ if ( copy_from_user( &image,
+ (drm_radeon_tex_image_t *)tex.image,
+ sizeof(image) ) )
+ return -EFAULT;
+
+ RING_SPACE_TEST_WITH_RETURN( dev_priv );
+ VB_AGE_TEST_WITH_RETURN( dev_priv );
- return radeon_cp_dispatch_blit( dev, &blit );
+ return radeon_cp_dispatch_texture( dev, &tex, &image );
}
int radeon_cp_stipple( struct inode *inode, struct file *filp,
@@ -1346,23 +1386,21 @@ int radeon_cp_stipple( struct inode *inode, struct file *filp,
{
drm_file_t *priv = filp->private_data;
drm_device_t *dev = priv->dev;
+ drm_radeon_private_t *dev_priv = dev->dev_private;
drm_radeon_stipple_t stipple;
u32 mask[32];
- if ( !_DRM_LOCK_IS_HELD( dev->lock.hw_lock->lock ) ||
- dev->lock.pid != current->pid ) {
- DRM_ERROR( "%s called without lock held\n", __FUNCTION__ );
- return -EINVAL;
- }
+ LOCK_TEST_WITH_RETURN( dev );
if ( copy_from_user( &stipple, (drm_radeon_stipple_t *)arg,
sizeof(stipple) ) )
return -EFAULT;
- if ( copy_from_user( &mask, stipple.mask,
- 32 * sizeof(u32) ) )
+ if ( copy_from_user( &mask, stipple.mask, 32 * sizeof(u32) ) )
return -EFAULT;
+ RING_SPACE_TEST_WITH_RETURN( dev_priv );
+
radeon_cp_dispatch_stipple( dev, mask );
return 0;
@@ -1380,11 +1418,8 @@ int radeon_cp_indirect( struct inode *inode, struct file *filp,
drm_radeon_indirect_t indirect;
RING_LOCALS;
- if ( !_DRM_LOCK_IS_HELD( dev->lock.hw_lock->lock ) ||
- dev->lock.pid != current->pid ) {
- DRM_ERROR( "%s called without lock held\n", __FUNCTION__ );
- return -EINVAL;
- }
+ LOCK_TEST_WITH_RETURN( dev );
+
if ( !dev_priv || dev_priv->is_pci ) {
DRM_ERROR( "%s called with a PCI card\n", __FUNCTION__ );
return -EINVAL;
@@ -1423,7 +1458,8 @@ int radeon_cp_indirect( struct inode *inode, struct file *filp,
return -EINVAL;
}
- VB_AGE_CHECK_WITH_RET( dev_priv );
+ RING_SPACE_TEST_WITH_RETURN( dev_priv );
+ VB_AGE_TEST_WITH_RETURN( dev_priv );
buf->used = indirect.end;
buf_priv->discard = indirect.discard;
diff --git a/linux/tdfx_drv.c b/linux/tdfx_drv.c
index 7d79a013..f478395f 100644
--- a/linux/tdfx_drv.c
+++ b/linux/tdfx_drv.c
@@ -27,670 +27,35 @@
* Authors:
* Rickard E. (Rik) Faith <faith@valinux.com>
* Daryll Strauss <daryll@valinux.com>
- *
+ * Gareth Hughes <gareth@valinux.com>
*/
#include <linux/config.h>
+#include "tdfx.h"
#include "drmP.h"
-#include "tdfx_drv.h"
-
-#define TDFX_NAME "tdfx"
-#define TDFX_DESC "3dfx Banshee/Voodoo3+"
-#define TDFX_DATE "20000928"
-#define TDFX_MAJOR 1
-#define TDFX_MINOR 0
-#define TDFX_PATCHLEVEL 0
-
-static drm_device_t tdfx_device;
-drm_ctx_t tdfx_res_ctx;
-
-static struct file_operations tdfx_fops = {
-#if LINUX_VERSION_CODE >= 0x020400
- /* This started being used during 2.4.0-test */
- owner: THIS_MODULE,
-#endif
- open: tdfx_open,
- flush: drm_flush,
- release: tdfx_release,
- ioctl: tdfx_ioctl,
- mmap: drm_mmap,
- read: drm_read,
- fasync: drm_fasync,
- poll: drm_poll,
-};
-
-static struct miscdevice tdfx_misc = {
- minor: MISC_DYNAMIC_MINOR,
- name: TDFX_NAME,
- fops: &tdfx_fops,
-};
-
-static drm_ioctl_desc_t tdfx_ioctls[] = {
- [DRM_IOCTL_NR(DRM_IOCTL_VERSION)] = { tdfx_version, 0, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_GET_UNIQUE)] = { drm_getunique, 0, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_GET_MAGIC)] = { drm_getmagic, 0, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_IRQ_BUSID)] = { drm_irq_busid, 0, 1 },
-
- [DRM_IOCTL_NR(DRM_IOCTL_SET_UNIQUE)] = { drm_setunique, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_BLOCK)] = { drm_block, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_UNBLOCK)] = { drm_unblock, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_AUTH_MAGIC)] = { drm_authmagic, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_ADD_MAP)] = { drm_addmap, 1, 1 },
-
- [DRM_IOCTL_NR(DRM_IOCTL_ADD_CTX)] = { tdfx_addctx, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_RM_CTX)] = { tdfx_rmctx, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_MOD_CTX)] = { tdfx_modctx, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_GET_CTX)] = { tdfx_getctx, 1, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_SWITCH_CTX)] = { tdfx_switchctx, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_NEW_CTX)] = { tdfx_newctx, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_RES_CTX)] = { tdfx_resctx, 1, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_ADD_DRAW)] = { drm_adddraw, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_RM_DRAW)] = { drm_rmdraw, 1, 1 },
- [DRM_IOCTL_NR(DRM_IOCTL_LOCK)] = { tdfx_lock, 1, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_UNLOCK)] = { tdfx_unlock, 1, 0 },
- [DRM_IOCTL_NR(DRM_IOCTL_FINISH)] = { drm_finish, 1, 0 },
-#if defined(CONFIG_AGP) || defined(CONFIG_AGP_MODULE)
- [DRM_IOCTL_NR(DRM_IOCTL_AGP_ACQUIRE)] = {drm_agp_acquire, 1, 1},
- [DRM_IOCTL_NR(DRM_IOCTL_AGP_RELEASE)] = {drm_agp_release, 1, 1},
- [DRM_IOCTL_NR(DRM_IOCTL_AGP_ENABLE)] = {drm_agp_enable, 1, 1},
- [DRM_IOCTL_NR(DRM_IOCTL_AGP_INFO)] = {drm_agp_info, 1, 1},
- [DRM_IOCTL_NR(DRM_IOCTL_AGP_ALLOC)] = {drm_agp_alloc, 1, 1},
- [DRM_IOCTL_NR(DRM_IOCTL_AGP_FREE)] = {drm_agp_free, 1, 1},
- [DRM_IOCTL_NR(DRM_IOCTL_AGP_BIND)] = {drm_agp_unbind, 1, 1},
- [DRM_IOCTL_NR(DRM_IOCTL_AGP_UNBIND)] = {drm_agp_bind, 1, 1},
-#endif
-};
-#define TDFX_IOCTL_COUNT DRM_ARRAY_SIZE(tdfx_ioctls)
-
-#ifdef MODULE
-static char *tdfx = NULL;
-#endif
-
-MODULE_AUTHOR("VA Linux Systems, Inc.");
-MODULE_DESCRIPTION("tdfx");
-MODULE_PARM(tdfx, "s");
-
-#ifndef MODULE
-/* tdfx_options is called by the kernel to parse command-line options
- * passed via the boot-loader (e.g., LILO). It calls the insmod option
- * routine, drm_parse_drm.
- */
-
-static int __init tdfx_options(char *str)
-{
- drm_parse_options(str);
- return 1;
-}
-
-__setup("tdfx=", tdfx_options);
-#endif
-
-static int tdfx_setup(drm_device_t *dev)
-{
- int i;
-
- atomic_set(&dev->ioctl_count, 0);
- atomic_set(&dev->vma_count, 0);
- dev->buf_use = 0;
- atomic_set(&dev->buf_alloc, 0);
-
- atomic_set(&dev->total_open, 0);
- atomic_set(&dev->total_close, 0);
- atomic_set(&dev->total_ioctl, 0);
- atomic_set(&dev->total_irq, 0);
- atomic_set(&dev->total_ctx, 0);
- atomic_set(&dev->total_locks, 0);
- atomic_set(&dev->total_unlocks, 0);
- atomic_set(&dev->total_contends, 0);
- atomic_set(&dev->total_sleeps, 0);
-
- for (i = 0; i < DRM_HASH_SIZE; i++) {
- dev->magiclist[i].head = NULL;
- dev->magiclist[i].tail = NULL;
- }
- dev->maplist = NULL;
- dev->map_count = 0;
- dev->vmalist = NULL;
- dev->lock.hw_lock = NULL;
- init_waitqueue_head(&dev->lock.lock_queue);
- dev->queue_count = 0;
- dev->queue_reserved = 0;
- dev->queue_slots = 0;
- dev->queuelist = NULL;
- dev->irq = 0;
- dev->context_flag = 0;
- dev->interrupt_flag = 0;
- dev->dma = 0;
- dev->dma_flag = 0;
- dev->last_context = 0;
- dev->last_switch = 0;
- dev->last_checked = 0;
- init_timer(&dev->timer);
- init_waitqueue_head(&dev->context_wait);
-
- dev->ctx_start = 0;
- dev->lck_start = 0;
-
- dev->buf_rp = dev->buf;
- dev->buf_wp = dev->buf;
- dev->buf_end = dev->buf + DRM_BSZ;
- dev->buf_async = NULL;
- init_waitqueue_head(&dev->buf_readers);
- init_waitqueue_head(&dev->buf_writers);
-
- tdfx_res_ctx.handle=-1;
-
- DRM_DEBUG("\n");
-
- /* The kernel's context could be created here, but is now created
- in drm_dma_enqueue. This is more resource-efficient for
- hardware that does not do DMA, but may mean that
- drm_select_queue fails between the time the interrupt is
- initialized and the time the queues are initialized. */
-
- return 0;
-}
-
-
-static int tdfx_takedown(drm_device_t *dev)
-{
- int i;
- drm_magic_entry_t *pt, *next;
- drm_map_t *map;
- drm_vma_entry_t *vma, *vma_next;
-
- DRM_DEBUG("\n");
-
- down(&dev->struct_sem);
- del_timer(&dev->timer);
-
- if (dev->devname) {
- drm_free(dev->devname, strlen(dev->devname)+1, DRM_MEM_DRIVER);
- dev->devname = NULL;
- }
-
- if (dev->unique) {
- drm_free(dev->unique, strlen(dev->unique)+1, DRM_MEM_DRIVER);
- dev->unique = NULL;
- dev->unique_len = 0;
- }
- /* Clear pid list */
- for (i = 0; i < DRM_HASH_SIZE; i++) {
- for (pt = dev->magiclist[i].head; pt; pt = next) {
- next = pt->next;
- drm_free(pt, sizeof(*pt), DRM_MEM_MAGIC);
- }
- dev->magiclist[i].head = dev->magiclist[i].tail = NULL;
- }
-#if defined(CONFIG_AGP) || defined(CONFIG_AGP_MODULE)
- /* Clear AGP information */
- if (dev->agp) {
- drm_agp_mem_t *temp;
- drm_agp_mem_t *temp_next;
-
- temp = dev->agp->memory;
- while(temp != NULL) {
- temp_next = temp->next;
- drm_free_agp(temp->memory, temp->pages);
- drm_free(temp, sizeof(*temp), DRM_MEM_AGPLISTS);
- temp = temp_next;
- }
- if (dev->agp->acquired) _drm_agp_release();
- }
-#endif
- /* Clear vma list (only built for debugging) */
- if (dev->vmalist) {
- for (vma = dev->vmalist; vma; vma = vma_next) {
- vma_next = vma->next;
- drm_free(vma, sizeof(*vma), DRM_MEM_VMAS);
- }
- dev->vmalist = NULL;
- }
-
- /* Clear map area and mtrr information */
- if (dev->maplist) {
- for (i = 0; i < dev->map_count; i++) {
- map = dev->maplist[i];
- switch (map->type) {
- case _DRM_REGISTERS:
- case _DRM_FRAME_BUFFER:
-#ifdef CONFIG_MTRR
- if (map->mtrr >= 0) {
- int retcode;
- retcode = mtrr_del(map->mtrr,
- map->offset,
- map->size);
- DRM_DEBUG("mtrr_del = %d\n", retcode);
- }
-#endif
- drm_ioremapfree(map->handle, map->size);
- break;
- case _DRM_SHM:
- drm_free_pages((unsigned long)map->handle,
- drm_order(map->size)
- - PAGE_SHIFT,
- DRM_MEM_SAREA);
- break;
- case _DRM_AGP:
- /* Do nothing here, because this is all
- handled in the AGP/GART driver. */
- break;
- }
- drm_free(map, sizeof(*map), DRM_MEM_MAPS);
- }
- drm_free(dev->maplist,
- dev->map_count * sizeof(*dev->maplist),
- DRM_MEM_MAPS);
- dev->maplist = NULL;
- dev->map_count = 0;
- }
-
- if (dev->lock.hw_lock) {
- dev->lock.hw_lock = NULL; /* SHM removed */
- dev->lock.pid = 0;
- wake_up_interruptible(&dev->lock.lock_queue);
- }
- up(&dev->struct_sem);
-
- return 0;
-}
-
-/* tdfx_init is called via init_module at module load time, or via
- * linux/init/main.c (this is not currently supported). */
-
-static int __init tdfx_init(void)
-{
- int retcode;
- drm_device_t *dev = &tdfx_device;
-
- DRM_DEBUG("\n");
-
- memset((void *)dev, 0, sizeof(*dev));
- dev->count_lock = SPIN_LOCK_UNLOCKED;
- sema_init(&dev->struct_sem, 1);
-
-#ifdef MODULE
- drm_parse_options(tdfx);
-#endif
-
- if ((retcode = misc_register(&tdfx_misc))) {
- DRM_ERROR("Cannot register \"%s\"\n", TDFX_NAME);
- return retcode;
- }
- dev->device = MKDEV(MISC_MAJOR, tdfx_misc.minor);
- dev->name = TDFX_NAME;
-
- drm_mem_init();
- drm_proc_init(dev);
-#if defined(CONFIG_AGP) || defined(CONFIG_AGP_MODULE)
- dev->agp = drm_agp_init();
-#endif
- if((retcode = drm_ctxbitmap_init(dev))) {
- DRM_ERROR("Cannot allocate memory for context bitmap.\n");
- drm_proc_cleanup();
- misc_deregister(&tdfx_misc);
- tdfx_takedown(dev);
- return retcode;
- }
-
- DRM_INFO("Initialized %s %d.%d.%d %s on minor %d\n",
- TDFX_NAME,
- TDFX_MAJOR,
- TDFX_MINOR,
- TDFX_PATCHLEVEL,
- TDFX_DATE,
- tdfx_misc.minor);
-
- return 0;
-}
-
-/* tdfx_cleanup is called via cleanup_module at module unload time. */
-
-static void __exit tdfx_cleanup(void)
-{
- drm_device_t *dev = &tdfx_device;
-
- DRM_DEBUG("\n");
-
- drm_proc_cleanup();
- if (misc_deregister(&tdfx_misc)) {
- DRM_ERROR("Cannot unload module\n");
- } else {
- DRM_INFO("Module unloaded\n");
- }
- drm_ctxbitmap_cleanup(dev);
- tdfx_takedown(dev);
-#if defined(CONFIG_AGP) || defined(CONFIG_AGP_MODULE)
- if (dev->agp) {
- drm_agp_uninit();
- drm_free(dev->agp, sizeof(*dev->agp), DRM_MEM_AGPLISTS);
- dev->agp = NULL;
- }
-#endif
-}
-
-module_init(tdfx_init);
-module_exit(tdfx_cleanup);
-
-
-int tdfx_version(struct inode *inode, struct file *filp, unsigned int cmd,
- unsigned long arg)
-{
- drm_version_t version;
- int len;
-
- if (copy_from_user(&version,
- (drm_version_t *)arg,
- sizeof(version)))
- return -EFAULT;
-
-#define DRM_COPY(name,value) \
- len = strlen(value); \
- if (len > name##_len) len = name##_len; \
- name##_len = strlen(value); \
- if (len && name) { \
- if (copy_to_user(name, value, len)) \
- return -EFAULT; \
- }
-
- version.version_major = TDFX_MAJOR;
- version.version_minor = TDFX_MINOR;
- version.version_patchlevel = TDFX_PATCHLEVEL;
-
- DRM_COPY(version.name, TDFX_NAME);
- DRM_COPY(version.date, TDFX_DATE);
- DRM_COPY(version.desc, TDFX_DESC);
-
- if (copy_to_user((drm_version_t *)arg,
- &version,
- sizeof(version)))
- return -EFAULT;
- return 0;
-}
-
-int tdfx_open(struct inode *inode, struct file *filp)
-{
- drm_device_t *dev = &tdfx_device;
- int retcode = 0;
-
- DRM_DEBUG("open_count = %d\n", dev->open_count);
- if (!(retcode = drm_open_helper(inode, filp, dev))) {
-#if LINUX_VERSION_CODE < 0x020333
- MOD_INC_USE_COUNT; /* Needed before Linux 2.3.51 */
-#endif
- atomic_inc(&dev->total_open);
- spin_lock(&dev->count_lock);
- if (!dev->open_count++) {
- spin_unlock(&dev->count_lock);
- return tdfx_setup(dev);
- }
- spin_unlock(&dev->count_lock);
- }
- return retcode;
-}
-
-int tdfx_release(struct inode *inode, struct file *filp)
-{
- drm_file_t *priv = filp->private_data;
- drm_device_t *dev;
- int retcode = 0;
-
- lock_kernel();
- dev = priv->dev;
-
- DRM_DEBUG("open_count = %d\n", dev->open_count);
- if (!(retcode = drm_release(inode, filp))) {
-#if LINUX_VERSION_CODE < 0x020333
- MOD_DEC_USE_COUNT; /* Needed before Linux 2.3.51 */
-#endif
- atomic_inc(&dev->total_close);
- spin_lock(&dev->count_lock);
- if (!--dev->open_count) {
- if (atomic_read(&dev->ioctl_count) || dev->blocked) {
- DRM_ERROR("Device busy: %d %d\n",
- atomic_read(&dev->ioctl_count),
- dev->blocked);
- spin_unlock(&dev->count_lock);
- unlock_kernel();
- return -EBUSY;
- }
- spin_unlock(&dev->count_lock);
- unlock_kernel();
- return tdfx_takedown(dev);
- }
- spin_unlock(&dev->count_lock);
- }
-
- unlock_kernel();
- return retcode;
-}
-
-/* tdfx_ioctl is called whenever a process performs an ioctl on /dev/drm. */
-
-int tdfx_ioctl(struct inode *inode, struct file *filp, unsigned int cmd,
- unsigned long arg)
-{
- int nr = DRM_IOCTL_NR(cmd);
- drm_file_t *priv = filp->private_data;
- drm_device_t *dev = priv->dev;
- int retcode = 0;
- drm_ioctl_desc_t *ioctl;
- drm_ioctl_t *func;
-
- atomic_inc(&dev->ioctl_count);
- atomic_inc(&dev->total_ioctl);
- ++priv->ioctl_count;
-
- DRM_DEBUG("pid = %d, cmd = 0x%02x, nr = 0x%02x, dev 0x%x, auth = %d\n",
- current->pid, cmd, nr, dev->device, priv->authenticated);
-
- if (nr >= TDFX_IOCTL_COUNT) {
- retcode = -EINVAL;
- } else {
- ioctl = &tdfx_ioctls[nr];
- func = ioctl->func;
-
- if (!func) {
- DRM_DEBUG("no function\n");
- retcode = -EINVAL;
- } else if ((ioctl->root_only && !capable(CAP_SYS_ADMIN))
- || (ioctl->auth_needed && !priv->authenticated)) {
- retcode = -EACCES;
- } else {
- retcode = (func)(inode, filp, cmd, arg);
- }
- }
-
- atomic_dec(&dev->ioctl_count);
- return retcode;
-}
-
-int tdfx_lock(struct inode *inode, struct file *filp, unsigned int cmd,
- unsigned long arg)
-{
- drm_file_t *priv = filp->private_data;
- drm_device_t *dev = priv->dev;
- DECLARE_WAITQUEUE(entry, current);
- int ret = 0;
- drm_lock_t lock;
-#if DRM_DMA_HISTOGRAM
- cycles_t start;
-
- dev->lck_start = start = get_cycles();
-#endif
-
- if (copy_from_user(&lock, (drm_lock_t *)arg, sizeof(lock)))
- return -EFAULT;
-
- if (lock.context == DRM_KERNEL_CONTEXT) {
- DRM_ERROR("Process %d using kernel context %d\n",
- current->pid, lock.context);
- return -EINVAL;
- }
-
- DRM_DEBUG("%d (pid %d) requests lock (0x%08x), flags = 0x%08x\n",
- lock.context, current->pid, dev->lock.hw_lock->lock,
- lock.flags);
-
-#if 0
- /* dev->queue_count == 0 right now for
- tdfx. FIXME? */
- if (lock.context < 0 || lock.context >= dev->queue_count)
- return -EINVAL;
-#endif
-
- if (!ret) {
-#if 0
- if (_DRM_LOCKING_CONTEXT(dev->lock.hw_lock->lock)
- != lock.context) {
- long j = jiffies - dev->lock.lock_time;
-
- if (lock.context == tdfx_res_ctx.handle &&
- j >= 0 && j < DRM_LOCK_SLICE) {
- /* Can't take lock if we just had it and
- there is contention. */
- DRM_DEBUG("%d (pid %d) delayed j=%d dev=%d jiffies=%d\n",
- lock.context, current->pid, j,
- dev->lock.lock_time, jiffies);
- current->state = TASK_INTERRUPTIBLE;
- current->policy |= SCHED_YIELD;
- schedule_timeout(DRM_LOCK_SLICE-j);
- DRM_DEBUG("jiffies=%d\n", jiffies);
- }
- }
-#endif
- add_wait_queue(&dev->lock.lock_queue, &entry);
- for (;;) {
- current->state = TASK_INTERRUPTIBLE;
- if (!dev->lock.hw_lock) {
- /* Device has been unregistered */
- ret = -EINTR;
- break;
- }
- if (drm_lock_take(&dev->lock.hw_lock->lock,
- lock.context)) {
- dev->lock.pid = current->pid;
- dev->lock.lock_time = jiffies;
- atomic_inc(&dev->total_locks);
- break; /* Got lock */
- }
-
- /* Contention */
- atomic_inc(&dev->total_sleeps);
-#if 1
- current->policy |= SCHED_YIELD;
-#endif
- schedule();
- if (signal_pending(current)) {
- ret = -ERESTARTSYS;
- break;
- }
- }
- current->state = TASK_RUNNING;
- remove_wait_queue(&dev->lock.lock_queue, &entry);
- }
-
-#if 0
- if (!ret && dev->last_context != lock.context &&
- lock.context != tdfx_res_ctx.handle &&
- dev->last_context != tdfx_res_ctx.handle) {
- add_wait_queue(&dev->context_wait, &entry);
- current->state = TASK_INTERRUPTIBLE;
- /* PRE: dev->last_context != lock.context */
- tdfx_context_switch(dev, dev->last_context, lock.context);
- /* POST: we will wait for the context
- switch and will dispatch on a later call
- when dev->last_context == lock.context
- NOTE WE HOLD THE LOCK THROUGHOUT THIS
- TIME! */
- current->policy |= SCHED_YIELD;
- schedule();
- current->state = TASK_RUNNING;
- remove_wait_queue(&dev->context_wait, &entry);
- if (signal_pending(current)) {
- ret = -EINTR;
- } else if (dev->last_context != lock.context) {
- DRM_ERROR("Context mismatch: %d %d\n",
- dev->last_context, lock.context);
- }
- }
-#endif
-
- if (!ret) {
- sigemptyset(&dev->sigmask);
- sigaddset(&dev->sigmask, SIGSTOP);
- sigaddset(&dev->sigmask, SIGTSTP);
- sigaddset(&dev->sigmask, SIGTTIN);
- sigaddset(&dev->sigmask, SIGTTOU);
- dev->sigdata.context = lock.context;
- dev->sigdata.lock = dev->lock.hw_lock;
- block_all_signals(drm_notifier, &dev->sigdata, &dev->sigmask);
-
- if (lock.flags & _DRM_LOCK_READY) {
- /* Wait for space in DMA/FIFO */
- }
- if (lock.flags & _DRM_LOCK_QUIESCENT) {
- /* Make hardware quiescent */
-#if 0
- tdfx_quiescent(dev);
-#endif
- }
- }
-
-#if LINUX_VERSION_CODE < 0x020400
- if (lock.context != tdfx_res_ctx.handle) {
- current->counter = 5;
- current->priority = DEF_PRIORITY/4;
- }
-#endif
- DRM_DEBUG("%d %s\n", lock.context, ret ? "interrupted" : "has lock");
-
-#if DRM_DMA_HISTOGRAM
- atomic_inc(&dev->histo.lacq[drm_histogram_slot(get_cycles() - start)]);
-#endif
-
- return ret;
-}
-
-
-int tdfx_unlock(struct inode *inode, struct file *filp, unsigned int cmd,
- unsigned long arg)
-{
- drm_file_t *priv = filp->private_data;
- drm_device_t *dev = priv->dev;
- drm_lock_t lock;
-
- if (copy_from_user(&lock, (drm_lock_t *)arg, sizeof(lock)))
- return -EFAULT;
-
- if (lock.context == DRM_KERNEL_CONTEXT) {
- DRM_ERROR("Process %d using kernel context %d\n",
- current->pid, lock.context);
- return -EINVAL;
- }
-
- DRM_DEBUG("%d frees lock (%d holds)\n",
- lock.context,
- _DRM_LOCKING_CONTEXT(dev->lock.hw_lock->lock));
- atomic_inc(&dev->total_unlocks);
- if (_DRM_LOCK_IS_CONT(dev->lock.hw_lock->lock))
- atomic_inc(&dev->total_contends);
- drm_lock_transfer(dev, &dev->lock.hw_lock->lock, DRM_KERNEL_CONTEXT);
- /* FIXME: Try to send data to card here */
- if (!dev->context_flag) {
- if (drm_lock_free(dev, &dev->lock.hw_lock->lock,
- DRM_KERNEL_CONTEXT)) {
- DRM_ERROR("\n");
- }
- }
-
-#if LINUX_VERSION_CODE < 0x020400
- if (lock.context != tdfx_res_ctx.handle) {
- current->counter = 5;
- current->priority = DEF_PRIORITY;
- }
-#endif
- unblock_all_signals();
- return 0;
-}
+#define DRIVER_AUTHOR "VA Linux Systems Inc."
+
+#define DRIVER_NAME "tdfx"
+#define DRIVER_DESC "3dfx Banshee/Voodoo3+"
+#define DRIVER_DATE "20010216"
+
+#define DRIVER_MAJOR 1
+#define DRIVER_MINOR 0
+#define DRIVER_PATCHLEVEL 0
+
+
+#include "drm_auth.h"
+#include "drm_bufs.h"
+#include "drm_context.h"
+#include "drm_dma.h"
+#include "drm_drawable.h"
+#include "drm_drv.h"
+#include "drm_fops.h"
+#include "drm_init.h"
+#include "drm_ioctl.h"
+#include "drm_lock.h"
+#include "drm_memory.h"
+#include "drm_proc.h"
+#include "drm_vm.h"
+#include "drm_stub.h"
diff --git a/shared-core/drm.h b/shared-core/drm.h
index dc3d262d..f1abaabf 100644
--- a/shared-core/drm.h
+++ b/shared-core/drm.h
@@ -19,10 +19,10 @@
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
- * DEALINGS IN THE SOFTWARE.
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
*
* Authors:
* Rickard E. (Rik) Faith <faith@valinux.com>
@@ -36,6 +36,7 @@
#define _DRM_H_
#if defined(__linux__)
+#include <linux/config.h>
#include <asm/ioctl.h> /* For _IO* macros */
#define DRM_IOCTL_NR(n) _IOC_NR(n)
#elif defined(__FreeBSD__)
@@ -43,15 +44,8 @@
#define DRM_IOCTL_NR(n) ((n) & 0xff)
#endif
-#define DRM_PROC_DEVICES "/proc/devices"
-#define DRM_PROC_MISC "/proc/misc"
-#define DRM_PROC_DRM "/proc/drm"
-#define DRM_DEV_DRM "/dev/drm"
-#define DRM_DEV_MODE (S_IRUSR|S_IWUSR|S_IRGRP|S_IWGRP)
-#define DRM_DEV_UID 0
-#define DRM_DEV_GID 0
-
-
+#define DRM_MAJOR 226
+#define DRM_MAX_MINOR 15
#define DRM_NAME "drm" /* Name in kernel, /dev, and /proc */
#define DRM_MIN_ORDER 5 /* At least 2^5 bytes = 32 bytes */
#define DRM_MAX_ORDER 22 /* Up to 2^22 bytes = 4MB */
@@ -72,12 +66,20 @@ typedef unsigned int drm_magic_t;
* XF86DRIClipRectRec in the server as well */
typedef struct drm_clip_rect {
- unsigned short x1;
- unsigned short y1;
- unsigned short x2;
- unsigned short y2;
+ unsigned short x1;
+ unsigned short y1;
+ unsigned short x2;
+ unsigned short y2;
} drm_clip_rect_t;
+typedef struct drm_tex_region {
+ unsigned char next;
+ unsigned char prev;
+ unsigned char in_use;
+ unsigned char padding;
+ unsigned int age;
+} drm_tex_region_t;
+
/* Seperate include files for the i810/mga/r128 specific structures */
#include "mga_drm.h"
#include "i810_drm.h"
@@ -136,9 +138,15 @@ typedef enum drm_map_flags {
_DRM_LOCKED = 0x04, /* shared, cached, locked */
_DRM_KERNEL = 0x08, /* kernel requires access */
_DRM_WRITE_COMBINING = 0x10, /* use write-combining if available */
- _DRM_CONTAINS_LOCK = 0x20 /* SHM page that contains lock */
+ _DRM_CONTAINS_LOCK = 0x20, /* SHM page that contains lock */
+ _DRM_REMOVABLE = 0x40 /* Removable mapping */
} drm_map_flags_t;
+typedef struct drm_ctx_priv_map {
+ unsigned int ctx_id; /* Context requesting private mapping */
+ void *handle; /* Handle of map */
+} drm_ctx_priv_map_t;
+
typedef struct drm_map {
unsigned long offset; /* Requested physical address (0 for SAREA)*/
unsigned long size; /* Requested physical size (bytes) */
@@ -150,6 +158,44 @@ typedef struct drm_map {
/* Private data */
} drm_map_t;
+typedef struct drm_client {
+ int idx; /* Which client desired? */
+ int auth; /* Is client authenticated? */
+ unsigned long pid; /* Process id */
+ unsigned long uid; /* User id */
+ unsigned long magic; /* Magic */
+ unsigned long iocs; /* Ioctl count */
+} drm_client_t;
+
+typedef enum {
+ _DRM_STAT_LOCK,
+ _DRM_STAT_OPENS,
+ _DRM_STAT_CLOSES,
+ _DRM_STAT_IOCTLS,
+ _DRM_STAT_LOCKS,
+ _DRM_STAT_UNLOCKS,
+ _DRM_STAT_VALUE, /* Generic value */
+ _DRM_STAT_BYTE, /* Generic byte counter (1024bytes/K) */
+ _DRM_STAT_COUNT, /* Generic non-byte counter (1000/k) */
+
+ _DRM_STAT_IRQ, /* IRQ */
+ _DRM_STAT_PRIMARY, /* Primary DMA bytes */
+ _DRM_STAT_SECONDARY, /* Secondary DMA bytes */
+ _DRM_STAT_DMA, /* DMA */
+ _DRM_STAT_SPECIAL, /* Special DMA (e.g., priority or polled) */
+ _DRM_STAT_MISSED /* Missed DMA opportunity */
+
+ /* Add to the *END* of the list */
+} drm_stat_type_t;
+
+typedef struct drm_stats {
+ unsigned long count;
+ struct {
+ unsigned long value;
+ drm_stat_type_t type;
+ } data[15];
+} drm_stats_t;
+
typedef enum drm_lock_flags {
_DRM_LOCK_READY = 0x01, /* Wait until hardware is ready for DMA */
_DRM_LOCK_QUIESCENT = 0x02, /* Wait until hardware quiescent */
@@ -309,6 +355,9 @@ typedef struct drm_agp_info {
#define DRM_IOCTL_GET_UNIQUE DRM_IOWR(0x01, drm_unique_t)
#define DRM_IOCTL_GET_MAGIC DRM_IOR( 0x02, drm_auth_t)
#define DRM_IOCTL_IRQ_BUSID DRM_IOWR(0x03, drm_irq_busid_t)
+#define DRM_IOCTL_GET_MAP DRM_IOWR(0x04, drm_map_t)
+#define DRM_IOCTL_GET_CLIENT DRM_IOWR(0x05, drm_client_t)
+#define DRM_IOCTL_GET_STATS DRM_IOR( 0x06, drm_stats_t)
#define DRM_IOCTL_SET_UNIQUE DRM_IOW( 0x10, drm_unique_t)
#define DRM_IOCTL_AUTH_MAGIC DRM_IOW( 0x11, drm_auth_t)
@@ -322,6 +371,11 @@ typedef struct drm_agp_info {
#define DRM_IOCTL_MAP_BUFS DRM_IOWR(0x19, drm_buf_map_t)
#define DRM_IOCTL_FREE_BUFS DRM_IOW( 0x1a, drm_buf_free_t)
+#define DRM_IOCTL_RM_MAP DRM_IOW( 0x1b, drm_map_t)
+
+#define DRM_IOCTL_SET_SAREA_CTX DRM_IOW( 0x1c, drm_ctx_priv_map_t)
+#define DRM_IOCTL_GET_SAREA_CTX DRM_IOWR(0x1d, drm_ctx_priv_map_t)
+
#define DRM_IOCTL_ADD_CTX DRM_IOWR(0x20, drm_ctx_t)
#define DRM_IOCTL_RM_CTX DRM_IOWR(0x21, drm_ctx_t)
#define DRM_IOCTL_MOD_CTX DRM_IOW( 0x22, drm_ctx_t)
@@ -345,17 +399,18 @@ typedef struct drm_agp_info {
#define DRM_IOCTL_AGP_BIND DRM_IOW( 0x36, drm_agp_binding_t)
#define DRM_IOCTL_AGP_UNBIND DRM_IOW( 0x37, drm_agp_binding_t)
-/* Mga specific ioctls */
+/* MGA specific ioctls */
#define DRM_IOCTL_MGA_INIT DRM_IOW( 0x40, drm_mga_init_t)
-#define DRM_IOCTL_MGA_SWAP DRM_IOW( 0x41, drm_mga_swap_t)
-#define DRM_IOCTL_MGA_CLEAR DRM_IOW( 0x42, drm_mga_clear_t)
-#define DRM_IOCTL_MGA_ILOAD DRM_IOW( 0x43, drm_mga_iload_t)
-#define DRM_IOCTL_MGA_VERTEX DRM_IOW( 0x44, drm_mga_vertex_t)
-#define DRM_IOCTL_MGA_FLUSH DRM_IOW( 0x45, drm_lock_t )
+#define DRM_IOCTL_MGA_FLUSH DRM_IOW( 0x41, drm_lock_t)
+#define DRM_IOCTL_MGA_RESET DRM_IO( 0x42)
+#define DRM_IOCTL_MGA_SWAP DRM_IO( 0x43)
+#define DRM_IOCTL_MGA_CLEAR DRM_IOW( 0x44, drm_mga_clear_t)
+#define DRM_IOCTL_MGA_VERTEX DRM_IOW( 0x45, drm_mga_vertex_t)
#define DRM_IOCTL_MGA_INDICES DRM_IOW( 0x46, drm_mga_indices_t)
-#define DRM_IOCTL_MGA_BLIT DRM_IOW( 0x47, drm_mga_blit_t)
+#define DRM_IOCTL_MGA_ILOAD DRM_IOW( 0x47, drm_mga_iload_t)
+#define DRM_IOCTL_MGA_BLIT DRM_IOW( 0x48, drm_mga_blit_t)
-/* I810 specific ioctls */
+/* i810 specific ioctls */
#define DRM_IOCTL_I810_INIT DRM_IOW( 0x40, drm_i810_init_t)
#define DRM_IOCTL_I810_VERTEX DRM_IOW( 0x41, drm_i810_vertex_t)
#define DRM_IOCTL_I810_CLEAR DRM_IOW( 0x42, drm_i810_clear_t)
@@ -395,7 +450,7 @@ typedef struct drm_agp_info {
#define DRM_IOCTL_RADEON_CLEAR DRM_IOW( 0x48, drm_radeon_clear_t)
#define DRM_IOCTL_RADEON_VERTEX DRM_IOW( 0x49, drm_radeon_vertex_t)
#define DRM_IOCTL_RADEON_INDICES DRM_IOW( 0x4a, drm_radeon_indices_t)
-#define DRM_IOCTL_RADEON_BLIT DRM_IOW( 0x4b, drm_radeon_blit_t)
+#define DRM_IOCTL_RADEON_TEXTURE DRM_IOWR(0x4b, drm_radeon_texture_t)
#define DRM_IOCTL_RADEON_STIPPLE DRM_IOW( 0x4c, drm_radeon_stipple_t)
#define DRM_IOCTL_RADEON_INDIRECT DRM_IOWR(0x4d, drm_radeon_indirect_t)
diff --git a/shared/drm.h b/shared/drm.h
index dc3d262d..f1abaabf 100644
--- a/shared/drm.h
+++ b/shared/drm.h
@@ -19,10 +19,10 @@
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
- * DEALINGS IN THE SOFTWARE.
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
*
* Authors:
* Rickard E. (Rik) Faith <faith@valinux.com>
@@ -36,6 +36,7 @@
#define _DRM_H_
#if defined(__linux__)
+#include <linux/config.h>
#include <asm/ioctl.h> /* For _IO* macros */
#define DRM_IOCTL_NR(n) _IOC_NR(n)
#elif defined(__FreeBSD__)
@@ -43,15 +44,8 @@
#define DRM_IOCTL_NR(n) ((n) & 0xff)
#endif
-#define DRM_PROC_DEVICES "/proc/devices"
-#define DRM_PROC_MISC "/proc/misc"
-#define DRM_PROC_DRM "/proc/drm"
-#define DRM_DEV_DRM "/dev/drm"
-#define DRM_DEV_MODE (S_IRUSR|S_IWUSR|S_IRGRP|S_IWGRP)
-#define DRM_DEV_UID 0
-#define DRM_DEV_GID 0
-
-
+#define DRM_MAJOR 226
+#define DRM_MAX_MINOR 15
#define DRM_NAME "drm" /* Name in kernel, /dev, and /proc */
#define DRM_MIN_ORDER 5 /* At least 2^5 bytes = 32 bytes */
#define DRM_MAX_ORDER 22 /* Up to 2^22 bytes = 4MB */
@@ -72,12 +66,20 @@ typedef unsigned int drm_magic_t;
* XF86DRIClipRectRec in the server as well */
typedef struct drm_clip_rect {
- unsigned short x1;
- unsigned short y1;
- unsigned short x2;
- unsigned short y2;
+ unsigned short x1;
+ unsigned short y1;
+ unsigned short x2;
+ unsigned short y2;
} drm_clip_rect_t;
+typedef struct drm_tex_region {
+ unsigned char next;
+ unsigned char prev;
+ unsigned char in_use;
+ unsigned char padding;
+ unsigned int age;
+} drm_tex_region_t;
+
/* Seperate include files for the i810/mga/r128 specific structures */
#include "mga_drm.h"
#include "i810_drm.h"
@@ -136,9 +138,15 @@ typedef enum drm_map_flags {
_DRM_LOCKED = 0x04, /* shared, cached, locked */
_DRM_KERNEL = 0x08, /* kernel requires access */
_DRM_WRITE_COMBINING = 0x10, /* use write-combining if available */
- _DRM_CONTAINS_LOCK = 0x20 /* SHM page that contains lock */
+ _DRM_CONTAINS_LOCK = 0x20, /* SHM page that contains lock */
+ _DRM_REMOVABLE = 0x40 /* Removable mapping */
} drm_map_flags_t;
+typedef struct drm_ctx_priv_map {
+ unsigned int ctx_id; /* Context requesting private mapping */
+ void *handle; /* Handle of map */
+} drm_ctx_priv_map_t;
+
typedef struct drm_map {
unsigned long offset; /* Requested physical address (0 for SAREA)*/
unsigned long size; /* Requested physical size (bytes) */
@@ -150,6 +158,44 @@ typedef struct drm_map {
/* Private data */
} drm_map_t;
+typedef struct drm_client {
+ int idx; /* Which client desired? */
+ int auth; /* Is client authenticated? */
+ unsigned long pid; /* Process id */
+ unsigned long uid; /* User id */
+ unsigned long magic; /* Magic */
+ unsigned long iocs; /* Ioctl count */
+} drm_client_t;
+
+typedef enum {
+ _DRM_STAT_LOCK,
+ _DRM_STAT_OPENS,
+ _DRM_STAT_CLOSES,
+ _DRM_STAT_IOCTLS,
+ _DRM_STAT_LOCKS,
+ _DRM_STAT_UNLOCKS,
+ _DRM_STAT_VALUE, /* Generic value */
+ _DRM_STAT_BYTE, /* Generic byte counter (1024bytes/K) */
+ _DRM_STAT_COUNT, /* Generic non-byte counter (1000/k) */
+
+ _DRM_STAT_IRQ, /* IRQ */
+ _DRM_STAT_PRIMARY, /* Primary DMA bytes */
+ _DRM_STAT_SECONDARY, /* Secondary DMA bytes */
+ _DRM_STAT_DMA, /* DMA */
+ _DRM_STAT_SPECIAL, /* Special DMA (e.g., priority or polled) */
+ _DRM_STAT_MISSED /* Missed DMA opportunity */
+
+ /* Add to the *END* of the list */
+} drm_stat_type_t;
+
+typedef struct drm_stats {
+ unsigned long count;
+ struct {
+ unsigned long value;
+ drm_stat_type_t type;
+ } data[15];
+} drm_stats_t;
+
typedef enum drm_lock_flags {
_DRM_LOCK_READY = 0x01, /* Wait until hardware is ready for DMA */
_DRM_LOCK_QUIESCENT = 0x02, /* Wait until hardware quiescent */
@@ -309,6 +355,9 @@ typedef struct drm_agp_info {
#define DRM_IOCTL_GET_UNIQUE DRM_IOWR(0x01, drm_unique_t)
#define DRM_IOCTL_GET_MAGIC DRM_IOR( 0x02, drm_auth_t)
#define DRM_IOCTL_IRQ_BUSID DRM_IOWR(0x03, drm_irq_busid_t)
+#define DRM_IOCTL_GET_MAP DRM_IOWR(0x04, drm_map_t)
+#define DRM_IOCTL_GET_CLIENT DRM_IOWR(0x05, drm_client_t)
+#define DRM_IOCTL_GET_STATS DRM_IOR( 0x06, drm_stats_t)
#define DRM_IOCTL_SET_UNIQUE DRM_IOW( 0x10, drm_unique_t)
#define DRM_IOCTL_AUTH_MAGIC DRM_IOW( 0x11, drm_auth_t)
@@ -322,6 +371,11 @@ typedef struct drm_agp_info {
#define DRM_IOCTL_MAP_BUFS DRM_IOWR(0x19, drm_buf_map_t)
#define DRM_IOCTL_FREE_BUFS DRM_IOW( 0x1a, drm_buf_free_t)
+#define DRM_IOCTL_RM_MAP DRM_IOW( 0x1b, drm_map_t)
+
+#define DRM_IOCTL_SET_SAREA_CTX DRM_IOW( 0x1c, drm_ctx_priv_map_t)
+#define DRM_IOCTL_GET_SAREA_CTX DRM_IOWR(0x1d, drm_ctx_priv_map_t)
+
#define DRM_IOCTL_ADD_CTX DRM_IOWR(0x20, drm_ctx_t)
#define DRM_IOCTL_RM_CTX DRM_IOWR(0x21, drm_ctx_t)
#define DRM_IOCTL_MOD_CTX DRM_IOW( 0x22, drm_ctx_t)
@@ -345,17 +399,18 @@ typedef struct drm_agp_info {
#define DRM_IOCTL_AGP_BIND DRM_IOW( 0x36, drm_agp_binding_t)
#define DRM_IOCTL_AGP_UNBIND DRM_IOW( 0x37, drm_agp_binding_t)
-/* Mga specific ioctls */
+/* MGA specific ioctls */
#define DRM_IOCTL_MGA_INIT DRM_IOW( 0x40, drm_mga_init_t)
-#define DRM_IOCTL_MGA_SWAP DRM_IOW( 0x41, drm_mga_swap_t)
-#define DRM_IOCTL_MGA_CLEAR DRM_IOW( 0x42, drm_mga_clear_t)
-#define DRM_IOCTL_MGA_ILOAD DRM_IOW( 0x43, drm_mga_iload_t)
-#define DRM_IOCTL_MGA_VERTEX DRM_IOW( 0x44, drm_mga_vertex_t)
-#define DRM_IOCTL_MGA_FLUSH DRM_IOW( 0x45, drm_lock_t )
+#define DRM_IOCTL_MGA_FLUSH DRM_IOW( 0x41, drm_lock_t)
+#define DRM_IOCTL_MGA_RESET DRM_IO( 0x42)
+#define DRM_IOCTL_MGA_SWAP DRM_IO( 0x43)
+#define DRM_IOCTL_MGA_CLEAR DRM_IOW( 0x44, drm_mga_clear_t)
+#define DRM_IOCTL_MGA_VERTEX DRM_IOW( 0x45, drm_mga_vertex_t)
#define DRM_IOCTL_MGA_INDICES DRM_IOW( 0x46, drm_mga_indices_t)
-#define DRM_IOCTL_MGA_BLIT DRM_IOW( 0x47, drm_mga_blit_t)
+#define DRM_IOCTL_MGA_ILOAD DRM_IOW( 0x47, drm_mga_iload_t)
+#define DRM_IOCTL_MGA_BLIT DRM_IOW( 0x48, drm_mga_blit_t)
-/* I810 specific ioctls */
+/* i810 specific ioctls */
#define DRM_IOCTL_I810_INIT DRM_IOW( 0x40, drm_i810_init_t)
#define DRM_IOCTL_I810_VERTEX DRM_IOW( 0x41, drm_i810_vertex_t)
#define DRM_IOCTL_I810_CLEAR DRM_IOW( 0x42, drm_i810_clear_t)
@@ -395,7 +450,7 @@ typedef struct drm_agp_info {
#define DRM_IOCTL_RADEON_CLEAR DRM_IOW( 0x48, drm_radeon_clear_t)
#define DRM_IOCTL_RADEON_VERTEX DRM_IOW( 0x49, drm_radeon_vertex_t)
#define DRM_IOCTL_RADEON_INDICES DRM_IOW( 0x4a, drm_radeon_indices_t)
-#define DRM_IOCTL_RADEON_BLIT DRM_IOW( 0x4b, drm_radeon_blit_t)
+#define DRM_IOCTL_RADEON_TEXTURE DRM_IOWR(0x4b, drm_radeon_texture_t)
#define DRM_IOCTL_RADEON_STIPPLE DRM_IOW( 0x4c, drm_radeon_stipple_t)
#define DRM_IOCTL_RADEON_INDIRECT DRM_IOWR(0x4d, drm_radeon_indirect_t)