Append _CLASS to object class id definitions

I want to be able to use ring macros of the same name

6 files changed, 162 insertions, 153 deletions

diff --git a/src/hwdefs/nv_object.xml.h b/src/hwdefs/nv_object.xml.h
index fc77dca..5d08e99 100644
--- a/src/hwdefs/nv_object.xml.h
+++ b/src/hwdefs/nv_object.xml.h
@@ -1,6 +1,11 @@
 #ifndef _HOME_SKEGGSB_GIT_ENVYTOOLS_RNNDB_NV_OBJECT_XML
 #define _HOME_SKEGGSB_GIT_ENVYTOOLS_RNNDB_NV_OBJECT_XML
 
+/* WARNING ABOUT NOT EDITING AUTOGENERATED FILE IGNORED, _CLASS SUFFIX HAS
+ * BEEN ADDED TO ALL THE OBJECT CLASS DEFINITIONS TO AVOID CONFLICTS WITH
+ * THE RING MACROS WE WANT TO USE
+ */
+
 /* Autogenerated file, DO NOT EDIT manually!
 
 This file was generated by the rules-ng-ng headergen tool in this git repository:
@@ -73,127 +78,128 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 */
 
 
-#define NV01_DMA_FROM_MEMORY					0x00000002
-#define NV01_DMA_TO_MEMORY					0x00000003
-#define NV01_NULL						0x00000030
-#define NV03_DMA_IN_MEMORY					0x0000003d
-#define NV01_OP_CLIP						0x00000010
-#define NV01_OP_BLEND_AND					0x00000011
-#define NV01_BETA						0x00000012
-#define NV04_BETA4						0x00000072
-#define NV01_OP_ROP_AND						0x00000013
-#define NV01_ROP						0x00000014
-#define NV03_ROP						0x00000043
-#define NV01_OP_CHROMA						0x00000015
-#define NV01_OP_PLANE_SWITCH					0x00000016
-#define NV01_CHROMA						0x00000017
-#define NV04_CHROMA						0x00000057
-#define NV01_PATTERN						0x00000018
-#define NV04_PATTERN						0x00000044
-#define NV01_CLIP						0x00000019
-#define NV01_OP_SRCCOPY_AND					0x00000064
-#define NV03_OP_SRCCOPY						0x00000065
-#define NV04_OP_SRCCOPY_PREMULT					0x00000066
-#define NV04_OP_BLEND_PREMULT					0x00000067
-#define NV01_POINT						0x0000001a
-#define NV01_LINE						0x0000001b
-#define NV01_LIN						0x0000001c
-#define NV04_LIN						0x0000005c
-#define NV30_LIN						0x0000035c
-#define NV40_LIN						0x0000305c
-#define NV01_TRI						0x0000001d
-#define NV04_TRI						0x0000005d
-#define NV01_RECT						0x0000001e
-#define NV04_RECT						0x0000005e
-#define NV01_BLIT						0x0000001f
-#define NV04_BLIT						0x0000005f
-#define NV15_BLIT						0x0000009f
-#define NV01_IFROMMEM						0x00000020
-#define NV01_IFC						0x00000021
-#define NV04_IFC						0x00000061
-#define NV05_IFC						0x00000065
-#define NV10_IFC						0x0000008a
-#define NV30_IFC						0x0000038a
-#define NV40_IFC						0x0000308a
-#define NV01_BITMAP						0x00000022
-#define NV01_ITOMEM						0x00000025
-#define NV03_SIFC						0x00000036
-#define NV04_SIFC						0x00000076
-#define NV05_SIFC						0x00000066
-#define NV30_SIFC						0x00000366
-#define NV40_SIFC						0x00003066
-#define NV03_SIFM						0x00000037
-#define NV04_SIFM						0x00000077
-#define NV05_SIFM						0x00000063
-#define NV10_SIFM						0x00000089
-#define NV30_SIFM						0x00000389
-#define NV40_SIFM						0x00003089
-#define NV50_SIFM						0x00005089
-#define NV03_SYFM						0x00000038
-#define NV03_GDI						0x0000004b
-#define NV04_GDI						0x0000004a
-#define NV04_SURFACE_SWZ					0x00000052
-#define NV20_SURFACE_SWZ					0x0000009e
-#define NV30_SURFACE_SWZ					0x0000039e
-#define NV40_SURFACE_SWZ					0x0000309e
-#define NV03_SURFACE_DST					0x00000058
-#define NV03_SURFACE_SRC					0x00000059
-#define NV04_SURFACE_2D						0x00000042
-#define NV10_SURFACE_2D						0x00000062
-#define NV30_SURFACE_2D						0x00000362
-#define NV40_SURFACE_2D						0x00003062
-#define NV50_SURFACE_2D						0x00005062
-#define NV04_INDEX						0x00000060
-#define NV05_INDEX						0x00000064
-#define NV30_INDEX						0x00000364
-#define NV40_INDEX						0x00003064
-#define NV10_TEXUPLOAD						0x0000007b
-#define NV30_TEXUPLOAD						0x0000037b
-#define NV40_TEXUPLOAD						0x0000307b
-#define NV04_DVD_SUBPICTURE					0x00000038
-#define NV10_DVD_SUBPICTURE					0x00000088
-#define NV03_M2MF						0x00000039
-#define NV50_M2MF						0x00005039
-#define NVC0_M2MF						0x00009039
-#define NV03_SURFACE_COLOR					0x0000005a
-#define NV03_SURFACE_ZETA					0x0000005b
-#define NV03_TEXTURED_TRIANGLE					0x00000048
-#define NV04_TEXTURED_TRIANGLE					0x00000054
-#define NV10_TEXTURED_TRIANGLE					0x00000094
-#define NV04_SURFACE_3D						0x00000053
-#define NV10_SURFACE_3D						0x00000093
-#define NV04_MULTITEX_TRIANGLE					0x00000055
-#define NV10_MULTITEX_TRIANGLE					0x00000095
-#define NV10_3D							0x00000056
-#define NV15_3D							0x00000096
-#define NV11_3D							0x00000098
-#define NV17_3D							0x00000099
-#define NV20_3D							0x00000097
-#define NV25_3D							0x00000597
-#define NV30_3D							0x00000397
-#define NV35_3D							0x00000497
-#define NV34_3D							0x00000697
-#define NV40_3D							0x00004097
-#define NV44_3D							0x00004497
-#define NV50_3D							0x00005097
-#define NV84_3D							0x00008297
-#define NVA0_3D							0x00008397
-#define NVA3_3D							0x00008597
-#define NVAF_3D							0x00008697
-#define NVC0_3D							0x00009097
-#define NVC1_3D							0x00009197
-#define NVC8_3D							0x00009297
-#define NV50_2D							0x0000502d
-#define NVC0_2D							0x0000902d
-#define NV50_COMPUTE						0x000050c0
-#define NVA3_COMPUTE						0x000085c0
-#define NVC0_COMPUTE						0x000090c0
-#define NVC8_COMPUTE						0x000092c0
-#define NV84_CRYPT						0x000074c1
-#define BLOB_NVC0_PCOPY1					0x000090b8
-#define BLOB_NVC0_PCOPY0					0x000090b5
-#define NV31_MPEG						0x00003174
-#define NV84_MPEG						0x00008274
+#define NV01_DMA_FROM_MEMORY_CLASS				0x00000002
+#define NV01_DMA_TO_MEMORY_CLASS				0x00000003
+#define NV01_NULL_CLASS						0x00000030
+#define NV03_DMA_IN_MEMORY_CLASS				0x0000003d
+#define NV01_OP_CLIP_CLASS					0x00000010
+#define NV01_OP_BLEND_AND_CLASS					0x00000011
+#define NV01_BETA_CLASS						0x00000012
+#define NV04_BETA4_CLASS					0x00000072
+#define NV01_OP_ROP_AND_CLASS					0x00000013
+#define NV01_ROP_CLASS						0x00000014
+#define NV03_ROP_CLASS						0x00000043
+#define NV01_OP_CHROMA_CLASS					0x00000015
+#define NV01_OP_PLANE_SWITCH_CLASS				0x00000016
+#define NV01_CHROMA_CLASS					0x00000017
+#define NV04_CHROMA_CLASS					0x00000057
+#define NV01_PATTERN_CLASS					0x00000018
+#define NV04_PATTERN_CLASS					0x00000044
+#define NV01_CLIP_CLASS						0x00000019
+#define NV01_OP_SRCCOPY_AND_CLASS				0x00000064
+#define NV03_OP_SRCCOPY_CLASS					0x00000065
+#define NV04_OP_SRCCOPY_PREMULT_CLASS				0x00000066
+#define NV04_OP_BLEND_PREMULT_CLASS				0x00000067
+#define NV01_POINT_CLASS					0x0000001a
+#define NV01_LINE_CLASS						0x0000001b
+#define NV01_LIN_CLASS						0x0000001c
+#define NV04_LIN_CLASS						0x0000005c
+#define NV30_LIN_CLASS						0x0000035c
+#define NV40_LIN_CLASS						0x0000305c
+#define NV01_TRI_CLASS						0x0000001d
+#define NV04_TRI_CLASS						0x0000005d
+#define NV01_RECT_CLASS						0x0000001e
+#define NV04_RECT_CLASS						0x0000005e
+#define NV01_BLIT_CLASS						0x0000001f
+#define NV04_BLIT_CLASS						0x0000005f
+#define NV15_BLIT_CLASS						0x0000009f
+#define NV01_IFROMMEM_CLASS					0x00000020
+#define NV01_IFC_CLASS						0x00000021
+#define NV04_IFC_CLASS						0x00000061
+#define NV05_IFC_CLASS						0x00000065
+#define NV10_IFC_CLASS						0x0000008a
+#define NV30_IFC_CLASS						0x0000038a
+#define NV40_IFC_CLASS						0x0000308a
+#define NV01_BITMAP_CLASS					0x00000022
+#define NV01_ITOMEM_CLASS					0x00000025
+#define NV03_SIFC_CLASS						0x00000036
+#define NV04_SIFC_CLASS						0x00000076
+#define NV05_SIFC_CLASS						0x00000066
+#define NV30_SIFC_CLASS						0x00000366
+#define NV40_SIFC_CLASS						0x00003066
+#define NV03_SIFM_CLASS						0x00000037
+#define NV04_SIFM_CLASS						0x00000077
+#define NV05_SIFM_CLASS						0x00000063
+#define NV10_SIFM_CLASS						0x00000089
+#define NV30_SIFM_CLASS						0x00000389
+#define NV40_SIFM_CLASS						0x00003089
+#define NV50_SIFM_CLASS						0x00005089
+#define NV03_SYFM_CLASS						0x00000038
+#define NV03_GDI_CLASS						0x0000004b
+#define NV04_GDI_CLASS						0x0000004a
+#define NV04_SURFACE_SWZ_CLASS					0x00000052
+#define NV20_SURFACE_SWZ_CLASS					0x0000009e
+#define NV30_SURFACE_SWZ_CLASS					0x0000039e
+#define NV40_SURFACE_SWZ_CLASS					0x0000309e
+#define NV03_SURFACE_DST_CLASS					0x00000058
+#define NV03_SURFACE_SRC_CLASS					0x00000059
+#define NV04_SURFACE_2D_CLASS					0x00000042
+#define NV10_SURFACE_2D_CLASS					0x00000062
+#define NV30_SURFACE_2D_CLASS					0x00000362
+#define NV40_SURFACE_2D_CLASS					0x00003062
+#define NV50_SURFACE_2D_CLASS					0x00005062
+#define NV04_INDEX_CLASS					0x00000060
+#define NV05_INDEX_CLASS					0x00000064
+#define NV30_INDEX_CLASS					0x00000364
+#define NV40_INDEX_CLASS					0x00003064
+#define NV10_TEXUPLOAD_CLASS					0x0000007b
+#define NV30_TEXUPLOAD_CLASS					0x0000037b
+#define NV40_TEXUPLOAD_CLASS					0x0000307b
+#define NV04_DVD_SUBPICTURE_CLASS				0x00000038
+#define NV10_DVD_SUBPICTURE_CLASS				0x00000088
+#define NV03_M2MF_CLASS						0x00000039
+#define NV50_M2MF_CLASS						0x00005039
+#define NVC0_M2MF_CLASS						0x00009039
+#define NV03_SURFACE_COLOR_CLASS				0x0000005a
+#define NV03_SURFACE_ZETA_CLASS					0x0000005b
+#define NV03_TEXTURED_TRIANGLE_CLASS				0x00000048
+#define NV04_TEXTURED_TRIANGLE_CLASS				0x00000054
+#define NV10_TEXTURED_TRIANGLE_CLASS				0x00000094
+#define NV04_SURFACE_3D_CLASS					0x00000053
+#define NV10_SURFACE_3D_CLASS					0x00000093
+#define NV04_MULTITEX_TRIANGLE_CLASS				0x00000055
+#define NV10_MULTITEX_TRIANGLE_CLASS				0x00000095
+#define NV10_3D_CLASS						0x00000056
+#define NV15_3D_CLASS						0x00000096
+#define NV11_3D_CLASS						0x00000098
+#define NV17_3D_CLASS						0x00000099
+#define NV20_3D_CLASS						0x00000097
+#define NV25_3D_CLASS						0x00000597
+#define NV30_3D_CLASS						0x00000397
+#define NV35_3D_CLASS						0x00000497
+#define NV34_3D_CLASS						0x00000697
+#define NV40_3D_CLASS						0x00004097
+#define NV44_3D_CLASS						0x00004497
+#define NV50_3D_CLASS						0x00005097
+#define NV84_3D_CLASS						0x00008297
+#define NVA0_3D_CLASS						0x00008397
+#define NVA3_3D_CLASS						0x00008597
+#define NVAF_3D_CLASS						0x00008697
+#define NVC0_3D_CLASS						0x00009097
+#define NVC1_3D_CLASS						0x00009197
+#define NVC8_3D_CLASS						0x00009297
+#define NV50_2D_CLASS						0x0000502d
+#define NVC0_2D_CLASS						0x0000902d
+#define NV50_COMPUTE_CLASS					0x000050c0
+#define NVA3_COMPUTE_CLASS					0x000085c0
+#define NVC0_COMPUTE_CLASS					0x000090c0
+#define NVC8_COMPUTE_CLASS					0x000092c0
+#define NV84_CRYPT_CLASS					0x000074c1
+#define BLOB_NVC0_PCOPY1_CLASS					0x000090b8
+#define BLOB_NVC0_PCOPY0_CLASS					0x000090b5
+#define NV31_MPEG_CLASS						0x00003174
+#define NV84_MPEG_CLASS						0x00008274
+
 #define NV01_SUBCHAN__SIZE					0x00008000
 #define NV01_SUBCHAN						0x00000000
 
diff --git a/src/nv10_exa.c b/src/nv10_exa.c
index 239d647..01d7002 100644
--- a/src/nv10_exa.c
+++ b/src/nv10_exa.c
@@ -735,13 +735,13 @@ NVAccelInitNV10TCL(ScrnInfoPtr pScrn)
 		return FALSE;
 
 	if (pNv->dev->chipset >= 0x20 || pNv->dev->chipset == 0x1a)
-		class = NV15_3D;
+		class = NV15_3D_CLASS;
 	else if (pNv->dev->chipset >= 0x17)
-		class = NV17_3D;
+		class = NV17_3D_CLASS;
 	else if (pNv->dev->chipset >= 0x11)
-		class = NV15_3D;
+		class = NV15_3D_CLASS;
 	else
-		class = NV10_3D;
+		class = NV10_3D_CLASS;
 
 	if (!pNv->Nv3D) {
 		if (nouveau_grobj_alloc(pNv->chan, Nv3D, class, &pNv->Nv3D))
@@ -793,7 +793,7 @@ NVAccelInitNV10TCL(ScrnInfoPtr pScrn)
 	BEGIN_RING(chan, celsius, NV04_GRAPH_NOP, 1);
 	OUT_RING  (chan, 0);
 
-	if (class != NV10_3D) {
+	if (class != NV10_3D_CLASS) {
 		/* For nv11, nv17 */
 		BEGIN_RING(chan, celsius, 0x120, 3);
 		OUT_RING  (chan, 0);
diff --git a/src/nv30_exa.c b/src/nv30_exa.c
index b132368..822bdd6 100644
--- a/src/nv30_exa.c
+++ b/src/nv30_exa.c
@@ -686,11 +686,11 @@ NVAccelInitNV30TCL(ScrnInfoPtr pScrn)
 	chipset &= 0xf;
 
 	if (NV30TCL_CHIPSET_3X_MASK & (1<<chipset))
-		class = NV30_3D;
+		class = NV30_3D_CLASS;
 	else if (NV35TCL_CHIPSET_3X_MASK & (1<<chipset))
-		class = NV35_3D;
+		class = NV35_3D_CLASS;
 	else if (NV30_3D_CHIPSET_3X_MASK & (1<<chipset))
-		class = NV34_3D;
+		class = NV34_3D_CLASS;
 	else {
 		xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
 			   "NV30EXA: Unknown chipset NV3%1x\n", chipset);
diff --git a/src/nv40_exa.c b/src/nv40_exa.c
index 258f5cf..ac98ed1 100644
--- a/src/nv40_exa.c
+++ b/src/nv40_exa.c
@@ -618,16 +618,16 @@ NVAccelInitNV40TCL(ScrnInfoPtr pScrn)
 	if ((chipset & 0xf0) == NV_ARCH_40) {
 		chipset &= 0xf;
 		if (NV30_3D_CHIPSET_4X_MASK & (1<<chipset))
-			class = NV40_3D;
+			class = NV40_3D_CLASS;
 		else if (NV44TCL_CHIPSET_4X_MASK & (1<<chipset))
-			class = NV44_3D;
+			class = NV44_3D_CLASS;
 		else {
 			xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
 					"NV40EXA: Unknown chipset NV4%1x\n", chipset);
 			return FALSE;
 		}
 	} else if ( (chipset & 0xf0) == 0x60) {
-		class = NV44_3D;
+		class = NV44_3D_CLASS;
 	} else
 		return TRUE;
 
diff --git a/src/nv50_accel.c b/src/nv50_accel.c
index 98945b6..fbb2dd8 100644
--- a/src/nv50_accel.c
+++ b/src/nv50_accel.c
@@ -68,24 +68,24 @@ NVAccelInitNV50TCL(ScrnInfoPtr pScrn)
 
 	switch (pNv->dev->chipset & 0xf0) {
 	case 0x50:
-		class = NV50_3D;
+		class = NV50_3D_CLASS;
 		break;
 	case 0x80:
 	case 0x90:
-		class = NV84_3D;
+		class = NV84_3D_CLASS;
 		break;
 	case 0xa0:
 		switch (pNv->dev->chipset) {
 		case 0xa0:
 		case 0xaa:
 		case 0xac:
-			class = NVA0_3D;
+			class = NVA0_3D_CLASS;
 			break;
 		case 0xaf:
-			class = NVAF_3D;
+			class = NVAF_3D_CLASS;
 			break;
 		default:
-			class = NVA3_3D;
+			class = NVA3_3D_CLASS;
 			break;
 		}
 		break;
diff --git a/src/nv_accel_common.c b/src/nv_accel_common.c
index f40c45e..f583b1e 100644
--- a/src/nv_accel_common.c
+++ b/src/nv_accel_common.c
@@ -178,8 +178,8 @@ NVAccelInitContextSurfaces(ScrnInfoPtr pScrn)
 	struct nouveau_grobj *surf2d;
 	uint32_t class;
 
-	class = (pNv->Architecture >= NV_ARCH_10) ? NV10_SURFACE_2D :
-						    NV04_SURFACE_2D;
+	class = (pNv->Architecture >= NV_ARCH_10) ? NV10_SURFACE_2D_CLASS :
+						    NV04_SURFACE_2D_CLASS;
 
 	if (!pNv->NvContextSurfaces) {
 		if (nouveau_grobj_alloc(chan, NvContextSurfaces, class,
@@ -306,7 +306,8 @@ NVAccelInitImagePattern(ScrnInfoPtr pScrn)
 	struct nouveau_grobj *patt;
 
 	if (!pNv->NvImagePattern) {
-		if (nouveau_grobj_alloc(chan, NvImagePattern, NV04_PATTERN,
+		if (nouveau_grobj_alloc(chan, NvImagePattern,
+					NV04_PATTERN_CLASS,
 					&pNv->NvImagePattern))
 			return FALSE;
 	}
@@ -334,7 +335,8 @@ NVAccelInitRasterOp(ScrnInfoPtr pScrn)
 	struct nouveau_grobj *rop;
 
 	if (!pNv->NvRop) {
-		if (nouveau_grobj_alloc(chan, NvRop, NV03_ROP, &pNv->NvRop))
+		if (nouveau_grobj_alloc(chan, NvRop, NV03_ROP_CLASS,
+					&pNv->NvRop))
 			return FALSE;
 	}
 	rop = pNv->NvRop;
@@ -354,7 +356,7 @@ NVAccelInitRectangle(ScrnInfoPtr pScrn)
 	struct nouveau_grobj *rect;
 
 	if (!pNv->NvRectangle) {
-		if (nouveau_grobj_alloc(chan, NvRectangle, NV04_GDI,
+		if (nouveau_grobj_alloc(chan, NvRectangle, NV04_GDI_CLASS,
 					&pNv->NvRectangle))
 			return FALSE;
 	}
@@ -391,7 +393,7 @@ NVAccelInitImageBlit(ScrnInfoPtr pScrn)
 	struct nouveau_grobj *blit;
 	uint32_t class;
 
-	class = (pNv->dev->chipset >= 0x11) ? NV15_BLIT : NV04_BLIT;
+	class = (pNv->dev->chipset >= 0x11) ? NV15_BLIT_CLASS : NV04_BLIT_CLASS;
 
 	if (!pNv->NvImageBlit) {
 		if (nouveau_grobj_alloc(chan, NvImageBlit, class,
@@ -412,7 +414,7 @@ NVAccelInitImageBlit(ScrnInfoPtr pScrn)
 	OUT_RING  (chan, pNv->NvRop->handle);
 	BEGIN_RING(chan, blit, NV01_BLIT_OPERATION, 1);
 	OUT_RING  (chan, NV01_BLIT_OPERATION_ROP_AND);
-	if (blit->grclass == NV15_BLIT) {
+	if (blit->grclass == NV15_BLIT_CLASS) {
 		BEGIN_RING(chan, blit, NV15_BLIT_FLIP_SET_READ, 3);
 		OUT_RING  (chan, 0);
 		OUT_RING  (chan, 1);
@@ -432,16 +434,16 @@ NVAccelInitScaledImage(ScrnInfoPtr pScrn)
 
 	switch (pNv->Architecture) {
 	case NV_ARCH_04:
-		class = NV04_SIFM;
+		class = NV04_SIFM_CLASS;
 		break;
 	case NV_ARCH_10:
 	case NV_ARCH_20:
 	case NV_ARCH_30:
-		class = NV10_SIFM;
+		class = NV10_SIFM_CLASS;
 		break;
 	case NV_ARCH_40:
 	default:
-		class = NV40_SIFM;
+		class = NV40_SIFM_CLASS;
 		break;
 	}
 
@@ -478,7 +480,8 @@ NVAccelInitClipRectangle(ScrnInfoPtr pScrn)
 	struct nouveau_grobj *clip;
 
 	if (!pNv->NvClipRectangle) {
-		if (nouveau_grobj_alloc(pNv->chan, NvClipRectangle, NV01_CLIP,
+		if (nouveau_grobj_alloc(pNv->chan, NvClipRectangle,
+					NV01_CLIP_CLASS,
 					&pNv->NvClipRectangle))
 			return FALSE;
 	}
@@ -500,9 +503,9 @@ NVAccelInitMemFormat(ScrnInfoPtr pScrn)
 	uint32_t class;
 
 	if (pNv->Architecture < NV_ARCH_50)
-		class = NV03_M2MF;
+		class = NV03_M2MF_CLASS;
 	else
-		class = NV50_M2MF;
+		class = NV50_M2MF_CLASS;
 
 	if (!pNv->NvMemFormat) {
 		if (nouveau_grobj_alloc(chan, NvMemFormat, class,
@@ -530,14 +533,14 @@ NVAccelInitImageFromCpu(ScrnInfoPtr pScrn)
 
 	switch (pNv->Architecture) {
 	case NV_ARCH_04:
-		class = NV04_IFC;
+		class = NV04_IFC_CLASS;
 		break;
 	case NV_ARCH_10:
 	case NV_ARCH_20:
 	case NV_ARCH_30:
 	case NV_ARCH_40:
 	default:
-		class = NV10_IFC;
+		class = NV10_IFC_CLASS;
 		break;
 	}
 
@@ -578,7 +581,7 @@ NVAccelInit2D_NV50(ScrnInfoPtr pScrn)
 	struct nouveau_grobj *eng2d;
 
 	if (!pNv->Nv2D) {
-		if (nouveau_grobj_alloc(chan, Nv2D, NV50_2D, &pNv->Nv2D))
+		if (nouveau_grobj_alloc(chan, Nv2D, NV50_2D_CLASS, &pNv->Nv2D))
 			return FALSE;
 	}
 	eng2d = pNv->Nv2D;