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path: root/drivers/gpu/drm/gma500/mdfld_intel_display.c
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Diffstat (limited to 'drivers/gpu/drm/gma500/mdfld_intel_display.c')
-rw-r--r--drivers/gpu/drm/gma500/mdfld_intel_display.c65
1 files changed, 23 insertions, 42 deletions
diff --git a/drivers/gpu/drm/gma500/mdfld_intel_display.c b/drivers/gpu/drm/gma500/mdfld_intel_display.c
index 74485dc43945..321c00a944e9 100644
--- a/drivers/gpu/drm/gma500/mdfld_intel_display.c
+++ b/drivers/gpu/drm/gma500/mdfld_intel_display.c
@@ -23,7 +23,7 @@
23 23
24#include <drm/drmP.h> 24#include <drm/drmP.h>
25#include "psb_intel_reg.h" 25#include "psb_intel_reg.h"
26#include "psb_intel_display.h" 26#include "gma_display.h"
27#include "framebuffer.h" 27#include "framebuffer.h"
28#include "mdfld_output.h" 28#include "mdfld_output.h"
29#include "mdfld_dsi_output.h" 29#include "mdfld_dsi_output.h"
@@ -65,7 +65,7 @@ void mdfldWaitForPipeDisable(struct drm_device *dev, int pipe)
65 } 65 }
66 66
67 /* FIXME JLIU7_PO */ 67 /* FIXME JLIU7_PO */
68 psb_intel_wait_for_vblank(dev); 68 gma_wait_for_vblank(dev);
69 return; 69 return;
70 70
71 /* Wait for for the pipe disable to take effect. */ 71 /* Wait for for the pipe disable to take effect. */
@@ -93,7 +93,7 @@ void mdfldWaitForPipeEnable(struct drm_device *dev, int pipe)
93 } 93 }
94 94
95 /* FIXME JLIU7_PO */ 95 /* FIXME JLIU7_PO */
96 psb_intel_wait_for_vblank(dev); 96 gma_wait_for_vblank(dev);
97 return; 97 return;
98 98
99 /* Wait for for the pipe enable to take effect. */ 99 /* Wait for for the pipe enable to take effect. */
@@ -104,25 +104,6 @@ void mdfldWaitForPipeEnable(struct drm_device *dev, int pipe)
104 } 104 }
105} 105}
106 106
107static void psb_intel_crtc_prepare(struct drm_crtc *crtc)
108{
109 struct drm_crtc_helper_funcs *crtc_funcs = crtc->helper_private;
110 crtc_funcs->dpms(crtc, DRM_MODE_DPMS_OFF);
111}
112
113static void psb_intel_crtc_commit(struct drm_crtc *crtc)
114{
115 struct drm_crtc_helper_funcs *crtc_funcs = crtc->helper_private;
116 crtc_funcs->dpms(crtc, DRM_MODE_DPMS_ON);
117}
118
119static bool psb_intel_crtc_mode_fixup(struct drm_crtc *crtc,
120 const struct drm_display_mode *mode,
121 struct drm_display_mode *adjusted_mode)
122{
123 return true;
124}
125
126/** 107/**
127 * Return the pipe currently connected to the panel fitter, 108 * Return the pipe currently connected to the panel fitter,
128 * or -1 if the panel fitter is not present or not in use 109 * or -1 if the panel fitter is not present or not in use
@@ -184,9 +165,9 @@ static int mdfld__intel_pipe_set_base(struct drm_crtc *crtc, int x, int y,
184{ 165{
185 struct drm_device *dev = crtc->dev; 166 struct drm_device *dev = crtc->dev;
186 struct drm_psb_private *dev_priv = dev->dev_private; 167 struct drm_psb_private *dev_priv = dev->dev_private;
187 struct psb_intel_crtc *psb_intel_crtc = to_psb_intel_crtc(crtc); 168 struct gma_crtc *gma_crtc = to_gma_crtc(crtc);
188 struct psb_framebuffer *psbfb = to_psb_fb(crtc->fb); 169 struct psb_framebuffer *psbfb = to_psb_fb(crtc->fb);
189 int pipe = psb_intel_crtc->pipe; 170 int pipe = gma_crtc->pipe;
190 const struct psb_offset *map = &dev_priv->regmap[pipe]; 171 const struct psb_offset *map = &dev_priv->regmap[pipe];
191 unsigned long start, offset; 172 unsigned long start, offset;
192 u32 dspcntr; 173 u32 dspcntr;
@@ -324,8 +305,8 @@ static void mdfld_crtc_dpms(struct drm_crtc *crtc, int mode)
324{ 305{
325 struct drm_device *dev = crtc->dev; 306 struct drm_device *dev = crtc->dev;
326 struct drm_psb_private *dev_priv = dev->dev_private; 307 struct drm_psb_private *dev_priv = dev->dev_private;
327 struct psb_intel_crtc *psb_intel_crtc = to_psb_intel_crtc(crtc); 308 struct gma_crtc *gma_crtc = to_gma_crtc(crtc);
328 int pipe = psb_intel_crtc->pipe; 309 int pipe = gma_crtc->pipe;
329 const struct psb_offset *map = &dev_priv->regmap[pipe]; 310 const struct psb_offset *map = &dev_priv->regmap[pipe];
330 u32 pipeconf = dev_priv->pipeconf[pipe]; 311 u32 pipeconf = dev_priv->pipeconf[pipe];
331 u32 temp; 312 u32 temp;
@@ -436,7 +417,7 @@ static void mdfld_crtc_dpms(struct drm_crtc *crtc, int mode)
436 } 417 }
437 } 418 }
438 419
439 psb_intel_crtc_load_lut(crtc); 420 gma_crtc_load_lut(crtc);
440 421
441 /* Give the overlay scaler a chance to enable 422 /* Give the overlay scaler a chance to enable
442 if it's on this pipe */ 423 if it's on this pipe */
@@ -611,8 +592,8 @@ static const struct mrst_limit_t *mdfld_limit(struct drm_crtc *crtc)
611 struct drm_device *dev = crtc->dev; 592 struct drm_device *dev = crtc->dev;
612 struct drm_psb_private *dev_priv = dev->dev_private; 593 struct drm_psb_private *dev_priv = dev->dev_private;
613 594
614 if (psb_intel_pipe_has_type(crtc, INTEL_OUTPUT_MIPI) 595 if (gma_pipe_has_type(crtc, INTEL_OUTPUT_MIPI)
615 || psb_intel_pipe_has_type(crtc, INTEL_OUTPUT_MIPI2)) { 596 || gma_pipe_has_type(crtc, INTEL_OUTPUT_MIPI2)) {
616 if ((ksel == KSEL_CRYSTAL_19) || (ksel == KSEL_BYPASS_19)) 597 if ((ksel == KSEL_CRYSTAL_19) || (ksel == KSEL_BYPASS_19))
617 limit = &mdfld_limits[MDFLD_LIMT_DSIPLL_19]; 598 limit = &mdfld_limits[MDFLD_LIMT_DSIPLL_19];
618 else if (ksel == KSEL_BYPASS_25) 599 else if (ksel == KSEL_BYPASS_25)
@@ -624,7 +605,7 @@ static const struct mrst_limit_t *mdfld_limit(struct drm_crtc *crtc)
624 (dev_priv->core_freq == 100 || 605 (dev_priv->core_freq == 100 ||
625 dev_priv->core_freq == 200)) 606 dev_priv->core_freq == 200))
626 limit = &mdfld_limits[MDFLD_LIMT_DSIPLL_100]; 607 limit = &mdfld_limits[MDFLD_LIMT_DSIPLL_100];
627 } else if (psb_intel_pipe_has_type(crtc, INTEL_OUTPUT_HDMI)) { 608 } else if (gma_pipe_has_type(crtc, INTEL_OUTPUT_HDMI)) {
628 if ((ksel == KSEL_CRYSTAL_19) || (ksel == KSEL_BYPASS_19)) 609 if ((ksel == KSEL_CRYSTAL_19) || (ksel == KSEL_BYPASS_19))
629 limit = &mdfld_limits[MDFLD_LIMT_DPLL_19]; 610 limit = &mdfld_limits[MDFLD_LIMT_DPLL_19];
630 else if (ksel == KSEL_BYPASS_25) 611 else if (ksel == KSEL_BYPASS_25)
@@ -688,9 +669,9 @@ static int mdfld_crtc_mode_set(struct drm_crtc *crtc,
688 struct drm_framebuffer *old_fb) 669 struct drm_framebuffer *old_fb)
689{ 670{
690 struct drm_device *dev = crtc->dev; 671 struct drm_device *dev = crtc->dev;
691 struct psb_intel_crtc *psb_intel_crtc = to_psb_intel_crtc(crtc); 672 struct gma_crtc *gma_crtc = to_gma_crtc(crtc);
692 struct drm_psb_private *dev_priv = dev->dev_private; 673 struct drm_psb_private *dev_priv = dev->dev_private;
693 int pipe = psb_intel_crtc->pipe; 674 int pipe = gma_crtc->pipe;
694 const struct psb_offset *map = &dev_priv->regmap[pipe]; 675 const struct psb_offset *map = &dev_priv->regmap[pipe];
695 int refclk = 0; 676 int refclk = 0;
696 int clk_n = 0, clk_p2 = 0, clk_byte = 1, clk = 0, m_conv = 0, 677 int clk_n = 0, clk_p2 = 0, clk_byte = 1, clk = 0, m_conv = 0,
@@ -700,7 +681,7 @@ static int mdfld_crtc_mode_set(struct drm_crtc *crtc,
700 u32 dpll = 0, fp = 0; 681 u32 dpll = 0, fp = 0;
701 bool is_mipi = false, is_mipi2 = false, is_hdmi = false; 682 bool is_mipi = false, is_mipi2 = false, is_hdmi = false;
702 struct drm_mode_config *mode_config = &dev->mode_config; 683 struct drm_mode_config *mode_config = &dev->mode_config;
703 struct psb_intel_encoder *psb_intel_encoder = NULL; 684 struct gma_encoder *gma_encoder = NULL;
704 uint64_t scalingType = DRM_MODE_SCALE_FULLSCREEN; 685 uint64_t scalingType = DRM_MODE_SCALE_FULLSCREEN;
705 struct drm_encoder *encoder; 686 struct drm_encoder *encoder;
706 struct drm_connector *connector; 687 struct drm_connector *connector;
@@ -749,9 +730,9 @@ static int mdfld_crtc_mode_set(struct drm_crtc *crtc,
749 if (!gma_power_begin(dev, true)) 730 if (!gma_power_begin(dev, true))
750 return 0; 731 return 0;
751 732
752 memcpy(&psb_intel_crtc->saved_mode, mode, 733 memcpy(&gma_crtc->saved_mode, mode,
753 sizeof(struct drm_display_mode)); 734 sizeof(struct drm_display_mode));
754 memcpy(&psb_intel_crtc->saved_adjusted_mode, adjusted_mode, 735 memcpy(&gma_crtc->saved_adjusted_mode, adjusted_mode,
755 sizeof(struct drm_display_mode)); 736 sizeof(struct drm_display_mode));
756 737
757 list_for_each_entry(connector, &mode_config->connector_list, head) { 738 list_for_each_entry(connector, &mode_config->connector_list, head) {
@@ -766,9 +747,9 @@ static int mdfld_crtc_mode_set(struct drm_crtc *crtc,
766 if (encoder->crtc != crtc) 747 if (encoder->crtc != crtc)
767 continue; 748 continue;
768 749
769 psb_intel_encoder = psb_intel_attached_encoder(connector); 750 gma_encoder = gma_attached_encoder(connector);
770 751
771 switch (psb_intel_encoder->type) { 752 switch (gma_encoder->type) {
772 case INTEL_OUTPUT_MIPI: 753 case INTEL_OUTPUT_MIPI:
773 is_mipi = true; 754 is_mipi = true;
774 break; 755 break;
@@ -819,7 +800,7 @@ static int mdfld_crtc_mode_set(struct drm_crtc *crtc,
819 800
820 REG_WRITE(map->pos, 0); 801 REG_WRITE(map->pos, 0);
821 802
822 if (psb_intel_encoder) 803 if (gma_encoder)
823 drm_object_property_get_value(&connector->base, 804 drm_object_property_get_value(&connector->base,
824 dev->mode_config.scaling_mode_property, &scalingType); 805 dev->mode_config.scaling_mode_property, &scalingType);
825 806
@@ -1034,7 +1015,7 @@ static int mdfld_crtc_mode_set(struct drm_crtc *crtc,
1034 1015
1035 /* Wait for for the pipe enable to take effect. */ 1016 /* Wait for for the pipe enable to take effect. */
1036 REG_WRITE(map->cntr, dev_priv->dspcntr[pipe]); 1017 REG_WRITE(map->cntr, dev_priv->dspcntr[pipe]);
1037 psb_intel_wait_for_vblank(dev); 1018 gma_wait_for_vblank(dev);
1038 1019
1039mrst_crtc_mode_set_exit: 1020mrst_crtc_mode_set_exit:
1040 1021
@@ -1045,10 +1026,10 @@ mrst_crtc_mode_set_exit:
1045 1026
1046const struct drm_crtc_helper_funcs mdfld_helper_funcs = { 1027const struct drm_crtc_helper_funcs mdfld_helper_funcs = {
1047 .dpms = mdfld_crtc_dpms, 1028 .dpms = mdfld_crtc_dpms,
1048 .mode_fixup = psb_intel_crtc_mode_fixup, 1029 .mode_fixup = gma_crtc_mode_fixup,
1049 .mode_set = mdfld_crtc_mode_set, 1030 .mode_set = mdfld_crtc_mode_set,
1050 .mode_set_base = mdfld__intel_pipe_set_base, 1031 .mode_set_base = mdfld__intel_pipe_set_base,
1051 .prepare = psb_intel_crtc_prepare, 1032 .prepare = gma_crtc_prepare,
1052 .commit = psb_intel_crtc_commit, 1033 .commit = gma_crtc_commit,
1053}; 1034};
1054 1035